US9552033B2 - Latency-based power mode units for controlling power modes of processor cores, and related methods and systems - Google Patents

Latency-based power mode units for controlling power modes of processor cores, and related methods and systems Download PDF

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Publication number
US9552033B2
US9552033B2 US14/258,541 US201414258541A US9552033B2 US 9552033 B2 US9552033 B2 US 9552033B2 US 201414258541 A US201414258541 A US 201414258541A US 9552033 B2 US9552033 B2 US 9552033B2
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Prior art keywords
power mode
processor core
latency
power
threads
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Expired - Fee Related, expires
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US14/258,541
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US20150301573A1 (en
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Suresh Kumar Venkumahanti
Peter Gene Sassone
Sanjay Bhagawan Patil
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Qualcomm Inc
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Qualcomm Inc
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Priority to US14/258,541 priority Critical patent/US9552033B2/en
Assigned to QUALCOMM INCORPORATED reassignment QUALCOMM INCORPORATED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: PATIL, SANJAY BHAGAWAN, SASSONE, PETER GENE, VENKUMAHANTI, SURESH KUMAR
Priority to BR112016024712A priority patent/BR112016024712A2/pt
Priority to KR1020167029018A priority patent/KR101826088B1/ko
Priority to EP15716240.5A priority patent/EP3134805B1/en
Priority to JP2016563437A priority patent/JP6151465B1/ja
Priority to PCT/US2015/022014 priority patent/WO2015164011A1/en
Priority to CN201580019999.7A priority patent/CN106233225B/zh
Priority to TW104109610A priority patent/TWI595353B/zh
Publication of US20150301573A1 publication Critical patent/US20150301573A1/en
Publication of US9552033B2 publication Critical patent/US9552033B2/en
Application granted granted Critical
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3243—Power saving in microcontroller unit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G06F9/4893—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues taking into account power or heat criteria
    • Y02B60/1239—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
US14/258,541 2014-04-22 2014-04-22 Latency-based power mode units for controlling power modes of processor cores, and related methods and systems Expired - Fee Related US9552033B2 (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
US14/258,541 US9552033B2 (en) 2014-04-22 2014-04-22 Latency-based power mode units for controlling power modes of processor cores, and related methods and systems
JP2016563437A JP6151465B1 (ja) 2014-04-22 2015-03-23 プロセッサコアの電力モードを制御するためのレイテンシベースの電力モードユニット、ならびに関連する方法およびシステム
KR1020167029018A KR101826088B1 (ko) 2014-04-22 2015-03-23 프로세서 코어들의 전력 모드들을 제어하기 위한 레이턴시-기반 전력 모드 유닛들, 및 관련 방법들 및 시스템들
EP15716240.5A EP3134805B1 (en) 2014-04-22 2015-03-23 Latency-based power mode units for controlling power modes of processor cores, and related methods and systems
BR112016024712A BR112016024712A2 (pt) 2014-04-22 2015-03-23 unidades de modo de energia com base em latência para controlar modos de energia de núcleos de processador e métodos e sistemas relacionados
PCT/US2015/022014 WO2015164011A1 (en) 2014-04-22 2015-03-23 Latency-based power mode units for controlling power modes of processor cores, and related methods and systems
CN201580019999.7A CN106233225B (zh) 2014-04-22 2015-03-23 用于控制处理器核心的电力模式的基于延时的电力模式单元以及相关方法及系统
TW104109610A TWI595353B (zh) 2014-04-22 2015-03-25 用於控制處理器核心之電力模式的基於延遲電力模式單元以及相關方法及系統

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US14/258,541 US9552033B2 (en) 2014-04-22 2014-04-22 Latency-based power mode units for controlling power modes of processor cores, and related methods and systems

Publications (2)

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US20150301573A1 US20150301573A1 (en) 2015-10-22
US9552033B2 true US9552033B2 (en) 2017-01-24

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US14/258,541 Expired - Fee Related US9552033B2 (en) 2014-04-22 2014-04-22 Latency-based power mode units for controlling power modes of processor cores, and related methods and systems

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US (1) US9552033B2 (zh)
EP (1) EP3134805B1 (zh)
JP (1) JP6151465B1 (zh)
KR (1) KR101826088B1 (zh)
CN (1) CN106233225B (zh)
BR (1) BR112016024712A2 (zh)
TW (1) TWI595353B (zh)
WO (1) WO2015164011A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10317974B2 (en) * 2016-04-08 2019-06-11 Intel Corporation Power supply unit (PSU) switching
US10459517B2 (en) * 2017-03-31 2019-10-29 Qualcomm Incorporated System and methods for scheduling software tasks based on central processing unit power characteristics
US10726879B2 (en) * 2017-12-08 2020-07-28 Samsung Electronics Co., Ltd. Low-power data transfer from buffer to flash memory
US20220129171A1 (en) * 2020-10-23 2022-04-28 Pure Storage, Inc. Preserving data in a storage system operating in a reduced power mode
US11899944B2 (en) 2021-03-18 2024-02-13 Micron Technology, Inc. Strategic power mode transition in a multi-memory device

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US6233690B1 (en) 1998-09-17 2001-05-15 Intel Corporation Mechanism for saving power on long latency stalls
US20030126186A1 (en) * 2001-12-31 2003-07-03 Dion Rodgers Method and apparatus for suspending execution of a thread until a specified memory access occurs
US20050289377A1 (en) * 2004-06-28 2005-12-29 Ati Technologies Inc. Apparatus and method for reducing power consumption in a graphics processing device
US20060200684A1 (en) * 2005-03-01 2006-09-07 Vasudev Bibikar Power mode change voltage control in computerized system
US20060236136A1 (en) 2005-04-14 2006-10-19 Jones Darren M Apparatus and method for automatic low power mode invocation in a multi-threaded processor
US20090172434A1 (en) 2007-12-31 2009-07-02 Kwa Seh W Latency based platform coordination
US20100131785A1 (en) * 2008-11-24 2010-05-27 1E Limited Power management of computers
US20100332879A1 (en) * 2009-06-24 2010-12-30 Konica Minolta Business Technologies, Inc. Image forming apparatus
US20100332876A1 (en) * 2009-06-26 2010-12-30 Microsoft Corporation Reducing power consumption of computing devices by forecasting computing performance needs
US20110173474A1 (en) 2010-01-11 2011-07-14 Salsbery Brian J Dynamic low power mode implementation for computing devices
US20110314314A1 (en) 2010-06-18 2011-12-22 Samsung Electronics Co., Ltd. Power gating of cores by an soc
US20130073884A1 (en) 2011-09-19 2013-03-21 Qualcomm Incorporated Dynamic sleep for multicore computing devices
US20130275791A1 (en) 2012-04-12 2013-10-17 Qualcomm Incorporated Method and System for Tracking and Selecting Optimal Power Conserving Modes of a PCD
US20140006824A1 (en) 2012-06-29 2014-01-02 Christian Maciocco Using device idle duration information to optimize energy efficiency

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US7653906B2 (en) * 2002-10-23 2010-01-26 Intel Corporation Apparatus and method for reducing power consumption on simultaneous multi-threading systems
GB0407384D0 (en) * 2004-03-31 2004-05-05 Ignios Ltd Resource management in a multicore processor
JP5235870B2 (ja) * 2007-04-09 2013-07-10 パナソニック株式会社 マルチプロセッサ制御装置、その制御方法および集積回路
US9003209B2 (en) * 2012-06-29 2015-04-07 Intel Corporation Efficient integrated switching voltage regulator comprising switches coupled to bridge drivers to provide regulated power supply to power domains

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US6233690B1 (en) 1998-09-17 2001-05-15 Intel Corporation Mechanism for saving power on long latency stalls
US20030126186A1 (en) * 2001-12-31 2003-07-03 Dion Rodgers Method and apparatus for suspending execution of a thread until a specified memory access occurs
US20050289377A1 (en) * 2004-06-28 2005-12-29 Ati Technologies Inc. Apparatus and method for reducing power consumption in a graphics processing device
US20060200684A1 (en) * 2005-03-01 2006-09-07 Vasudev Bibikar Power mode change voltage control in computerized system
US20060236136A1 (en) 2005-04-14 2006-10-19 Jones Darren M Apparatus and method for automatic low power mode invocation in a multi-threaded processor
US20090172434A1 (en) 2007-12-31 2009-07-02 Kwa Seh W Latency based platform coordination
US20100131785A1 (en) * 2008-11-24 2010-05-27 1E Limited Power management of computers
US20100332879A1 (en) * 2009-06-24 2010-12-30 Konica Minolta Business Technologies, Inc. Image forming apparatus
US20100332876A1 (en) * 2009-06-26 2010-12-30 Microsoft Corporation Reducing power consumption of computing devices by forecasting computing performance needs
US20110173474A1 (en) 2010-01-11 2011-07-14 Salsbery Brian J Dynamic low power mode implementation for computing devices
US20110314314A1 (en) 2010-06-18 2011-12-22 Samsung Electronics Co., Ltd. Power gating of cores by an soc
US20130073884A1 (en) 2011-09-19 2013-03-21 Qualcomm Incorporated Dynamic sleep for multicore computing devices
US20130275791A1 (en) 2012-04-12 2013-10-17 Qualcomm Incorporated Method and System for Tracking and Selecting Optimal Power Conserving Modes of a PCD
US20140006824A1 (en) 2012-06-29 2014-01-02 Christian Maciocco Using device idle duration information to optimize energy efficiency

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International Preliminary Report on Patentability for PCT/US2015/022014, mailed Jul. 29, 2016, 28 pages.
International Search Report and Written Opinion for PCT/US2015/022014, mailed Jul. 2, 2015, 14 pages.
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Also Published As

Publication number Publication date
KR20160145595A (ko) 2016-12-20
CN106233225A (zh) 2016-12-14
EP3134805B1 (en) 2019-07-31
KR101826088B1 (ko) 2018-02-06
WO2015164011A1 (en) 2015-10-29
TWI595353B (zh) 2017-08-11
CN106233225B (zh) 2017-10-10
EP3134805A1 (en) 2017-03-01
JP2017519274A (ja) 2017-07-13
US20150301573A1 (en) 2015-10-22
TW201544947A (zh) 2015-12-01
BR112016024712A2 (pt) 2017-08-15
JP6151465B1 (ja) 2017-06-21

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