US9472585B2 - Semiconductor package, semiconductor device manufacturing method, and solid-state imaging device - Google Patents

Semiconductor package, semiconductor device manufacturing method, and solid-state imaging device Download PDF

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US9472585B2
US9472585B2 US13/461,910 US201213461910A US9472585B2 US 9472585 B2 US9472585 B2 US 9472585B2 US 201213461910 A US201213461910 A US 201213461910A US 9472585 B2 US9472585 B2 US 9472585B2
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thin plate
wiring substrate
multilayer wiring
semiconductor chip
flat sheet
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US20120286384A1 (en
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Masayuki Ishikida
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Sony Corp
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Sony Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14625Optical elements or arrangements associated with the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14618Containers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14638Structures specially adapted for transferring the charges across the imager perpendicular to the imaging plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685Process for coatings or optical elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Definitions

  • the present disclosure relates to a semiconductor package, a semiconductor device manufacturing method, and a solid-state imaging device. More, particularly, the present disclosure relates to a semiconductor package, a semiconductor device manufacturing method, and a solid-state imaging device which make it possible to provide a module having a smaller thickness.
  • an image sensor is packaged by securing it on a substrate through die bonding
  • substrates used for such a purpose include substrates in the form of flat plates and substrates formed such that a cavity is provided above a light receiving surface of an image sensor (for example, see JP-A-2003-218333 and JP-A-2003-250072 (Patent Documents 1 and 2)).
  • Ceramic substrates, organic substrates (rigid substrates and flexible substrates) are commonly used as substrates as described above.
  • a substrate forming a part of a package as thus described has the function of supporting an image sensor and the function of bearing wirings for the image sensor.
  • the substrate In order to perform the former function, it is desirable for the substrate to have a great thickness from the viewpoint of strength.
  • a multi-layer structure including two or more layers is commonly used as a wiring layer.
  • the thickness of the substrate increases with the number of layers.
  • a substrate including a wiring layer having a two-layer structure has a thickness of 0.1 mm or more
  • a substrate including a wiring layer having a four-layer structure has a thickness of 0.2 mm or more.
  • FIG. 1 is a sectional view of a camera module 11 according to the related art.
  • the camera module 11 shown in FIG. 1 includes wiring substrate 21 , an image sensor 22 , wires 23 , and a lens unit 24 .
  • the wiring substrate 21 includes a wiring layer of a multi-layer structure having a plurality of wiring patterns 21 a , and an image sensor 22 is secured on the wiring substrate 21 through die bonding.
  • the wiring substrate 21 is formed such that a cavity is provided above a light receiving surface 22 a of the image sensor 22 .
  • the wiring substrate 21 and the image sensor 22 are electrically connected through the wires 23 using wire bonding.
  • the lens unit 24 is formed by a lens 24 a and a support portion 24 b , and the support portion 24 b supports the lens 24 a above the wiring substrate 21 , the lens 24 a allowing light to impinge on the light receiving surface 22 a of the image sensor 22 .
  • the thickness of such a camera module 11 may be regarded as separated into the thickness of a lens design factor ranging from the light receiving surface 22 a of the image sensor 22 up to a top surface of the lens unit 24 and the thickness of a package design factor ranging from the light receiving surface 22 a of the image sensor 22 down to a bottom surface of the wiring substrate 21 .
  • the thickness of the package design factor must be reduced.
  • the wiring substrate 21 is a ceramic substrate, the wiring substrate 21 is more liable to crack, the smaller the thickness of the substrate.
  • the wiring substrate 21 is an organic substrate, the wiring substrate 21 is more liable to twist or warp, the smaller the thickness of the substrate.
  • An embodiment of the present disclosure is directed to a semiconductor package including a sheet-like thin plate on which a semiconductor chip is secured and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.
  • the thin plate may be formed of a metal.
  • the thin plate may be formed of stainless steel.
  • the thin plate may be formed of a metal having high thermal conductivity.
  • the thin plate may be formed by laminating a layer of stainless steel and a layer of a metal having high thermal conductivity.
  • the thin plate and the substrate may be electrically connected.
  • Another embodiment of the present disclosure is directed to a method of manufacturing a semiconductor device including: securing a semiconductor chip on a sheet-like thin plate; disposing a substrate including a wiring layer on the thin plate such that the substrate extends over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region; and electrically connecting the semiconductor chip and the substrate.
  • Still another embodiment of the present disclosure is directed to a solid-state imaging device including a lens, an image sensor photo-electrically converting light collected by the lens, a sheet-like thin plate on which the image sensor is secured, and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the image sensor is secured or over the entire surrounding region, wherein the image sensor and the wiring substrate are electrically connected.
  • a semiconductor chip is secured on a sheet-like thin plate; a substrate including a wiring layer is disposed on the thin plate such that the substrate extends over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region; and the semiconductor chip and the substrate are electrically connected.
  • a module having a small thickness can be provided.
  • FIG. 1 is a sectional view of a camera module according to the related art
  • FIG. 2 is a sectional view of a camera module to which the present disclosure is applied;
  • FIG. 3 is a flow chart for explaining a process of manufacturing a camera module
  • FIGS. 4A to 4E are illustrations showing steps for manufacturing a camera module.
  • FIG. 2 is a sectional view of an embodiment of the present disclosure, i.e., a camera module 51 which is a solid-state imaging device to which the present disclosure is applied.
  • the camera module 51 includes a thin late 61 , a wiring substrate 62 , an image sensor 63 , wires 64 , and a lens unit 65 .
  • the thin plate 61 is constituted by sheet metal.
  • the thin plate 61 is formed of an SUS (steel use stainless) type metal or a metal having high thermal conductivity such as Al or Cu, and the plate has a thickness of about 0.1 mm.
  • the thin plate 61 may be formed of one type of metal as thus described, and the plate may alternatively be formed by laminating an SUS metal and a metal having high thermal conductivity.
  • the image sensor 63 is secured on the thin plate 61 using die bonding.
  • the wiring substrate 62 is disposed on the thin plate 61 around the region where the image sensor 63 is secured, and the substrate is secured to the plate so as to surround the image sensor 63 .
  • the wiring substrate 62 includes a wiring layer having a multi-layer structure, the wiring layer including a plurality of wiring patterns 62 a .
  • the wiring substrate 62 may be disposed throughout the region of the thin plate 61 surrounding the region where the image sensor 63 is secured, and the substrate may alternatively be disposed to cover only a part of the surrounding region.
  • the image sensor 63 has a light receiving surface 63 a in which unit pixels each including a photoelectric conversion element (the unit pixels may hereinafter be simply referred to as “pixels”) are two-dimensionally arranged in the form of a matrix.
  • the sensor detects the amount of electrical charge as a physical quantity generated at each pixel in accordance with the quantity of light incident on the light receiving surface 63 a .
  • the wiring substrate 62 and the image sensor 63 are electrically connected through the wires 64 using wire bonding.
  • the lens unit 65 is formed by a lens 65 a and a support portion 65 b , and the support portion 65 b supports the lens 65 a above the wiring substrate 62 , the lens 65 a allowing light to impinge on the light receiving surface 63 a of the image sensor 63 .
  • the range from the light receiving surface 63 a of the image sensor up to the top surface of the lens unit 65 constitutes a lens design factor
  • the range from the light receiving surface 63 a of the image sensor 63 down to the bottom surface of the thin plate 61 constitutes a package design factor, i.e., an image sensor package.
  • FIG. 3 is a flow chart for explaining a flow of a process of manufacturing a camera module 51
  • FIGS. 4A to 4E are illustrations showing steps for manufacturing the camera module 51 .
  • a thin plate 61 is provided as shown in FIG. 4A .
  • a wiring substrate 62 is connected to the thin plate 61 as shown in FIG. 4B .
  • the thin plate 61 and the wiring substrate 62 may be electrically connected after grounding the thin plate 61 .
  • the electrical characteristics and shielding performance of the wiring substrate 62 can be improved.
  • an image sensor 63 is secured on the thin plate 61 using die bonding as shown in FIG. 4C .
  • the bonding material used for die bonding may be either material having insulating properties or conductive material.
  • a material having insulating properties is used as the bonding material, insulation can be established between the thin plate 61 and a silicon substrate of the image sensor 63 .
  • the silicon substrate of the image sensor 63 may be grounded.
  • Either material having insulating properties or conductive material may be used as the bonding material for die bonding depending on the characteristics of the image sensor 63 as thus described.
  • the wiring substrate 62 and the image sensor 63 are electrically connected through wires 64 using wire bonding, as shown in FIG. 4D . Bonding methods other than wire bonding may be used as long as the wiring substrate 62 and the image sensor 63 are connected.
  • a lens unit 65 is placed on the wiring substrate 62 .
  • a camera module 51 is completed.
  • the image sensor 63 is secured on the thin plate 61 having no wiring layer, and the wiring substrate 62 including a wiring layer is disposed around the image sensor 63 .
  • An image sensor package formed as thus described can be provided with a thickness which is smaller by an amount equivalent to the thickness of the wiring layer compared to the thickness of a package having an ordinary configuration according to the related art in which an image sensor is secured on a wiring substrate including a wiring layer. Consequently, a camera module having a small thickness can be provided.
  • the thin plate 61 is formed of a metal, the strength of the image sensor package can be sufficiently kept even if the package is provided with a small thickness.
  • the thin plate 61 is formed of an SUS type metal, an image sensor package having high rigidity can be provided without performing a rust-preventing process.
  • the thin plate 61 is formed of a metal having high thermal conductivity such as Al or Cu, it is possible to provide an image sensor package which allows heat released by the image sensor 63 to be efficiently released from the bottom surface of the image sensor 63 to the outside through the thin plate 61 .
  • the thin plate 61 is formed by laminating a layer of an SUS type metal and a layer of a metal having high thermal conductivity such as Al or Cu, an image sensor package having the above-described two advantages can be provided.
  • the thin plate 61 and the wiring substrate 62 can be formed using materials having characteristics appropriate for the respective purposes of the elements. Specifically, characteristics desirable for the wiring substrate 62 can be obtained by using a substrate according to the related art such as a ceramic substrate or organic substrate as the wiring substrate.
  • the thin plate 61 may be made of a material which provides high strength or rigidity even if it has a small thickness. Thus, the plate can be provided with strength or rigidity at a level hard to achieve with a ceramic material or organic material which is optimal as the material of the wiring substrate.
  • the thin plate 61 is formed of a metal.
  • the plate may be formed of a non-metal material as long as sufficient strength or rigidity can be obtained.
  • the present disclosure may be applied to a semiconductor package formed by packaging a predetermined semiconductor chip.
  • the present disclosure allows a semiconductor package to be provided with a small thickness, which consequently makes it possible to provide a semiconductor device (semiconductor module) including such a semiconductor package with a small thickness.
  • a semiconductor package including:
  • a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein
  • the semiconductor chip and the substrate are electrically connected.
  • the semiconductor package according to the item (2), wherein the thin plate may be formed by laminating a layer of stainless steel and a layer of a metal having high thermal conductivity.
  • a method of manufacturing a semiconductor device including:
  • a substrate including a wiring layer on the thin plate such that the substrate extends over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region;
  • a solid-state imaging device including:
  • an image sensor photo-electrically converting light collected by the lens
  • a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the image sensor is secured or over the entire surrounding region, wherein
  • the image sensor and the wiring substrate are electrically connected.

Abstract

A semiconductor package includes: a sheet-like thin plate on which a semiconductor chip is secured; and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.

Description

FIELD
The present disclosure relates to a semiconductor package, a semiconductor device manufacturing method, and a solid-state imaging device. More, particularly, the present disclosure relates to a semiconductor package, a semiconductor device manufacturing method, and a solid-state imaging device which make it possible to provide a module having a smaller thickness.
BACKGROUND
According to the related art, an image sensor is packaged by securing it on a substrate through die bonding, and substrates used for such a purpose include substrates in the form of flat plates and substrates formed such that a cavity is provided above a light receiving surface of an image sensor (for example, see JP-A-2003-218333 and JP-A-2003-250072 (Patent Documents 1 and 2)). Ceramic substrates, organic substrates (rigid substrates and flexible substrates) are commonly used as substrates as described above.
A substrate forming a part of a package as thus described has the function of supporting an image sensor and the function of bearing wirings for the image sensor. In order to perform the former function, it is desirable for the substrate to have a great thickness from the viewpoint of strength. In order to provide the latter function, a multi-layer structure including two or more layers is commonly used as a wiring layer. The thickness of the substrate increases with the number of layers. Generally speaking, a substrate including a wiring layer having a two-layer structure has a thickness of 0.1 mm or more, and a substrate including a wiring layer having a four-layer structure has a thickness of 0.2 mm or more.
SUMMARY
Demand for image sensor packages having smaller thicknesses is on increase as a result of the recent trend toward lighter and smaller final products in which such packages are to be set.
FIG. 1 is a sectional view of a camera module 11 according to the related art.
The camera module 11 shown in FIG. 1 includes wiring substrate 21, an image sensor 22, wires 23, and a lens unit 24.
The wiring substrate 21 includes a wiring layer of a multi-layer structure having a plurality of wiring patterns 21 a, and an image sensor 22 is secured on the wiring substrate 21 through die bonding. The wiring substrate 21 is formed such that a cavity is provided above a light receiving surface 22 a of the image sensor 22. The wiring substrate 21 and the image sensor 22 are electrically connected through the wires 23 using wire bonding. The lens unit 24 is formed by a lens 24 a and a support portion 24 b, and the support portion 24 b supports the lens 24 a above the wiring substrate 21, the lens 24 a allowing light to impinge on the light receiving surface 22 a of the image sensor 22.
The thickness of such a camera module 11 may be regarded as separated into the thickness of a lens design factor ranging from the light receiving surface 22 a of the image sensor 22 up to a top surface of the lens unit 24 and the thickness of a package design factor ranging from the light receiving surface 22 a of the image sensor 22 down to a bottom surface of the wiring substrate 21.
When the camera module 11 is to be provided with a smaller thickness with the lens design factor or the optical system kept unchanged, the thickness of the package design factor must be reduced.
Then, what is to be examined is the possibility of a reduction in the thickness of the wiring substrate 21. When the wiring substrate 21 is a ceramic substrate, the wiring substrate 21 is more liable to crack, the smaller the thickness of the substrate. When the wiring substrate 21 is an organic substrate, the wiring substrate 21 is more liable to twist or warp, the smaller the thickness of the substrate.
As thus described, there has been a limit to the reduction in the thickness of a camera module achievable through a reduction in the thickness of a substrate according to the related art used in the module.
Under the circumstance, it is desirable to reduce the thickness of a module.
An embodiment of the present disclosure is directed to a semiconductor package including a sheet-like thin plate on which a semiconductor chip is secured and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein the semiconductor chip and the substrate are electrically connected.
The thin plate may be formed of a metal.
The thin plate may be formed of stainless steel.
The thin plate may be formed of a metal having high thermal conductivity.
The thin plate may be formed by laminating a layer of stainless steel and a layer of a metal having high thermal conductivity.
The thin plate and the substrate may be electrically connected.
Another embodiment of the present disclosure is directed to a method of manufacturing a semiconductor device including: securing a semiconductor chip on a sheet-like thin plate; disposing a substrate including a wiring layer on the thin plate such that the substrate extends over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region; and electrically connecting the semiconductor chip and the substrate.
Still another embodiment of the present disclosure is directed to a solid-state imaging device including a lens, an image sensor photo-electrically converting light collected by the lens, a sheet-like thin plate on which the image sensor is secured, and a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the image sensor is secured or over the entire surrounding region, wherein the image sensor and the wiring substrate are electrically connected.
In one embodiments of the present disclosure, a semiconductor chip is secured on a sheet-like thin plate; a substrate including a wiring layer is disposed on the thin plate such that the substrate extends over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region; and the semiconductor chip and the substrate are electrically connected.
According to the embodiments of the present disclosure, a module having a small thickness can be provided.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a sectional view of a camera module according to the related art;
FIG. 2 is a sectional view of a camera module to which the present disclosure is applied;
FIG. 3 is a flow chart for explaining a process of manufacturing a camera module; and
FIGS. 4A to 4E are illustrations showing steps for manufacturing a camera module.
DETAILED DESCRIPTION
An embodiment of the present disclosure will now be described with reference to the drawings. The following items will be described in the order listed.
1. Configuration of Camera Module
2. Steps of Manufacturing Camera Module
<1. Configuration of Camera Module>
FIG. 2 is a sectional view of an embodiment of the present disclosure, i.e., a camera module 51 which is a solid-state imaging device to which the present disclosure is applied.
The camera module 51 includes a thin late 61, a wiring substrate 62, an image sensor 63, wires 64, and a lens unit 65.
For example, the thin plate 61 is constituted by sheet metal. Specifically, the thin plate 61 is formed of an SUS (steel use stainless) type metal or a metal having high thermal conductivity such as Al or Cu, and the plate has a thickness of about 0.1 mm. The thin plate 61 may be formed of one type of metal as thus described, and the plate may alternatively be formed by laminating an SUS metal and a metal having high thermal conductivity.
The image sensor 63 is secured on the thin plate 61 using die bonding. The wiring substrate 62 is disposed on the thin plate 61 around the region where the image sensor 63 is secured, and the substrate is secured to the plate so as to surround the image sensor 63. The wiring substrate 62 includes a wiring layer having a multi-layer structure, the wiring layer including a plurality of wiring patterns 62 a. The wiring substrate 62 may be disposed throughout the region of the thin plate 61 surrounding the region where the image sensor 63 is secured, and the substrate may alternatively be disposed to cover only a part of the surrounding region.
The image sensor 63 has a light receiving surface 63 a in which unit pixels each including a photoelectric conversion element (the unit pixels may hereinafter be simply referred to as “pixels”) are two-dimensionally arranged in the form of a matrix. The sensor detects the amount of electrical charge as a physical quantity generated at each pixel in accordance with the quantity of light incident on the light receiving surface 63 a. The wiring substrate 62 and the image sensor 63 are electrically connected through the wires 64 using wire bonding.
The lens unit 65 is formed by a lens 65 a and a support portion 65 b, and the support portion 65 b supports the lens 65 a above the wiring substrate 62, the lens 65 a allowing light to impinge on the light receiving surface 63 a of the image sensor 63.
In such a camera module 51, the range from the light receiving surface 63 a of the image sensor up to the top surface of the lens unit 65 constitutes a lens design factor, and the range from the light receiving surface 63 a of the image sensor 63 down to the bottom surface of the thin plate 61 constitutes a package design factor, i.e., an image sensor package.
<2. Steps of Manufacturing Camera Module>
Steps for manufacturing a camera module 51 will now be described with reference to FIG. 3 and FIGS. 4A to 4E. FIG. 3 is a flow chart for explaining a flow of a process of manufacturing a camera module 51, and FIGS. 4A to 4E are illustrations showing steps for manufacturing the camera module 51.
At step S11, a thin plate 61 is provided as shown in FIG. 4A.
At step S12, a wiring substrate 62 is connected to the thin plate 61 as shown in FIG. 4B. At this time, the thin plate 61 and the wiring substrate 62 may be electrically connected after grounding the thin plate 61. Thus, the electrical characteristics and shielding performance of the wiring substrate 62 can be improved.
At step S13, an image sensor 63 is secured on the thin plate 61 using die bonding as shown in FIG. 4C.
The bonding material used for die bonding may be either material having insulating properties or conductive material. For example, when a material having insulating properties is used as the bonding material, insulation can be established between the thin plate 61 and a silicon substrate of the image sensor 63. When wire bonding is carried out using a conductive material as the bonding material after grounding the thin plate 61, the silicon substrate of the image sensor 63 may be grounded. Either material having insulating properties or conductive material may be used as the bonding material for die bonding depending on the characteristics of the image sensor 63 as thus described.
At step s14, the wiring substrate 62 and the image sensor 63 are electrically connected through wires 64 using wire bonding, as shown in FIG. 4D. Bonding methods other than wire bonding may be used as long as the wiring substrate 62 and the image sensor 63 are connected.
At step S15, a lens unit 65 is placed on the wiring substrate 62. Thus, a camera module 51 is completed.
In the configuration and process described above, the image sensor 63 is secured on the thin plate 61 having no wiring layer, and the wiring substrate 62 including a wiring layer is disposed around the image sensor 63. An image sensor package formed as thus described can be provided with a thickness which is smaller by an amount equivalent to the thickness of the wiring layer compared to the thickness of a package having an ordinary configuration according to the related art in which an image sensor is secured on a wiring substrate including a wiring layer. Consequently, a camera module having a small thickness can be provided.
Since the thin plate 61 is formed of a metal, the strength of the image sensor package can be sufficiently kept even if the package is provided with a small thickness.
Further, when the thin plate 61 is formed of an SUS type metal, an image sensor package having high rigidity can be provided without performing a rust-preventing process.
When the thin plate 61 is formed of a metal having high thermal conductivity such as Al or Cu, it is possible to provide an image sensor package which allows heat released by the image sensor 63 to be efficiently released from the bottom surface of the image sensor 63 to the outside through the thin plate 61.
Further, when the thin plate 61 is formed by laminating a layer of an SUS type metal and a layer of a metal having high thermal conductivity such as Al or Cu, an image sensor package having the above-described two advantages can be provided.
Since the thin plate 61 and the wiring substrate 62 are provided as separate elements, the thin plate 61 and the wiring substrate 62 can be formed using materials having characteristics appropriate for the respective purposes of the elements. Specifically, characteristics desirable for the wiring substrate 62 can be obtained by using a substrate according to the related art such as a ceramic substrate or organic substrate as the wiring substrate. The thin plate 61 may be made of a material which provides high strength or rigidity even if it has a small thickness. Thus, the plate can be provided with strength or rigidity at a level hard to achieve with a ceramic material or organic material which is optimal as the material of the wiring substrate.
According to the above description, the thin plate 61 is formed of a metal. Alternatively, the plate may be formed of a non-metal material as long as sufficient strength or rigidity can be obtained.
While an exemplary application of the present disclosure to an image sensor package has been described, the present disclosure may be applied to a semiconductor package formed by packaging a predetermined semiconductor chip. Specifically, the present disclosure allows a semiconductor package to be provided with a small thickness, which consequently makes it possible to provide a semiconductor device (semiconductor module) including such a semiconductor package with a small thickness.
The present disclosure is not limited to the above-described embodiment, and various modifications may be made without departing from the spirit of the present disclosure.
The present disclosure may be implemented as the configurations described below.
(1) A semiconductor package including:
a sheet-like thin plate on which a semiconductor chip is secured; and
a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region, wherein
the semiconductor chip and the substrate are electrically connected.
(2) The semiconductor package according to the item (1), wherein the thin plate may be formed of a metal.
(3) The semiconductor package according to the item (2), wherein the thin plate may be formed of stainless steel.
(4) The semiconductor package according to the item (2), wherein the thin plate may be formed of a metal having high thermal conductivity.
(5) The semiconductor package according to the item (2), wherein the thin plate may be formed by laminating a layer of stainless steel and a layer of a metal having high thermal conductivity.
(6) The semiconductor package according to any of the items (2) to (5), wherein the thin plate and the substrate may be electrically connected.
(7) A method of manufacturing a semiconductor device including:
securing a semiconductor chip on a sheet-like thin plate;
disposing a substrate including a wiring layer on the thin plate such that the substrate extends over a part of a region surrounding the region where the semiconductor chip is secured or over the entire surrounding region; and
electrically connecting the semiconductor chip and the wiring substrate.
(8) A solid-state imaging device including:
a lens;
an image sensor photo-electrically converting light collected by the lens;
a sheet-like thin plate on which the image sensor is secured; and
a substrate including a wiring layer, disposed on the thin plate to extend over a part of a region surrounding the region where the image sensor is secured or over the entire surrounding region, wherein
the image sensor and the wiring substrate are electrically connected.
The present disclosure contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2011-105993 filed in the Japan Patent Office on May 11, 2011, the entire content of which is hereby incorporated by reference.
It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

Claims (12)

What is claimed is:
1. A semiconductor package comprising:
a flat sheet-like thin plate made of sheet metal having a uniformly flat surface on which a semiconductor chip is secured; and
a multilayer wiring substrate having a plurality of wiring patterns, wherein the plurality of wiring patterns include a plurality of wiring layers formed within the multilayer wiring substrate, wherein the multilayer wiring substrate is disposed on the uniformly flat surface of the thin plate to extend:
over a part of a first region surrounding a second region where the semiconductor chip is secured or
over the entire first region,
wherein the semiconductor chip and the multilayer wiring substrate are electrically connected, and
wherein the multilayer wiring substrate is disposed on the flat sheet-like thin plate in such a manner that the multilayer wiring substrate does not extend beyond the flat sheet-like thin plate.
2. The semiconductor package according to claim 1, wherein the flat sheet-like thin plate is formed of stainless steel.
3. The semiconductor package according to claim 1, wherein the flat sheet-like thin plate and the multilayer wiring substrate are electrically connected.
4. The semiconductor package according to claim 1, wherein at least some portions of the plurality of wiring patterns are surrounded by the multilayer wiring substrate.
5. The semiconductor package according to claim 1, wherein the semiconductor chip is an image sensor having a plurality of pixels.
6. The semiconductor package according to claim 1, wherein the semiconductor chip is secured on the uniformly flat surface of the flat sheet-like thin plate using die bonding, wherein a bonding material used for die bonding is a material having insulating properties.
7. The semiconductor package according to claim 1, wherein the semiconductor chip is secured on the uniformly flat surface of the flat sheet-like thin plate using die bonding, wherein a bonding material used for die bonding is a conductive material.
8. The semiconductor package according to claim 1, wherein the flat sheet-like thin plate has a thickness of about 0.1 mm.
9. A method of manufacturing a semiconductor device comprising:
securing a semiconductor chip on a uniformly flat surface of a flat sheet-like thin plate made of sheet metal;
disposing a multilayer wiring substrate having a plurality of wiring patterns on the uniformly flat surface of the flat sheet-like thin plate such that the multilayer wiring substrate extends:
over a part of a first region surrounding a second region where the semiconductor chip is secured or
over the entire first region,
wherein the plurality of wiring patterns include a plurality of wiring layers formed within the multilayer wiring substrate; and
electrically connecting the semiconductor chip and the multilayer wiring substrate, wherein the multilayer wiring substrate is disposed on the flat sheet-like thin plate in such a manner that the multilayer wiring substrate does not extend beyond the flat sheet-like thin plate.
10. The method according to claim 9, wherein the semiconductor chip is connected to a ground potential when being connected to the flat sheet-like thin plate.
11. The method according to claim 9, wherein the flat sheet-like thin plate and the wiring substrate are electrically connected when the flat sheet-like thin plate is connected to a ground potential.
12. A semiconductor package comprising:
a flat sheet-like thin plate made of sheet metal having a uniformly flat surface on which a semiconductor chip is secured; and
a multilayer wiring substrate having a plurality of wiring patterns, wherein the plurality of wiring patterns include a plurality of wiring layers formed within the multilayer wiring substrate, wherein the multilayer wiring substrate is disposed on the uniformly flat surface of the thin plate to extend:
over an entire first region surrounding a second region where the semiconductor chip is secured,
wherein the semiconductor chip and the multilayer wiring substrate are electrically connected, and
wherein the multilayer wiring substrate is disposed on the flat sheet-like thin plate in such a manner that the multilayer wiring substrate does not extend beyond the flat sheet-like thin plate.
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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014170893A (en) * 2013-03-05 2014-09-18 Taiyo Yuden Co Ltd Camera module
JP6545457B2 (en) 2014-03-07 2019-07-17 パナソニック株式会社 Preparation plate, transparent plate, preparation method of preparation plate, slide glass, image photographing device, image photographing method, preparation plate preparing device, and preparation part set
KR101814546B1 (en) * 2014-09-19 2018-01-04 쿄세라 코포레이션 Substrate for mounting electronic element, and electronic device
TWI639048B (en) 2017-05-22 2018-10-21 海華科技股份有限公司 Portable electronic device and image-capturing module thereof, and carrier assembly thereof
CN108121364B (en) * 2017-12-15 2021-04-23 上海索广映像有限公司 Position adjusting system and method of image sensor
CN113992835B (en) * 2021-12-27 2022-05-24 江西联益光学有限公司 Camera module, assembling method thereof and electronic module
WO2023135929A1 (en) * 2022-01-11 2023-07-20 ソニーセミコンダクタソリューションズ株式会社 Package

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4034394A (en) * 1975-04-16 1977-07-05 Tokyo Shibaura Electric Co., Ltd. Schottky semiconductor device
US5063435A (en) * 1987-01-16 1991-11-05 Sumitomo Electric Industries, Ltd. Semiconductor device
US20020019081A1 (en) * 2000-04-18 2002-02-14 Denis Kevin L. Process for fabricating thin film transistors
US20020074545A1 (en) * 2000-12-14 2002-06-20 Xerox Corporation Apparatus for detecting the width of a v-groove formed in a semiconductor wafer
JP2003218333A (en) 2002-01-24 2003-07-31 Sony Corp Solid state image sensing element, solid state image sensing device and packaging method of solid state image sensing element
JP2003250072A (en) 1995-05-31 2003-09-05 Sony Corp Image pickup apparatus, signal processing apparatus, and signal processing apparatus
US20040195492A1 (en) * 2003-04-07 2004-10-07 Hsin Chung Hsien Image sensor having a photosensitive chip mounted to a metal sheet
US20100218985A1 (en) * 2009-02-27 2010-09-02 Denso Corporation Integrated circuit mounted board, printed wiring board, and method of manufacturing integrated circuit mounted board
US20120155854A1 (en) * 2010-12-21 2012-06-21 Tzu-Wei Huang Camera module and method for fabricating the same

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59158570A (en) * 1983-02-28 1984-09-08 Hitachi Ltd Solid-state image pickup device
JPH0424947A (en) * 1990-05-15 1992-01-28 Mitsubishi Materials Corp Ceramic package for semiconductor
JP3624456B2 (en) 1995-03-30 2005-03-02 セイコーエプソン株式会社 Projection display
JP4190111B2 (en) * 1999-10-29 2008-12-03 富士通株式会社 High frequency module
JP2002148606A (en) 2000-11-13 2002-05-22 Matsushita Electric Ind Co Ltd Liquid crystal projector
CN2457740Y (en) * 2001-01-09 2001-10-31 台湾沛晶股份有限公司 Structure of IC wafer
JP2004173028A (en) * 2002-11-21 2004-06-17 Olympus Corp Solid-state image pickup device
JP2004349369A (en) * 2003-05-21 2004-12-09 Canon Inc Semiconductor package for solid state imaging device, and its manufacturing method
JP2005031295A (en) 2003-07-10 2005-02-03 Fujinon Corp Liquid crystal projector
KR100571779B1 (en) 2003-11-27 2006-04-18 삼성전자주식회사 An apparatus for controlling a project-lens of a projector to shift
TWI231403B (en) 2004-03-29 2005-04-21 Coretronic Corp A fixture for a projection system
US20070052827A1 (en) * 2005-09-07 2007-03-08 Omnivision Technologies, Inc. Coated wafer level camera modules and associated methods
JP2007227672A (en) * 2006-02-23 2007-09-06 Olympus Imaging Corp Imaging apparatus
JP2008187554A (en) * 2007-01-31 2008-08-14 Citizen Miyota Co Ltd Solid-state imaging device
JP2008251868A (en) * 2007-03-30 2008-10-16 Kyocer Slc Technologies Corp Package for housing semiconductor element
JP5291892B2 (en) * 2007-05-01 2013-09-18 オリンパスイメージング株式会社 Imaging device module, lens unit using imaging device module, and portable electronic device
JP5621212B2 (en) 2009-04-21 2014-11-12 セイコーエプソン株式会社 projector
CN101924081A (en) * 2009-06-15 2010-12-22 鸿富锦精密工业(深圳)有限公司 Image sensor package and image sensor module
JP5381376B2 (en) 2009-06-18 2014-01-08 セイコーエプソン株式会社 Projector and assembling method of projector
JP5383630B2 (en) 2010-11-15 2014-01-08 キヤノン株式会社 Image projection device

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4034394A (en) * 1975-04-16 1977-07-05 Tokyo Shibaura Electric Co., Ltd. Schottky semiconductor device
US5063435A (en) * 1987-01-16 1991-11-05 Sumitomo Electric Industries, Ltd. Semiconductor device
JP2003250072A (en) 1995-05-31 2003-09-05 Sony Corp Image pickup apparatus, signal processing apparatus, and signal processing apparatus
US20020019081A1 (en) * 2000-04-18 2002-02-14 Denis Kevin L. Process for fabricating thin film transistors
US20020074545A1 (en) * 2000-12-14 2002-06-20 Xerox Corporation Apparatus for detecting the width of a v-groove formed in a semiconductor wafer
JP2003218333A (en) 2002-01-24 2003-07-31 Sony Corp Solid state image sensing element, solid state image sensing device and packaging method of solid state image sensing element
US20040195492A1 (en) * 2003-04-07 2004-10-07 Hsin Chung Hsien Image sensor having a photosensitive chip mounted to a metal sheet
US20100218985A1 (en) * 2009-02-27 2010-09-02 Denso Corporation Integrated circuit mounted board, printed wiring board, and method of manufacturing integrated circuit mounted board
US20120155854A1 (en) * 2010-12-21 2012-06-21 Tzu-Wei Huang Camera module and method for fabricating the same

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US20120286384A1 (en) 2012-11-15
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US10483308B2 (en) 2019-11-19
TW201308581A (en) 2013-02-16

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