US7474815B2 - Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array - Google Patents
Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array Download PDFInfo
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- US7474815B2 US7474815B2 US11/374,777 US37477706A US7474815B2 US 7474815 B2 US7474815 B2 US 7474815B2 US 37477706 A US37477706 A US 37477706A US 7474815 B2 US7474815 B2 US 7474815B2
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- optoelectronic
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- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4204—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms
- G02B6/4214—Packages, e.g. shape, construction, internal or external details the coupling comprising intermediate optical elements, e.g. lenses, holograms the intermediate optical element having redirecting reflective means, e.g. mirrors, prisms for deflecting the radiation from horizontal to down- or upward direction toward a device
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/24—Coupling light guides
- G02B6/42—Coupling light guides with opto-electronic elements
- G02B6/4201—Packages, e.g. shape, construction, internal or external details
- G02B6/4246—Bidirectionally operating package structures
Definitions
- the present invention relates to integrated circuits including circuit packaging and circuit communication technologies and, in particular, relates to the provision of a method of interconnecting or mapping a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array. Furthermore, the present invention also pertains to an arrangement for the interconnecting or mapping of a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array, utilizing the method pursuant to the invention.
- OE optoelectronic
- parallel optical modules are constituted of arrays of silicon circuitry, which are connected to optoelectronic (OE) devices and implemented with the employment of III-V semiconductors.
- OE optoelectronic
- a circuit packaging option which is particularly attractive in the implementation thereof, resides in connecting two substrates utilizing flip-chip technology. This, in essence, necessitates that the optoelectronic (OE) device is constrained to operate at a wavelength at which the OE substrate is transparent, whereby the projected optical beam is emitted or detected through the substrate.
- the light can be readily coupled to polymer-based waveguides, which are easily routed across the circuit board to other optical modules, and wherein the waveguides, in an alternative construction, can also be embedded in the circuit board.
- the silicon chip is connected to the circuit board utilizing a ball grid array (BGA) and the OE device is connected to the silicon chip through the intermediary of wirebonds.
- BGA ball grid array
- the OE device emits or detects light in an upward direction from the top surface, and whereby the waveguide is mounted above the OE chip, which supports the OE device.
- the physical density between adjacent of the linear channels can be extremely high, for example, such as at an about 62.5 ⁇ m pitch.
- it is physically impractical to lay out the channels in the optical module at this narrow pitch in view of the space which is required in order to be able to implement the placements of the OE devices and the silicon circuitry, and provide space for lens coupling elements, as a result of which, currently a practical pitch for these channels is deemed to be about 250 ⁇ m.
- the waveguides can, accordingly, be fanned out to the wider module pitch.
- this approach is encumbered with a number of drawbacks in the implementation thereof.
- Chakravorty, et al., U.S. patent Publication No. 2003/0002770 A1 fails to provide for the particular coupling analogous to the present invention and, in effect, provides for a flip-chip package integrating optical and electrical devices and coupling to a waveguide on a circuit board in a manner as described with regard to the current state of the art.
- the structure is disclosed in regard to a waveguide, which is embedded within the circuit board, and does not provide for the advantages of the present arrangement and method.
- a further aspect of the present invention resides in providing an OE device array in a rhomboidal pattern, which facilitates waveguide channels to extend in paths linearly from the OE device array in the absence of any sharp bends, whereby the OE device drivers are typically laid out in a rectangular manner.
- a rhomboidal pattern for the OE devices while maintaining a rectangular two-dimensional array for electrical pads, so as to interface within silicon circuitry in a unique manner, thereby resulting in minimized optical losses for the OE devices.
- Another object of the present invention is to provide an arrangement for the interconnection or mapping of two-dimensional OE device arrays to a one-dimensional waveguide array utilizing the unique inventive method.
- FIG. 1 illustrates a cross-sectional view of the interconnection between an optoelectronic device array and a waveguide array
- FIG. 2 illustrates a cross-sectional view of the interconnection between the optoelectronic device and the waveguide array in which electrical signals are transmitted from a circuit board through wirebonds to the optoelectronic device array;
- FIG. 3 illustrates an arrangement of the fanning out of an array of closely spaced waveguide channels in order to match the pitch of a larger more widely spaced OE device array
- FIG. 4 illustrates an arrangement between closely spaced waveguide arrays and a rectangular 2D OE device array
- FIG. 5 illustrates a linear escarpment of waveguide channels from a rectangular two-dimensional OE device array at a fixed angle of the waveguide channels relative to the OE device array grid;
- FIG. 6 illustrates a layout of OE device channels in a rhomboidal two-dimensional array
- FIG. 7 illustrates a layout which connects pads of a rectangular silicon circuit array to a rhomboidally arranged OE device array
- FIG. 8 illustrates a layout presenting a connection of pads of a rectangular silicon circuit array to a rhomboidal OE device array
- FIG. 9 illustrates a layout which connects pads of a rectangular silicon circuit array to a rhomboidal OE device array.
- FIG. 10 illustrates a system layout for interconnecting a two-dimensional OE device array to a one-dimensional waveguide array in order to functionally implement an optical link.
- FIG. 1 of the drawings illustrated in FIG. 1 of the drawings is a parallel optical module 10 , which includes a circuit board 12 having a waveguide 14 arranged thereon including a turning mirror 16 , and with a carrier 18 interposed between the circuit board 12 and a silicon chip 20 through the intermediary of a suitable ball grid array 22 .
- An optoelectronic (OE) device 24 is connected to the lower surface of the silicon chip 20 , the latter of which has a silicon circuit 26 facing the OE device, and which device is arranged in an OE substrate chip 28 .
- the OE device 24 operates at a wavelength where the OE substrate chip 28 is transparent in nature, and whereby the resultant optical beam is emitted or detected through the OE substrate.
- the circuit board 12 has the OE chip positioned thereon with the OE device at the upper surface of the chip, which supports a waveguide, which also is supported on the circuit board.
- a silicon chip 20 is positioned by means of a ball grid array 22 on the circuit board 12 and connected to the OE device 24 through the intermediary of wirebonds 42 .
- the OE device 24 emits or detects light from the top surface, so that the waveguide 14 is mounted above the OE chip 28 .
- FIG. 3 there is described an array of waveguide channels 50 wherein optical modules 52 are arranged in a linear one-dimensional array, and the linear one-dimensional waveguide channels 50 fan out to each of the optical modules 52 .
- the waveguides are lithographically defined, although the linear channel density can be very high, such as, for example, at about a 62.5 ⁇ m pitch, it is impractical to lay out the channels 50 in the optical module on this pitch. This is due to the space which is required to implement the OE devices and silicon circuitry in the linear pattern, whereby a practical pitch for these channels is currently approximately 250 ⁇ m.
- the waveguides are fanned out to the module pitch, as shown in FIG.
- the OE devices 60 are arranged in a rectangular two-dimensional array, nine (9) devices 60 being shown in this particular embodiment by way of example, and linear one-dimensional waveguide channels 62 extend thereto in a close parallel relationship.
- 9 devices 60 being shown in this particular embodiment by way of example, and linear one-dimensional waveguide channels 62 extend thereto in a close parallel relationship.
- the optical waveguides must each be routed around relatively sharp bends 66 .
- this is rather cumbersome in construction in view of the tight channel turn which is required within the physical confines of the two-dimensional array of the OE devices 60 .
- the traces or paths thereof can be routed across the circuit board (not shown) at an arbitrary angle ⁇ and this then minimizes the waveguide losses while maintaining a compact OE module 74 .
- the waveguide escapement or outward displacement angle (as extending over the OE array) is determined by the number of rows in the OE array and the pitch between OE array elements pursuant to the following relationship:
- a four row OE array with an array pitch of 250 microns requires an angle ( ⁇ ) of 14 degrees.
- the maximum number of OE array rows is limited by the pitch between OE elements, the waveguide core width and the minimum separation between waveguide cores. After the waveguides 70 leave the region of the OE array, they may be rerouted across the board at an arbitrary suitable angle.
- the OE devices 80 are laid out in a two-dimensional rhomboidal array in lieu of the rectangular array of FIG. 5 .
- This rhomboidal two-dimensional device array facilitating a close parallel spacing between the waveguide channels 82 , also minimizes optical losses and any potential crosstalk, while only slightly increasing the overall size, as compared to the rectangular device arrangement of FIG. 5 .
- this embodiment represents a relatively straight-forward layout of the OE devices 80 on a rhomboidal grid 80 A, this being easily implemented inasmuch as these devices are generally simple two-dimensional diodes.
- this arrangement is somewhat more difficult to effectuate in connection with silicon circuitry since it increases layout complexity, and in particular, the routing of all of the bias and signal lines from the chip edges to the interior waveguide channels becomes relatively more complex, as compared to a rectangular array design.
- FIG. 8 of the drawings This is illustrated in FIG. 8 of the drawings for a four-channel implementation.
- the pads 100 are shown connected to the waveguides 102 and the OE devices 104 in a manner which minimizes the differences in inductances.
- the differences in inductance can be further minimized between the different layouts by employing larger sized pads 110 and arranging them in a symmetrical manner. Consequently, inasmuch as the pads 110 are the same size, the parasitic capacitance will be identical for all devices 112 .
- the electrical paths for interface to silicon circuitry maintain a rectangular two-dimensional array.
- the OE devices 114 are arranged on a rhomboidal two-dimensional array in that instance.
- the foregoing concepts and arrangements of interconnecting a two-dimensional OE device array to a one-dimensional waveguide array may be employed in order to implement the construction of a functional optical link.
- electrical signals are converted into light by the OE VCSEL array 120 and then focused by means of integrated lenses 122 into an array of optical waveguides 124 .
- light from these waveguides 124 is redirected out of plane by means of turning mirrors 126 towards an OE photodiode array 128 , where the optical signals are converted into electrical signals.
Abstract
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US11/374,777 US7474815B2 (en) | 2006-03-14 | 2006-03-14 | Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array |
US12/117,803 US7883277B2 (en) | 2006-03-14 | 2008-05-09 | Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array |
Applications Claiming Priority (1)
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US11/374,777 US7474815B2 (en) | 2006-03-14 | 2006-03-14 | Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array |
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US12/117,803 Continuation US7883277B2 (en) | 2006-03-14 | 2008-05-09 | Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array |
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US20070217750A1 US20070217750A1 (en) | 2007-09-20 |
US7474815B2 true US7474815B2 (en) | 2009-01-06 |
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US11/374,777 Active 2027-01-26 US7474815B2 (en) | 2006-03-14 | 2006-03-14 | Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array |
US12/117,803 Expired - Fee Related US7883277B2 (en) | 2006-03-14 | 2008-05-09 | Interconnecting (mapping) a two-dimensional optoelectronic (OE) device array to a one-dimensional waveguide array |
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Cited By (5)
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US20090092357A1 (en) * | 2007-10-03 | 2009-04-09 | Fuji Xerox Co., Ltd. | Optical module |
US20110243509A1 (en) * | 2010-04-05 | 2011-10-06 | Avago Technologies Fiber Ip (Singapore) Pte. Ltd. | Opto-electronic transceiver module system |
US20130315528A1 (en) * | 2012-05-28 | 2013-11-28 | Mellanox Technologies Ltd. | High-speed optical module with flexible printed circuit board |
US9184840B2 (en) | 2012-10-05 | 2015-11-10 | Fujitsu Limited | Optical module |
US9804348B2 (en) | 2013-07-04 | 2017-10-31 | Mellanox Technologies, Ltd. | Silicon photonics connector |
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JP2008158440A (en) * | 2006-12-26 | 2008-07-10 | Toshiba Corp | Photoelectric wiring board and method of manufacturing photoelectric wiring apparatus |
WO2009066207A1 (en) * | 2007-11-20 | 2009-05-28 | Koninklijke Philips Electronics N.V. | Side emitting device with wavelength conversion |
US8350210B1 (en) * | 2008-06-03 | 2013-01-08 | Wavefront Research, Inc. | Embedded optical interconnect devices and methods of use thereof |
US8596879B2 (en) | 2011-08-19 | 2013-12-03 | International Business Machines Corporation | Method to reorder (shuffle) optical cable waveguide layers |
US9608403B2 (en) | 2014-11-03 | 2017-03-28 | International Business Machines Corporation | Dual bond pad structure for photonics |
US9900102B2 (en) * | 2015-12-01 | 2018-02-20 | Intel Corporation | Integrated circuit with chip-on-chip and chip-on-substrate configuration |
US9899347B1 (en) * | 2017-03-09 | 2018-02-20 | Sandisk Technologies Llc | Wire bonded wide I/O semiconductor device |
US10222555B2 (en) | 2017-01-10 | 2019-03-05 | International Business Machines Corporation | Integrated optoelectronic chip and lens array |
US10690853B2 (en) | 2018-06-25 | 2020-06-23 | International Business Machines Corporation | Optoelectronics integration using semiconductor on insulator substrate |
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US20090092357A1 (en) * | 2007-10-03 | 2009-04-09 | Fuji Xerox Co., Ltd. | Optical module |
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US20110243509A1 (en) * | 2010-04-05 | 2011-10-06 | Avago Technologies Fiber Ip (Singapore) Pte. Ltd. | Opto-electronic transceiver module system |
US20130315528A1 (en) * | 2012-05-28 | 2013-11-28 | Mellanox Technologies Ltd. | High-speed optical module with flexible printed circuit board |
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US9804348B2 (en) | 2013-07-04 | 2017-10-31 | Mellanox Technologies, Ltd. | Silicon photonics connector |
Also Published As
Publication number | Publication date |
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US7883277B2 (en) | 2011-02-08 |
US20070217750A1 (en) | 2007-09-20 |
US20080205817A1 (en) | 2008-08-28 |
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