US6954987B2 - Method of interconnecting a circuit board to a substrate - Google Patents
Method of interconnecting a circuit board to a substrate Download PDFInfo
- Publication number
- US6954987B2 US6954987B2 US10/849,478 US84947804A US6954987B2 US 6954987 B2 US6954987 B2 US 6954987B2 US 84947804 A US84947804 A US 84947804A US 6954987 B2 US6954987 B2 US 6954987B2
- Authority
- US
- United States
- Prior art keywords
- circuit board
- printed circuit
- substrate
- via hole
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 title claims description 68
- 238000000034 method Methods 0.000 title claims description 38
- 229910000679 solder Inorganic materials 0.000 claims abstract description 46
- 239000007789 gas Substances 0.000 claims abstract description 10
- 239000010410 layer Substances 0.000 claims description 45
- 239000012790 adhesive layer Substances 0.000 claims description 19
- 239000004593 Epoxy Substances 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 18
- 229910052751 metal Inorganic materials 0.000 claims description 18
- 230000008878 coupling Effects 0.000 claims description 12
- 238000010168 coupling process Methods 0.000 claims description 12
- 238000005859 coupling reaction Methods 0.000 claims description 12
- 238000007747 plating Methods 0.000 claims description 7
- 238000013022 venting Methods 0.000 claims description 7
- 230000017525 heat dissipation Effects 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 claims description 4
- 239000007769 metal material Substances 0.000 claims description 2
- 238000010943 off-gassing Methods 0.000 abstract 1
- 239000011800 void material Substances 0.000 description 12
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 230000000712 assembly Effects 0.000 description 5
- 238000000429 assembly Methods 0.000 description 5
- 238000013459 approach Methods 0.000 description 3
- ZGHQUYZPMWMLBM-UHFFFAOYSA-N 1,2-dichloro-4-phenylbenzene Chemical compound C1=C(Cl)C(Cl)=CC=C1C1=CC=CC=C1 ZGHQUYZPMWMLBM-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000002470 thermal conductor Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09063—Holes or slots in insulating substrate not used for electrical connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09554—Via connected to metal substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10666—Plated through-hole for surface mounting on PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1178—Means for venting or for letting gases escape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Definitions
- the present invention relates to printed circuit board assemblies and methods for assembling electronic components into multi-layer assemblies. More particularly, the present invention relates to RF power amplifier circuit board assemblies and related methods of assembly.
- PCB printed circuit board
- RF power amplifiers are an example of such electronics module assemblies that incorporate heat dissipation means by design.
- the metal substrate for an electronics module may further be needed for grounding and electromagnetic interference (EMI) shielding.
- EMI electromagnetic interference
- the use of nonconductive adhesives is a particular cost effective method of attaching a two sided printed circuit board to a metal substrate. The drawback to this approach is that there is no intimate metal-to-metal contact between the metal substrate and the metalized backside of the PCB.
- the present invention provides an electronics assembly comprising a printed circuit board having a via hole therethrough and an adjacent vent hole, a nonconductive adhesive layer having a first surface and a second surface, the first surface coupled to the printed circuit board, and a conductive substrate coupled to the adhesive layer second surface so that the adhesive layer is disposed between the printed circuit board and the substrate.
- the adhesive layer further has a void space overlapping the via hole and the vent hole. Reflowed solder is provided extending into the void space, the reflowed solder connecting the printed circuit board to the substrate.
- a plurality of electronic devices are mounted on the printed circuit board.
- the substrate is preferably made from an electrically conductive material and the substrate provides electrical grounding for one or more of the electronic devices on the printed circuit board through the reflowed solder.
- a metalized pad may be provided plating and surrounding the via hole or vent hole.
- the substrate is also preferably made from a thermally conductive material and provides heat dissipation for the printed circuit board through the reflowed solder.
- the substrate may be made from copper.
- the nonconductive adhesive layer may be composed of a thermal set epoxy.
- the present invention provides a method of interconnecting a printed circuit board, having a via hole and a vent hole, and a conductive substrate.
- the method comprises coupling the substrate to the printed circuit board using a nonconductive adhesive layer, the adhesive layer having a space forming a cavity between the substrate and the printed circuit board aligned to the via hole and vent hole.
- the method further comprises reflowing solder from a top surface of the printed circuit board through the via hole to electrically connect the printed circuit board to the conductive substrate while relieving pressure in the cavity by venting gases in the cavity through the vent hole in the printed circuit board.
- the method of interconnecting a printed circuit board to a substrate may further comprise plating the via hole or vent hole before the reflowing of the solder.
- the substrate is preferably made from a metal material and the substrate provides electrical grounding and heat dissipation for the printed circuit board through the reflowed solder.
- the adhesive layer is preferably an epoxy layer.
- the epoxy layer may be a thermal set epoxy and the method comprises curing the epoxy at an elevated temperature.
- the present invention provides an RF power amplifier circuit board assembly comprising a printed circuit board having a via hole therethrough, an adjacent vent hole therethrough, and one or more RF power transistors mounted thereon.
- the assembly further comprises a nonconductive adhesive layer having a first surface and a second surface, the first surface coupled to the printed circuit board.
- An electrically conductive substrate is coupled to the adhesive layer second surface so that the adhesive layer lies between the printed circuit board and the substrate, the adhesive layer having a void space aligned to the via hole and vent hole.
- Reflowed solder extends through the via hole and the void space to the substrate, the reflowed solder electrically connecting the printed circuit board to the substrate.
- One or more conductive traces are provided on the printed circuit board electrically connecting to the reflowed solder.
- the RF amplifier circuit board assembly may further comprise a metalized pad plating and surrounding the via hole or the vent hole.
- the substrate is preferably composed of metal and the substrate provides electrical grounding and heat dissipation for the printed circuit board through the reflowed solder.
- the present invention provides a method of assembling and electrically coupling a metal substrate to an RF printed circuit board.
- the method comprises providing a printed circuit board having a via hole, a vent hole adjacent the via hole, one or more RF power transistors and one or more conductive traces.
- the method comprises providing a conductive metal substrate and a nonconductive layer between the printed circuit board and substrate, the nonconductive layer having an opening below the via hole and vent hole thereby forming a cavity.
- the method further comprises surface applying solder paste to the via hole and heating and reflowing the solder paste from the top surface of the printed circuit board through the via hole and opening in the nonconductive layer to electrically connect the conductive trace to the conductive metal substrate while relieving pressure in the cavity by venting gases in the cavity through the vent hole.
- the conductive metal substrate is made from copper.
- the nonconductive layer preferably comprises an epoxy layer and the method comprises bonding the printed circuit board to the conductive substrate using the nonconductive epoxy layer.
- the conductive trace may be an RF ground connection.
- FIG. 1 is an exploded perspective view of an electronics assembly in accordance with a preferred embodiment of the present invention showing individual layers;
- FIG. 2 is a top view of an interconnect portion of the electronics assembly of FIG. 1 ;
- FIG. 3 is a cross-sectional view of the interconnect portion as seen along sectional line 3 — 3 of FIG. 2 ;
- FIG. 4 is an exemplary RF printed circuit board assembly in accordance with the present invention.
- FIG. 1 is an exploded perspective view of an electronics assembly 10 in accordance with a preferred embodiment of the present invention.
- assembly 10 comprises printed circuit board (PCB) layer 12 , nonconductive adhesive layer 14 , and a conductive support substrate or pallet 16 .
- Pallet 16 is composed of a good electrical and thermal conductor, preferably a metal such as copper.
- Printed circuit board layer 12 is attached to the conductive substrate 16 using the nonconductive adhesive 14 (as shown in FIG. 3 ).
- a thermal set sheet epoxy 14 may be employed.
- the use of a thermal set nonconductive adhesive sheet (or preform) to attach a printed circuit board to a metal substrate is disclosed in U.S. Pat. No. 6,421,253 to Daniel Ash, Jr., issued Jul.
- the PCB layer 12 includes various active and passive electronic components (shown generally in FIG. 4 ) and in one preferred embodiment may be a two sided PCB having electronic components and/or conductive traces on both sides (as described in more detail in the '253 patent). Some of these components will require electrical and/or thermal contact to the substrate. More particularly, in one preferred embodiment the assembly 10 is adapted for high power electronics applications, such as RF power amplifiers, and PCB layer 12 may further comprise a number of RF modules and discrete components.
- Such power amplifier components may include output couplers, power resistors, active amplifier devices (such as bipolar or LDMOS power transistors), EMI shielding (such as a ground plane in the circuit board, a shielding wall or lid), and other components well known to those skilled in the art.
- active amplifier devices such as bipolar or LDMOS power transistors
- EMI shielding such as a ground plane in the circuit board, a shielding wall or lid
- the assembly 10 includes layer interconnect portions 20 which provide the desired electrical and/or thermal contact of the PCB layer 12 to the pallet 16 .
- These interconnect portions comprise via holes 22 for electrically and/or thermally interconnecting layers 12 and 16 and adjacent vent holes 32 (interconnect portions 20 are illustrated in detail in FIGS. 2 and 3 ).
- the layers 12 and 14 are both illustrated in two sections providing respective spaces 30 , 38 which allow mounting of certain components such as power transistors, directly on the pallet 16 for better thermal dissipation.
- Single piece layers 12 and 14 may also be employed, however, with the interconnect portions 20 providing the thermal coupling to pallet 16 or the layers 12 and 14 may have openings for mounting selected components directly on the pallet.
- the layers 12 , 14 , 16 may also have additional mounting holes 18 for structurally connecting the layers or coupling the pallet to a heat sink and/or to a lid.
- Adhesive layer 14 further includes void spaces 24 aligned with the interconnect portions 20 . As shown in FIGS. 1 through 4 , void spaces 24 form a cavity in the electronics assembly 10 under both the via holes 22 and vent holes 32 through to pallet 16 .
- FIG. 2 is a top view of one of the layer interconnect portions 20 of electronics assembly 10 . Cavity 24 is referenced by the dashed lines as physically beneath PCB layer 12 .
- FIG. 3 is a cross sectional view of the interconnect portion 20 , taken along sectional line 3 — 3 .
- the electrical and/or thermal contact to the substrate 16 is provided by metalized pad(s) 28 with plated via holes 22 and surface applied reflowed solder 26 .
- the metalized pads 28 are electrically coupled to traces on the PCB layer and/or are configured adjacent to and in electrical and/or thermal contact with selected electronic components on the PCB layer 12 (as generally shown in FIG. 4 ).
- the epoxy layer 14 has a first surface 34 coupled to the printed circuit board layer 12 and a second surface 36 coupled to the substrate 16 so that the epoxy layer is disposed between the printed circuit board 12 and the substrate.
- vent hole 32 is provided in the PCB layer 12 adjacent to each via 22 and extending into void 24 .
- the via holes 22 and vent holes 32 may be provided in the PCB 12 through any of a variety of known techniques, including drilling, etching or during formation of the PCB material.
- the vent hole 32 may be provided either before or after assembly with the substrate 16 , prior to solder reflow processing, and may preferably be formed together with via hole 22 to facilitate alignment of the two holes in a closely spaced configuration.
- the vent hole 32 very effectively relieves gaseous backpressure in the void 24 , thereby allowing applied solder paste 26 to flow down through the vias 22 and connect the printed circuit board 12 to the substrate 16 as shown.
- the metal plating 28 may be applied to vent hole 32 .
- the solder paste is applied to via hole 22 as before and upon heating flows down into void 24 and flows across the void to the vent hole to contact the plating 28 and electrically and thermally connect plating 28 and substrate 16 .
- vent hole rather than the via hole acts as the electrical and/or thermal connection point.
- FIG. 3 equally illustrates this alternate structure with reference numeral 22 now indicating the vent hole and reference numeral 32 the via hole, although in this embodiment the solder 26 may be localized mostly in the void 24 and not extend as far up toward the top surface of PCB layer 12 as is shown in FIG. 3 ).
- the via hole 22 may be of larger diameter than the vent hole 32 to facilitate the solder flow and the two holes are preferably very closely spaced.
- the gas venting assists in the solder flow and this embodiment may enhance this effect making it a preferred approach for some applications. Therefore, in either embodiment due to vent hole 32 , the desired good electrical and/or thermal contact to the substrate 16 is provided by the reflowed solder.
- FIG. 4 an exemplary RF power amplifier circuit board assembly 40 of the present invention is illustrated.
- the illustrated assembly is highly schematic in nature as specific implementations will have a variety of layouts and components, as will be appreciated by those skilled in the art.
- the RF power amplifier circuit board assembly 40 comprises a printed circuit board 12 having interconnect portion(s) 20 (as illustrated in FIGS. 2 and 3 ). Further, RF power amplifier circuit board assembly 40 has one or more RF power transistors 44 and various other discrete components 42 , 43 mounted thereon.
- the RF power amplifier circuit board also includes conductive circuit traces 46 that interconnect discrete components and also provide a ground connection, as explained herein, to the pallet 16 through interconnect portions 20 .
- Conductive traces 46 are shown on the top surface of PCB layer 12 in FIG. 4 , for ease of illustration, but traces may also be configured on the bottom surface of PCB layer 12 as described in more detail in the '253 patent.
- a ground plane layer may also be provided within layer 12 and this may also connect to ground traces 46 and the pallet 16 through interconnect portions 20 .
- interconnect portions 20 may be disposed adjacent selected electronic components to provide thermal coupling to the pallet 16 for “hot spots”, even where electrical connections are not needed (as illustrated generally by component 43 and adjacent interconnect portion 20 ).
- the invention as illustrated herein additionally includes a method of assembling and interconnecting a PCB to a conductive substrate.
- a preferred embodiment of this method comprises assembling PCB 12 and substrate 16 using a nonconductive adhesive layer 14 , followed by reflowing solder through the via hole 22 in the PCB and the cavity 24 below the via hole 22 .
- the method comprises applying solder paste 26 to the via hole 22 from above using conventional techniques and heating the solder paste 26 to a temperature to provide reflow of the solder paste into the via hole.
- the vent holes 32 assist the reflow process by venting gases in the cavity 24 and relieving backpressure as described above.
- solder paste thus flows from the upper surface of the printed circuit board 12 through the via hole 22 into cavity 24 to electrically connect to the conductive substrate 16 while substantially maintaining equalized pressure through the venting of the cavity 24 .
- a suitable nonconductive adhesive layer 14 such as a thermal set epoxy perform, and bonding of the layers using the adhesive, are disclosed in the '253 patent and may be employed herein, as will be readily appreciated by those skilled in the art.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims (9)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/849,478 US6954987B2 (en) | 2003-05-22 | 2004-05-19 | Method of interconnecting a circuit board to a substrate |
| KR1020057022065A KR100734767B1 (en) | 2003-05-22 | 2004-05-20 | Circuit board assembly employing solder vent hole |
| PCT/US2004/015899 WO2004107827A2 (en) | 2003-05-22 | 2004-05-20 | Circuit board assembly employing solder vent hole |
| US11/195,384 US20050263324A1 (en) | 2003-05-22 | 2005-08-01 | Circuit board assembly employing solder vent hole |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US47271003P | 2003-05-22 | 2003-05-22 | |
| US10/849,478 US6954987B2 (en) | 2003-05-22 | 2004-05-19 | Method of interconnecting a circuit board to a substrate |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US11/195,384 Division US20050263324A1 (en) | 2003-05-22 | 2005-08-01 | Circuit board assembly employing solder vent hole |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| US20040231884A1 US20040231884A1 (en) | 2004-11-25 |
| US6954987B2 true US6954987B2 (en) | 2005-10-18 |
Family
ID=33457380
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US10/849,478 Expired - Fee Related US6954987B2 (en) | 2003-05-22 | 2004-05-19 | Method of interconnecting a circuit board to a substrate |
| US11/195,384 Abandoned US20050263324A1 (en) | 2003-05-22 | 2005-08-01 | Circuit board assembly employing solder vent hole |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US11/195,384 Abandoned US20050263324A1 (en) | 2003-05-22 | 2005-08-01 | Circuit board assembly employing solder vent hole |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US6954987B2 (en) |
| KR (1) | KR100734767B1 (en) |
| WO (1) | WO2004107827A2 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090095524A1 (en) * | 2007-10-12 | 2009-04-16 | Fujitsu Limited | Core substrate and method of producing the same |
| CN105493641A (en) * | 2013-09-05 | 2016-04-13 | 株式会社藤仓 | Printed wiring board and connector connected to said wiring board |
| KR20160064205A (en) * | 2013-10-01 | 2016-06-07 | 가부시키가이샤후지쿠라 | Wiring board assembly and method for producing same |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100780961B1 (en) * | 2006-10-02 | 2007-12-03 | 삼성전자주식회사 | PCB with built-in passive element that can be reworked and its manufacturing method and semiconductor module |
| JP2008177422A (en) * | 2007-01-19 | 2008-07-31 | Toshiba Corp | Printed circuit board and electronic device |
| KR101383783B1 (en) * | 2008-01-17 | 2014-04-11 | 삼성전자주식회사 | Connector of Printed Electronics and method of manufacturing the same |
| US20090225524A1 (en) * | 2008-03-07 | 2009-09-10 | Chin-Kuan Liu | Hollowed Printed Circuit Board Having Via Hole And Method For Forming Via Hole In Hollowed Printed Circuit Board |
| US20110249414A1 (en) * | 2008-12-15 | 2011-10-13 | Robert E Krancher | System for placing electronic devices in a restricted space of a printed circuit board |
| JP2014192476A (en) * | 2013-03-28 | 2014-10-06 | Fujitsu Ltd | Printed circuit board solder packaging method and solder packaging structure |
| US9607964B2 (en) * | 2014-03-28 | 2017-03-28 | Intel Corporation | Method and materials for warpage thermal and interconnect solutions |
| US9330874B2 (en) * | 2014-08-11 | 2016-05-03 | Innovative Micro Technology | Solder bump sealing method and device |
| KR101659180B1 (en) | 2014-12-22 | 2016-09-22 | 엘지전자 주식회사 | Tuch sensor assembly and refrigerator door with Tuch sensor assembly |
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Also Published As
| Publication number | Publication date |
|---|---|
| US20040231884A1 (en) | 2004-11-25 |
| KR20060012011A (en) | 2006-02-06 |
| WO2004107827A2 (en) | 2004-12-09 |
| WO2004107827A3 (en) | 2005-06-09 |
| US20050263324A1 (en) | 2005-12-01 |
| KR100734767B1 (en) | 2007-07-06 |
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