US6527190B1 - Chip card with memory for programs which can be reloaded as a function of the application - Google Patents

Chip card with memory for programs which can be reloaded as a function of the application Download PDF

Info

Publication number
US6527190B1
US6527190B1 US09/508,287 US50828700A US6527190B1 US 6527190 B1 US6527190 B1 US 6527190B1 US 50828700 A US50828700 A US 50828700A US 6527190 B1 US6527190 B1 US 6527190B1
Authority
US
United States
Prior art keywords
memory
program
chip card
command instructions
reloadable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US09/508,287
Other languages
English (en)
Inventor
Markus Weinländer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SIEMENS IT SOLUTIONS AND SERVICES GmbH
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=7841754&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=US6527190(B1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Siemens AG filed Critical Siemens AG
Assigned to SIEMENS AKTIENGESELLSCHAFT reassignment SIEMENS AKTIENGESELLSCHAFT ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: WEINLANDER, MARKUS
Application granted granted Critical
Publication of US6527190B1 publication Critical patent/US6527190B1/en
Assigned to SIEMENS IT SOLUTIONS AND SERVICES GMBH reassignment SIEMENS IT SOLUTIONS AND SERVICES GMBH ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SIEMENS AKTIENGESELLSCHAFT
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating

Definitions

  • Chip cards frequently have a data memory which, for example, is organized in the form of a hierarchical file system and which is provided, in particular, in the form of an EEPROM memory module.
  • the data memory of chip cards serves, in particular, also as a memory for programs which can be reloaded as a function of the application.
  • the reloading of programs after the chip card has been manufactured, and in particular after it has been personalized or initialized permits subsequent reloading of, in particular, program routines or files, such as for example encryption algorithms, which only the application provider of the chip card, and not the manufacturer of the chip card, knows.
  • Programs for fault recovery or expansion routines in particular for the operating system of the chip card, can also be reloaded subsequently.
  • command instructions with absolute address parameters are available for the programs which are as a rule created at the chip card programming code level, in particular at the machine command level.
  • These are command instructions with an absolute memory address system in which the access address in the memory of the chip card is specified directly and which is independent of the memory address of the corresponding command instruction itself.
  • the command instructions which are generally used in PC systems and which have a relative memory addressing system are not at all available, or available only to a very restricted extent, with the result that in the case of programs for chip cards it is necessary to resort to accessing command instructions with an absolute memory addressing system.
  • Such command instructions in the case of chip cards with absolute address parameters are, in particular, jump instructions, shift instructions or address instructions, for example the so-called ‘MOV_DPTR’, ‘#adrs’, ‘LCALL_adrs’ or ‘LJMP_adrs’ command instructions.
  • a first group of these command instructions is independent of the memory area which the program in the memory occupies, in particular because the address parameters refer to memory areas which are not occupied by the reloadable program, for example to the operating system of the chip card.
  • a second group of these command instructions is dependent on the memory area which the program occupies in the memory, in particular because the address parameters refer to the memory area which is occupied by the reloadable program. If the program is shifted, the address parameters of the second group of command instructions are adapted, while the address parameters of the first group of command instructions must remain unchanged.
  • command instructions with absolute address parameters of the memory area of the reloadable program in the memory can be either independent or dependent.
  • Second group is not dependent on the type of the respective command instruction here.
  • the disadvantageous possibility is known that, during the actual creation of a reloadable program for chip cards, a specific version of the corresponding reloadable program, which takes into account its respective application-dependent arrangement in the memory of the chip card, is created for any foreseeable application which can be provided.
  • An object of the present invention is to provide a chip card with programs which can be reloaded as a function of the application and which permits a more advantageous adaptation of the respective program to its application-dependent memory area assignment in the memory of the chip card.
  • An advantage of the chip card according to the preset invention is that during the creation of a reloadable program which has command instructions with absolute address parameters, it is only necessary to create a single program version.
  • This basic version of the program can then be reloaded into the memory of the chip card as a function of the application, and in particular can be installed or configured by means of the chip card itself, i.e., can be adapted to the memory area which is occupied as a function of the application.
  • the memory area which is occupied by the reloadable program can, according to the invention, preset have at least a first memory element and a second memory element for separating at least the command instructions with absolute address parameters, which refer to the memory area occupied by the program, and the memory areas which are not occupied by the program.
  • the necessary adaptation of the reloadable program to the memory area occupied by it i.e., the necessary adaptation of the program in particular to its application-dependent start address, can advantageously be carried out completely by the program execution unit of the chip card.
  • a user of the chip card thus advantageously requires no detailed knowledge of the program structure, with the result that, in particular, it is possible to reload even programs which relate to the security of the chip card and whose internal structures are not supposed to be known to the user.
  • FIG. 1 shows a schematic view of the structure of the chip card according to the preset invention with program execution unit and memory in which programs which can be reloaded as a function of the application are stored, the programs having first and second command instructions with absolute address parameters.
  • FIG. 2 shows a schematic view of the structure of a reloadable program whose first and second command instructions are separated in the first and second memory elements of the memory area which is occupied by the reloadable program.
  • FIG. 1 illustrates, by way of example, a schematic view of the structure of the chip card CK according to the preset invention with a program execution unit P and a memory S.
  • the memory S has at least one program which can be reloaded as a function of the application, the programs which are designated by the references P 1 to Pn and which are reloaded into the memory S as a function of the application being illustrated in FIG. 1 by way of example.
  • Each of the reloadable programs P 1 to Pn occupies, in the reloaded state in the memory S, a specific memory area B 1 to Bn, each of which has, in particular, a start address SA 1 to SAn.
  • the preset invention will be described below, in particular with respect to the example of the reloadable program P 1 .
  • the reloadable program P 1 has first command instructions, designated by OP 1 , with absolute address parameters A 1 which refer to memory areas which are not occupied by the reloadable program P 1 to Pn. For example, for the reloadable program P 1 which is illustrated in FIG. 1 these are those memory areas of the memory S which are located outside the memory area B 1 .
  • the absolute addressing reference of the first command instructions OP 1 which are requested by means of the address parameters A 1 is illustrated in FIG. 1, by way of example, with the arrow J 1 .
  • the reloadable program P 1 has second command instructions, designated by OP 2 , with absolute address parameters A 2 which refer to the memory area B 1 which is occupied by the reloadable program P 1 .
  • the absolute addressing reference of the second command instructions OP 2 which is requested by means of the address parameter A 2 , is illustrated in FIG. 1, by way of example, with the arrow J 2 .
  • a reloadable program P 1 of the chip card CK according to the preset invention is illustrated by way of example, said program P 1 occupying the memory area B 1 in the memory S of the chip card CK according to the preset invention.
  • the first and second command instructions which have the respective references OP 1 and OP 2 in FIG. 1, have, by way of example, in FIG. 2 the references OP 11 to OP 1 z and OP 21 to OP 2 x, respectively, with the absolute
  • the memory area B 1 which is occupied by the reloadable program P 1 in the memory S has, according to the preset invention , a first memory element NLA 1 and at least one second memory element LA 1 .
  • the first command instructions OP 11 to OP 1 z whose absolute address parameters adr 11 to adr 1 z refer to memory areas which are not occupied by the reloadable program P 1 are arranged in the first memory element NLA 1 .
  • Addressing references of the first command instructions OP 11 and OP 1 y to memory areas which are not occupied by the reloadable program P 1 are illustrated in FIG.
  • the second command instructions OP 21 to OP 2 x whose absolute address parameters adr 21 to adr 2 x refer to the memory area B 1 which is occupied by the reloadable program P 1 are, according to the preset invention arranged in the second memory element LA 1 . Addressing references of the second command instructions OP 21 and OP 2 x to the memory area B 1 which is occupied by the reloadable program P 1 are illustrated in FIG. 2 by way of example with the arrows J 6 and J 7 , respectively.
  • the structure of the reloadable program P 1 which is illustrated in FIG. 2 in schematic form is capable of being transferred to the programs P 1 to Pn which are illustrated in FIG. 1, can be reloaded according to the preset invention and occupy the memory areas B 1 to Bn in the memory S.
  • the memory areas B 1 to Bn have the first and second memory elements NLA 1 to NLAn and LA 1 to LAn, respectively, which are illustrated in FIG. 1 .
  • the program execution unit P adapts, for example, those address parameters adr 21 to adr 2 x of the second command instructions OP 21 to OP 2 x which are arranged in the second memory element LA 1 during the reloading of the program P 1 into the memory area B 1 which is occupied as a function of the application.
  • the program execution unit P does not perform any adaptation for those address parameters adr 11 to adr 1 z of the first command instructions OP 11 to OP 1 z which are arranged in the first memory element NLA 1 because said address parameters adr 11 to adr 1 z refer to memory areas outside the memory area B 1 .
  • the program P 1 is initially created in hexadecimal form 0000h for the start address.
  • the program execution unit P adds the value of the start address SA 1 globally to all those address parameters adr 21 to adr 2 x of the second command instructions OP 21 to OP 2 x which are arranged in the second memory element LA 1 .
  • the absolute addressing references of the address parameters adr 21 to adr 2 x, and thus the operational capability of the program P 1 are maintained.
  • a programming access is carried out by second command instructions OP 21 to OP 2 x in the second memory element LA 1 to memory areas which are not occupied by the reloadable program P 1 , by means of the first command instructions OP 1 to OP 1 z arranged in the first memory element NLA 1 . This is explained below with reference to the example of a second command instruction OP 21 which has the reference OP 21 .
  • the absolute address parameters adr 21 of the second command instruction OP 21 which is arranged in the second memory element LA 1 refer here to a first command instruction OP 1 y which is arranged in the first memory element NLA 1 , as is illustrated in FIG. 2, by way of example, by the arrow J 6 .
  • the absolute address parameters adrly of the respective first command instruction OP 1 y refer to the memory areas i.e. in particular to that memory address of the memory S to which the programming access is to be made, as is illustrated in FIG. 2, by way of example, by the arrow J 5 .
  • a jump table T with first command instruction OP 1 y to OP 1 z is advantageously arranged in the first memory element NLA 1 , by means of which a programming access of second command instructions OP 21 to OP 2 x which are arranged in the second memory element LA 1 can be made to memory areas which are not occupied by the reloadable program P 1 , these being, for example, memory areas of the chip card at which operating system routines are stored.
  • the memory S of the chip card CK has a first memory subdivision S 1 to which the address parameters A 1 of the first command instructions OP 1 of the reloadable programs P 1 to Pn refer. Furthermore, the memory S advantageously has at least one second memory subdivision S 2 in which the memory area B 1 to Bn occupied by the reloadable programs P 1 to Pn is located.
  • an operating system program BS of the chip card CK is preferably stored in the first memory subdivision S 1 of the memory S.
  • the first memory subdivision S 1 and the second memory subdivision S 2 are, in particular, physically different memories of the chip card CK, for example a read-only memory in the form of a ROM module or a read/write memory in the form of an EEPROM module.
  • the operating system program BS can already be stored in the first memory subdivision S 1 of the memory S during the manufacture of the chip card CK
  • the programs P 1 to Pn can be subsequently reloaded into the second memory subdivision S 2 as a function of the application.
  • the memory S of the chip card CK can advantageously have comprehensive memory addressing a system, for example from hexadecimal 0000h to hexadecimal FFFFh.
  • At least the magnitude of the first memory elements NLA 1 to NLAn of the memory areas B 1 to Bn which are occupied by the reloadable programs P 1 to Pn are stored in the memory S of the chip card.
  • the magnitude of the first memory element NLA 1 to NLAn is advantageously stored in the respective, occupied memory area B 1 to Bn, as is illustrated in FIG. 2 by way of example for the program P 1 with the reference L 1 .

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Saccharide Compounds (AREA)
  • Peptides Or Proteins (AREA)
  • Circuits Of Receivers In General (AREA)
  • Storage Device Security (AREA)
US09/508,287 1997-09-09 1998-08-27 Chip card with memory for programs which can be reloaded as a function of the application Expired - Lifetime US6527190B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19739545A DE19739545C1 (de) 1997-09-09 1997-09-09 Chipkarte mit Speicher für anwendungsabhängig nachladbare Programme
DE19739545 1997-09-09
PCT/DE1998/002530 WO1999013430A2 (de) 1997-09-09 1998-08-27 Chipkarte mit speicher für anwendungsabhängig nachladbare programme

Publications (1)

Publication Number Publication Date
US6527190B1 true US6527190B1 (en) 2003-03-04

Family

ID=7841754

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/508,287 Expired - Lifetime US6527190B1 (en) 1997-09-09 1998-08-27 Chip card with memory for programs which can be reloaded as a function of the application

Country Status (13)

Country Link
US (1) US6527190B1 (da)
EP (1) EP1021791B1 (da)
CN (1) CN1143241C (da)
AT (1) ATE217993T1 (da)
AU (1) AU743055B2 (da)
CA (1) CA2302694A1 (da)
DE (2) DE19739545C1 (da)
DK (1) DK1021791T3 (da)
ES (1) ES2178272T3 (da)
HU (1) HUP0003685A3 (da)
NO (1) NO20001214D0 (da)
PT (1) PT1021791E (da)
WO (1) WO1999013430A2 (da)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020030099A1 (en) * 2000-06-28 2002-03-14 Hitachi, Ltd. Processing method and system of data management for IC card
US20040199784A1 (en) * 2001-11-27 2004-10-07 Kazuyoshi Irisawa Portable information recording medium
US20060157571A1 (en) * 2002-07-26 2006-07-20 Daniel Ciesinger Installing a file system in a data carrier
CN106302261A (zh) * 2016-08-02 2017-01-04 青岛海信电器股份有限公司 一种控制命令转发的方法和装置

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19926081A1 (de) * 1999-06-08 2000-12-21 Giesecke & Devrient Gmbh Chipkarte mit mehreren Anwendungsprogrammen
FR2827458B1 (fr) * 2001-07-11 2003-12-19 Gemplus Card Int Procede d'acces a un service specifique propose par un operateur virtuel et carte a puce d'un dispositif correspondant
TWI241481B (en) * 2002-06-25 2005-10-11 Lite On Technology Corp Repeated burning method of flash memory program
US20060136652A1 (en) * 2004-12-21 2006-06-22 Via Technologies, Inc. Electronic system with remap function and method for generating bank with remap function
CN105785967B (zh) * 2014-12-24 2018-10-16 北京兆易创新科技股份有限公司 一种mcu的校准方法和系统

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4777355A (en) * 1986-12-24 1988-10-11 Mitsubishi Denki Kabushiki Kaisha IC card and system for checking the functionality thereof
US4829169A (en) * 1985-07-01 1989-05-09 Toppan Moore Company, Inc. IC card having state marker for record access
US5241634A (en) * 1988-04-26 1993-08-31 Oki Electric Industry Co., Ltd. Method of handling system calls to an operating system of a computer by system service routines stored as firmware
EP0583006A2 (en) * 1992-08-13 1994-02-16 Matsushita Electric Industrial Co., Ltd. IC card with hierarchical file structure
US5542081A (en) * 1990-10-02 1996-07-30 Gemplus Card International IC card designed to receive multiple programs in a progammable memory
WO1996028782A1 (de) * 1995-03-10 1996-09-19 Siemens Aktiengesellschaft Mehrbenutzerdatenverarbeitungsanlage mit speicherschutz
US5625791A (en) * 1992-12-31 1997-04-29 Gemplus Card International Chip card with data and programs protected against ageing
US5829013A (en) * 1995-12-26 1998-10-27 Intel Corporation Memory manager to allow non-volatile memory to be used to supplement main memory

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02214994A (ja) * 1989-02-15 1990-08-27 Hitachi Maxell Ltd Ｉｃカード
DE59108956D1 (de) * 1991-09-30 1998-04-23 Siemens Ag Verfahren zur Erstellung einer ablauffähigen Konfiguration eines in einen Systemspeicherbereich eines Prozessorsystems ladbaren Systemprogramms
KR970001201B1 (ko) * 1992-04-02 1997-01-29 사또오 후미오 메모리 카드 장치

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4829169A (en) * 1985-07-01 1989-05-09 Toppan Moore Company, Inc. IC card having state marker for record access
US4777355A (en) * 1986-12-24 1988-10-11 Mitsubishi Denki Kabushiki Kaisha IC card and system for checking the functionality thereof
US5241634A (en) * 1988-04-26 1993-08-31 Oki Electric Industry Co., Ltd. Method of handling system calls to an operating system of a computer by system service routines stored as firmware
US5542081A (en) * 1990-10-02 1996-07-30 Gemplus Card International IC card designed to receive multiple programs in a progammable memory
EP0583006A2 (en) * 1992-08-13 1994-02-16 Matsushita Electric Industrial Co., Ltd. IC card with hierarchical file structure
US5625791A (en) * 1992-12-31 1997-04-29 Gemplus Card International Chip card with data and programs protected against ageing
WO1996028782A1 (de) * 1995-03-10 1996-09-19 Siemens Aktiengesellschaft Mehrbenutzerdatenverarbeitungsanlage mit speicherschutz
US5991858A (en) * 1995-03-10 1999-11-23 Siemens Aktiengesellschaft Multi-user data processing system with storage protection
US5829013A (en) * 1995-12-26 1998-10-27 Intel Corporation Memory manager to allow non-volatile memory to be used to supplement main memory

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020030099A1 (en) * 2000-06-28 2002-03-14 Hitachi, Ltd. Processing method and system of data management for IC card
US6805296B2 (en) * 2000-06-28 2004-10-19 Hitachi, Ltd. Processing method and system of data management for IC card
US20050038820A1 (en) * 2000-06-28 2005-02-17 Hitachi, Ltd. Processing method and system of data management for IC card
US20040199784A1 (en) * 2001-11-27 2004-10-07 Kazuyoshi Irisawa Portable information recording medium
US7367047B2 (en) * 2001-11-27 2008-04-29 Dai Nippon Printing Co., Ltd. Portable information recording medium
US20060157571A1 (en) * 2002-07-26 2006-07-20 Daniel Ciesinger Installing a file system in a data carrier
US7347380B2 (en) 2002-07-26 2008-03-25 Giesecke & Devrient Gmbh Installing a file system in a data carrier
CN106302261A (zh) * 2016-08-02 2017-01-04 青岛海信电器股份有限公司 一种控制命令转发的方法和装置

Also Published As

Publication number Publication date
CN1269898A (zh) 2000-10-11
NO20001214L (no) 2000-03-08
NO20001214D0 (no) 2000-03-08
ES2178272T3 (es) 2002-12-16
HUP0003685A2 (hu) 2001-02-28
EP1021791B1 (de) 2002-05-22
CN1143241C (zh) 2004-03-24
WO1999013430A2 (de) 1999-03-18
WO1999013430A3 (de) 1999-06-03
HUP0003685A3 (en) 2003-09-29
AU743055B2 (en) 2002-01-17
EP1021791A2 (de) 2000-07-26
DE19739545C1 (de) 1999-01-07
AU1020699A (en) 1999-03-29
CA2302694A1 (en) 1999-03-18
PT1021791E (pt) 2002-09-30
ATE217993T1 (de) 2002-06-15
DE59804208D1 (de) 2002-06-27
DK1021791T3 (da) 2002-09-16

Similar Documents

Publication Publication Date Title
EP0573190B1 (en) Dynamically configurable kernel
US5136709A (en) Method for generating an operating system by a static link-editor
US7124290B2 (en) Method and system for selectively booting one of a plurality of operating systems contained on a mass storage device
JP3186905B2 (ja) コンピュータブート用両エンディアンファームウェアシステム
US4589063A (en) Data processing system having automatic configuration
EP0797800B1 (en) System for providing bios to host computer
US6629259B2 (en) Method for automatically duplicating a BIOS
US5991858A (en) Multi-user data processing system with storage protection
US6527190B1 (en) Chip card with memory for programs which can be reloaded as a function of the application
WO2000019310A2 (en) Dual use master boot record
WO1998003909A1 (en) Dynamic nonvolatile memory update in a computer system
US20050144608A1 (en) Operating system allowing running of real-time application programs, control method therefor, and method of loading dynamic link libraries
JP5457496B2 (ja) 携帯型データ記憶媒体のメモリ管理
KR20000023497A (ko) 플래시 메모리를 구비한 마이크로컴퓨터 및 플래시메모리에 프로그램을 저장하는 방법
US6725345B2 (en) Object-oriented program with a memory accessing function
US20010034818A1 (en) Method for linking program modules reloaded into a main memory of a processor on a smart card
US7111279B2 (en) Intercepting calls to common dialog functions
US6401201B2 (en) Arrangements offering firmware support for different input/output (I/O) types
KR100483726B1 (ko) 제어시스템의작동방법
US6736325B1 (en) Codelets
CN100557568C (zh) 用于将一个应用程序装入一个芯片卡的方法
KR20000062879A (ko) 메모리 소자 역분할 방법 및 장치
US7178139B2 (en) Executable file system for an embedded computer
JP2004512623A (ja) 読み出し専用メモリの利用を拡大するためのメモリ管理ロジック
JPS59125421A (ja) 計算機応用機器の初期設定方式

Legal Events

Date Code Title Description
AS Assignment

Owner name: SIEMENS AKTIENGESELLSCHAFT, GERMANY

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:WEINLANDER, MARKUS;REEL/FRAME:010884/0483

Effective date: 20000410

STCF Information on status: patent grant

Free format text: PATENTED CASE

FPAY Fee payment

Year of fee payment: 4

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 8

AS Assignment

Owner name: SIEMENS IT SOLUTIONS AND SERVICES GMBH, GERMANY

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SIEMENS AKTIENGESELLSCHAFT;REEL/FRAME:026104/0079

Effective date: 20110324

FPAY Fee payment

Year of fee payment: 12