US5502431A - Integrated circuit device - Google Patents
Integrated circuit device Download PDFInfo
- Publication number
- US5502431A US5502431A US08/192,468 US19246894A US5502431A US 5502431 A US5502431 A US 5502431A US 19246894 A US19246894 A US 19246894A US 5502431 A US5502431 A US 5502431A
- Authority
- US
- United States
- Prior art keywords
- thin
- film resistor
- conductive layer
- insulation
- insulation layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
- H01L28/24—Resistors with an active material comprising a refractory, transition or noble metal, metal compound or metal alloy, e.g. silicides, oxides, nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/006—Thin film resistors
Definitions
- This invention relates to an integrated circuit device, and more particularly, is directed to an integrated circuit device having thin film resistors.
- Integrated circuit devices are known in which a thinfilm resistor formed of an alloy, such as a chromium (Cr) alloy or a chromium-silicon (Cr--Si) alloy, is provided on a well, an insulation film or the like.
- an alloy such as a chromium (Cr) alloy or a chromium-silicon (Cr--Si) alloy.
- Cr chromium
- Cr--Si chromium-silicon
- an integrated circuit device includes a thin-film resistor; and conductive layer means for electromagnetically shielding the thin-film resistor, the conductive layer means being provided above and below the thin-film resistor.
- conductive layer means for electromagnetically shielding the thin-film resistor, the conductive layer means being provided above and below the thin-film resistor.
- there are three thin-film resistors wherein first and second ones of the thin-film resistors being dummy resistors.
- the thin-film resistors are formed from an alloy selected from the group consisting of a chromium alloy and a chromium-silicon alloy.
- a first insulation layer is formed on a substrate; a first conductive layer is formed on the insulation layer; a second insulation layer is formed on the first conductive layer as part of the conductive layer means; and the thin-film resistor is formed on the second insulation layer.
- the first and second insulation layers are each formed from SiO 2
- the first conductive layer is formed from molybdenum.
- a third insulation layer is in covering relation to the thin-film resistor and the second insulating layer, and first contact holes penetrate the third insulation layer in association with the thin-film resistor. Second contact holes penetrate through the second and third insulation layers.
- the conductive layer means includes first wiring layers contacting the thin-film resistor from above through the first contact holes and second wiring layers contacting the first conductive layer through the second contact holes.
- an integrated circuit device includes a first insulation layer formed on a substrate; a second insulation layer formed above the first insulation layer; a thin-film resistor formed on the second insulation layer; and conductive layer means for electromagnetically shielding the thin-film resistor, the conductive layer means including a first conductive layer formed between the first and second insulation layers below the thin-film resistor and a second conductive layer formed above the thin-film resistor.
- an integrated circuit device includes a first insulation layer formed on a substrate; a second insulation layer formed above the first insulation layer; a thin-film resistor formed on the second insulation layer; a third insulation layer in covering relation to the thin-film resistor and the second insulating layer; first contact holes penetrating the third insulation layer in association with the thin-film resistor; second contact holes penetrating through the second and third insulation layers; and conductive layer means for electromagnetically shielding the thin-film resistor, the conductive layer means including a first conductive layer formed between the first and second insulation layers below the thin-film resistor and a second conductive layer formed above the thin-film resistor.
- FIG. 1(a)-1(c) are illustrative drawings of the configuration of an integrated circuit device according to the present invention in which:
- FIG. 1(a) is a plan view thereof
- FIG. 1(b) is a cross-sectional view of the integrated circuit device of FIG. 1(a), taken along line B--B thereof;
- FIG. 1(c) is a cross-sectional view of the integrated circuit device of FIG. 1(a), taken along line C--C thereof.
- an SiO 2 layer 1 is formed as an insulation layer or a well on the entire surface area of a substrate. Then, a molybdenum (Mo) layer 2 having a thickness of approximately 200 nm is formed on the entire surface area of the SiO 2 layer 1. Thereafter, an SiO 2 layer 3 having a thickness of approximately 300 nm is formed as an insulation layer on the entire surface area of the Mo-layer 2 by a CVD process.
- Mo molybdenum
- a chromium (Cr) alloy or a chromium-silicon (Cr--Si) alloy is deposited on layer 3 and has a thickness of approximately 9 nm. Then, an etching process is employed to the Cr or Cr--Si deposit to form thin-film resistors 4a, 4b and 4c. Thin-film resistors 4b and 4c are formed as dummy resistors.
- an SiO 2 layer 5 is formed on the entire surface area over layer 3 and has a thickness of approximately 500 nm.
- contact holes 6a are formed, penetrating the SiO 2 layer 5, in association with thin-film resistors 4a, 4b and 4c, as shown in FIGS. 1(a) and 1(c), and contact holes 6b are formed, penetrating through the SiO 2 layers 3 and 5, as shown in FIGS. 1(a) and 1(b).
- wiring layers 7a, 7b and 7c which include an aluminum (Al) layer having a thickness of approximately 850 nm are formed.
- Wiring layers 7a and 7b are connected to both ends of thin-film resistor 4a via contact holes 6a, and are connected to another part (not shown) of the integrated circuit device.
- wiring layer 7c is conductively connected with Mo layer 2 via contact holes 6b and is connected to voltage line Vss.
- thin-film resistor 4a is electromagnetically shielded by Mo layer 2 and wiring layer 7c, which effectively reduces noise caused by crosstalk or the like.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (3)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5-043747 | 1993-03-04 | ||
JP5043747A JPH06260596A (en) | 1993-03-04 | 1993-03-04 | Integrated circuit device |
Publications (1)
Publication Number | Publication Date |
---|---|
US5502431A true US5502431A (en) | 1996-03-26 |
Family
ID=12672359
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US08/192,468 Expired - Fee Related US5502431A (en) | 1993-03-04 | 1994-02-07 | Integrated circuit device |
Country Status (2)
Country | Link |
---|---|
US (1) | US5502431A (en) |
JP (1) | JPH06260596A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998048459A1 (en) * | 1997-04-17 | 1998-10-29 | Siemens Aktiengesellschaft | Integrated circuit with several components and method for the production thereof |
US6104277A (en) * | 1995-09-20 | 2000-08-15 | Pmc-Sierra Ltd. | Polysilicon defined diffused resistor |
US20030222260A1 (en) * | 2002-06-03 | 2003-12-04 | Fujitsu Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US10770393B2 (en) | 2018-03-20 | 2020-09-08 | International Business Machines Corporation | BEOL thin film resistor |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3663224A (en) * | 1966-11-03 | 1972-05-16 | Teeg Research Inc | Electrical components, electrical circuits, and the like, and methods for making the same by means of radiation sensitive elements |
JPH0194682A (en) * | 1987-10-06 | 1989-04-13 | Seiko Epson Corp | Magnetic seal |
US5270493A (en) * | 1990-11-26 | 1993-12-14 | Matsushita Electric Industrial Co., Ltd. | Printed circuit board having electromagnetic wave shield layer and self-contained printed resistor |
-
1993
- 1993-03-04 JP JP5043747A patent/JPH06260596A/en not_active Withdrawn
-
1994
- 1994-02-07 US US08/192,468 patent/US5502431A/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3663224A (en) * | 1966-11-03 | 1972-05-16 | Teeg Research Inc | Electrical components, electrical circuits, and the like, and methods for making the same by means of radiation sensitive elements |
JPH0194682A (en) * | 1987-10-06 | 1989-04-13 | Seiko Epson Corp | Magnetic seal |
US5270493A (en) * | 1990-11-26 | 1993-12-14 | Matsushita Electric Industrial Co., Ltd. | Printed circuit board having electromagnetic wave shield layer and self-contained printed resistor |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6104277A (en) * | 1995-09-20 | 2000-08-15 | Pmc-Sierra Ltd. | Polysilicon defined diffused resistor |
KR100433870B1 (en) * | 1997-04-17 | 2004-06-04 | 지멘스 악티엔게젤샤프트 | Integrated circuit with several components and method for the production thereof |
US6597053B1 (en) | 1997-04-17 | 2003-07-22 | Siemens Aktiengesellschaft | Integrated circuit arrangement with a number of structural elements and method for the production thereof |
DE19716102C2 (en) * | 1997-04-17 | 2003-09-25 | Infineon Technologies Ag | Integrated circuit arrangement with several components and method for their production |
WO1998048459A1 (en) * | 1997-04-17 | 1998-10-29 | Siemens Aktiengesellschaft | Integrated circuit with several components and method for the production thereof |
US6992327B2 (en) * | 2002-06-03 | 2006-01-31 | Fujitsu Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US20030222260A1 (en) * | 2002-06-03 | 2003-12-04 | Fujitsu Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US20060081842A1 (en) * | 2002-06-03 | 2006-04-20 | Fujitsu Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US20090176346A1 (en) * | 2002-06-03 | 2009-07-09 | Fujitsu Microelectronics Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US7883982B2 (en) | 2002-06-03 | 2011-02-08 | Fujitsu Semiconductor Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US20110092042A1 (en) * | 2002-06-03 | 2011-04-21 | Fujitsu Semiconductor Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US8298903B2 (en) | 2002-06-03 | 2012-10-30 | Fujitsu Semiconductor Limited | Monitor pattern of semiconductor device and method of manufacturing semiconductor device |
US10770393B2 (en) | 2018-03-20 | 2020-09-08 | International Business Machines Corporation | BEOL thin film resistor |
Also Published As
Publication number | Publication date |
---|---|
JPH06260596A (en) | 1994-09-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: NIPPON PRECISION CIRCUITS LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:USUI, SHINICHI;REEL/FRAME:006884/0524 Effective date: 19940125 |
|
AS | Assignment |
Owner name: NIPPON PRECISION CIRCUITS INC. Free format text: CHANGE OF ADDRESS;ASSIGNOR:NIPPON PRECISION CIRCUITS LTD. 5-4, HACCHOBORI 4-CHOME, CHUO-KU, TOKYO, JAPAN;REEL/FRAME:007154/0398 Effective date: 19940905 |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
REMI | Maintenance fee reminder mailed | ||
LAPS | Lapse for failure to pay maintenance fees | ||
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20040326 |
|
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |