US4897615A - High efficiency amplifier - Google Patents

High efficiency amplifier Download PDF

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US4897615A
US4897615A US07/278,094 US27809488A US4897615A US 4897615 A US4897615 A US 4897615A US 27809488 A US27809488 A US 27809488A US 4897615 A US4897615 A US 4897615A
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signal
input
branch
output
matching means
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US07/278,094
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Tzu-Hung Chen
Mahesh Kumar
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Siemens AG
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Siemens AG
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/30Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor
    • H03F3/3069Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor the emitters of complementary power transistors being connected to the output
    • H03F3/3076Single-ended push-pull [SEPP] amplifiers; Phase-splitters therefor the emitters of complementary power transistors being connected to the output with symmetrical driving of the end stage

Definitions

  • the present invention relates to high efficiency amplifiers, and it relates, more particularly, to push-pull amplifiers employing different transistors having similar characteristics in terms of biasing and signal operation.
  • GaAs FETs are generally employed in the push-pull configuration which operates in a class B mode.
  • a 180 ° balun is used on the input side of the amplifier while a 180 ° combiner is used on the output side of the amplifier. Both of these components introduce additional losses and restrict the bandwidth of operation by narrowing it.
  • the overall efficiency of push-pull amplifiers currently available is similar to a class A amplifier due to the additional losses in the balun and combiner.
  • a related object of the invention is to obviate the requirement of conventional passive circuit elements such as baluns and 180 ° signal combiners in push-pull amplifier.
  • An illustrative embodiment of the invention is in the form of an amplifier including two signal branches connected to receive the input signal and each producing a branch output signal corresponding to an amplified portion of the input signal.
  • the output branch signals are directly combined to form a composite signal which is an amplified version of the complete input signal.
  • the portions of the input signal correspond to alternate half cycles of the input signal.
  • each signal branch includes a heterojunction bipolar transistor (HBT) having a base, emitter and collector.
  • HBT heterojunction bipolar transistor
  • One branch includes an NPN structured HBT while the other branch includes a PNP structured HBT.
  • the two HBTs are selected to have similar direct current and radio frequency characteristics.
  • the HBTs are in a common collector configuration.
  • the HBTs are in a common emitter configuration.
  • the output terminal of the HBTs are connected directly together.
  • the respective inputs to each HBT include an individual matching network while a single output matching network is used for both HBTs.
  • FIG. 1 is a schematic diagram of an amplifier in accordance with the invention wherein two matched HBT are configured in a common collector push-pull arrangement.
  • FIG. 2 is an alternative arrangement wherein matched HBTs are in a common emitter push-pull configuration.
  • an input signal at terminal 11 is applied via input capacitor 12 to two matching circuits 13 and 14 also designated Ma and Mb to produce respective output signals A and B.
  • Signal A is applied to the base of an NPN heterojunction bipolar transistor (HBT) 17.
  • Signal B is applied to the base of a PNP HBT 18 through matching circuit 14.
  • the output signals of HBTs 17 and 18 designated AA and AB are combined at node 19 depicted as resulting output signal OA.
  • Output signal OA is coupled via capacitor 21 to an output matching circuit 22 also designated Mo.
  • Output signal OA is impedance matched to a desired value, typically fifty ohms, by matching circuit 22.
  • the input signal during positive half cycles produces an amplified current flow in the emitter of HBT 17 while HBT 18 is turned off and presents a high impedance at circuit node 19.
  • the input signal during negative half cycles produces an amplified current flow in the emitter of HBT 18.
  • the two output signals are combined at node 19.
  • transistors 17 and 18 enable the foregoing operation in class B mode to achieve high efficiency.
  • the combined operation of the two signal branches produces a resulting signal operating in class A mode and is therefore linear. Due to elimination of band limited signal combiners and dividers, the circuit is readily able to amplify over broadband widths.
  • the various passive and active components in the amplifier of FIG. 1 are known and available to those in the art.
  • the matching circuits, or equalizers are microwave components which are fully described, for example, in a paper entitled "A Simplified ⁇ Real Frequency ⁇ Technique Applied to Broad-Band Multistage Microwave Amplifiers" by B. S. Yarman et al. at page 2216-2222 in IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-30, No. 12, December 1982. In fact, this paper describes a computer aided design (CAD) procedure for treating broad-band matching of an abitrary load to a complex generator.
  • CAD computer aided design
  • the two NPN and PNP HBTs are desired since they are able to have similar direct current and radio frequency characteristics.
  • An advantage of HBTs 17 and 18 over two NPN and PNP transistors is that similar RF performance for the latter is not achievable.
  • Such devices are described in a paper entitled "Optimizing N-p-n and P-n-p Heterojunction Bipolar Transistor for Speed" by D. A. Sunderland et al. in IEEE Transaction on Electron Devices, Vol. ED-34, No. 2, February 1987 at pages 367-377.
  • the amplifier of FIG. 1 may be considered as a common collector push-pull arrangement. Also it may be considered as a push-pull emitter follower arrangement. Another arrangement of at least equal importance in practical applications is found in FIG. 2.
  • FIG. 2 is a schematic diagram of a common emitter push-pull amplifier.
  • HBTs 32 and 33 receive their respective input signals via their respective input branches.
  • the signal at input terminal 34 arrives via capacitor 36 and matching circuit 38 (Ma).
  • the signal at input terminal 34 is coupled thereto by way of capacitor 39 and matching circuit 41.
  • the matching circuits therein are designed to provide maximum power transfer over the bandwidth contemplated for the amplifier.
  • the bases of HBTs 32 and 33 are biased by respective resistors 42 and 43.
  • respective half portions of the input signals are amplified to provide output signals GA and GB which are combined at circuit node 46.
  • an advantage particularly, present in the circuit of FIG. 2 and also FIG. 1 is the elimination of load resistors which each HBT serves for the other HBT during alternate half cycles. Such an arrangement therefore, also reduces power dissipation while increasing efficiency of operation.
  • the amplifiers of FIGS. 1 and 2 provide high linearity and high efficiency over a broadband width. While the amplifier of FIG. 1 is particularly suitable for driving low impedance loads, the amplifier of FIG. 2 enables higher impedance loads to be driven. Also, the amplifier of FIG. 1 does not invert while the amplifier of FIG. 2 does invert the signal phase.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

Amplifiers operating in push-pull are implemented to obviate input baluns and output signal combiners and their attendant losses. Amplifiers having two signal branches that each receive the input signal and have their signal branch outputs connected directly together. Each branch operates during alternate half cycles of the input signal while direct combining of the branch signal outputs produces a composite signal corresponding to the complete input signal. Each branch includes a matching input circuit and a heterojunction bipolar transistor whcih may be configured in either common collector or common emitter arrangement. The transistors are different since one is an NPN while the other is a PNP but they are selected to have similar direct current and radio frequency characteristics.

Description

BACKGROUND OF THE INVENTION
The present invention relates to high efficiency amplifiers, and it relates, more particularly, to push-pull amplifiers employing different transistors having similar characteristics in terms of biasing and signal operation.
Conventional push-pull, amplifiers include two identical signal branches that operate in 180 ° phase relationship or in phase opposition wherein input and output connections are each balanced to ground. The phase relationship produces additive output components of the desired wave. A disadvantage is that the passive circuit elements required to establish the phase relationship between the two branches occasion losses particularly in the output portion of the amplifier. These losses are present no matter what class of operation, for example, class A mode or class B mode, is used for the active amplifying devices.
In high frequency amplifiers, GaAs FETs are generally employed in the push-pull configuration which operates in a class B mode. Typically, a 180 ° balun is used on the input side of the amplifier while a 180 ° combiner is used on the output side of the amplifier. Both of these components introduce additional losses and restrict the bandwidth of operation by narrowing it. The overall efficiency of push-pull amplifiers currently available is similar to a class A amplifier due to the additional losses in the balun and combiner.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide a push-pull amplifier of higher efficiency than conventional amplifiers.
A related object of the invention is to obviate the requirement of conventional passive circuit elements such as baluns and 180 ° signal combiners in push-pull amplifier.
An illustrative embodiment of the invention is in the form of an amplifier including two signal branches connected to receive the input signal and each producing a branch output signal corresponding to an amplified portion of the input signal. The output branch signals are directly combined to form a composite signal which is an amplified version of the complete input signal. The portions of the input signal correspond to alternate half cycles of the input signal.
In some of the aspects of the invention, each signal branch includes a heterojunction bipolar transistor (HBT) having a base, emitter and collector. One branch includes an NPN structured HBT while the other branch includes a PNP structured HBT. The two HBTs are selected to have similar direct current and radio frequency characteristics. In one arrangement in accordance with the invention, the HBTs are in a common collector configuration. In another arrangement according to the invention, the HBTs are in a common emitter configuration. In each case, the output terminal of the HBTs are connected directly together. The respective inputs to each HBT include an individual matching network while a single output matching network is used for both HBTs.
BRIEF DESCRIPTION OF THE DRAWING
Features of the invention and additional objects of the invention will be more readily appreciated and better understood by reference to the following detailed description which should be considered in conjunction with the drawing.
FIG. 1 is a schematic diagram of an amplifier in accordance with the invention wherein two matched HBT are configured in a common collector push-pull arrangement.
FIG. 2 is an alternative arrangement wherein matched HBTs are in a common emitter push-pull configuration.
DETAILED DESCRIPTION
In FIG. 1, an input signal at terminal 11 is applied via input capacitor 12 to two matching circuits 13 and 14 also designated Ma and Mb to produce respective output signals A and B. Signal A is applied to the base of an NPN heterojunction bipolar transistor (HBT) 17. Signal B is applied to the base of a PNP HBT 18 through matching circuit 14. The output signals of HBTs 17 and 18 designated AA and AB are combined at node 19 depicted as resulting output signal OA. Output signal OA is coupled via capacitor 21 to an output matching circuit 22 also designated Mo. Output signal OA is impedance matched to a desired value, typically fifty ohms, by matching circuit 22.
In operation, the input signal during positive half cycles produces an amplified current flow in the emitter of HBT 17 while HBT 18 is turned off and presents a high impedance at circuit node 19. Similarly, the input signal during negative half cycles produces an amplified current flow in the emitter of HBT 18. After amplification by HBTs 17 and 18, the two output signals are combined at node 19.
The characteristics of transistors 17 and 18 enable the foregoing operation in class B mode to achieve high efficiency. The combined operation of the two signal branches produces a resulting signal operating in class A mode and is therefore linear. Due to elimination of band limited signal combiners and dividers, the circuit is readily able to amplify over broadband widths.
The various passive and active components in the amplifier of FIG. 1 are known and available to those in the art. For example, the matching circuits, or equalizers, are microwave components which are fully described, for example, in a paper entitled "A Simplified `Real Frequency` Technique Applied to Broad-Band Multistage Microwave Amplifiers" by B. S. Yarman et al. at page 2216-2222 in IEEE Transactions on Microwave Theory and Techniques, Vol. MTT-30, No. 12, December 1982. In fact, this paper describes a computer aided design (CAD) procedure for treating broad-band matching of an abitrary load to a complex generator. The two NPN and PNP HBTs (transistors 17 and 18) are desired since they are able to have similar direct current and radio frequency characteristics. An advantage of HBTs 17 and 18 over two NPN and PNP transistors is that similar RF performance for the latter is not achievable. Such devices are described in a paper entitled "Optimizing N-p-n and P-n-p Heterojunction Bipolar Transistor for Speed" by D. A. Sunderland et al. in IEEE Transaction on Electron Devices, Vol. ED-34, No. 2, February 1987 at pages 367-377.
The principles involved may be implemented in various circuit configurations. For example, the amplifier of FIG. 1 may be considered as a common collector push-pull arrangement. Also it may be considered as a push-pull emitter follower arrangement. Another arrangement of at least equal importance in practical applications is found in FIG. 2.
FIG. 2 is a schematic diagram of a common emitter push-pull amplifier. In accordance with the two signal branches of a push-pull amplifier, HBTs 32 and 33 receive their respective input signals via their respective input branches. For the base of HBT 32, the signal at input terminal 34 arrives via capacitor 36 and matching circuit 38 (Ma). For the base of HBT 33, the signal at input terminal 34 is coupled thereto by way of capacitor 39 and matching circuit 41. In either amplifier configuration, the matching circuits therein are designed to provide maximum power transfer over the bandwidth contemplated for the amplifier. The bases of HBTs 32 and 33 are biased by respective resistors 42 and 43. As is evident from the signal waveforms in FIG. 2, respective half portions of the input signals are amplified to provide output signals GA and GB which are combined at circuit node 46.
It should be noted that an advantage particularly, present in the circuit of FIG. 2 and also FIG. 1 is the elimination of load resistors which each HBT serves for the other HBT during alternate half cycles. Such an arrangement therefore, also reduces power dissipation while increasing efficiency of operation. As a result, the amplifiers of FIGS. 1 and 2 provide high linearity and high efficiency over a broadband width. While the amplifier of FIG. 1 is particularly suitable for driving low impedance loads, the amplifier of FIG. 2 enables higher impedance loads to be driven. Also, the amplifier of FIG. 1 does not invert while the amplifier of FIG. 2 does invert the signal phase.
There has thus been shown and described a novel amplifier configurations which fulfill all the objects and advantages sought therefor. Many changes, modifications, variations and other uses and applications of the subject invention will, however, become apparent to those skilled in the art after considering this specification and the accompanying drawing which disclose the preferred embodiments thereof. For example, different devices than those presently contemplated for the illustrative amplifier embodiments may be used to advantage. In such a case, it is only necessary that such devices conform in terms of their direct current and radio frequency characteristics. Furthermore, rather than a single device in each signal branch a plurality of devices may be used. All such changes, modifications, variations and other uses and applications which do not depart from the spirit and scope of the invention are deemed to be covered by the invention which is limited only by the claims which follow.

Claims (9)

We claim:
1. Apparatus for amplifying broadband input signals, the apparatus comprising:
a first signal branch for amplifying a first portion of the input signal having first input matching means and first output means for producing a first output branch signal,
a second signal branch for amplifying a second portion of the input signal having second input matching means for receiving the input signal and second output means for producing a second output branch signal, said first and second input matching means providing the broadband input signals in common phase relationship to each other,
each signal branch comprising at least one active device connected to its respective one of the first and second input matching means for providing efficient coupling of the input signal to the at least one active device, each signal branch and its at least one active device amplifying a complementary portion of their respective input signals compared to the portion being amplified by the other signal branch; and
the first and second output means serially connected together in a complementary push-pull configuration to combine respective complementary output branch signals to produce a composite signal and coupled to output matching means for providing efficient coupling of the composite signal to a load.
2. Apparatus for amplifying broadband input signals, the apparatus comprising:
a first signal branch for amplifying a first portion of the input signal having first input matching means and first output means for producing a first output branch signal,
a second signal branch for amplifying a second portion of the input signal having second input matching means for receiving the input signal and second output means for producing a second output branch signal,
each signal branch comprising at least one active device connected to its respective one of the first and second input matching means for providing efficient coupling of the input signal to the at least one active device, each signal branch and its at least one active device amplifying a complementary portion of their respective input signals compared to the portion of the other signal branch;
the at least one active device for the first signal branch comprising an NPN heterojunction bipolar transistor and the at least one active device for the second signal branch comprising a PNP heterojunction bipolar transistor having similar direct current and radio frequency characteristics to the NPN transistor; and
the first and second output means serially connected together in a push-pull configuration to combine respective complementary output branch signals to produce a composite signal and coupled to output matching means for providing efficient coupling of the composite signal to a load.
3. Apparatus in accordance with claim 2, wherein the NPN transistor and PNP transistor each have a base, emitter, and collector and the base receives the input signal while the emitter provides the output branch signal.
4. Apparatus in accordance with claim 3, wherein the emitter of the NPN transistor is connected directly to the emitter of the PNP transistor and a fixed powering potential is applied between the collector of the NPN transistor and the collector of the PNP transistor.
5. Apparatus in accordance with claim 4, further comprising a capacitor for receiving the input signal and coupling the input signal to the first input matching means and the second input matching means whose inputs are connected together.
6. Apparatus in accordance with claim 2, wherein the NPN transistor and PNP transistor each have a base, emitter, and collector and the base receives the input signal while the collector provides the output branch signal.
7. Apparatus in accordance with claim 6, wherein the collector of the PNP transistor is connected directly to the collector of the NPN transistor and a fixed powering potential is applied between the emitter of the PNP transistor and the emitter of the NPN transistor.
8. Apparatus in accordance with claim 7, further comprising a resistor for each transistor connected from its emitter to its base for biasing that transistor.
9. Apparatus in accordance with claim 7, further comprising two capacitors having a terminal connected together for receiving the input signal and each capacitor coupling the input signal individually to one of the first and second input matching means.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1991012658A1 (en) * 1990-02-16 1991-08-22 Scientific-Atlanta, Inc. Push-pull optical receiver
US5267071A (en) * 1991-09-03 1993-11-30 Scientific-Atlanta, Inc. Signal level control circuitry for a fiber communications system
US5347388A (en) * 1989-12-01 1994-09-13 Scientific-Atlanta, Inc. Push-pull optical receiver having gain control
US5347389A (en) * 1993-05-27 1994-09-13 Scientific-Atlanta, Inc. Push-pull optical receiver with cascode amplifiers
US7058369B1 (en) 2001-11-21 2006-06-06 Pmc-Sierra Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
CN101882915A (en) * 2010-04-30 2010-11-10 苏州英诺迅科技有限公司 Push-pull type radio-frequency power amplifier with improved linearity
US20110037522A1 (en) * 2009-08-11 2011-02-17 Samsung Electric-Mechanics Co., Ltd. Active balun with stacked structure

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US3495183A (en) * 1965-10-28 1970-02-10 Jfd Electronics Corp Distributional amplifier means
US3699465A (en) * 1970-06-18 1972-10-17 Theta Com Of California Self-balancing push pull amplifier
US3784932A (en) * 1972-12-11 1974-01-08 Motorola Inc Parallel transmission line matching network for connecting together a plurality of r.f. amplifier transistors

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Publication number Priority date Publication date Assignee Title
US3495183A (en) * 1965-10-28 1970-02-10 Jfd Electronics Corp Distributional amplifier means
US3699465A (en) * 1970-06-18 1972-10-17 Theta Com Of California Self-balancing push pull amplifier
US3784932A (en) * 1972-12-11 1974-01-08 Motorola Inc Parallel transmission line matching network for connecting together a plurality of r.f. amplifier transistors

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Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239402A (en) * 1989-12-01 1993-08-24 Scientific-Atlanta, Inc. Push-pull optical receiver
US5347388A (en) * 1989-12-01 1994-09-13 Scientific-Atlanta, Inc. Push-pull optical receiver having gain control
US5477370A (en) * 1989-12-01 1995-12-19 Scientific-Atlanta, Inc. Push-pull optical receiver having gain control
WO1991012658A1 (en) * 1990-02-16 1991-08-22 Scientific-Atlanta, Inc. Push-pull optical receiver
AU638119B2 (en) * 1990-02-16 1993-06-17 Scientific-Atlanta, Inc. Push-pull optical receiver
US5267071A (en) * 1991-09-03 1993-11-30 Scientific-Atlanta, Inc. Signal level control circuitry for a fiber communications system
US5347389A (en) * 1993-05-27 1994-09-13 Scientific-Atlanta, Inc. Push-pull optical receiver with cascode amplifiers
US7177603B1 (en) 2001-11-21 2007-02-13 Pmc-Sierra, Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
US7058369B1 (en) 2001-11-21 2006-06-06 Pmc-Sierra Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
US7200367B1 (en) 2001-11-21 2007-04-03 Pmc-Sierra, Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
US7260365B1 (en) 2001-11-21 2007-08-21 Pmc-Sierra, Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
US7295815B1 (en) 2001-11-21 2007-11-13 Pmc-Sierra, Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
US7340223B1 (en) 2001-11-21 2008-03-04 Pmc-Sierra, Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
US7904033B1 (en) 2001-11-21 2011-03-08 Pmc-Sierra, Inc. Constant gain digital predistortion controller for linearization of non-linear amplifiers
US20110037522A1 (en) * 2009-08-11 2011-02-17 Samsung Electric-Mechanics Co., Ltd. Active balun with stacked structure
US8031004B2 (en) 2009-08-11 2011-10-04 Samsung Electro-Mechanics Co., Ltd. Active balun with stacked structure
CN101882915A (en) * 2010-04-30 2010-11-10 苏州英诺迅科技有限公司 Push-pull type radio-frequency power amplifier with improved linearity
CN101882915B (en) * 2010-04-30 2012-10-03 苏州英诺迅科技有限公司 Push-pull type radio-frequency power amplifier with improved linearity

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