US4829015A - Method for manufacturing a fully self-adjusted bipolar transistor - Google Patents

Method for manufacturing a fully self-adjusted bipolar transistor Download PDF

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Publication number
US4829015A
US4829015A US07/170,897 US17089788A US4829015A US 4829015 A US4829015 A US 4829015A US 17089788 A US17089788 A US 17089788A US 4829015 A US4829015 A US 4829015A
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etching
layer
silicon
emitter
mask
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Expired - Fee Related
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US07/170,897
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English (en)
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Hans-Christian Schaber
Hans-Willi Meul
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Siemens AG
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Siemens AG
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Assigned to SIEMENS AKTIENGESELLSCHAFT, A GERMAN CORPORATION reassignment SIEMENS AKTIENGESELLSCHAFT, A GERMAN CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST. Assignors: MEUL, HANS-WILLI, SCHABER, HANS-CHRISTIAN
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222—Bipolar technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/732—Vertical transistors
    • H01L29/7325—Vertical transistors having an emitter-base junction leaving at a main surface and a base-collector junction leaving at a peripheral surface of the body, e.g. mesa planar transistor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/01—Bipolar transistors-ion implantation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/011—Bipolar transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/017—Clean surfaces

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
US07/170,897 1987-05-21 1988-03-21 Method for manufacturing a fully self-adjusted bipolar transistor Expired - Fee Related US4829015A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3717153 1987-05-21
DE3717153 1987-05-21

Publications (1)

Publication Number Publication Date
US4829015A true US4829015A (en) 1989-05-09

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Family Applications (1)

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US07/170,897 Expired - Fee Related US4829015A (en) 1987-05-21 1988-03-21 Method for manufacturing a fully self-adjusted bipolar transistor

Country Status (5)

Country Link
US (1) US4829015A (de)
EP (1) EP0293641B1 (de)
JP (1) JPS63305560A (de)
AT (1) ATE59499T1 (de)
DE (1) DE3861424D1 (de)

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4954865A (en) * 1988-05-10 1990-09-04 Stc Plc Integrated circuits
US4983531A (en) * 1990-02-12 1991-01-08 Motorola, Inc. Method of fabricating a single polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors
US5109263A (en) * 1989-07-28 1992-04-28 Hitachi, Ltd. Semiconductor device with optimal distance between emitter and trench isolation
US5116770A (en) * 1988-07-14 1992-05-26 Matsushita Electric Industrial Co., Ltd. Method for fabricating bipolar semiconductor devices
US5162244A (en) * 1988-09-23 1992-11-10 Samsung Electronics Co., Ltd. Bipolar transistor and manufacturing method thereof
US5188971A (en) * 1988-12-28 1993-02-23 Synergy Semiconductor Corporation Process for making a self-aligned bipolar sinker structure
US5236851A (en) * 1988-07-14 1993-08-17 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor devices
US5696007A (en) * 1995-12-20 1997-12-09 Electronics And Telecommunications Research Institute Method for manufacturing a super self-aligned bipolar transistor
US5814547A (en) * 1997-10-06 1998-09-29 Industrial Technology Research Institute Forming different depth trenches simultaneously by microloading effect
US5943578A (en) * 1993-02-05 1999-08-24 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device having an element isolating region
US6114743A (en) * 1996-12-10 2000-09-05 Sgs-Thomson Microelectronics S.A. Well isolation bipolar transistor
US6156594A (en) * 1996-11-19 2000-12-05 Sgs-Thomson Microelectronics S.A. Fabrication of bipolar/CMOS integrated circuits and of a capacitor
US6180442B1 (en) 1996-11-19 2001-01-30 Sgs-Thomson Microelectronics S.A. Bipolar transistor with an inhomogeneous emitter in a BICMOS integrated circuit method
US6348393B1 (en) * 1998-08-26 2002-02-19 Agere Systems Guardian Corp. Capacitor in an integrated circuit and a method of manufacturing an integrated circuit
US6444536B2 (en) * 1999-07-08 2002-09-03 Agere Systems Guardian Corp. Method for fabricating bipolar transistors
RU2492551C1 (ru) * 2012-04-05 2013-09-10 Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский университет "МИЭТ" Самосовмещенный высоковольтный интегральный транзистор
RU2492546C1 (ru) * 2012-04-05 2013-09-10 Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский университет "МИЭТ" Способ изготовления самосовмещенного высоковольтного интегрального транзистора

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8900319A (nl) * 1989-02-09 1990-09-03 Imec Inter Uni Micro Electr Bipolaire transistor en werkwijze voor het vervaardigen daarvan.
US5017990A (en) * 1989-12-01 1991-05-21 International Business Machines Corporation Raised base bipolar transistor structure and its method of fabrication
KR920007211A (ko) * 1990-09-06 1992-04-28 김광호 고속 바이폴라 트랜지스터 및 그의 제조방법
DE19632412A1 (de) * 1996-08-05 1998-02-12 Sifu Hu Vertikaler Bipolartransistor und Verfahren zu seiner Herstellung
DE10128481B4 (de) * 2001-06-12 2004-01-08 Infineon Technologies Ag Verfahren zur Ätzung eines Substrats

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0029900A2 (de) * 1979-11-29 1981-06-10 International Business Machines Corporation Als bipolarer Transistor in einem Halbleitersubstrat ausgebildetes selbstjustiertes Schaltungs- oder Bauelement und Verfahren zur Herstellung
EP0039411A2 (de) * 1980-05-05 1981-11-11 International Business Machines Corporation Herstellungsverfahren einer integrierten PNP- und NPN-Transistorstruktur
EP0062170A2 (de) * 1981-04-07 1982-10-13 International Business Machines Corporation Verfahren zur Herstellung selbstalignierter dielektrischer Isolation
US4378630A (en) * 1980-05-05 1983-04-05 International Business Machines Corporation Process for fabricating a high performance PNP and NPN structure
US4392149A (en) * 1980-03-03 1983-07-05 International Business Machines Corporation Bipolar transistor
EP0094482A2 (de) * 1982-05-18 1983-11-23 International Business Machines Corporation Verfahren zur Herstellung eines Transistors mit flachem Emitter und schmalem intrinsischem Basisgebiet
EP0036499B1 (de) * 1980-03-24 1984-08-15 International Business Machines Corporation Ein selbstjustierendes Verfahren für einen Bipolartransistor auf Polysilicium-Basis
UST104803I4 (en) * 1981-07-13 1984-11-06 Self-aligned process for providing an improved high performance bipolar transistor
EP0166923A2 (de) * 1984-06-29 1986-01-08 International Business Machines Corporation Hochleistungsbipolartransistor mit einem zwischen dem Emitter und der Extrinsic-Basiszone angeordneten leicht dotierten Schutzring
US4745087A (en) * 1987-01-13 1988-05-17 Advanced Micro Devices, Inc. Method of making fully self-aligned bipolar transistor involving a polysilicon collector contact formed in a slot with an oxide sidewall

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0029900A2 (de) * 1979-11-29 1981-06-10 International Business Machines Corporation Als bipolarer Transistor in einem Halbleitersubstrat ausgebildetes selbstjustiertes Schaltungs- oder Bauelement und Verfahren zur Herstellung
US4392149A (en) * 1980-03-03 1983-07-05 International Business Machines Corporation Bipolar transistor
EP0036499B1 (de) * 1980-03-24 1984-08-15 International Business Machines Corporation Ein selbstjustierendes Verfahren für einen Bipolartransistor auf Polysilicium-Basis
EP0039411A2 (de) * 1980-05-05 1981-11-11 International Business Machines Corporation Herstellungsverfahren einer integrierten PNP- und NPN-Transistorstruktur
US4378630A (en) * 1980-05-05 1983-04-05 International Business Machines Corporation Process for fabricating a high performance PNP and NPN structure
EP0062170A2 (de) * 1981-04-07 1982-10-13 International Business Machines Corporation Verfahren zur Herstellung selbstalignierter dielektrischer Isolation
UST104803I4 (en) * 1981-07-13 1984-11-06 Self-aligned process for providing an improved high performance bipolar transistor
EP0094482A2 (de) * 1982-05-18 1983-11-23 International Business Machines Corporation Verfahren zur Herstellung eines Transistors mit flachem Emitter und schmalem intrinsischem Basisgebiet
EP0166923A2 (de) * 1984-06-29 1986-01-08 International Business Machines Corporation Hochleistungsbipolartransistor mit einem zwischen dem Emitter und der Extrinsic-Basiszone angeordneten leicht dotierten Schutzring
US4745087A (en) * 1987-01-13 1988-05-17 Advanced Micro Devices, Inc. Method of making fully self-aligned bipolar transistor involving a polysilicon collector contact formed in a slot with an oxide sidewall

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
IEDM Techn. Dig. 1980, pp. 58 60, A Symmetrical Bipolar Structure , by D. D. Tang et al. *
IEDM Techn. Dig. 1980, pp. 58-60, "A Symmetrical Bipolar Structure", by D. D. Tang et al.
IEEE Transactions on Electron Devices, vol. ED 29, No. 4, Apr., 1982, Self Aligned Transistor with Sidewall Base Electrode , by Tohru Nakamura et al., pp. 596 600. *
IEEE Transactions on Electron Devices, vol. ED-29, No. 4, Apr., 1982, "Self-Aligned Transistor with Sidewall Base Electrode", by Tohru Nakamura et al., pp. 596-600.
Siemens Forsch u. Entwickl. Ber., vol. 13 (1984), No. 5, Self Aligned Bipolar Technology New Chances for Very High Speed Digital Integrated Circuits , by A. W. Wieder, pp. 246 252. *
Siemens Forsch-u. Entwickl.-Ber., vol. 13 (1984), No. 5, "Self-Aligned Bipolar Technology-New Chances for Very-High-Speed Digital Integrated Circuits", by A. W. Wieder, pp. 246-252.

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4954865A (en) * 1988-05-10 1990-09-04 Stc Plc Integrated circuits
US5116770A (en) * 1988-07-14 1992-05-26 Matsushita Electric Industrial Co., Ltd. Method for fabricating bipolar semiconductor devices
US5236851A (en) * 1988-07-14 1993-08-17 Matsushita Electric Industrial Co., Ltd. Method for fabricating semiconductor devices
US5162244A (en) * 1988-09-23 1992-11-10 Samsung Electronics Co., Ltd. Bipolar transistor and manufacturing method thereof
US5188971A (en) * 1988-12-28 1993-02-23 Synergy Semiconductor Corporation Process for making a self-aligned bipolar sinker structure
US5109263A (en) * 1989-07-28 1992-04-28 Hitachi, Ltd. Semiconductor device with optimal distance between emitter and trench isolation
US4983531A (en) * 1990-02-12 1991-01-08 Motorola, Inc. Method of fabricating a single polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors
US5943578A (en) * 1993-02-05 1999-08-24 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device having an element isolating region
US5696007A (en) * 1995-12-20 1997-12-09 Electronics And Telecommunications Research Institute Method for manufacturing a super self-aligned bipolar transistor
US6180442B1 (en) 1996-11-19 2001-01-30 Sgs-Thomson Microelectronics S.A. Bipolar transistor with an inhomogeneous emitter in a BICMOS integrated circuit method
US6156594A (en) * 1996-11-19 2000-12-05 Sgs-Thomson Microelectronics S.A. Fabrication of bipolar/CMOS integrated circuits and of a capacitor
US6114743A (en) * 1996-12-10 2000-09-05 Sgs-Thomson Microelectronics S.A. Well isolation bipolar transistor
US6184102B1 (en) * 1996-12-10 2001-02-06 Sgs-Thomson Microelectronics S.A. Method for manufacturing a well isolation bipolar transistor
US6432789B2 (en) 1996-12-10 2002-08-13 Sgs-Thomson Microelectronics S.A Method of forming a well isolation bipolar transistor
US5814547A (en) * 1997-10-06 1998-09-29 Industrial Technology Research Institute Forming different depth trenches simultaneously by microloading effect
US6348393B1 (en) * 1998-08-26 2002-02-19 Agere Systems Guardian Corp. Capacitor in an integrated circuit and a method of manufacturing an integrated circuit
US6444536B2 (en) * 1999-07-08 2002-09-03 Agere Systems Guardian Corp. Method for fabricating bipolar transistors
RU2492551C1 (ru) * 2012-04-05 2013-09-10 Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский университет "МИЭТ" Самосовмещенный высоковольтный интегральный транзистор
RU2492546C1 (ru) * 2012-04-05 2013-09-10 Федеральное государственное автономное образовательное учреждение высшего профессионального образования "Национальный исследовательский университет "МИЭТ" Способ изготовления самосовмещенного высоковольтного интегрального транзистора

Also Published As

Publication number Publication date
JPS63305560A (ja) 1988-12-13
ATE59499T1 (de) 1991-01-15
EP0293641A1 (de) 1988-12-07
EP0293641B1 (de) 1990-12-27
DE3861424D1 (de) 1991-02-07

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