US4811014A - Circuit arrangement for telecommunications systems, particularly telephone switching systems, comprising information interrogating devices cyclically driving inquiry locations - Google Patents
Circuit arrangement for telecommunications systems, particularly telephone switching systems, comprising information interrogating devices cyclically driving inquiry locations Download PDFInfo
- Publication number
- US4811014A US4811014A US06/890,117 US89011786A US4811014A US 4811014 A US4811014 A US 4811014A US 89011786 A US89011786 A US 89011786A US 4811014 A US4811014 A US 4811014A
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- US
- United States
- Prior art keywords
- inquiry
- locations
- location
- memory
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/72—Finding out and indicating number of calling subscriber
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/22—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
- G06F13/225—Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling with priority control
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
Definitions
- the present invention relates to a circuit arrangement for telecommunications systems and is particularly concerned with telephone switching systems which comprise information interrogating devices cyclically driving a plurality of inquiry locations.
- the information interrogating devices solicit information which may be present with different interrogation frequencies with respect to the various inquiry locations and modify the interrogation frequency with respect to a respective inquiry location depending on the appearance of an information to be called in.
- a circuit arrangement of this type is disclosed in the German published application No. 3,443,616 and enables inquiry locations to be interrogated with differing frequency.
- Inquiry locations can be individual scan points, for example in subscriber-associated switching devices such as connector sets or subscriber line circuits.
- subscriber-associated switching devices such as connector sets or subscriber line circuits.
- Incoming switch identifiers are recognized in that different interrogation results are acquired in the interrogation events undertaken at a scan point proceeding from a certain time than are acquired before that time, namely for the duration of the switch identifier.
- the latter-mentioned application discloses that, for example, selection pulses output from subscriber stations arrive in connector sets.
- the scan points are normally scanned at a relatively slow tempo.
- the relatively slow interrogation tempo is replaced by a relatively fast interrogation tempo.
- the possibility is provided of chronologically acquiring the end of a respective selection pulse as accurately as possible and, therefore, the duration of the appertaining dial pulse. In this manner, for example, selection pulses and switch identifiers formed by these pulses having a different duration can be distinguished from one another with great reliability.
- the change of the interrogation tempo serves the purpose of increasing the interrogation capacity of an interrogating device by slowing the interrogation tempo in that the number of inquiry locations can be likewise increased to a corresponding degree, whereby a chronologically relatively exact acquisition of switch identifiers having a specific and individual duration is nonetheless guaranteed.
- the volume of information to be called in can differ greatly at different inquiry locations.
- the different inquiry locations are uniformly cyclically selected, then there can be inquiry locations where the information to be called in back up, whereas there are other inquiry locations at which information for call in are only sporadically present when they are selected and interrogated.
- the principle is also known in this context of selecting inquiry locations on the basis of individually output request signals. What is disadvantageous, however, is the outlay which must be expended for generating, emitting, transmitting, accepting and evaluating these request signals, as well as the successive processing of the request signals.
- the invention therefore proceeds from the circuit arrangement of the type mentioned above wherein the various inquiry locations are cyclically selected.
- an inquiry location is interrogated only once in an interrogation cycle or in two or more interrogation cycles, in particular based on the measure of a respectively stored cycle number. It is also proposed in accordance with the circuit arrangement that the information interrogating device immediately selects an inquiry location in the next interrogation cycle each time an information from this inquiry location has been received and either repeats this given renewed receipt of an information and, in the opposite case, again continues the interrogation tempo from this point on based on the measure of the cycle numbers stored for this inquiry location. Accordingly, therefore, the interrogation tempo per inquiry location is boosted from an interrogation tempo individually assigned to the appertaining inquiry location to a uniform, maximum interrogation tempo.
- the mentioned proposed circuit arrangement provides that the information accepted from the various inquiry locations are counted in time intervals per inquiry location and the cycle numbers are again adapted after each time interval, being adapted inversely proportional based on the measure of these counter results, for example by the respective value "1".
- the cycle numbers stored for inquiry location are dynamically adapted based on the actual traffic volume.
- the object of the present invention is to provide that, in a circuit arrangement of the type set forth above, given unequal occurrence of information to be interrogated at the various inquiry locations as well as given fluctuations pertaining thereto and given discontinuous change of the crush of information to be interrogated at individual inquiry locations, the different interrogation frequencies provided are not simply evened out, whereby, however, the information interrogation devices should react to the volume of information to be interrogated in order to oppose a back up with respect to information to be interrogated at the inquiry locations.
- a further object of the invention is to reduce the circuit-oriented expense as well as the circuit-oriented work expense for taking the fluctuating and, in part, discontinuously-changing volume of information to be interrogated into consideration in comparison to the proposed circuit arrangement mentioned above.
- the present invention should therefore particularly do justice to the fact that the number of individually-successively interrogatable information present for inquiry location is unresolved, that, therefore, a respective plurality of information can also be simultaneously ready to be called in per inquiry location and that, given particular consideration thereof, those means and events by way of which the interrogation events are adapted to the fluctuating and, in part, discontinuously-changing volume of information to be called in should be designed in a particularly simple manner.
- the expense for apparatus and work sequences to be executed should thereby be kept low, namely that expense which is exerted for the adaptation of the interrogation events and their frequency per inquiry location to the fluctuations and to the discontinuous changes of the volume of information to be interrogated.
- the above object is achieved, according to the present invention, in that, after a reading of an address of an inquiry location from a memory location which is reached first, and given failure of an information respectively expected from this inquiry location to arrive after a selection of the inquiry location with this address, that next, further memory location at which the same address is stored is sought in the memory on the basis of the appertaining address.
- a note bit is stored here in assignment to this address.
- the memory location following immediately upon the memory location reached first is sought for the continuation of the successively-following reading of the stored addresses. Given the presence of a note bit stored at a memory location, a selection of the appertaining inquiry location which is selectable by way of this address is suppressed, and the note bit is thereby, in turn, erased.
- the exemplary embodiment shown on the drawing illustrates portions of a circuit arrangement of telephone switching technology which is presumed to be known in terms of its many construction possibilities.
- the structure constitutes a telephone switching system in which all of the control events, for example connection set-up events, are centrally and/or subcentrally controlled.
- a central or subcentral information-processing sequential logic system P serves for the execution of this control.
- it has a limited call-handling capacity with respect to the information-processing capacity.
- Connection-associated switching devices are present in great numbers in telephone switching systems. These connection-associated switching devices can be subscriber line circuits, selection receiving sets, connector sets, line terminating circuits of local lines and long-distance trunks and the like. In case the telephone switching system is constructed in pulse code modulation (PCM) technology, it would be assumed that the connection-associated switching devices are ports in the connecting groups. Detailed relationships regarding this structure are set forth in the description of the digital switching system EWSD in the supplement to the periodical "telcom report", 1981.
- PCM pulse code modulation
- connection-associated switching devices All information arriving into the connection-associated switching devices are to be processed at a central or subcentral location. These information are continuously interrogated in a known manner with the assistance of scan events, i.e. are called in from the connection-associated switching devices by way of information interrogating devices. Instead of connection-associated switching devices, inquiry locations, in the more general sense, shall therefore be predominantly mentioned below.
- Inquiry locations Al, A2...An are shown in the upper portion of the drawing. Shown therebelow are portions of a switching matrix K, an information interrogating device L, to which the switching matrix likewise belongs, and a central processor P.
- a switching matrix K an information interrogating device L, to which the switching matrix likewise belongs
- a central processor P a central processor
- the information interrogating device L controls the plurality of inquiry locations Al-An in regular fashion with the assistance of the switching matrix K assigned thereto, the switching matrix K comprising matrix switching devices kl-kn per respective inquiry location.
- the control of the switching matrix K by the information-interrogating device L occurs via a control path k in a manner which is likewise well known in the art.
- the selection can likewise occur with the assistance of addresses, in a known manner, these addresses being transmitted via an address multiple to the inquiry locations in which appropriate connecting devices then connect the respective inquiry location to a common data bus.
- the matrix switching devices kl-kn would be accommodated in the inquiry locations Al-An. It is also possible to accomplish the selection of the inquiry locations by way of the information-interrogating device L via a common data bus in accordance with time-division multiplex techniques, which are also well known in the art.
- the information interrogating device L therefore drives the inquiry locations Al-An for the call in of information which may be present at the inquiry locations, driving the inquiry locations regularly in succession. This drive occurs with different interrogation frequency with respect to the various inquiry locations. This is accomplished in that some of the inquiry locations are each selected only once in every interrogation cycle, other inquiry locations are selected twice, others are selected three times, etc, whereby the interrogation with respect to the various interrogation locations therefore occurs with different frequencies.
- the information-interrogating device L is also capable of respectively changing the interrogation frequency with respect to each of the inquiry locations dependent on the appearance of information to be called in.
- the appertaining interrogation cycle is consequently shortened chronologically overall to the same degree to which inquiry locations are respectively not selected in an interrogation cycle.
- the selection or drive device E controls the inquiry locations Al-An in that it successively searches the memory locations yl-yz in successive cyclical sequence (it is thereby a matter of an overall selection cycle in the sense initially set forth) and individually reads the addresses of the inquiry locations stored therein in succession and successively transmits the addresses obtained to the switching matrix K in a successive manner.
- the call-in device Ab When the call-in device Ab receives an information via a data path b and via the information-interrogating device L, it then stores the information in a list memory R of the processor P in a known manner with the assistance of a write device r, the processor P, in turn, calling the information in gradually from here for processing.
- the frequency of interrogation which is the equivalent to the interrogation frequency for the memory location, is not defined only by the described plurality of storages per inquiry location, but is also changed on a case basis by the information-interrogating device L dependent on the appearance of an information to be called in.
- an inquiry location has not supplied any information when being interrogated by selection by way of its address, i.e. each time an information respectively expected from this inquiry location fails to appear after selection of the inquiry location with the respective address, that selection event which is provided as the next selection event is suppressed.
- the interrogation frequency for that inquiry location is thereby reduced to half.
- the selection device E When in the course of the cyclical reading of the addresses of the inquiry locations the selection device E therefore reaches a memory location, for example the memory location y2, having a storage location, for example the storage location x2, at which a note bit is stored, then it erases the note bit at this storage location and simultaneously throws out the appertaining address on the basis of the stored note bit, i.e. the address of the appertaining inquiry location, for example the inquiry location A2, in that, after a preceding reading from the memory location, it in turn erases this address (without, however, this address being erased at the appertaining memory location itself), or in that it does not read this address at all.
- a selection of the corresponding inquiry location for example the inquiry location A2 with the appertaining address is suppressed and the selection device E is stepped to the next memory location, for example the memory location y3.
- the selection device selects that next memory location, for example the memory location yp, at which it finds the same address stored, carrying out this search with the assistance of the previously-read address. Furthermore, the selection device E stores the note bit at the storage location, for example the storage location xp, belonging to this memory location, for example the memory location yp. The selection device then seeks out the memory location, for example the memory location y3, which follows immediately after the memory location, for example the memory location y2, which was selected first. This, as shall be set forth in greater detail below, can occur in three different ways.
- the selection device counts the number of steps, with the assistance of a counter zl-zn and, after storage of the note bit at the appertaining storage location, for example the location xp, is in turn returned by a plurality of steps (plurality of memory locations) which is lower by one.
- This number identified by the step counting can thereby be subsequently deincremented by one; or, when the further memory location yp is reached, the same address being stored there, the count value reached when the memory location, for example the memory location y(p-1) lying immediately before that is reached is employed.
- the selection device counts the number of steps in the same manner with the counter zl-zn which is expanded to form a counting and subtraction device, but then subtracts this number from the total number of n memory locations increased by one, and, after the storage of the note bit carried out in the manner set forth above, is stepped forward by the number of steps (number of memory locations) corresponding to this difference, i.e. continuing cyclically forward beyond the last memory location yn and the first memory location yl to the appertaining memory location, for example the location y3.
- the selection device ultimately arrives at the memory location, for example the memory location y3, which follows upon the memory location, for example the memory location y2, originally selected.
- the selection device E is switched to a backward search run after its search run from the memory location, for example the memory location y2, selected first to the further memory location yp, where, therefore, the same address can be assumed to be stored, and after storage of the note bit at the storage location, for example the storage location xp, belonging thereto, this backward search run in the case of this third alternative, however, being executed with the assistance of the same, originally read address which has been intermediately stored in the selection device until the selection device has again reached the memory location y2 which was originally selected, this address, of course, being stored there. Subsequently, the selection device E is again stepped forward by one step, i.e. to the memory location y3 which follows immediately after the memory location y2 which was originally selected.
- the selection device E Whenever, therefore, it has again read an address of an inquiry location from the memory locations, for example the memory location y2, it then checks whether the note bit is stored at the storage location x2 assigned thereto. When this is the case, the selection device erases the note bit in the memory location x2; further, it also erases the previously-read address of the inquiry location, for example the inquiry location A2, in itself, after it has therefore read the same (but does not erase this address in the memory location y2) and forwards the cyclical read operation by one memory location, for example to the memory location y3, whereby the selection of an inquiry location for example the location a2, prepared with the last address is suppressed once because no information had been received in the appertaining, earlier selection of this same inquiry location, i.e. during the preceding selection cycle.
- the present invention is also of significance for that application wherein the inquiry locations Al-An are connection-associated switching devices, but is also of significance when these inquiry locations are message buffers of subcontrollers of connecting groups (cf. the descriptions in the aforementioned periodical "telcom report").
- the inquiry locations therefore comprise, among other things, memories for an entire respective plurality of information which are to be successively fetched.
- the interrogation events can be differently concentrated on these message buffers on a case basis and, as needed, based on the measure of the respective volume of information which are ready to be called in in each of the message buffers and are to be supplied to the processor P for processing.
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Mobile Radio Communication Systems (AREA)
- Alarm Systems (AREA)
- Transmitters (AREA)
- Exchange Systems With Centralized Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE3529172 | 1985-08-14 | ||
| DE3529172 | 1985-08-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| US4811014A true US4811014A (en) | 1989-03-07 |
Family
ID=6278517
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| US06/890,117 Expired - Fee Related US4811014A (en) | 1985-08-14 | 1986-07-28 | Circuit arrangement for telecommunications systems, particularly telephone switching systems, comprising information interrogating devices cyclically driving inquiry locations |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4811014A (de) |
| EP (1) | EP0213374B1 (de) |
| AT (1) | ATE50107T1 (de) |
| DE (1) | DE3668745D1 (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0510968B1 (de) * | 1991-04-24 | 1997-12-17 | Canon Kabushiki Kaisha | Bildspeichervorrichtung |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3868482A (en) * | 1971-12-29 | 1975-02-25 | Ibm | Line scanning system in an exchange center |
| US4071908A (en) * | 1977-03-17 | 1978-01-31 | Bell Telephone Laboratories, Incorporated | Adaptive polling technique |
| DE2748795A1 (de) * | 1977-10-31 | 1979-05-03 | Siemens Ag | Schaltungsanordnung fuer fernmeldevermittlungsanlagen, insbesondere fernsprechvermittlungsanlagen mit schalteinrichtungen und ihnen gemeinsamen abfrageeinrichtungen |
| JPS5632848A (en) * | 1979-08-28 | 1981-04-02 | Hokkaido Electric Power Co Inc:The | Coding circuit |
| US4287567A (en) * | 1978-06-01 | 1981-09-01 | Universal Industrial Control Devices Ltd. | High speed central office scanner |
| JPS575454A (en) * | 1980-06-13 | 1982-01-12 | Fujitsu Ltd | Line scanning system |
| DE3443616A1 (de) * | 1984-11-29 | 1986-05-28 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung fuer fernmeldeanlagen, insbesondere fernsprechvermittlungsanlagen, mit abfragestellen zyklisch ansteuernden informationsabfrageeinrichtungen |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL137733C (de) * | 1963-12-31 | |||
| DE1537828B1 (de) * | 1967-09-22 | 1970-04-16 | Siemens Ag | Verfahren zur Auswahl dezentraler Einrichtungen durch eine zentrale Einrichtung |
| CH631304A5 (de) * | 1977-09-30 | 1982-07-30 | Siemens Ag | Schaltungsanordnung fuer fernmeldevermittlungsanlagen, insbesondere fernsprechvermittlungsanlagen, mit schalteinrichtungen und ihnen gemeinsamen abfrageeinrichtungen. |
-
1986
- 1986-07-24 EP EP86110230A patent/EP0213374B1/de not_active Expired - Lifetime
- 1986-07-24 DE DE8686110230T patent/DE3668745D1/de not_active Expired - Lifetime
- 1986-07-24 AT AT86110230T patent/ATE50107T1/de not_active IP Right Cessation
- 1986-07-28 US US06/890,117 patent/US4811014A/en not_active Expired - Fee Related
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3868482A (en) * | 1971-12-29 | 1975-02-25 | Ibm | Line scanning system in an exchange center |
| US4071908A (en) * | 1977-03-17 | 1978-01-31 | Bell Telephone Laboratories, Incorporated | Adaptive polling technique |
| DE2748795A1 (de) * | 1977-10-31 | 1979-05-03 | Siemens Ag | Schaltungsanordnung fuer fernmeldevermittlungsanlagen, insbesondere fernsprechvermittlungsanlagen mit schalteinrichtungen und ihnen gemeinsamen abfrageeinrichtungen |
| US4287567A (en) * | 1978-06-01 | 1981-09-01 | Universal Industrial Control Devices Ltd. | High speed central office scanner |
| JPS5632848A (en) * | 1979-08-28 | 1981-04-02 | Hokkaido Electric Power Co Inc:The | Coding circuit |
| JPS575454A (en) * | 1980-06-13 | 1982-01-12 | Fujitsu Ltd | Line scanning system |
| DE3443616A1 (de) * | 1984-11-29 | 1986-05-28 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung fuer fernmeldeanlagen, insbesondere fernsprechvermittlungsanlagen, mit abfragestellen zyklisch ansteuernden informationsabfrageeinrichtungen |
Non-Patent Citations (4)
| Title |
|---|
| DE2748795A1, Apr. 1979, J. Rohrig, Germany. |
| DE3443616A1, Apr. 1986, W. Zilbauer, Germany. |
| Publication Entitled "Telcom Report", vol. 4, 1981, Special Issue EWSD Digital Switching System, pp. 3-67. |
| Publication Entitled Telcom Report , vol. 4, 1981, Special Issue EWSD Digital Switching System, pp. 3 67. * |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0213374A1 (de) | 1987-03-11 |
| EP0213374B1 (de) | 1990-01-31 |
| ATE50107T1 (de) | 1990-02-15 |
| DE3668745D1 (de) | 1990-03-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AS | Assignment |
Owner name: SIEMENS AKTIENGESELLSCHAFT, BERLIN AND MUNICH A GE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST.;ASSIGNOR:JANS, HERBERT;REEL/FRAME:004585/0007 Effective date: 19860716 Owner name: SIEMENS AKTIENGESELLSCHAFT,GERMANY Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:JANS, HERBERT;REEL/FRAME:004585/0007 Effective date: 19860716 |
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| LAPS | Lapse for failure to pay maintenance fees | ||
| FP | Lapsed due to failure to pay maintenance fee |
Effective date: 19930307 |
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| STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |