US4794383A - Variable color digital multimeter - Google Patents

Variable color digital multimeter Download PDF

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Publication number
US4794383A
US4794383A US06/819,111 US81911186A US4794383A US 4794383 A US4794383 A US 4794383A US 81911186 A US81911186 A US 81911186A US 4794383 A US4794383 A US 4794383A
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United States
Prior art keywords
color
display
digital
green
output
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Expired - Fee Related
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US06/819,111
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English (en)
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Karel Havel
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Texas Digital Systems Inc
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Individual
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Priority to US06/819,111 priority Critical patent/US4794383A/en
Priority to CA000527300A priority patent/CA1257334A/en
Priority to CA000527374A priority patent/CA1261923A/en
Priority to IN16/CAL/88A priority patent/IN169382B/en
Priority to CA000563216A priority patent/CA1252236A/en
Priority to CA000567323A priority patent/CA1266704A/en
Application granted granted Critical
Publication of US4794383A publication Critical patent/US4794383A/en
Priority to US07/379,616 priority patent/US5003298A/en
Priority to US07/579,858 priority patent/US5194854A/en
Priority to US07/628,328 priority patent/US5122733A/en
Priority to US07/865,460 priority patent/US5283517A/en
Priority to US08/187,350 priority patent/US5475300A/en
Priority to US08/571,246 priority patent/US5656935A/en
Priority to US08/910,080 priority patent/US6018237A/en
Priority to US09/039,850 priority patent/US6535186B1/en
Priority to US09/065,805 priority patent/US6208322B1/en
Priority to US09/073,393 priority patent/US6239776B1/en
Priority to US09/109,948 priority patent/US6300923B1/en
Assigned to TEXAS DIGITAL SYSTEMS, INC. reassignment TEXAS DIGITAL SYSTEMS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HAVEL, KAREL
Priority to US09/268,769 priority patent/US6281864B1/en
Priority to US09/275,711 priority patent/US6121767A/en
Priority to US09/334,336 priority patent/US6734837B1/en
Priority to US09/334,335 priority patent/US6133722A/en
Priority to US09/335,281 priority patent/US6181126B1/en
Priority to US09/335,282 priority patent/US6119073A/en
Priority to US09/335,970 priority patent/US6166710A/en
Priority to US09/373,437 priority patent/US6424327B2/en
Priority to US09/788,695 priority patent/US6577287B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/04—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions
    • G09G3/06—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources
    • G09G3/12—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions using controlled light sources using electroluminescent elements
    • G09G3/14—Semiconductor devices, e.g. diodes
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/02—Arrangements for displaying electric variables or waveforms for displaying measured electric variables in digital form
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00—Arrangements for displaying electric variables or waveforms
    • G01R13/40—Arrangements for displaying electric variables or waveforms using modulation of a light beam otherwise than by mechanical displacement, e.g. by Kerr effect
    • G01R13/404—Arrangements for displaying electric variables or waveforms using modulation of a light beam otherwise than by mechanical displacement, e.g. by Kerr effect for discontinuous display, i.e. display of discrete values
    • G01R13/405—Arrangements for displaying electric variables or waveforms using modulation of a light beam otherwise than by mechanical displacement, e.g. by Kerr effect for discontinuous display, i.e. display of discrete values using a plurality of active, i.e. light emitting, e.g. electro-luminescent elements, i.e. bar graphs
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
    • G01R15/12—Circuits for multi-testers, i.e. multimeters, e.g. for measuring voltage, current, or impedance at will
    • G01R15/125—Circuits for multi-testers, i.e. multimeters, e.g. for measuring voltage, current, or impedance at will for digital multimeters

Definitions

  • This invention relates to measuring devices utilizing a variable color digital display.
  • a display device that can change color and selectively display digits and characters is described in my U.S. Pat. No. 4,086,514, entitled Variable Color Display Device and issued on Apr. 25, 1978.
  • This display device includes display areas arranged in a suitable display font, such as well known 7-segment display font, which may be selectively energized in groups to display all known characters.
  • Each display segment includes three light emitting diodes for emitting light signals of respectively different primary colors, which are blended within the display segment to form a composite light signal. The color of the composite light signal can be controlled by selectively varying the portions of the primary light signals.
  • Multimeters with monochromatic digital display are well known and extensively used. Such multimeters, however, have a defect in that they are capable of indicating value of only one measured quantity at a time. They are not capable of simultaneously indicating values of two different quantities, nor are they capable of indicating the relationship of instantly displayed measured value to values measured at other times, nor are they capable of indicating the relationship of instantly displayed measured value to measurement limits.
  • variable color digital display Although the possibility of a variable color digital display has been previously considered, no practical system utilizing such a display has been made available to public use.
  • the present invention provides a new dimension in the digital display art. Completely new, unexpected and heretofore impossible, features may be obtained when a well known monochromatic digital display is substituted with a variable color digital display.
  • the invention was advantageously incorporated into a digital multimeter.
  • the invention is not limited to measuring instruments and may be utilized in a wide variety of devices, without imposing any limitations.
  • a digital multimeter capable of selectively measuring values of several different measurement quantities and of indicating values of the selected quantity in digital format and in a color unique to the selected measured quantity; provision of a digital multimeter capable of measuring signals by several different measurement methods and of indicating measured values in digital format and in a color depending on the selected measurement method; provision of a digital multimeter capable of making measurements in several different measurement units and of indicating measured values in digital format and in a color depending on the selected measurement unit; provision of a digital multimeter capable of selectively measuring signal values from several different locations and of indicating measured values in digital format and in a color unique to the selected location; provision of a digital multimeter having several different measurement modes and capable of indicating measured values in digital format and in a color unique to the selected measurement mode; provision of a digital multimeter capable of performing several measurement functions and of indicating measured values in digital format and in a color unique to the selected measurement function; provision of a digital multimeter having selectable measurement ranges and capable of indicating measured values in digital format and in
  • an RMS digital voltmeter with a variable color digital display which can indicate RMS value of the measured waveform in digital format and in a color variable in accordance with the crest factor of the waveform, to thereby simultaneously indicate its magnitude and shape.
  • FIG. 1 is a block diagram of a typical prior art monochromatic digital display system.
  • FIG. 2 is a generalized block diagram of a variable color digital display system for the practice of the present invention.
  • FIG. 3 is a block diagram of a step variable color display system.
  • FIG. 4 is a block diagram of a continuously variable color display system.
  • FIG. 5 is a block diagram of 2-primary color digital display.
  • FIG. 6 is a block diagram of 3-primary color digital display.
  • FIG. 7 is an enlarged detail of one digit of 2-primary color digital display.
  • FIG. 8 is an enlarged cross-sectional view of one display segment in FIG. 7, taken along the line 8--8.
  • FIG. 9 is an enlarged detail of one digit of 3-primary color digital display.
  • FIG. 10 is an enlarged cross-sectional view of one display segment in FIG. 9, taken along the line 10--10.
  • FIG. 11 is a schematic diagram of one digit of one 2-primary color display element.
  • FIG. 12 is a schematic diagram of one digit of one 3-primary color display element.
  • FIG. 13 is a block diagram of a color control logic circuit for controlling 2-primary color display.
  • FIG. 14 is a block diagram of a color control logic circuit for controlling 3-primary color display.
  • FIG. 15 is a schematic diagram of a color control logic circuit for controlling 2-primary color display.
  • FIG. 16 is a schematic diagram of a color control logic circuit for controlling 3-primary color display.
  • FIG. 17 is a simplified schematic diagram, similar to FIG. 11, showing how number ⁇ 7 ⁇ can be displayed in three different colors.
  • FIG. 18 is a simplified schematic diagram, similar to FIG. 12, showing how number ⁇ 1 ⁇ can be displayed in seven different colors.
  • FIG. 19 is a block diagram of 2-primary color 4-digit display.
  • FIG. 20 is a block diagram of 3-primary color 4-digit display.
  • FIG. 21 is a block diagram of a signal converter for 2-primary color display.
  • FIG. 22 is a block diagram of a signal converter for 3-primary color display.
  • FIG. 23 is a schematic diagram of a comparator circuit for 2-primary color display.
  • FIG. 24 is a graph showing the relationship between the inputs and outputs of the comparator circuit in FIG. 23.
  • FIG. 25 is a schematic diagram of a comparator circuit for 3-primary color display.
  • FIG. 26 is a graph showing the relationship between the inputs and outputs of the comparator circuit in FIG. 25.
  • FIG. 27 is a block diagram of a continuously variable color display system utilizing two primary colors.
  • FIG. 28 is a block diagram of a continuously variable color display system utilizing three primary colors.
  • FIG. 29 is an expanded block diagram of FIG. 27.
  • FIG. 30 is an expanded block diagram of FIG. 28.
  • FIG. 31 is a schematic diagram of a scaling circuit.
  • FIG. 32 is a schematic diagram of an A/D converter and memory combination of FIGS. 29 and 30.
  • FIG. 33 is a schematic diagram of a memory and color converter combination of FIG. 29.
  • FIG. 34 is a timing diagram of the circuit shown in FIG. 33.
  • FIG. 35 is a schematic diagram of a memory and color converter combination of FIG. 30.
  • FIG. 36 is a timing diagram of the circuit shown in FIG. 35.
  • FIG. 37 is a continuation of the timing diagram of FIG. 36.
  • FIG. 38 is a graphic representation of TABLE 1.
  • FIG. 39 is a graphic representation of TABLE 2.
  • FIG. 40 is a graph of the ICI chromaticity diagram.
  • FIG. 41 is a block diagram of a multimeter with variable color digital display.
  • FIG. 42 is a block diagram of a multimeter with multiplexed variable color digital display.
  • FIG. 43 is a block diagram of a digital multimeter with a display that can change color in accordance with external control.
  • FIG. 44 is a block diagram of a digital multimeter with a display that can change color in accordance with internal control.
  • FIG. 45 is a block diagram of a digital multimeter with a display that can change color in accordance with measurement quantity.
  • FIG. 46 is a block diagram of a digital multimeter with a display that can change color in accordance with measurement location.
  • FIG. 47 is a simplified schematic diagram of a variable color digital multimeter for measuring outputs of different transducers.
  • FIG. 48 is a simplified schematic diagram of a variable color digital multimeter for measuring signals from different locations.
  • FIG. 49 is a simplified schematic diagram of a variable color digital multimeter for measuring signals by different methods.
  • FIG. 50 is a simplified schematic diagram of a variable color digital thermometer.
  • FIG. 51 is a simplified schematic diagram of a digital ampermeter with variable color range indication.
  • FIG. 52 is a simplified schematic diagram of a digital voltmeter with variable color range indication.
  • FIG. 53 is a simplified schematic diagram of a digital ohmmeter with variable color range indication.
  • FIG. 54 is a detail of the multimeter shown in FIGS. 51, 52, and 53.
  • FIG. 55 is a simplified schematic diagram of a digital voltmeter for displaying positive and negative measurement results in respectively different colors.
  • FIG. 56 is a simplified schematic diagram of a variable color display system for displaying decimal numbers such that digits preceding and following the decimal point are displayed in respectively different colors.
  • FIG. 57 is a timing diagram of the circuit shown in FIG. 56.
  • FIG. 58 is a simplified schematic diagram of a variable color display system for displaying integers and decimal numbers in respectively different colors.
  • FIG. 59 is a block diagram of a variable color display device for selectively displaying output digital data from different digital devices in respectively different colors.
  • FIG. 60 is a simplified schematic diagram of a variable color digital barometer.
  • FIG. 61 is a simplified schematic diagram of a digital multimeter for displaying measurement results in accordance with time.
  • FIG. 62 is a block diagram of a variable color digital multimeter with comparator and memory.
  • FIG. 63 is a block diagram of a variable color digital multimeter with comparator and memory for high and low limits.
  • FIG. 64 is a block diagram of a variable color digital multimeter with comparator and memory for previous measurement values.
  • FIG. 65 is a block diagram of a variable color digital multimeter with memory for previous measurement errors.
  • FIG. 66 is a schematic diagram of a comparator with low and high measurement limits.
  • FIG. 67 is a schematic diagram of a comparator and error counter.
  • FIG. 68 is a detail of the comparator, error flip-flop, and color control combination.
  • FIG. 69 is a detail of the comparator, error memory, and color converter combination.
  • FIG. 70 is a detail of the low measurement limit memory and comparator combination.
  • FIG. 71 is a detail of the error counter and PROM combination.
  • FIG. 72 is a schematic diagram of a variable color digital multimeter with registered comparator for comparing instant measured values with previously stored ones.
  • FIG. 73 is a block diagram of a variable color digital multimeter with uniform color control for all display digits.
  • FIG. 74 is a block diagram of a variable color digital multimeter with independent color control for each display digit.
  • FIG. 75 is a block diagram of a dual digital voltmeter with single variable color digital display.
  • FIG. 76 is a block diagram of a variable color RMS digital voltmeter with variable color crest factor indication.
  • FIG. 77 is the RMS and crest factor chart.
  • FIG. 78 is an expanded block diagram of a crest factor converter with ratio producing circuit.
  • FIG. 79 is an expanded block diagram of a crest factor converter with precision divider.
  • FIG. 80 is a schematic diagram of an RMS-to-DC converter.
  • FIG. 81 is a schematic diagram of a peak detector.
  • FIG. 82 is an expanded block diagram of 2-primary color control for the crest factor converter.
  • FIG. 83 is an expanded block diagram of 3-primary color control for the crest factor converter.
  • FIG. 84 is an expanded block diagram of 2-primary color converter for the crest factor converter.
  • FIG. 85 is an expanded block diagram of 3-primary color converter for the crest factor converter.
  • FIG. 86 is a front view of a variable color digital multimeter of the present invention.
  • FIG. 87 is a block diagram of a variable color digital multimeter controlled by a microprocessor.
  • FIG. 88 is an expanded block diagram of a variable color digital multimeter for indicating front and rear measurements in different colors.
  • FIG. 89 is an expanded block diagram of a variable color digital multimeter for indicating DC, AC, and OHMS measurements in respectively different colors.
  • FIG. 90 is an expanded block diagram of a variable color digital multimeter for indicating measurements with filter and without filter in different colors.
  • TABLE 1 shows the characteristic of a step variable 2-primary color converter.
  • TABLE 2 shows a rainbow-like characteristic of a continuously variable 3-primary color converter.
  • FIG. 1 a block diagram of a typical prior art digital display system which usually includes a device 10a for developing digital data, a suitable decoder 20 for converting the digital data into a displayable code, and a monochromatic digital display 30 for indicating the digital data visually.
  • variable color digital display system of this invention can simultaneously indicate the values of two different quantities, from the outputs of respective devices 10b, 10c, by causing the value of the first quantity to be indicated in digital format, and by controlling the color of the display in accordance with the value of the second quantity.
  • FIG. 3 is shown a block diagram of another embodiment of a variable color digital display system of the present invention, characterized by a step variable color control circuit 51.
  • FIG. 4 is shown a block diagram of still another embodiment of variable color digital display system, characterized by a continuously variable color control circuit 56.
  • FIG. 5 is shown a block diagram of a 2-primary color display system including a commercially well known 7-segment display decoder driver 22, variable color 7-segment display 42, and 2-primary color control logic circuit 52.
  • the decoder 22 accepts at its inputs A0, A1, A2, A3, a 4-bit BCD (binary coded decimal) code and develops output drive signals at its outputs a, b, c, d, e, f, g, and DP (decimal point), to drive respective segments of the 7-segment display 42.
  • the color control circuit 52 accepts at its input R (red), Y (yellow), and G (green), color control logic signals and develops at its outputs drive signals for the red bus 5 and green bus 6, respectively, to illuminate the display 42 in a selected color.
  • FIG. 6 is shown a block diagram of 3-primary color display system including a 7-segment display decoder driver 22, variable color 7-segment display 43, and 3-primary color control logic circuit 53.
  • the color control circuit 53 accepts at its inputs R (red), Y (yellow), G (green), BG (blue-green), B (blue), P (purple), and W (white), color control logic signals and develops at its outputs drive signals for the red bus 5, green bus 6, and blue bus 7, respectively, to illuminate the display 43 in a selected color.
  • the 2-primary color display element includes seven elongated display segments a, b, c, d, e, f, g, arranged in the conventional pattern, which may be selectively energized in different combinations to display the desired digits.
  • Each display segment includes a pair of LEDs (light emitting diodes): a red LED 2 and green LED 3, which are closely adjacent such that the light signals emitted therefrom are substantially superimposed upon each other to mix the colors.
  • the LEDs are designated by segment symbols, e.g., the red LED in the segment a is designated as 2a, etc.
  • the light emitting diodes 2e (red) and 3e (green) are placed on the base of the segment body 15a, which is filled with transparent light scattering material 16.
  • the LEDs 2e and 3e emit light signals of red and green colors, respectively, which are scattered within the transparent material 16, thereby blending the red and green light signals into a composite light signal that emerges at the upper surface of the segment body 15a.
  • the color of the composite light signal may be controlled by varying portions of the red and green light signals.
  • each display segment of the 3-primary color display element includes a triad of LEDs: a red LED 2, green LED 3, and blue LED 4, which are closely adjacent such that the light signals emitted therefrom are substantially superimposed upon one another to mix the colors.
  • the light emitting diodes 2e red
  • 3e green
  • 4e blue
  • Red LEDs are typically manufactured by diffusing a p-n junction into a GaAsP epitaxial layer on a GaAs substrate
  • green LEDs typically use a GaP epitaxial layer on a GaP substrate
  • blue LEDs are typically made from SiC material.
  • the LEDs 2e, 3e, and 4e When forwardly biased, the LEDs 2e, 3e, and 4e emit light signals of red, green, and blue colors, respectively, which are scattered within the transparent material 16, thereby blending the red, green, and blue light signals into a composite light signal that emerges at the upper surface of the segment body 15b.
  • the color of the composite light signal may be controlled by varying the portions of the red, green, and blue light signals.
  • FIG. 11 is shown a complete schematic diagram of a one-character 2-primary color common cathodes 7-segment display element which can selectively display various digital fonts in different colors.
  • the anodes of all red and green LED pairs are interconnected in each display segment and are electrically connected to respective outputs of a commercially well known common-cathode 7-segment decoder driver 23.
  • the cathodes of all red LEDs 2a, 2b, 2c, 2d, 2e, 2f, 2g, and 2i are interconnected to a common electric path referred to as a red bus 5.
  • the cathodes of all green LEDs 3a, 3b, 3c, 3d, 3e, 3f, 3g, and 3i are interconnected to a like common electric path referred to as a green bus 6.
  • the red bus 5 is connected to the output of a tri-state inverting buffer 63a, capable of sinking sufficient current to forwardly bias all red LEDs in the display.
  • the green bus 6 is connected to the output of a like buffer 63b.
  • the two buffers 63a, 63b can be simultaneously enabled by applying a logic low level signal to the input of the inverter 64a, and disabled by applying a logic high level signal therein.
  • the buffers 63a, 63b are enabled, the conditions of the red and green buses can be selectively controlled by applying suitable logic control signals to the bus control inputs RB (red bus) and GB (green bus), to illuminate the display in a selected color.
  • RB red bus
  • GB green bus
  • FIG. 12 is shown a complete schematic diagram of a one-character 3-primary color common anodes 7-segment display element which can selectively display digital fonts in different colors.
  • the cathodes of all red, green, and blue LED triads in each display segment are interconnected and electrically connected to respective outputs of a commercially well known common anode 7-segment decoder driver 24.
  • the anodes of all red LEDs 2a, 2b, 2c, 2d, 2e, 2f, 2g are interconnected to form a common electric path referred to as a red bus 5.
  • the anodes of all green LEDs 3a, 3b, 3c, 3d, 3e, 3f, 3g are interconnected to form a like common electric path referred to as a green bus 6.
  • the anodes of all blue LEDs 4a, 4b, 4c, 4d, 4e, 4f, 4g are interconnected to form a like common electric path referred to as a blue bus 7.
  • the red bus 5 is connected to the output of a non-inverting tri-state buffer 62a, capable of sourcing sufficient current to illuminate all red LEDs in the display.
  • the green bus 6 is connected to the output of a like buffer 62b.
  • the blue bus 7 is connected to the output of a like buffer 62c.
  • the three buffers 62a, 62b, 62c can be simultaneously enabled, by applying a logic low level signal to the input of the inverter 64b, and disabled by applying a logic high level signal therein.
  • the buffers 62a, 62b, 62c When the buffers 62a, 62b, 62c are enabled, the conditions of the red, green, and blue buses can be selectively controlled by applying valid combinations of logic level signals to the bus control inputs RB (red bus), GB (green bus), and BB (blue bus), to illuminate the display in a selected color.
  • RB red bus
  • GB green bus
  • BB blue bus
  • FIG. 13 a logic circuit 69a for developing drive signals for the red bus 5 and green bus 6, to control the color of the display element 42 shown in FIG. 11.
  • Two voltage levels, referred to as logic high and low, respectively, are used throughout the description of the digital circuits.
  • the color of the display 42 may be controlled by applying valid combinations of logic level signals to its color control inputs R (Red), Y (Yellow), and G (Green).
  • the logic circuit 69a combines the input signals in a logic fashion and develops output drive signals RB (Red Bus) and GB (Green Bus), for activating the red bus 5 and green bus 6, respectively, of the display 42.
  • FIG. 14 is shown a like logic circuit 69b for developing drive signals for the red bus 5, green bus 6, and blue bus 7, to control the color of the display element 43 shown in FIG. 12.
  • the color of the display 43 may be controlled by applying valid combinations of logic level signals to its color control inputs B (Blue), P (Purple) BG (Blue-Green), G (Green), Y (Yellow), W (White), and R (Red).
  • the logic circuit 69b combines the input signals in a logic fashion and develops output drive signals RB (Red Bus), GB (Green Bus), and BB (Blue Bus), for activating the red bus 5, green bus 6, and blue bus 7, respectively, of the display 43.
  • FIGS. 15 and 16 Exemplary schematic diagrams of the color control logic circuits shown in FIGS. 15 and 16 consider active high logic levels, which means that only the selected color control input are maintained at a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the circuit in FIG. 15 is a detail of the color control logic circuit 69a employing 2-input logic OR gates 60a, 60b, interposed between the color control inputs R, Y, G and bus control outputs RB, GB, in a manner which will become more apparent from the description below.
  • 16 is a detail of the color control logic circuit 69b employing 4-input logic OR gates 61a, 61b, 61c similarly interposed between the color control inputs B, P, BG, G, Y, W, R and bus control outputs RB, GB, BB. It will be obvious to those skilled in the art that other types of logic devices may be effectively used.
  • FIG. 17 A simplified schematic diagram to facilitate the explanation is shown in FIG. 17. Any digit between 0 and 9 can be selectively displayed by applying the appropriate BCD code to the inputs A0, A1, A2, A3 of the common-cathode 7-segment decoder driver 23.
  • the decoder 23 will develop at its outputs a, b, c, d, e, f, g, and DP, the drive signals for energizing selected groups of the segments to thereby visually display the selected number, in a manner well known to those having ordinary skill in the art.
  • a BCD code 0111 is applied to the inputs A0, A1, A2, A3.
  • the decoder 23 will develop high voltage levels at its outputs a, b, c, to illuminate the respective segments a, b, c, and low voltage levels at all remaining outputs (not shown), to extinguish all remaining segments.
  • the color control input R is raised to a high logic level, and the color control inputs Y and G are maintained at a low logic level.
  • the output of the OR gate 60a will rise to a high logic level, thereby causing the output of the buffer 63a to drop to a low logic level.
  • the current will flow from the output a of the decoder 23, via red LED 2a, red bus 5, to the current sinking output of the buffer 63a.
  • the current will flow from the output b of the decoder 23, via red LED 2b, red bus 5, to the output of the buffer 63a.
  • the current from the output c of the decoder 23 will flow via red LED 2c, red bus 5, to the output of the buffer 63a.
  • the segments a, b, c will illuminate in red color, thereby causing a visual impression of a character ⁇ 7 ⁇ .
  • the green LEDs 3a, 3b, 3 c will remain extinguished because the output of the buffer 63b is at a high logic level, thereby disabling the green bus 6.
  • the color control input G is raised to a high logic level, while the color control inputs R and Y are maintained at a low logic level.
  • the output of the OR gate 60b will rise to a high logic level, thereby causing the output of the buffer 63b to drop to a low logic level.
  • the current will flow from the output a of the decoder 23, via green LED 3a, green bus 6, to the current sinking output of the buffer 63b.
  • the current will flow from the output b of the decoder 23, via green LED 3b, green bus 6, to the output of the buffer 63b.
  • the current from the output c of the decoder 23 will flow, via green LED 3c, green bus 6, to the output of the buffer 63b.
  • the segments a, b, c will illuminate in green color.
  • the red LEDs 2a, 2b, 2c will remain extinguished because the output of the buffer 63a is at a high logic level, thereby disabling the red bus 5.
  • the color control input Y is raised to a high logic level, while the color inputs R and G are maintained at a low logic level.
  • the outputs of both OR gates 61a, 61b will rise to a high logic level, thereby causing the outputs of both buffers 63a, 63b to drop to a low logic level.
  • the current will flow from the output a of the decoder 23, via red LED 2a, red bus 5, to the current sinking output of the buffer 63a, and, via green LED 3a, green bus 6, to the current sinking output of the buffer 63b.
  • the current from the output b of the decoder 23 will flow, via red LED 2b, red bus 5, to the output of the buffer 63a, and, via green LED 3b, green bus 6, to the output of the buffer 63b.
  • the current from the output c of the decoder 23 will flow, via red LED 2c, red bus 5, to the output of the buffer 63a, and, via green LED 3c, green bus 6, to the output of the buffer 63b.
  • the segments a, b, c will illluminate in substantially yellow color.
  • FIG. 18 A simplified schematic diagram to facilitate the explanation is shown in FIG. 18.
  • a BCD code 0001 is applied to the inputs A0, A1, A2, A3 of the common anode 7-segment decoder driver 24.
  • the decoder 24 will develop low voltage levels at its outputs b, c to illuminate the segments b, c, and high voltage levels at all remaining outputs (not shown), to extinguish all remaining segments.
  • the color control input R is raised to a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the output of the OR gate 61a will rise to a high logic level, thereby causing the output of the buffer 62a to rise to a high logic level.
  • the current will flow from the output of the buffer 62a, via red bus 5, red LED 2b, to the output b of the decoder 24, and, via red LED 2c, to the output c of the decoder 24.
  • the segments b, c will illuminate in red color, thereby causing a visual impression of a character ⁇ 1 ⁇ .
  • the green LEDs 3b, 3c and blue LEDs 4b, 4c will remain extinguished because the green bus 6 and blue bus 7 are disabled.
  • the color control input G is raised to a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the output of the OR gate 61b will rise to a high logic level, thereby causing the output of the buffer 62b to rise to a high logic level.
  • the current will flow from the output of the buffer 62b, via green bus 6, green LED 3b, to the output b of the decoder 24, and, via green LED 3c, to the output c of the decoder 24.
  • the segments b, c will illuminate in green color.
  • the color control input B is raised to a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the output of the OR gate 61c will rise to a high logic level, thereby causing the output of the buffer 62c to rise to a high logic level.
  • the current will flow from the output of the buffer 62c, via blue bus 7, blue LED 4b, to the output b of the decoder 24, and, via blue LED 4c, to the output c of the decoder 24.
  • the segments b, c will illuminate in blue color.
  • the color control input Y is raised to a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the outputs of the OR gates 61a, 61b will rise to a high logic level, thereby causing the outputs of the buffers 62a, 62b to rise to a high logic level.
  • the current will flow from the output of the buffer 62a, via red bus 5, red LED 2b, to the output b of the decoder 24, and, via red LED 2c, to the output c of the decoder 24.
  • the current will also flow from the output of the buffer 62b, via green bus 6, green LED 3b, to the output b of the decoder 24, and, via green LED 3c, to the output c of the decoder 24.
  • the segments b, c will illuminate in substantially yellow color.
  • the color control input P is raised to a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the outputs of the OR gates 61a, 61c will rise to a high logic level, thereby causing the outputs of the buffers 62a, 62c to rise to a high logic level.
  • the current will flow from the output of the buffer 62a, via red bus 5, red LED 2b, to the output b of the decoder 24, and, via red LED 2c, to the output c of the decoder 24.
  • the current will also flow from the output of the buffer 62c, via blue bus 7, blue LED 4b, to the output b of the decoder 24, and, via blue LED 4c, to the output c of the decoder 24.
  • the segments b, c will illuminate in substantially purple color.
  • the color control input BG is raised to a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the outputs of the OR gates 61b, 61c will rise to a high logic level, thereby causing the outputs of the buffers 62b, 62c to rise to a high logic level.
  • the current will flow from the output of the buffer 61b, via green bus 6, green LED 3b, to the output b of the decoder 24, and, via green LED 3c, to the output c of the decoder 24.
  • the current will also flow from the output of the decoder 62c, via blue bus 7, blue LED 4b, to the output b of the decoder 24, and, via blue LED 4c, to the output c of the decoder 24.
  • the segments b, c will illuminate in substantially blue-green color.
  • the color control input W is raised to a high logic level, while all remaining color control inputs are maintained at a low logic level.
  • the outputs of the OR gates 61a, 61b, 61c will rise to a high logic level, thereby causing the outputs of the respective buffers to rise to a high logic level.
  • the current will flow from the output of the buffer 62a, via red bus 5, red LED 2b, to the output b of the decoder 24, and, via red LED 2c, to the output c of the decoder 24.
  • the current will also flow from the output of the buffer 62b, via green bus 6, green LED 3b, to the output b of the decoder 24, and, via green LED 3c, to the output c of the decoder 24.
  • the current will also flow from the output of the buffer 62c, via blue bus 7, blue LED 4b, to the output b of the decoder 24, and, via blue LED 4 c, to the output c of the decoder 24.
  • the segments b, c will illuminate in substantially white color.
  • the outputs of the 7-segment decoder 24 may be overloaded by driving a triad of LEDs in parallel in the display 43, rather than a single LED in a monochromatic display, it would be obvious to employ suitable buffers to drive respective color display segments (not shown).
  • FIG. 19 a detail of the interconnection in a 2-primary color 4-digit display.
  • the color control inputs R, Y, G of all display elements 46a, 46b, 46c, 46d are interconnected, respectively, and the enable inputs E1, E2, E3, E4 are used to control the conditions of respective display elements.
  • a high logic level at the enable input E will extinguish the particular display element; a low logic level there will illuminate the element in a color determined by the instant conditions of the color control logic inputs R, Y, G.
  • FIG. 20 is shown a like detail of the interconnection in a 3-primary color 4-digit display.
  • the color control inputs B, P, BG, G, Y, W, R of all display elements 47a, 47b, 47c, 47d are interconnected and the conditions of respective display elements are controlled by the enable inputs E1, E2, E3, E4.
  • a high logic level at the enable input E will extinguish the particular display element; a low logic level therein will illuminate the element in a color determined by the instant conditions of the color control logic inputs B, P, BG, G, Y, W, R.
  • variable color digital display may be constructed, in accordance with the principles of the invention, either in a common cathodes or in a common anodes configuration.
  • the exemplary color control circuits described herein will cooperate equally well with both such configurations.
  • the enable inputs E1, E2, E3, E4 may be utilized to control the variable color multi-digit display in a multiplexed configuration, wherein the color codes for the display digits are presented in a sequence, one at a time, at a relatively fast rate, while the particular display digit is enabled.
  • FIG. 21 is shown a block diagram of a signal converter for developing color control logic signals for 2-primary color display.
  • the signal converter 85a accepts at its input voltage from a variable analog voltage source 11 and develops at its outputs color control logic signals R, Y, G, having relation to the magnitude of instant input analog voltage, for controlling the color of the variable color display 42, shown in FIGS. 11 and 15, in accordance with the magnitude of input voltage.
  • FIG. 22 is shown a block diagram of a like signal converter for developing color control logic signals for 3-primary color display.
  • the signal converter 85b accepts at its inputs voltage from a source 11 and develops output color control logic signals B, P, BG, G, Y, W, R, related to the magnitude of instant input analog voltage, for controlling the color of the variable color display 43, shown in FIGS. 12 and 16, in accordance with the magnitude of input voltage.
  • the output voltage of a variable analog voltage source 11 is applied to the interconnected inputs of two analog comparators 82a, 82b, in a classic ⁇ window ⁇ comparator configuration.
  • Vlo low voltage limit
  • the output of the comparator 82a will drop to a low logic level, thereby forcing the output of the inverter 65a to rise to a high logic level, to activate the color control logic input Y of the display element 42, shown in FIGS. 11 and 15, to thereby illuminate the display in yellow color.
  • FIG. 24 is a graph depicting the relationship between the input voltage of the comparator circuit shown in FIG. 23 and the color of the display element shown in FIG. 11.
  • the display element will illuminate in yellow color for the input voltage lower than the limit Vlo, in green color for the input voltage between the limits Vlo and Vhi, and in red color for the input voltage higher than the limit Vhi.
  • the output voltage of a variable analog voltage source 11 is applied to the interconnected ⁇ + ⁇ inputs of six analog comparators 82c, 82d, 82e, 82f, 82g, 82h, connected in a well known ⁇ multiple aperture window ⁇ configuration.
  • the outputs of the comparators 82c to 82h are respectively connected, via inverters 65c to 65h, to the inputs I1 to I7 of a priority encoder 67.
  • Each of the inputs I1 to I7 has assigned a certain priority (from I1 being the lowest priority progressively to I7 being the highest one).
  • the priority encoder 67 will develop at its outputs 00, 01, 02 a code identifying the highest priority input activated.
  • the outputs of the encoder 67 are respectively connected, via inverters 65j to 65m, to the inputs A0, A1, A2 of a 3-to-8 line decoder 68, to decode the outputs of the encoder 67 into seven mutually exclusive active logic low outputs Y1 to Y7.
  • the outputs Y1 to Y7 are respectively connected, via inverters 65p to 65v, to the color control logic inputs B, P, BG, G, Y, W, R of the display element 43 shown in the FIGS. 12 and 16.
  • the output of the comparator 82c When the output voltage of the source 11 is lower than the lowest voltage limit V1, the output of the comparator 82c will drop to a low logic level, thereby activating the input I1 of the priority encoder 67.
  • the coder 110 developed at the outputs 00, 01, 02 will be inverted by the inverters 65j to 65m to yield the code 001 which will produce a low logic level at the output Y1, to force, via the inverter 65p, the color control logic input B to a high logic level.
  • the display 43 will illuminate in blue color.
  • the output of the comparator 82f will rise to a high logic level, thereby activating the input I5 of the priority encoder 67.
  • the code 100 developed at the inputs of the decoder 68 will produce a high logic level at the color control logic input Y and the display 43 will illuminate in yellow color.
  • FIG. 26 is a graph depicting the relationship between the input voltage of the comparator circuit shown in FIG. 25 and the color of the display element shown in FIG. 12.
  • the display element will illuminate in blue color for the input voltage lower than the limit V1, in purple color for the input voltage between the limits V1 and V2, in blue-green color for the input voltage between the limits V2 and V3, in green color for the input voltage between the limits V3 and V4, in yellow color for the input voltage between the limits V4 and V5, in white color for the input voltage between the limits V5 and V6, and in red color for the input voltage higher than the limit V6.
  • FIG. 27 is a block diagram of a 2-LED continuously variable color display system, which includes a device 10 for developing electric signals and 2-LED color converter circuit 57 for controlling the red bus 5 and green bus 6, respectively, of the 2-LED variable color display 42 in accordance with the electric signals.
  • FIG. 28 is a block diagram of 3-LED continuously variable color display system which differs from the like system shown in FIG. 27 in that a 3-LED color converter circuit 58 is utilized to control the red bus 5, green bus 6, and blue bus 7, respectively, of the 3-LED variable color display 43, in accordance with the electric signals developed by the device 10.
  • the display system shown in FIG. 29 utilizes a scaling circuit 80a which scales input analog voltage levels to a voltage range suitable for an A/D converter 74a, which in turn develops at its outputs digital code having relation to the value of the input analog voltage.
  • the output lines of the A/D converter 74a are connected to the address inputs of a memory 76 having a plurality of addressable locations which contain data indicating the portions of red color for several different values of the input analog voltage.
  • the output data of the memory 76 are applied to the inputs of a color converter 57 which will develop control signals for the red bus 5 and green bus 6, respectively, of the variable color display 42.
  • the display system shown in FIG. 30 utilizes a scaling circuit 80b and an A/D converter 74b for converting the instant value of input analog voltage to a digital code.
  • the outputs of the A/D converter 74b are connected, in parallel, to the address inputs of a memory 76a, which contains data indicating the portions of red color, to the address inputs of a memory 76b, which contains data indicating the portions of green color, and to the address inputs of a memory 76c, which contains data indicating the portions of blue color.
  • the output data of the memory 76a are applied to the red color converter 59a which will develop control signals for the red bus 5 of the variable color display 43.
  • the output data of the memory 76b are applied to the green color converter 59b which will develop control signals for the green bus 6 of the display 43.
  • the output data of the memory 76c are applied to the blue color converter 59c which will develop control signals for the blue bus 7 of the display 43.
  • FIG. 31 is a schematic diagram of a scaling circuit capable of shifting and amplifying the input voltage levels.
  • the circuit utilizes two operational amplifiers 81a, 81b in a standard inverting configuration.
  • the amplifier 81a is set for a unity gain, by using resistors 90a, 90b of equal values; the potentiometer 92a is adjusted to set a desired offset voltage.
  • the amplifier 81b will set the gain, by adjusting the potentiometer 92b, to a desired value.
  • the input voltage which may vary between arbitrary limits Vlow and Vhigh, may be scaled and shifted to the range between 0 Volts and 9.961 Volts, to facilitate the use of a commercially available A/D converter.
  • FIG. 32 is a schematic diagram of an A/D (analog-to-digital) converter 75 which is capable of converting input analog voltage to 8-bit digital data for addressing a memory 77.
  • the conversion may be initiated from time to time by applying a short positive pulse 99a to the Blank and Convert input B&C.
  • the converter 75 will thereafter perform a conversion of the instant input voltage to 8-bit data indicative of its value.
  • the Data Ready output DR drops to a low logic level, thereby indicating that the data is available at the outputs Bit 1 to Bit 8, which are directly connected to respective address inputs A0 to A7 of the memory 77.
  • the Chip Select input CS of the memory 77 When the DR output drops to a low logic level, the Chip Select input CS of the memory 77 is activated, the memory 77 is enabled, and the data, residing at the address selected by the instant output of the converter 75, will appear at its data outputs D0 to D7.
  • a clock signal 99b of a suitable frequency (e.g., 10 kHz), to provide a flicker-free display, is applied to the Clock Pulse inputs CP of the 4-bit binary counters 71e, 71f, to step same down.
  • the Terminal Count output TC of the counter 71e will drop to a low logic level for one clock cycle, to thereby indicate that the lowest count was reached.
  • the negative pulse 99c in the TC output of the counter 71e which is connected to the Parallel Load input PL of the counter 71f, will cause the instant data at the outputs of the memory 76 to be loaded into the counter 71f.
  • the data at the memory represent the portion of the red color; the portion of the green color is complementary.
  • the rising edge of the TC pulse 99c will trigger the flip-flop 73 into its set condition wherein its output Q rises to a high logic level.
  • the counter 71f will count down, from the loaded value, until it reaches zero count, at which moment its TC output will drop to a low logic level.
  • the negative pulse at the TC output of the counter 71f which is connected to the Clear Direct input CD of the flip-flop 73, will cause the latter to be reset and to remain in its reset condition until it is set again at the beginning of the next 256-count cycle. It is thus obvious that the Q output of the flip-flop 73 will be at a high logic level for a period of time proportional to the data initially loaded into the counter 71f.
  • the complementary output Q will be at a high logic level for a complementary period of time.
  • the Q and Q outputs of the flip-flop 73 are connected to the red bus 5 and green bus 6, respectively, via suitable buffers 63a, 63b, shown in detail in FIG. 11, to energize the respective buses for variable time periods, depending on the data stored in the memory 76.
  • the EXAMPLE 1 considers the memory data ⁇ FD ⁇ , in a standard hexadecimal notation, to generate light of substantially red color.
  • the pulse 99c will load the data ⁇ FD ⁇ into the counter 71f.
  • the flip-flop 73 is set by the rising edge of the pulse 99c.
  • the counter 71f will be thereafter stepped down, by clock pulses 99b, until it reaches zero count, 2 clock cycles before the end of the counter cycle.
  • a short negative pulse 99d will be produced at its output TC to reset the flip-flop 73, which will remain reset for 2 clock cycles and will be set again by the pulse 99c at the beginning of the next counter cycle, which will repeat the process.
  • the flip-flop 73 was set for 254 clock cycles, or about 99% of the time, and reset for 2 clock cycles, or about 1% of the time. Accordingly, the red bus 5 of the display 42 will be energized for about 99% of the time, and the green bus 6 will be energized for the remaining about 1% of the time. As a result, the display 42 will illuminate in substantially red color.
  • the EXAMPLE 2 considers the memory data ⁇ 02 ⁇ (HEX) to generate light of substantially green color.
  • the data ⁇ 02 ⁇ will be loaded into the counter 71f, and, simultaneously, the flip-flop 73 will be set.
  • the counter 71f will count down and will reach zero count after 2 clock cycles. At that instant it will produce at its output TC a negative pulse 99e to reset the flip-flop 73.
  • the flip-flop 73 was set for 2 clock cycles, or about 1% of the time, and reset for 254 clock cycles, or about 99% of the time. Accordingly, the red bus 5 of the display 42 will be energized for about 1% of the time, and the green bus 6 will be energized for the remaining about 99% of the time. As a result, the display 42 will illuminate in substantially green color.
  • the EXAMPLE 3 considers the memory data ⁇ 80 ⁇ (HEX) to generate light of substantially yellow color.
  • the data ⁇ 80 ⁇ will be loaded into the counter 71f, and, simultaneously, the flip-flop 73 will be set.
  • the counter 71f will count down, and will reach zero count after 128 clock cycles. At that instant it will produce at its output TC a negative pulse 99f to reset the flip-flop 73. It is readily apparent that the flip-flop 73 was set for 128 clock cycles, or about 50% of the time, and reset for 128 clock cycles, or about 50% of the time.
  • the red bus 5 of the display 42 will be energized for about 50% of the time, and the green bus 6 will be energized for the remaining about 50% of the time.
  • the display 42 will illuminate in substantially yellow color.
  • a clock signal 99b is applied to the CP inputs of the counters 71d, 71a, 71b, 71c, to step same down. Every 256 counts a negative pulse 99c is generated at the TC output of the counter 71d, to load data into the counters 71a, 71b, 71c from respective memories 76a, 76b, 76c, and to set the flip-flops 73a, 73b, 73c.
  • the data in the RED memory 76a represent the portions of the red color
  • the data in the GREEN memory 76b represent the portions of the green color
  • the data in the BLUE memory 76c represent the portions of the blue color to be blended together.
  • the counters 71a, 71b, 71c will count down, from the respective loaded values, until zero counts are reached. When the respective values of the loaded data are different, the length of time of the count-down will be different for each counter. When a particular counter reaches zero count, its TC output will momentarily drop to a low logic level, to reset its associated flip-flop (the RED counter 71a resets its RED flip-flop 73a, etc.). Eventually, all three flip-flops 73a, 73b, 73c will be reset.
  • the Q outputs of the flip-flops 73a, 73b, 73c are connected to the red bus 5, green bus 6, and blue bus 7, respectively, via suitable buffers 62a, 62b, 62c, as shown in FIG. 12, to energize the respective buses for variable periods of time.
  • the EXAMPLE 4 considers the red memory data ⁇ 80 ⁇ , green memory data ⁇ 00 ⁇ , and blue memory data ⁇ 80 ⁇ , all in hexadecimal notation, to generate light of substantially purple color.
  • the pulse 99c will simultaneously load the data ⁇ 80 ⁇ from the red memory 77a into the red counter 71a, data ⁇ 00 ⁇ from the green memory 77b into the green counter 71b, and data ⁇ 80 ⁇ from the blue memory 77c into the blue counter 71c.
  • the counters 71a, 71b, 71c will be thereafter stepped down.
  • the red counter 71a will reach its zero count after 128 clock cycles; the green counter 71b will reach its zero count immediately; the blue counter 71c will reach its zero count after 128 clock cycles.
  • the red flip-flop 73a was set for 128 clock cycles, or about 50% of the time
  • the green flip-flop 73b was never set
  • the blue flip-flop 73c was set for 128 clock cycles, or about 50% of the time. Accordingly, the red bus 5 of the display 43 will be energized for about 50% of the time, green bus 6 will never be energized, and blue bus 7 will be energized for about 50% of the time. As a result of blending together substantially equal portions of red and blue colors, the display 43 will illuminate in substantially purple color.
  • the EXAMPLE 5 considers the red memory data ⁇ 00 ⁇ , green memory data ⁇ 80 ⁇ , and blue memory data ⁇ 80 ⁇ , to generate light of substantially blue-green color.
  • the data ⁇ 00 ⁇ is loaded into the red counter 71a
  • data ⁇ 80 ⁇ is loaded into the green counter 71b
  • data ⁇ 80 ⁇ is loaded into the blue counter 71c.
  • the red counter 71a will reach its zero count immediately
  • the green counter 71b will reach its zero count after 128 clock periods, and so will the blue counter 71c.
  • the red flip-flop 73a was never set, the green flip-flop 73b was set for 128 clock pulses, or about 50% of the time, and so was the blue flip-flop 73c. Accordingly, the green bus 5 of the display 43 wil be energized for about 50% of the time, and so will be the blue bus. As a result, the display 43 will illuminate in substantially blue-green color.
  • the EXAMPLE 6 considers the red memory data ⁇ 40 ⁇ , green memory data ⁇ 40 ⁇ , and blue memory data ⁇ 80 ⁇ , to generate light of substantially cyan color.
  • the data ⁇ 40 ⁇ is loaded into the red counter 71a
  • data ⁇ 40 ⁇ is loaded into the green counter 71b
  • data ⁇ 80 ⁇ is loaded into the blue counter 71c.
  • the red counter 71a will reach its zero count after 64 clock cycles, and so will the green counter 71b.
  • the blue counter 71c will reach its zero count after 128 clock cycles.
  • the red flip-flop 73a was set for 64 clock cycles, or about 25% of the time, and so was the green flip-flop 73b.
  • the blue flip-flop 73c was set for 128 clock periods, or about 50% of the time. Accordingly, the red bus 5 and green bus 6 of the display 43 will be energized for about 25% of the time, and the blue bus 7 will be energized for about 50% of the time. As a result of blending about 50% of blue color, 25% of red color, and 25% of green color, the display 43 will illuminate in substantially cyan color.
  • the EXAMPLE 7 considers the red memory data ⁇ 80 ⁇ , green memory data ⁇ 40 ⁇ , and blue memory data ⁇ 40 ⁇ , to generate light of substantially magenta color.
  • the data ⁇ 80 ⁇ is loaded into the red counter 71a
  • data ⁇ 40 ⁇ is loaded into the green counter 71b
  • data ⁇ 40 ⁇ is loaded into the blue counter 71c.
  • the red counter 71a will reach its zero count after 128 clock cycles
  • the green counter 71b will reach its zero count after 64 clock cycles, and so will the blue counter 71c.
  • the red flip-flop 73a was set for 120 clock cycles, or about 50% of the time
  • the green flip-flop 73b and blue flip-flop 73c were set for 64 clock cycles, or about 25% of the time. Accordingly, the red bus 5 of the display 43 will be energized for about 50% of the time, green bus 6 and blue bus 7 will be energized for about 25% of the time. As a result, the display 43 will illuminate in substantially magenta color.
  • FIGS. 38 and 39 are graphic representations of the TABLES 1 and 2, respectively, the data at each memory address are a digital representation of the portion of the particular primary color. All examples consider an 8-bit wide PROM (Programmable Read Only Memory). However, the principles of the invention could be applied to other types of memories.
  • the RED PORTION indicates the portion of red primary color; the GREEN PORTION indicates the portion of green primary color.
  • the RED PORTION for a particular memory address was calculated by dividing the actual value of data residing at that address by the maximum possible data ⁇ FF ⁇ (HEX).
  • the GREEN PORTION for the same memory address is complementary; it was obtained by subtracting the calculated value of the RED PORTION from number 1.0.
  • FIG. 38 is shown the characteristic of a like 2-primary color converter, defined in Table 1, for developing color variable in steps: pure green for input voltages less than 0.625 V, substantially yellow for voltages between 1.25 V and 1.875 V, pure red for voltages between 2.5 V and 3.125 V, and of intermediate colors therebetween, this sequence being repeated three times over the voltage range.
  • the RED PORTION indicates the portion of red primary color; the GREEN PORTION indicates the portion of green primary color; the BLUE PORTION indicates the portion of blue primary color.
  • the RED PORTION for a particular memory address was calculated by dividing the value of RED data residing at such address by the maximum possible data ⁇ FF ⁇ (HEX).
  • the GREEN PORTION for that memory address was obtained by dividing the value of GREEN data by ⁇ FF ⁇ (HEX).
  • the BLUE PORTION was obtained by dividing the value of BLUE data by ⁇ FF ⁇ (HEX).
  • FIG. 39 is shown the characteristic of 3-primary color converter, defined in Table 2, for developing color continuously variable from pure red, through substantially orange and yellow, pure green, pure blue, to substantially purple, in a rainbow-like fashion.
  • the data values stored in the red, green, and blue memories are so designed that the sums of the red data, green data, and blue data are constant for all memory addresses, to provide uniform light intensities for all colors. It is further contemplated that data stored in the red, green, and blue memories may be modified in order to compensate for different efficiencies of red, green, and blue LEDs.
  • data values for a low efficiency LED may be proportionally incremented such that time of energization is proportionally increased, to effectively provide equal luminances for LEDs of unequal efficiencies.
  • ICI International Committee on Illumination
  • chromaticity diagram designed to specify a particular color in terms of x and y coordinates. Pure colors are located along the horseshoe-like periphery. Reference numbers along the periphery indicate wavelength in nanometers. When relative portions of three primary colors are known, the color of light produced by blending their emissions can be determined by examining the x and y values of ICI coordinates.
  • FIG. 41 is a generalized block diagram of a multimeter with a variable color digital display which includes a multimeter 101 for measuring values of the QUANTITY 1, digital decoder driver 21 for converting the multimeter's output data into a displayable code, and variable color digital display 40 for indicating the measured values in digital format.
  • the invention resides in the addition of a color converter circuit 55 for converting values of the QUANTITY 2 to color control signals for controlling the color of the display 40.
  • the display 40 will thus simultaneously indicate values of the QUANTITY 1, in digital format, and values of the QUANTITY 2, in variable color.
  • FIG. 42 is a generalized block diagram of a like multimeter system with a multiplexed variable color digital display 41, which differs from the diagram shown in FIG. 41 in that the multimeter 102 develops at its outputs multiplexed signals to directly drive the display 41.
  • a digital multimeter shown in a block diagram configuration in FIG. 43 is capable of selectively setting certain of its external controls by an external control selector 121a.
  • the invention resides in the addition of associated color selector 121b for causing the variable color digital display 40 to illuminate in a color corresponding to the selected external control.
  • the measurements performed with different external controls may be displayed in respectively different colors.
  • the selectors 121a, 121b may include relays, mechanical switches, electronic and optical elements, devices for executing program of instructions, and the like.
  • the association between the selectors 121a and 121b may be, in its simplest form, a direct coupling, whereby the selector 121b is always in the same position as the selector 121a, or a more sophisticated association in space, time, hardware, and software.
  • the external controls may comprise measurement modes, such are local, remote, 2-wire, and 4-wire; measurement functions, such as DC voltage, AC voltage, DC current, AC current, resistance, capacitance, and inductance; measurement ranges
  • FIG. 44 is shown a block diagram of a like digital multimeter capable of selectively setting certain of its internal measurement controls by an internal control selector 121a.
  • the associated color selector 121b will cause the display 40 to illuminate in a color corresponding to the selected internal control, such that the measurements performed with different internal controls may be displayed in respectively different colors.
  • the internal controls may comprise measurement modifiers, such are single, continuous, synchronous, and asynchronous triggering, sample rate, filter, offset, external reference, and scaling; measurement methods, units, and the like.
  • FIG. 45 is a block diagram of a digital multimeter with measurement quantity selection.
  • the quantity selector 121a when the quantity selector 121a is in its second position, thereby selecting the QUANTITY 2 to the input of the digital multimeter 103, the associated color selector 121b is also in its second position, thereby applying the control voltage to the color control input C2, to cause the measured values of the QUANTITY 2 to be indicated on the display 40 in the color C2.
  • the measurements of different quantities may be indicated in respectively different colors.
  • FIG. 46 is a block diagram of a digital multimeter with input location selection.
  • the location selector 121a when the location selector 121a is in its third position, thereby selecting for the input of the multimeter 103 signals from the LOCATION 3, the associated color selector 121b is also in its third position, thereby applying the control voltage to the color control input C3, to cause the measured values from the LOCATION 3 to be indicated on the display 40 in the color C3.
  • the measurements from different locations may be indicated in respectively different colors.
  • FIG. 47 is shown an exemplary simplified schematic diagram of a digital multimeter for selectively measuring values of several different quantities from outputs of a temperature transducer 172, which converts temperature to voltage, pressure transducer 173, which converts atmospheric pressure to voltage, and physiological transducer 174, which converts physiological information to voltage.
  • the term transducer as used throughout the description of the invention, is used in its widest sense so as to include every type of a device for performing a conversion of one form of energy to another.
  • the principles of the invention may be applied to various displacement, motion, force, pressure, sound, flow, temperature, humidity, weight, magnetic, and physiological transducers, and the like.
  • the switch 123g When the switch 123g is in its first position, thereby selecting the temperature transducer 172, the digital voltmeter 108 will measure the output voltage of the transducer 172, which is proportional to ambient temperature, and the display 48 will indicate the measured temperature in digital format.
  • the associated switch 123h will be also in its first position, thereby connecting the control voltage +VCC to the color control input C1 of the color control circuit 42, to cause the display 48 to illuminate in the color C1.
  • the switch 123g When the switch 123g is in its second position, thereby selecting the pressure transducer 173, the display 48 will indicate the measured atmospheric pressure in digital format and in the color C2.
  • the display 48 When the switch 123g is in its last position, thereby selecting the physiological transducer 174, the display 48 will indicate the measured physiological information, such as blood pressure, heart beat, and the like, in digital format and in the color Cn. Measured values of different quantities are thus displayed in respectively different colors.
  • FIG. 48 is shown an exemplary simplified schematic diagram of a digital multimeter capable of measuring signals from seven different locations and of indicating the measured results in seven different colors, respectively.
  • the outputs Q0, Q1, Q2 and a 4-bit binary counter 162b which may be from time to time incremented by a clock pulse, are connected, in parallel, to the address inputs A, B, C of analog multiplexers 147a, 147b, respectively, to cause the multiplexer 147a to internally route signals from its selected input, e.g., Y1, to its output Y, and, simultaneously, to apply the control voltage +VCC from the terminal Y of the multiplexer 147b, via its selected terminal, e.g., Y1, to one of the color control inputs B to R.
  • the measured signals from the selected location will be indicated on the display 40 in a digital format and in a color unique to the selected location.
  • the indicated color sequences are merely exemplary; it would be obvious to devise other color sequences by differently interconnecting the terminals Y1 to Y7 of the multiplexer 147b with the color control inputs.
  • FIG. 49 is shown a simplified schematic diagram of an AC digital voltmeter for selectively measuring an RMS (Root Mean Square) or MAV (Mean Average Value) of a measured waveform.
  • An RMS measurement provides a power content of the measured signal, as will be more fully explained later, for a waveform of any shape. Since the MAV measured value may differ from the RMS value for certain waveform shapes, it would be desirable to know which measurement method is being employed.
  • a switch 123i will select either the output of the RMS converter 181, or the output of the precision rectifier circuit, consisting of an op amp 159a, resistors 124x, 124y, 124z and diodes 128a, 128b, to the input of the digital voltmeter 108.
  • An associated switch 123j will select one of the color control inputs C1, C2, in accordance with the selection of the measurement method.
  • the display 48 will indicate the magnitude of the measured AC waveform in a digital format and in a color unique to the selected measurement method
  • FIG. 50 is shown a simplified schematic diagram of a digital thermometer which can selectively measure temperature in the Kelvin, Celsius, or Fahrenheit scale, by connecting the output of one of temperature transducers 177, 178, 179, via a switch 123m, to the input of the digital voltmeter 108.
  • An associated switch 123n will apply the control voltage +VCC to one of the color control inputs C1, C2, C3, of the color control circuit 52, to thereby illuminate the display 48 in a color unique to the selected temperature scale.
  • the output voltage of the Kelvin temperature transducer 177 is linearly proportional to temperature in the Kelvin scale.
  • the output voltage of the like Celsius temperature transducer 178 is linearly proportional to temperature in the Celsius scale.
  • the output voltage of the like Fahrenheit temperature transducer 179 is linearly proportional to temperature in the Fahrenheit scale.
  • FIG. 51 is shown a simplified schematic diagram of a digital ampermeter with variable color range indication.
  • the current range is selectable by a rotary switch 123a, in a manner well known to those skilled in the art.
  • the invention resides in the addition of a second rotary switch 123b, associated with the switch 123a such that both switches are always in the same position, to connect the reference voltage +VCC to the selected one of the color control inputs, in accordance with the selected current range.
  • the remaining color control inputs are tied to ground via suitable pull down resistors 125a, 125b, 125c, 125d, 125e.
  • the display 40 may indicate measured current values on the 0.2 mA range in blue color, on 2 mA range in purple color, on 20 mA range in green color, on 200 mA range in yellow color, and on 2 A range in red color.
  • FIG. 52 is shown a simplified schematic diagram of a digital voltmeter with variable color range indication.
  • the precision voltage attenuating resistors 126f, 126g, 126h, 126i, 126j are connected in series and the voltage range is selected by a rotary switch 123c, in a manner well understood by those skilled in the art.
  • the invention resides in the addition of a second rotary switch 123d, associated with the switch 123c, to apply the reference voltage +VCC to the selected color control input.
  • the display 40 may indicate measured values on the 0.2 V range in white color, on 2 V range in yellow color, on 20 V range in green color, on 200 V range in blue-green color, and on 2000 V range in red color.
  • FIG. 53 is shown a simplified schematic diagram of a digital ohmmeter with variable color range indication.
  • the precision standard resistors 126k, 126m, 126n, 126p, 126r, selectable by a rotary range switch 123e, are connected such that the selected one of the standard resistors is in series with the measured resistance Rx, in a well known ratiometric arrangement.
  • the invention resides in the addition of a second switch 123f, associated with the switch 123e, to connect the reference voltage +VCC to the selected one of the color control inputs, in accordance with the selected resistance range.
  • the display 40 may indicate measured resistance values on the 0.1k range in yellow color, an 1k range in green color, on 10k range in blue color, on 100k range in purple color, and on 1M range in red color.
  • switches 123 are shown as rotary switches, they may, alternatively, be of any other type, such as pushbutton switches and relay contacts. Another modification envisions that only certain of the display digits may change color in accordance with the measurement range, while the remaining display digits may change color in accordance with a different quantity. It is readily apparent that the principles of the invention may be effectively applied to autoranging multimeters.
  • FIG. 54 is shown a detail of the multimeter of FIGS. 51, 52, 53 which include a DVM chip 108 capable of converting analog voltage applied to its input HI and LO into signals for directly driving respective segments of a 31/2 digit 7-segment variable color display 48.
  • the color control 50 will cause the display 48 to illuminate in a selected color, as described previously.
  • the polarity output POL of the digital voltmeter 108 is directly connected to the color control input R, and, via an inverter 151a, to the color control input G, of the color control circuit 52.
  • the POL output When the POL output is at a low logic level, to indicate that the displayed number is positive, the minus sign is extinguished.
  • a logic low level at the POL output will force the output of the inverter 151a to rise to a high logic level, to activate the color control input G, to thereby illuminate the display 48 in green color.
  • the POL output rises to a high logic level to indicate that the displayed number is negative, the minus sign is illuminated.
  • a logic high level at the POL output will activate the color control input R, to thereby illuminate the display 48 in red color. It would be obvious, in the view of the present disclosure, to devise other color combinations.
  • variable color digital display system which is capable of emphasizing the position of decimal point in a string of digits, should be considered together with its accompanying timing diagram shown in FIG. 57.
  • the display system which in its exemplary embodiment utilizes eight single-digit variable color displays 46a to 46h, which are only partially shown, is capable of detecting the position of decimal point in a string of displayed digits and of displaying all digits that precede the decimal point in a first color and all digits that follow the decimal point in a second color.
  • the decimal point outputs DP of the common-cathodes 7-segment decoders 23a to 23h are continuously scanned in a sequence by a multiplexer 146 which is incremented by a counter 162d driven by a clock 199j of suitable frequency.
  • a multiplexer 146 which is incremented by a counter 162d driven by a clock 199j of suitable frequency.
  • the Q output of the DP flip-flop 138j which is connected to the D inputs of all flip-flops 138b to 138h, will rise to a high logic level for the remaining time of the scanning cycle, to thereby indicate, as may be best observed in FIG. 57 in the line designated F--F 138j Q OUTPUT at waveform 199p, the position of the detected decimal point in reference to the scanning cycle.
  • a decoder 166 is incremented synchronously with the multiplexer 146, and, as a result, its outputs Y0 to Y7 are sequentially driven to a low logic level, to trigger in a sequence the flip-flops 138b to 138h to states determined by the conditions of their D inputs, respectively, at the time of triggering, as may be best observed in FIG. 57 in the lines designated DEC 166 OUTPUTS Y0 to Y7 at waveforms 199a to 199h.
  • the Y7 output of the decoder 166 is connected to the clear direct input CD of the DP flip-flop 138j, to force the latter to its reset condition at the end of each scanning cycle.
  • the outputs Q and Q of the flip-flops 138b to 138h are respectively connected to color control inputs R and G of the color control circuits 52b to 52h, to thereby cause all display digits 46b to 46h that precede the instant decimal point to be illuminated in green color, and all remaining display digits that follow the decimal point to be illuminated in red color. It would be obvious that other color combinations may be devised.
  • the display system shown in FIG. 58 is capable of detecting the presence or absence of decimal point in the displayed digital string, and accordingly of displaying digital strings with decimal point (decimal numbers) in a first color, and digital strings without decimal point (integers) in a different color.
  • the decimal point outputs DP of all common-cathode 7-segment decoders 23a to 23h are respectively connected to the inputs of an OR gate 154.
  • the appropriate DP output When decimal point is present in the displayed digital string, the appropriate DP output will rise to a high logic level, thereby forcing the non-inverting output of the OR gate 154, which is connected to the interconnected color control inputs R of all color control circuits 52a to 52h, to rise to a high logic level, to thereby cause all displays 46a to 46h to illuminate in red color.
  • the inverting output of the OR gate 154 When no decimal point is detected in the displayed digital string, the inverting output of the OR gate 154, which is connected to the interconnected color control inputs G of all color control circuits 52a to 52h, will rise to a high logic level, to thereby cause all displays 46a to 46h to illuminate in green color.
  • FIG. 59 is shown a block diagram of a variable color digital display system for selectively indicating output values of seven digital devices 12a to 12g in digital format and in respectively different colors.
  • the outputs of the digital devices 12a to 12g are respectively connected to the inputs I1 to I7 of a digital multiplexer 146b, which is addressed by a counter 161c.
  • Displayable digital data will be routed from one of the multiplexer's inputs, selected by the instant output code of the counter 161c, to its output Z and to the variable color digital display 43, to be displayed thereon in digital format.
  • the counter 161c simultaneously addresses the color decoder 165a, to activate one of seven color control inputs B, P, BG, G, Y, W, R of the color control circuit 53, in accordance with the selected input of the multiplexer 146b.
  • the counter's output code 010 binary
  • the input I2 will be selected and data from the digital device 12b will be indicated on the display 43 in digital format.
  • the counter's output code will cause the output Y2 of the decoder 165a to be active, thereby activating the color control input P, to cause the display 43 to illuminate in purple color.
  • Digital devices 12a to 12g may include certain of those disclosed earlier.
  • FIG. 60 is shown an expanded block diagram of a variable color digital barometer with memory, for indicating measured values of atmospheric pressure in digital format and in a color depending on previous measured values.
  • a scaling circuit consisting of op amps 159c, 159d and resistors 124a, 124b, 124c, 124d, 124e will shift and scale output voltage of a pressure transducer 176, which is linearly proportional to atmospheric pressure, such that voltage at the input of the digital voltmeter 107 directly corresponds to the atmospheric pressure, either in milibars or in mm Hg, depending on the values of the resistor 124e and V REF voltage.
  • the digital voltmeter 107 will convert the instant analog voltage at its input to a digital code which is simultaneously applied to the variable color digital display 40, to be indicated thereon in digital format, and to the data input of a combined memory and comparator 144, to be stored therein from time to time.
  • the invention resides in the addition of a color control circuit 50 for illuminating the display 40 in a color depending on the reult of comparison between the instant measured value of atmospheric pressure and previously stored one, to thereby indicate whether the atmospheric pressure is either rising, or falling, or remains unchanged.
  • a three-decade counter 164, or other suitable device for keeping time, is incremented in regular intervals by a clock, and its DIGITS outputs indicate the instant count.
  • a decocder 165b has its ADDRESS inputs connected, in a rather simplified manner, to the counter's DIGITS outputs and utilizes the counter's SELECT output as a strobe.
  • As a result of continuous counting at regular time intervals there will appear relatively short pulses 99m at the selected decoder's output Yn, which is connected to the LOAD input of the memory and comparator 144, to load the instant output data of the digital voltmeter 107 into the memory 144.
  • the comparator 144 will effect a comparison of the data currently stored in its memory with the instant output data of the digital voltmeter 107 and will accordingly develop output signals LT (Less Than), EQ (Equal), and GT (Greater Than).
  • the comparator's outputs LT, EQ, GT are respectively connected to the color control inputs R, Y, G of the color control circuit 50, to cause the display 40 to illuminate in red color when the comparator's output LT is active (atmospheric pressure is falling), in yellow color when the output EQ is active (atmospheric pressure is unchanged), and in green color when the output GT is active (atmospheric pressure is rising).
  • the above description may serve as a background for consideration of more sophisticated barometric systems capable of comparing instant measured values with values obtained by virtue of arithmetic and logic operations, such are average or peak values of previous measurements, and of displaying measured values in a variety of colors depending on rate of increase or dicrease of measured values.
  • FIG. 61 is shown a block diagram of a digital multimeter 103 for making series of measurements in combinations with a clock 148 for keeping time.
  • the time signals developed by the clock circuit 148 are decoded by a suitable time decoder 168 and converted to color control signals C1, C2 to Cn. Values measured by the multimeter 103 will be indicated on the display 40 in digital format and in a color having relation to time.
  • FIG. 62 is a block diagram of a multimeter which includes a memory 131, containing a reference measured value, and a comparator 141. Measured values of input signal, which is applied to an input conditioning circuit 120, wherein it may be switched, scaled, attenuated, rectified, and filtered (not shown), will be compared with reference value stored in the memory 131 and indicated on the display 40 in digital format and in a color depending on the relationship between the measured value and the reference one.
  • the memory 131 may include electronic storage elements, such are flip-flops, latches, RAMs, ROMs, and the like, and mechanical storage elements, such are binary switches and the like.
  • the output ⁇ of the comparator 141 When the instant measured value is less than the reference value, the output ⁇ of the comparator 141 will be active, thereby activating the color control input C2 of the color control circuit 50, to illuminate the display 40 in the color C2.
  • the comparator's output ⁇ > ⁇ When the instant measured value is greater than the reference one, the comparator's output ⁇ > ⁇ will be active and the measured value will be displayed in the color C1.
  • the instant measured value may be displayed in a color indicating its deviation, absolute or relative, from the reference value.
  • FIG. 63 is a block diagram of a multimeter which includes a memory 131a for storing a low measurement limit, memory 131b for storing a high measurement limit, and comparators 141a, 141b.
  • the measured values will be compared with the high and low measurement limits and indicated on the display 40 in a digital format and in a color depending on the relationship between the measured value and the low and high measurement limits.
  • the output ⁇ of the comparator 141a will be active, thereby activating the color control input C3 of the color control circuit 50, to illuminate the display 40 in the color C3.
  • the output ⁇ > ⁇ of the comparator 141b When the measurement value is higher than the high measurement limit, stored in the memory 131b, the output ⁇ > ⁇ of the comparator 141b will be active, thereby activating the color control input C1, to illuminate the display 40 in the color C1.
  • the active outputs ⁇ > ⁇ of the comparator 141a and ⁇ of the comparator 141b will be combined in a logic fashion by a logic circuit 150, thereby activating the color control input C2, to illuminate the display 40 in the color C2.
  • FIG. 64 is a block diagram of a multimeter for making repeated measurements, which includes an A/D converter 106 and memory and comparator circuit 144.
  • the instant measured value of the input signal, converted to digital format by the A/D converter 106, may be from time to time stored in the memory 144, so that subsequent measurements could be compared with the same.
  • the instant measured value will be displayed on the display 40 in a digital format and in a color depending on the result of comparison with the value stored in the memory.
  • the output LT (Less Than) of the comparator 144 will be active, thereby activating the color control input C3 of the color control circuit 50, to display the measured value in the color C3.
  • the comparator output EQ (Equal) will be active, thereby activating the color control input C2, to display the measured value in the color C2.
  • the comparator output GT (Greater Than) will be active, thereby activating the color control input C1, to display the measured value in the color C1.
  • FIG. 65 is a block diagram of a multimeter for making a series of measurements and for comparing each measured value, by comparators 141a, 141b, with low and high measurement limits stored in memories 131a, 131b, respectively.
  • An additional error memory 131c which may include an error counter, and logic circuit 150a are provided for storing the number of measurement errors.
  • the instant measured value will be indicated on the display 40 in a digital format and and in a color depending, firstly, on its relationship with the applicable low and high measurement limits, and, secondly, on the number of previous measurement errors.
  • Various kinds of decisions may be made, by a logic circuit 150b, based on the contents of the error memory.
  • the decisions may be as simple as merely display measurement results in the color C1 for no previous measurement errors and in the color C2 for some previous errors, or it might involve sophisticated color selections based on the number of previous errors and total number of measurements, arrived at by virtue of arithmetic and logic operations.
  • FIG. 66 is shown an exemplary simplified schematic diagram of the limit memory and limit comparator combination, generally shown in FIG. 65, for 8-bit measurement data (two BCD digits).
  • the 8-bit data stored in a memory 132a, symbolizing the low measurement limit, are applied to respective inputs B0 to B7 of a digital comparator 143a; the 8-bit data stored in a like memory 132b, symbolizing the high measurement limit, are applied to respective inputs B0 to B7 of a comparator 143b.
  • the 8-bit measurement data having relation to the instant measured value, are applied to respective inputs A0 to A7 of both comparators 143a, 143b, interconnected in parallel.
  • the ⁇ output of the comparator 143a When the instant measurement data are less than the low measurement limit, the ⁇ output of the comparator 143a will rise to a high logic level.
  • the ⁇ > ⁇ output of the comparator 143b When the instant measurement data are greater than the high measurement limit, the ⁇ > ⁇ output of the comparator 143b will rise to a high logic level.
  • each OR gate 152a, 152 b When the instant measurement data are between the low and high measurement limits, one of the inputs of each OR gate 152a, 152 b will rise to a high logic level, thereby forcing both inputs of an AND gate 155a to rise to a high logic level, which in turn will force the output of the latter to rise to a high logic level.
  • the outputs PASS, FAIL LOW LIMIT, and FAIL HIGH LIMIT may be connected to respective inputs C1, C2, and C3 of the color control 50.
  • the display 40 may illuminate in green color for pass, in yellow color for fail on the low limit, and in red color for fail on the high limit.
  • FIG. 67 is shown a simplified schematic diagram of the limit memory, limit comparator, and error memory combination, in a digital multimeter for making a series of measurements.
  • a memory 132c contains data symbolizing low measurement limits for each measurement step.
  • a like memory 132d contains data symbolizing high measurement limits for each measurement step.
  • An 8-bit counter 161 which is incremented for each measurement step by a suitable clock pulse, is used to simultaneously address both memories 132c, 132d. When addressed for a particular measurement step, the memories 132c, 132d present the data residing at such address to the inputs B0 to B7 of the comparators 143c, 143d, respectively, as the instant low and high measurement limits.
  • the comparison of the instant measurement data with the instant measurement limits will be performed by the comparators 143c, 143d at each measurement step.
  • the PASS output will rise to a high logic level.
  • the FAIL output of the OR gate 152e will rise to a high logic level, and the error memory 135a will be incremented by the next clock pulse.
  • the error memory 135a contains data representing the total number of measurement errors.
  • a logic circuit 150b will convert the instant error memory data to color control signals C2 to Cn, whereby the instant measured value will be displayed in the color C1 on pass, and in a certain of the colors C2 to Cn on fail, depending on the total number of previous measurement errors, as will be more fully explained later.
  • FIG. 68 is shown a detail of the comparator, error flip-flop, and color control combination generally shown in FIG. 65.
  • the output of an OR gate 152f which is connected to the D input of an error flip-flop 138a, will rise to a high logic level, and the error flip-flip will be set by the next clock pulse, to indicate that there was a measurement error.
  • the error flip-flop may be suitably reset (not shown), e.g., at the beginning of each measurement series.
  • Results of the measurements will be indicated on the display 40 in a digital format and in a color depending on the result of comparison with the instant low and high measurement limits, and on the condition of the error flip-flop.
  • the measurements will be displayed in green color on pass, in yellow color on fail with no previous measurement errors, and in red color on fail with previous measurement errors.
  • FIG. 69 is another exemplary detail of the comparator, error memory, and color converter combination generally shown in FIG. 67.
  • the output of an OR gate 152g which is connected to the DATA input of the error memory 135b, will rise to a high logic level, and the error memory contents will be incremented by the next clock pulse.
  • the error memory 135b thus contains data indicating the instant total number of previous measurement errors.
  • the outputs of the error memory 135b are applied to the interconnected inputs of the red color converter 59a, green color converter 59b, and blue color converter 59c, which will develop drive signals for energizing the red, green, and blue buses of the display 40, to thereby illuminate the latter in a color related to the total number of previous errors.
  • FIG. 70 is a detail of the low limit memory and comparator combination shown in FIG. 66.
  • An 8-bit latch 134 stores data representing the instant low measurement limit, which may be from time to time entered via its inputs D0 to D7 (not shown).
  • Two 4-bit digital comparators 142a, 142b are cascaded to form an 8-bit digital comparator, in a manner well understood by those skilled in the art.
  • FIG. 71 is an exemplary detail of the error counter and PROM combination shown in FIG. 69.
  • An 8-bit counter 163 which contains the count indicating the total number of previous measurement errors, is employed to address, via its outputs Q0 to Q7, a PROM 77 containing the color conversion data which may be used to develop drive signals for the red, green, and blue buses, as previously shown in FIG. 35, to thereby illuminate the display 40 in a color depending on the total number of previous measurement errors.
  • the schematic diagram shown in FIG. 72 includes a digital multimeter 103 for making repeated measurements of input signals and for developing at its outputs 4-digit BCD code having relation to the magnitude of the instant input signal, and two cascaded registered comparators 145a, 145b for comparing the instant measured value with the value previously stored. From time to time, a short positive pulse 99n may be applied to the interconnected Load inputs S0, S1, to cause the instant data at the inputs I0 to I7 of both registered comparators 145a, 145b to be loaded therein.
  • the subsequent measured values will be compared with the reference value currently loaded in the register, and the interconnected outputs LT (Less Than), EQ (Equal), GT (Greater Than), which are tied to the supply voltage va suitable pull-up resistors 124f, 124g, 124h, will indicate the results of each comparison.
  • the comparator outputs are respectively connected to the color control inputs C1, C2, C3 of the color control circuit 50, to control the color of the display 40, shown in FIG. 62, in accordance with the result of comparison.
  • the display 40 will indicate the instant measured value in a digital format and in a color depending on the result of comparison with the reference value currently stored in the register. By way of an example, the display 40 will illuminate in green color when the instant measured value is equal to the reference value, in yellow color when it is less than the reference value, and in red color when it is larger than the reference value.
  • FIG. 73 is shown a simplified schematic diagram of digital voltmeter with 31/2 digit variable color display.
  • the digital voltmeter 107 is configured, by having its initialize conversion input INIT connected to a high logic level, to continuously convert input analog voltage, applied to its input terminal via a resistor 124a, to 31/2 digit BCD code corresponding to the magnitude of instant input voltage.
  • the BCD codes for the respective digits are converted, by 7-segment decoders 22a, 22b, 22c, 22d, to signals for directly energizing the segments of the variable color display digits 42a, 42b, 42c, 42d, respectively, in a manner well understood by those skilled in the art.
  • the color control circuit 50 will cause all four display digits to illuminate uniformly in a selected color, as previously described.
  • a like block diagram shown in FIG. 74 differs in that four color control circuits 50a, 50b, 50c, 50d are employed to independently control the color of respective display digits 42a, 42b, 42c, 42d.
  • FIG. 75 is shown, in a block diagram configuration, a multimeter utilizing two digital voltmeters 109a and 109b for measuring respective INPUT SIGNALS 1 and 2.
  • the measured values of both input signals are simultaneously indicated on a single 8-digit variable color display 42 such that the four most significant display digits D1 to D4 indicate the output of the digital voltmeter 109a, and the four least significant display digits D5 to D8 indicate the output of the digital voltmeter 109b.
  • the color control circuit 52a is adapted, by having its color control input G connected to a high logic level, to illuminate the four most significant display digits D1 to D4 in green color, and like color control circuit 52b is adapted, by having its color control input R connected to a high logic level, to illuminate the four least significant digits D5 to D8 in red color.
  • FIG. 76 is a block diagram of an RMS digital voltmeter with variable color crest factor indication.
  • the RMS (Root Mean Square) value of the measured waveform is its heating value when applied to a resistor; it indicates the magnitude of the measured waveform regardless of its shape.
  • the Crest Factor is the peak signal value divided by the RMS value; it indicates what type of a waveform it is.
  • the digital voltmeter includes an RMS converter 181 for converting an input measured signal to a DC value representative of the energy content of the measured signal.
  • the DC value from the RMS conveter 181 is applied to the HI input terminal of a digital voltmeter 105 which will develop at its outputs signals to directly drive variable color digital display 40, to thereby indicate the measured RMS value in digital format, in a manner well known to those having ordinary skill in the art.
  • the invention resides in the addition of a crest factor converter 183 for computing the crest factor value of the measured waveform, and in a color converter 55 for controlling the color of the digital display 40 in accordance with the crest factor value.
  • the RMS digital voltmeter of the present invention will simultaneously indicate the RMS value of the measured waveform in digital format and in a color indicative of the crest factor value of the measured waveform, to thereby simultaneously indicate its magnitude and shape.
  • FIG. 77 is a comparison chart of RMS and crest factor values for several exemplary waveforms. It is readily apparent that the crest factor value is a good indication of the waveform shape.
  • the unity value of the crest factor indicates that the measured signal is either a symmetrical waveform or a DC signal. Small values of the crest factor (less than 2) usually indicate either a sine wave, triangle wave, or a low duty cycle pulse train. High values of the crest factor (greater than 4) usually indicate a noise signal or a pulse train with a high duty cycle.
  • the crest factor converter 183 includes a ratio producing circuit 187 that will develop at its output RATIO A:B a signal representative of the ratio of signals applied to its inputs A and B.
  • the peak signal value obtained from the output of the peak detector 185, is applied to the input A.
  • the RMS signal value obtained from the output of the RMS-to-DC converter 184, is applied to the input B.
  • the computed ratio of the peak signal value to the RMS signal value, developed at the output RATIO A:B will be, by definition, a crest factor value of the measured signal.
  • the output DC voltage of the RMS-to-DC converter 181 is applied to the X1 input of a precision divider 188, while the output DC voltage of the peak detector 185 is applied to its input Z2.
  • the precision divider 188 will develop at its output suitably scaled DC voltage representing the ratio of the signals Z2 to X1.
  • the measured signal is applied, via a suitable potentiometer 127c, to the input of an RMS-to-DC converter 182, which will develop at its output a DC voltage corresponding to RMS value of the measured signal.
  • the potentiometer 127b and resistors 124p, 124r are used to adjust offset voltage; the capacitor 129p is selected to set a suitable averaging time constant.
  • FIG. 81 is an exemplary detail of the peak detector circuit, in which a measured signal is applied, via a suitable resistor 124u, to the input of a peak detector 186, which will develop at its output a DC voltage, retained on the hold capacitor 129r, representing the maximum value of the input signal.
  • the present peak value may be from time to time reset, by applying a relatively short positive pulse 99p to the interconnected inputs DET and RESET. When the pulse 99p returns to a low logic level, new peak of the input signal may be measured.
  • the output voltage of the crest factor converter may be applied to input of a suitable comparator 141a, such as the one shown in FIG. 23, to develop color control logic signals R, Y, G for the color control circuit 52, to illuminate the display 42 in one of three colors, in accordance with the value of the crest factor.
  • the comparator 141a may be set to develop active color control signal G for values of the crest factor less than 1.5, to illuminate the display 42 in green color, active color control signal Y for values of the crest factor between 1.5 and 2.5, to illuminate the display 42 in yellow color, and active color control signal R for values of the crest factor greater than 2.5, to illuminate the display 42 in red color.
  • a similar block diagram shown in FIG. 83 differs in that a comparator 141b, such as the one shown in FIG. 25, and color control circuit 53 are used to illuminate the display 43 in one of seven colors, in accordance with the value of the crest factor.
  • the comparator 141b may develop active color control signal B for values of the crest factor less than 1.1, to illuminate the display 43 in blue color, active color control signal P for values of the crest factor between 1.1 and 1.4, to illuminate the display 43 in purple color, active color control signal BG for crest factor values between 1.4 and 1.7, to illuminate the display 43 in blue-green color, active color control signal G for crest factor values between 1.7 and 2.0, to illuminate the display 43 in green color, active color control signal Y for crest factor values between 2.0 and 2.5, to illuminate the display 43 in yellow color, active color control signal W for crest factor values between 2.5 and 3.0, to illuminate the display 43 in white color, and active color control signal R for crest factor values greater than 3.0, to illuminate the display 43 in
  • the output voltage of the crest factor converter 183 is applied to the input of a scaling circuit 80a, such as the one shown in FIG. 31, to be scaled and shifted to a voltage range suitable for the continuous 2-primary color converter 57, which will develop drive signals for controlling the red and green buses, respectively, of the display 42, to illuminate same in a color related to the instant measured value of the crest factor.
  • a like block diagram shown in FIG. 85 differs in that a 3-primary color converter 58 is used to develop drive signals for the red, green, and blue buses, respectively, of the display 43, to illuminate same in a color related to the measured value of the crest factor.
  • the relationship between the crest factor values and color of the display 43 may be defined at will, e.g., by programming suitable data into PROMs contained in the color converter 58, as previously described.
  • FIG. 86 is shown a front view of a digital multimeter which includes a 61/2 digit variable color digital display 49, keyboard 117, and suitable terminals 116 for attaching thereto measuring cords.
  • the keyboard 117 includes a ⁇ DC V ⁇ key 118a for setting the multimeter to its DC voltage mode, ⁇ AC V ⁇ key 118b for setting the multimeter to its AC voltage mode, OHMS key 118c for setting the multimeter to its OHMS mode, RANGE keys 118d, 118e, 118f, 118g, 118h, 118i for setting the multimeter to a selected range, LOCAL key 118j for setting the multimeter to its local mode, FRONT key 118k for selecting front measurement terminals, FILTER key 118m for setting the multimeter to its filter mode, AUTO key 118n for setting the multimeter to its autoranging mode, OFFS key 118p, ⁇ % ⁇ key 118r, and LAH key 118s for setting the multimeter to certain of its mathematical modes
  • FIG. 87 is shown a block diagram of a variable color digital multimeter controlled by a microprocessor or microcomputer 168, which can be influenced either locally, by entering commands via the keyboard 117, or remotely, by sending commands over a bus via the remote control circuit 169.
  • the microprocessor 168 can control the input conditioning section 120, AC section 112, and OHMS section 113, to selectively switch, scale, attenuate, rectify, and filter measured signals, before being applied to the input of an A/D converter 106, which will repeatedly perform analog-to-digital conversions and develop output data indicative of the magnitude of the instant measured signal.
  • the microprocessor 168 can from time to time read output data of the converter 106 and send same to the display controller 167, which will cause the data to be indicated on the display 40 in a digital format.
  • the invention resides in the addition of a color memory 136, wherein data symbolizing a selected color may be stored, and color control 50 for illuminating the display 40 in the selected color. It is contemplated that the color of the display 40 may be controlled in accordance with certain of the following operating modes:
  • a. Local/remote mode The multimeter may be set either to its local mode, e.g., by actuating the LOCAL key 118j on the front panel, wherein all commands are entered via the keyboard 117 and the remote control 169 is disabled, or to its remote mode wherein all commands are sent via the remote control 169 and the keyboard 117 is disabled.
  • the microprocessor 168 When in its local mode, the microprocessor 168 will send data to the color memory 136 commanding the color control 50 to illuminate the display 40 in a first color (e.g., green); when in its remote mode, the microprocessor 168 will send different data to the color memory 136 commanding that the display 40 be illuminated in a second color (e.g., red), so that an operator may readily distinguish the two modes.
  • the multimeter may be set to its offset mode, e.g., by actuating the OFFS key 118p on the front panel, wherein a numeric constant (an offset) is stored in the microprocessor's memory, to calculate and display the difference between a measured value and the offset; when in its normal mode, the multimeter displays true measured values.
  • the microprocessor 168 will send data to the color memory 136 commanding that the display 40 be illuminated in a first color when in its normal mode, and in a second color when in its offset mode.
  • the multimeter may be set to its percent mode, e.g., by actuating the ⁇ % ⁇ key 118r on the front panel, wherein a percent deviation of a measured value from a value stored in the microprocessor's memory (reference value) is calculated and displayed; when in its standard mode, true measured values are displayed.
  • the microprocessor 168 will send data to the color memory 136 commanding that the display 40 be illuminated in a first color for the standard mode, and in a second color for the percent mode.
  • LAH/standard mode The multimeter may be set to its LAH (Low, Average, High) mode, e.g., by actuating the LAH key 118s on the front panel, wherein the multimeter will store the most positive and most negative measured values, calculate the average measured value, and count the number of measurements during the LAH cycle; when in its standard mode, true measured values are displayed.
  • LAH Low, Average, High
  • the microprocessor 168 will send data to the color memory 136 commanding that the display 40 be illuminated in a first color for the standard mode, and in a second color for the LAH mode.
  • FIG. 88 is shown an expanded block diagram of a digital multimeter with a DC section 111 for processing DC signals, AC section 112 for processing AC signals, and OHMS section 113 for performing resistance measurements, as will be more fully explained later.
  • the multimeter includes input terminals HI INPUT 116a, LO INPUT 116b, HI OHM 116c, LO OHM 116d on the front panel shown in FIG. 86, and like input terminals on the rear panel (not shown), which may be selectively connected to the input of a digital voltmeter 105.
  • the FRONT key 118k may be actuated, which will toggle a front/rear relay 191 between its energized and disenergized condition.
  • the relay 191 has contacts 191a, 191b, 191c, 191d, 191e.
  • the relay 191 When the relay 191 is not energized, its contacts 191a to 191e are in the positions as illustrated, thereby making available the front input terminals for connection to the input of the digital voltmeter 105.
  • the relay 191 When the relay 191 is energized, its contacts 191a to 191e will switch to their other positions, respectively, thereby moving available the rear input terminals for connection to the input of the digital voltmeter 105.
  • the invention resides in the addition of the relay contact 191e, associated with the contacts 191a to 191d, such that the front and rear measurements are indicated in a digital format and in respectively different colors.
  • the relay contact 191e is open and the color control input C1 is pulled to a low logic level by a suitable pull-down resistor 124v, thereby forcing, via an inverter 151e, the color control input C2 to rise to a high logic level, to thereby cause the display 40 to be illuminated in the color C2 (e.g., red).
  • the contact 191e When the measurements via the rear input terminals are performed, by causing the relay 191 to be energized to switch its contacts 191a to 191e to their other positions, respectively, the contact 191e will be closed to apply a logic high level voltage from the source +VCC to the color control input C1, and simultaneously, to force, via the inverter 151e, the color control input C2 to a low logic level, to thereby cause the display 40 to be illuminated in the color C1 (e.g., green).
  • the color C1 e.g., green
  • FIG. 89 is shown a like block diagram of a digital multimeter for selectively performing DC, AC, and OHMS measurements and for indicating measured values in a digital format and in respectively different colors.
  • the DC relay 192 is energized, e.g., by actuating the ⁇ DC V ⁇ key 118a on the front panel of the multimeter, to connect the HI INPUT terminal, via the contact 191a and closed contact 192a, and via the DC section 111, to the HI input of the digital voltmeter 105.
  • the LO relay 195 is energized to connect the LO INPUT terminal, via the contact 191b and closed contact 195a, to the LO input of the digital voltmeter 105.
  • Measured DC values of the input signal will be indicated on the display 40 in a digital format, in a manner well understood by those skilled in the art.
  • the invention resides in the provision of a relay contact 191b, associated with the contact 192a, to apply a high logic level voltage to the color control input C1, to cause the display 40 to illuminate in the color C1 (e.g., red).
  • the AC relay 193 is energized, e.g., by actuating the ⁇ AC V ⁇ key 118b on the multimeter's front panel, to connect the HI INPUT terminal, via the contact 191a and closed contact 193a, and via the AC section 112, to the HI input of the digital voltmeter 105.
  • the LO relay 195 is energized to connect the LO INPUT terminal to the LO input of the digital voltmeter 105.
  • Measured AC values of the input signal will be indicated on the display 40 in a digital format, in a manner well understood.
  • the relay contact 193b, associated with the contact 193a will close when the relay 193 is energized, to apply a high logic level voltage to the color control input C2, to cause the display 40 to illuminate in the color C2 (e.g., yellow).
  • the OHMS relay 124 is energized, e.g., by actuating the ⁇ OHMS ⁇ key 118c on the multimeter's front panel, to connect the HI OHM terminal, via the closed contact 194a, and via the OHMS section 113, to the HI input of the digital voltmeter 105.
  • the LO OHM terminal is connected, via the closed contact 194b, to the LO input of the digital voltmeter 105. Measured resistance values will be indicated on the display 40 in a digital format, in a manner well known.
  • the relay contact 194c associated with the contacts 194a, 194b, will close when the relay 194 is energized, to apply a high logic level voltage to the color control input C3, to cause the display 40 to illuminate in the color C3 (e.g., green).
  • the digital voltmeter shown in FIG. 90 may be set to its filter mode wherein the measured signal is filtered to remove high frequency noise.
  • the invention resides in the addition of a filter flip-flop 138b for activating the color control circuit 50 to illuminate the display 40 in the color C1 for the filter mode turned on and in the color C2 for the filter mode turned off.
  • the filter mode may be turned on and off by actuating the FILTER key 118m, to toggle the filter flip-flop 138b.
  • the key 118m When the key 118m is actuated, its associated keyswitch 119m will momentarily close, to connect a low logic level to the trigger input TRG of a timer 158, which is normally tied to a high logic level via its pull-up resistor 124i, to produce at the timer's output OUT a relatively short positive going pulse 99s, to trigger the filter flip-flop 138b to its opposite state.
  • the width of the pulse 99s may be set by selecting suitable values of the resistor 124z and capacitor 129s, to eliminate the problem of possible bouncing of the keyswitch 119m.
  • the invention describes a method and a device for simultaneously displaying values of two different measured quantities on a single variable color digital display device, by causing the value of the first quantity to be indicated in a digital format, and by controlling the color of the display in accordance with the value of the second quantity.
  • a digital multimeter with variable color digital display was disclosed which can indicate values of the measured quantities in a digital format and in a color selectively variable in accordance with the measurement quantity, method, units, mode, function, range, location, modifier, control, measurement limits, and the like.
  • a digital voltmeter with variable color digital display which can indicate RMS value of the measured AC voltage in digital format and in a color variable in accordance with the crest factor of the measured waveform, thereby simultaneously indicating its magnitude and shape.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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  • Theoretical Computer Science (AREA)
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US06/819,111 1986-01-15 1986-01-15 Variable color digital multimeter Expired - Fee Related US4794383A (en)

Priority Applications (26)

Application Number Priority Date Filing Date Title
US06/819,111 US4794383A (en) 1986-01-15 1986-01-15 Variable color digital multimeter
CA000527300A CA1257334A (en) 1986-01-15 1987-01-14 Variable colour digital voltmeter
CA000527374A CA1261923A (en) 1986-01-15 1987-01-15 Variable color digital multimeter
IN16/CAL/88A IN169382B (enrdf_load_stackoverflow) 1986-01-15 1988-01-07
CA000563216A CA1252236A (en) 1986-01-15 1988-04-05 Variable color display device
CA000567323A CA1266704A (en) 1986-01-15 1988-05-20 Variable color digital multimeter
US07/379,616 US5003298A (en) 1986-01-15 1989-07-14 Variable color digital display for emphasizing position of decimal point
US07/579,858 US5194854A (en) 1986-01-15 1990-09-10 Multicolor logic device
US07/628,328 US5122733A (en) 1986-01-15 1990-12-14 Variable color digital multimeter
US07/865,460 US5283517A (en) 1986-01-15 1992-04-09 Variable color digital multimeter
US08/187,350 US5475300A (en) 1986-01-15 1994-01-27 Variable color digital multimeter
US08/571,246 US5656935A (en) 1986-01-15 1995-12-12 Variable color display system
US08/910,080 US6018237A (en) 1986-01-15 1997-08-12 Variable color display system
US09/039,850 US6535186B1 (en) 1986-01-15 1998-03-16 Multicolor display element
US09/065,805 US6208322B1 (en) 1986-01-15 1998-04-23 Color control signal converter
US09/073,393 US6239776B1 (en) 1986-01-15 1998-05-05 Multicolor multi-element display system
US09/109,948 US6300923B1 (en) 1986-01-15 1998-07-06 Continuously variable color optical device
US09/268,769 US6281864B1 (en) 1986-01-15 1999-03-15 Digital display system for variable color decimal point indication
US09/275,711 US6121767A (en) 1986-01-15 1999-03-24 Digital multimeter with variable color range indication
US09/334,336 US6734837B1 (en) 1986-01-15 1999-06-16 Variable color display system for comparing exhibited value with limit
US09/334,335 US6133722A (en) 1986-01-15 1999-06-16 Variable color digital measuring and testing system with error memory
US09/335,282 US6119073A (en) 1986-01-15 1999-06-17 Variable color digital measuring instrument for sequentially exhibiting measured values
US09/335,281 US6181126B1 (en) 1986-01-15 1999-06-17 Dual variable color measuring system
US09/335,970 US6166710A (en) 1986-01-15 1999-06-18 Variable color display system for sequentially exhibiting digital values
US09/373,437 US6424327B2 (en) 1986-01-15 1999-08-11 Multicolor display element with enable input
US09/788,695 US6577287B2 (en) 1986-01-15 2001-02-20 Dual variable color display device

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Application Number Priority Date Filing Date Title
US06/819,111 US4794383A (en) 1986-01-15 1986-01-15 Variable color digital multimeter

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US19732288A Division 1986-01-15 1988-05-23

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US4794383A true US4794383A (en) 1988-12-27

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US (1) US4794383A (enrdf_load_stackoverflow)
CA (3) CA1257334A (enrdf_load_stackoverflow)
IN (1) IN169382B (enrdf_load_stackoverflow)

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CA1257334A (en) 1989-07-11

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