US3986006A - Fuel injection controlling system for an internal combustion engine - Google Patents

Fuel injection controlling system for an internal combustion engine Download PDF

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US3986006A
US3986006A US05/563,445 US56344575A US3986006A US 3986006 A US3986006 A US 3986006A US 56344575 A US56344575 A US 56344575A US 3986006 A US3986006 A US 3986006A
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circuit
output
generating
adder
sensing means
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Hisasi Kawai
Ritsu Katsuoka
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Soken Inc
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Nippon Soken Inc
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    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02DCONTROLLING COMBUSTION ENGINES
    • F02D41/00Electrical control of supply of combustible mixture or its constituents
    • F02D41/02Circuit arrangements for generating control signals
    • F02D41/18Circuit arrangements for generating control signals by measuring intake air flow
    • F02D41/182Circuit arrangements for generating control signals by measuring intake air flow for the control of a fuel injection device
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F02COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
    • F02DCONTROLLING COMBUSTION ENGINES
    • F02D41/00Electrical control of supply of combustible mixture or its constituents
    • F02D41/24Electrical control of supply of combustible mixture or its constituents characterised by the use of digital means

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  • the present invention relates to a fuel injection controlling system for an internal combustion engine which digitally computes the quantity of fuel required by the engine.
  • FIG. 1 is a block diagram showing an embodiment of a fuel injection controlling system according to the present invention.
  • FIGS. 2A, 2B and 2C are characteristic diagrams of the air flow sensor used in the embodiment of FIG. 1.
  • FIGS. 3A and 3B are respectively a schematic diagram of the angular position sensor used in the embodiment of FIG. 1 and its output signal waveform diagram.
  • FIGS. 4A, 4B and 4C are respectively a circuit diagram of the reshaping circuit used in the embodiment of FIG. 1 and its output signal waveform diagrams.
  • FIGS. 5A and 5B are respectively a circuit diagram of the frequency dividing circuit used in the embodiment of FIG. 1 and its output signal waveform diagram.
  • FIGS. 6A and 6B are respectively a circuit diagram of the D-A converter circuit used in the embodiment of FIG. 1 and its output signal waveform diagram.
  • FIGS. 7A and 7B are respectively a circuit diagram of the comparison circuit used in the embodiment of FIG. 1 and its output signal waveform diagram.
  • FIG. 8 is a circuit diagram of the first adder circuit used in the embodiment of FIG. 1.
  • FIGS. 9A and 9B are respectively a circuit diagram of the first multiplier circuit used in the embodiment of FIG. 1 and its output signal waveform diagram.
  • FIG. 10 is a circuit diagram of the correction circuit used in the embodiment of FIG. 1.
  • FIG. 11 is a circuit diagram of the conversion circuit used in the embodiment of FIG. 1.
  • numeral 1 designates an air flow sensor provided in the intake manifold of a four-cylinder, four-cycle internal combustion engine (not shown) and adapted for generating a voltage proportional to the rate of air flow to the engine which is one of the principal parameters
  • 2 an angular position sensor for generating one pulse signal for every one-half rotation of the crankshaft at predetermined angular positions
  • 3 a reshaping circuit for reshaping the waveform of the output pulse signals of the angular position sensor 2
  • 4 a revolution sensor for generating pulse signals having a frequency proportional to the rotational speed N of the engine which is one of the principal engine parameters
  • 5 a frequency dividing circuit for dividing the frequency of the pulse signals from the revolution sensor 4 and generating pulse signals having a time width inversely proportional to the rotational speed N
  • 6 an oscillator circuit for generating clock pulses having a predetermined frequency
  • 7 a D-A converter circuit
  • the pulse signal has a time width proportional to the rate of air flow per one-half rotation of the crankshaft
  • numeral 9 designates a first adder circuit for performing the operation of binary addition on a constant 1.00 and the auxiliary engine parameters, i.e., the extra fuel quantities such as a starting extra quantity ⁇ S, an idling extra quantity ⁇ I, a full throttle extra quantity ⁇ F and a low temperature extra quantity ⁇ T and generating a binary coded output corresponding to (1.00 + ⁇ S + ⁇ I + ⁇ F + ⁇ T), 10 a first multiplier circuit for performing the operation of binary multiplication on the output value of the adder circuit 9 and the output value of the comparison circuit 8 and generating a binary coded output, 11 a second multiplier circuit for performing the operation of binary multiplication on the output value of the first multiplier circuit 10 and the output value of the frequency dividing circuit 5 and generating a binary coded output, 12 a compensation circuit for generating a binary coded output corresponding to a change ⁇
  • the engine is a four-cylinder, four-cycle engine and the firing order for the cylinder is the first, third, fourth and second cylinders.
  • the clock pulses generated from the oscillator circuit 6 during the time period between the pulses generated from the reshaping circuit 3 at intervals of one-half crankshaft rotation are converted by the D-A converter circuit 7 to a sawtooth-wave voltage corresponding to the number of clock pulses generated during the one-half crankshaft rotation.
  • the sawtooth-wave voltage generated from the D-A converter circuit 7 and the voltage generated from the air flow sensor 1 are compared in the comparison circuit 8 thus generating a pulse signal during the period that the output voltage of the air flow sensor 1 is higher than the voltage at the rise portion of the sawtooth-wave output of the D-A converter circuit 7. Therefore, the pulse signal has a time width T Q proportional to the air flow rate Q. Therefore, the time width T Q is represented by K.Q, where K 1 is a constant.
  • the first adder circuit 9 performs the operation of binary addition on the auxiliary engine parameters, i.e., the extra quantities ⁇ S, ⁇ I, ⁇ F and ⁇ T and a constant 1.00, and the operation of binary multiplication is performed by the first multiplier circuit 10 on the binary coded sum of the first adder circuit 9 and the pulse signal generated from the comparison circuit 8 thus generating a binary coded output.
  • the output is represented by K 1 .K.sub. 2.Q(1.00 + ⁇ S + ⁇ I + ⁇ F + ⁇ T), where K 2 is a constant.
  • the output of the first adder circuit 9 is added as many times as the number of clock pulses generated from the oscillator circuit 6 during the time width of the pulse signal from the comparison circuit 8 thus generating the binary coded output K 1 .K 2 .Q(1.00 + ⁇ S + ⁇ I + ⁇ F + ⁇ T).
  • the frequency dividing circuit 5 generates the pulse signal the time width T N of which is inversely proportional to the engine rotational speed N and is represented by K 3 /N, where K 3 is a constant.
  • the second multiplier circuit 11 By adding the output of the first multiplier circuit 10 as many times as the number of clock pulses generated from the oscillator circuit 6 during the time width of the output pulse signal of the frequency dividing circuit 5 the second multiplier circuit 11 generates a binary coded output K 1 .K 2 .K 3 .K 4 .Q(1.00 + ⁇ S + ⁇ I + ⁇ F + ⁇ T)/N, where K 4 is a constant.
  • the output of the second multiplier circuit 11 represents the compensated fuel quantity per cylinder per cycle.
  • the change ⁇ E of the voltage applied to the fuel injection valves 16 is converted to a binary code form by the compensation circuit 12 and it is then added to the output of the second multiplier circuit 11 in the second adder circuit 13 by the process of binary addition.
  • the resulting binary coded output ##EQU2## is converted in the conversion circuit 14 to a pulse signal having a time width TQN corresponding to the binary coded output in synchronism with each of the crankshaft angular positions under the control of the reshaping circuit 3.
  • the time width T QN is represented by K 5 ⁇ K 1 .K 2 .K 3 .K 4 .Q(1.00 + ⁇ S + ⁇ I + ⁇ F + ⁇ T)/N + ⁇ E ⁇ , where K 5 is a constant.
  • the air flow sensor 1 is of the known baffle plate type, and the value of the rotational angle ⁇ of the baffle plate varies nonlinearly with respect to the air flow rate Q as shown in FIG. 2A. Consequently, the potentiometer of the air flow sensor 1 is designed to show the nonlinear characteristic shown in FIG. 2B with respect to the rotational angle ⁇ of the baffle plate so that the output voltage of the air flow sensor 1 is directly proportional to the rate of air flow to the engine as shown in FIG. 2C.
  • the angular position sensor 2 comprises, as shown in FIG. 3A, a disk 202 made of a non-magnetic material and mounted on a rotor shaft 201 of a distributor (not shown) and a permanent magnet 203 attached to a portion of the disk 202.
  • four wound cores 204, 205, 206 and 207 are arranged along the outer periphery of the disk 202 at equal intervals and in the same plane, so that when the permanent magnet 203 passes the respective wound cores in accordance with the rotation of the rotor shaft 201 which rotates once for every two complete rotations of the crankshaft, the magnetic field in the respective wound cores changes so that the voltages shown by the waveforms (a), (b), (c) and (d) of FIG. 3B are induced at one ends 2041, 2051, 2061 and 2071 of the coils of the respective cores which are grounded at the other ends thereof.
  • times t 1 , t 2 , t 3 , t 4 and t 5 at which this voltage is induced are selected to coincide with the fuel injection starting times of the engine.
  • the reshaping circuit 3 comprises logical delay circuits 301, 302, 303 and 304 of the same construction and an OR gate 305.
  • numeral 3013 designates a comparator which also performs the function of DC amplification (such as the Motorola IC 3302P)
  • 3014 a buffer circuit having its input connected to the output of the comparator 3013 and its output connected to one end of a resistor 3015.
  • the other end of the resistor 3015 is connected to one end of a capacitor 3016 and to the input of an inverter 3017.
  • the other end of the capacitor 3016 is grounded.
  • the waveform (b 1 ) is the pulse signal generated from the angular position sensor 2 and the application of this pulse signal to an input 3011 of the comparator 3013 results in the signals shown by the waveforms (b 2 ), (b 3 ), (b 4 ) and (b 5 ) of FIG.
  • the other logical delay circuit 302, 303 and 304 operate in a similar manner so that when the pulse signals (a), (b), (c) and (d) shown in FIG. 3A are applied respectively to the input terminals 3011, 3021, 3031 and 3041, the pulse signals shown by the waveforms (a'), (b'), (c') and (d') of FIG. 4C are respectively generated at output terminals 3012, 3022, 3032 and 3042.
  • the four-input OR gate 305 connected to the output terminals 3012, 3022, 3032 and 3042 generates the pulse signals shown by the waveform (e) of FIG. 4C.
  • the revolution sensor 4 is not shown in any detail, it is of the known type in which the electromagnetic pickup generates pulses in accordance with the rotation of the ring gear of the engine. Assuming that the number of teeth in the ring gear is 115 and the rotational speed of the engine is N (rpm), the period T of the pulses generated from the revolution sensor 4 is given by the following equation ##EQU3## In other words, the period T is inversely proportional to the rotational speed N.
  • the frequency dividing circuit 5 comprises, as shown in FIG. 5A, a DC amplifier 501 (such as the Motorola IC MC 3302P) having its input terminal 5011 connected to the revolution sensor 4 which is not shown, a binary counter 502, and an AND gate 503 and an inverter 504.
  • symbol R designates a reset terminal
  • Q 1 , Q 2 , Q 3 and Q 4 designate the output terminals for respectively delivering the rectangular pulses produced by dividing the input frequency by factors 2, 4, 8 and 16, respectively.
  • the pulses having the period T which is inversely proportional to the rotational speed N as mentioned earlier are amplified and reshaped by the DC amplifier 501.
  • the DC amplifier 501 generates at its output terminal 5012 the rectangular pulses shown by the waveform (f) of FIG. 5B, and the rectangular pulses are then frequency-divided by the binary counter 502 which respectively generates at its output terminals Q 1 , Q 2 , Q 3 and Q 4 the pulse signals respectively shown by the waveforms (g), (h), (i) and (j).
  • the AND gate 503 When the output terminals Q 1 and Q 4 go simultaneously to a high level (hereinafter simply referred to as a logical signal 1), the AND gate 503 generates a 1 and the binary counter 502 is reset thus causing all of the output terminals Q 1 , Q 2 , Q 3 and Q 4 to go to a low level (hereinafter simply referred to as a 0).
  • the signal generated at the output terminal Q 4 and inverted by the inverter 504 is generated at its output terminal 5041 as shown by the waveform (k) of FIG. 5B, and its time width T 1 representing the 1 state corresponds to a group of 8 rectangular pulses shown by the waveform (f) of FIG. 5B and is inversely proportional to the engine rotation speed N as given by the following equation ##EQU4##
  • the oscillator circuit 6 Although the construction of the oscillator circuit 6 is not shown, it may for example be a known type of crystal resonator.
  • the oscillator circuit 6 generates clock pulses, the frequency thereof being predetermined in accordance with the air-to-fuel ratio.
  • the D-A converter circuit 7 comprises an 8-bit binary counter 701 and a ladder type resistor network including resistors having a resistance value R 1 or R 2 .
  • the binary counter 701 has its input terminal 7011 connected as a clock terminal to the oscillator circuit 6 and its reset terminal 7012 connected to the output terminal 3051 of the reshaping circuit 3, and numeral 7013 designates the output terminal of the D-A converter circuit 7.
  • the D-A converter circuit 7 is designed so that each time a 1 is generated by the OR gate 305 of the reshaping circuit 3, the binary counter 701 is reset to count the clock pulses generated from the oscillator circuit 6. Consequently, the sawtooth waveform shown in FIG. 6B (m) is generated at the output terminal 7013.
  • the waveform shown in FIG. 6B (e) is the same as the waveform shown in FIG. 4C (e).
  • An inclination ⁇ of the sawtooth waveform shown in FIG. 6B (m) corresponds to the oscillation frequency of the oscillator circuit 6.
  • the comparison circuit 8 comprises, as shown in FIG. 7A, a comparator 801, an R-S flip-flop 802 and a NOR gate 803, and the comparator 801 has its inverting input terminal 8011 connected to the air flow sensor 1 and its noninverting input terminal 8012 to the output terminal 7013 of the D-A converter circuit 7.
  • the R-S flip-flop 802 has its set terminal S connected to the output terminal of the comparator 801 and its reset terminal R connected to one input terminal 8021 of the NOR gate 803 and the output terminal 3051 of the reshaping circuit 3.
  • the other input terminal of the NOR gate 803 is connected to the R-S flip-flop 802. Consequently, when the reshaping circuit 3 generates at its output terminal 3051 the 1 (FIGS.
  • the R-S flip-flop 802 is reset and a 0 is generated at its Q output terminal 8022.
  • the comparator 801 generates the 1 at the output terminal 8013 as shown in FIG. 7B(n) when the output voltage V of the air flow sensor 1 becomes lower than the sawtooth-wave voltage at the output terminal 7013 of the D-A converter circuit 7.
  • the NOR gate 803 receives as its inputs the output of the reshaping circuit 3 and the output of the R-S flip-flop 802 and generates at its output terminal 8031 a signal having a time width T Q proportional to the air flow rate Q and is represented by K 1 .Q, where K 1 is a constant.
  • the first adder circuit 9 comprises, as shown in FIG. 8, parallel binary adders 901, 902, 903 and 904 (such as the RCA IC CD4008) which are connected in cascade.
  • the letters added to the respective adders indicate the binary positions. For example, letter A 6 represents the sixth binary position.
  • a 6 A 5 A 4 A 3 A 2 A 1 constitute a binary code which represents the full throttle extra quantity ⁇ F only when the throttle valve is fully opened
  • B 6 B 5 B 4 B 3 B 2 B 1 constitute a binary code which represents the starting extra quantity ⁇ S only during the starting period of the engine
  • the adder 901 computes ⁇ F + ⁇ S and delivers the resulting sum as a binary code C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 .
  • 4 D 3 D 2 D 1 constitute a binary code which represents the idling extra quantity ⁇ I and it is applied to the inputs of the parallel adder 902 along with the output C 8 C 7 C 6 C 5 C 4 C 3 C 2 C 1 generated from the parallel adder 901 thus delivering the resulting sum (E 8 E 7 E 6 E 5 E 4 E 3 E 2 E 1 ).
  • F 8 F 7 F 6 F 5 F 4 F 3 F 2 F 1 constitute a binary code which always represents the value corresponding to 1.00, and it is applied to the parallel adder 903 along with the output E 8 E 7 E 6 E 5 E 4 E 3 E 2 E 1 generated from the parallel adder 902 so that the resulting sum G 8 G 7 G 6 G 5 G 4 G.sub.
  • H 10 H 9 H 8 H 7 H 6 H 5 H 4 H 3 H 2 H 1 constitute a binary code which represents the low temperature extra quantity ⁇ T and it is applied to the parallel adder 904 along with the output G 8 G 7 G 6 G 5 G 4 G 3 G 2 G 1 generated from the parallel adder 903.
  • the parallel adder 904 in turn generates the resulting sum I 9 I 8 I 7 I 6 I 5 I 4 I 3 I 2 I 1 .
  • the output I 10 I 9 I 8 I 7 I 6 I 5 I 4 I 3 I 2 I 1 from the adder circuit 9 represents the result of the operation of addition A 6 A 5 A 4 A 3 A 2 A 1 + B 6 B 5 B 4 B 3 B 2 B 1 + D 8 D 7 D 6 D 5 D 4 D 3 D 2 D 1 + F 8 F 7 F 6 F 5 F 4 F 3 F 2 F 1 + H 10 H 9 H 8 H 7 H 6 H 5 H 4 H 3 H 2 H 1
  • the output binary code I 10 I 9 I 8 I 7 I 6 I 5 I 4 I 3 I 2 I 1 from the adder circuit 9 represents the result of the operation of binary addition on the full throttle extra quantity ⁇ F, the starting extra quantity ⁇ S, the idling extra quantity ⁇ I, the low temperature extra quantity ⁇ T and the constant 1.00 ( ⁇ F + ⁇ S + ⁇ I + ⁇ T + 1.00).
  • the other extra quantities ⁇ S and ⁇ I may be determined in a like manner as the full throttle extra quantity ⁇ F, and the value of the low temperature extra quantity ⁇ T is increased as the temperature of the engine cooling water decreases although no detailed arrangement for this purpose is illustrated.
  • FIG. 9A The circuit construction of the first multiplier circuit 10 is shown in FIG. 9A, in which numeral 101 designates an adder (such as the RCA IC CD4008) for adding two 18-bit inputs together and generating an 8-bit output, and the adder 101 is connected to the inputs of a memory (such as the RCA IC CD4035) whose outputs L's are connected to one inputs J's of the adder 101, and the other inputs I's of the adder 101 are connected to the outputs of the adder circuit 9.
  • the adder circuit 9 generates a 10-bit output and therefore the eleventh to eighteenth inputs I's of the adder 101 are 0 inputs although they are not shown.
  • the first multiplier circuit 10 further comprises, in addition to the adder 101 and the memory 102, an AND gate 103, a decade divider and counter 104 (such as the RCA IC CD4017) for controlling the operation of multiplication and to a memory 105 (such as the RCA IC CD4042) for storing the result of an operation.
  • the output terminal 8031 of the comparison circuit 8 is connected to one gate input 1031 of the two inputs of the AND gate 103 and the oscillator circuit 6 is connected to the other gate input 1032.
  • the output terminal of the AND gate 103 is connected to a clock input terminal 1021 of the memory 102, and the decade divider and counter 104 has its clock input terminal 1041 connected to the input terminal 1032 of the AND gate 103 and its reset input terminal R connected to the input terminal 1031.
  • the decade divider and counter 104 generates a 1 at each of its output terminals 1042, 1043 and 1044 in response to the application thereto of the second clock pulse, the fourth clock pulse and the sixth clock pulse, respectively.
  • the output terminal 1042 of the decade divider and counter 104 is connected to the clock input terminal of the memory 105, the output terminal 1043 is connected to the reset terminal of the memory 102 and the output terminal 1044 is connected to the clock inhibit input terminal (CE) of the decade divider and counter 104.
  • the memory 105 has its inputs M 10 , M 9 , M 8 , M 7 , M 6 , M 5 , M 4 , M 3 , M 2 and M 1 respectively connected to the ten higher order outputs L 18 , L 17 , L 16 , L 15 , L 14 , L 13 , L 12 , L 11 , L 10 and L 9 of the outputs L.sub. 18 through L 1 of the memory 102, and the memory 105 generates its output as R 10 R 9 R 8 R 7 R 6 R 5 R 4 R 3 R 2 R 1 .
  • T Q of the output of the comparison circuit 8 which is proportional to the air flow rate and which is shown in FIG. 9B(p) (the same as FIG.
  • the clock pulses from the oscillator circuit 6 are delivered to the output terminal of the AND gate 103.
  • n clock pulses corresponding to the air flow rate are generated.
  • the clock pulses from the oscillator circuit 6 are counted by the decade divider and counter 104 so that a 1 is generated at each of the output terminals 1042, 1043 and 1044 in response to the counting of the second, fourth and sixth clock pulses, respectively, as shown in FIGS. 9B(r), 9B(s) and 9B(u).
  • the 1 shown in FIG. 9B(s) resets the memory 102 thus clearing its outputs L 18 , L 17 .
  • the memory 102 generates an output I 10 . . . I 1 in response to the application of the first one of the clock pulses shown in FIG. 9B(q), and the memory 102 generates an output 2 ⁇ I 10 . . . I 1 in response to the application of the second clock pulse. Consequently, the application of n clock pulses to the memory 102 causes it to generate an output whose value is n ⁇ I 10 . . . I 1 .
  • the number n of the clock pulse is proportional to the value K 1 .Q, and therefore it can be represented by K 1 .K 2 .Q(K 2 : a constant).
  • the output I 10 . . . I 1 represents the value (1.00 + ⁇ S + ⁇ F + ⁇ I + ⁇ T), this means that a multiplication K.Q(1.00 + ⁇ S + ⁇ F + ⁇ I + ⁇ T) has been performed.
  • the higher ten digits of the resulting binary coded product are stored in the memory 105 in response to the 1 shown in FIG. 9B(r).
  • the value (1.00 + ⁇ S + ⁇ F + ⁇ I + ⁇ T) involves 10 digits in binary form and the value K 1 .K 2 .Q similarly involves eight digits in binary form
  • the use of the 10 digits in the output of the first multiplier circuit 10 results in the same error rate for both the input and the output in consideration of the number of significant digits. Consequently, the memory 105 stores the higher 10 digits in the output of the memory 102.
  • the second multiplier circuit 11 is identical in circuit construction with the first multiplier circuit 10 described with reference to FIG. 9A except that the number of digital positions in the input and output are increased and therefore its circuit construction is not shown.
  • R 1 of the first multiplier circuit 10 is applied to the second multiplier circuit 11 as its input.
  • the pulse (FIG. 5B(k)) generated at the output terminal 5041 of the frequency dividing circuit 5 and having the time width inversely proportional to the engine revolutions is applied to the second multiplier circuit 11 which in turn generates a 10-bit binary code X 10 . . . X 1 corresponding to ##EQU5## where K 4 is a constant.
  • K 4 is introduced in the same manner as the constant K 2 in the first multiplier circuit 10.
  • the compensation circuit 12 is designed so that compensation is made for changes in the voltage applied to the electromagnetic coil of the fuel injection valves.
  • the circuit construction of the compensation circuit 12 is illustrated in FIG. 10.
  • numeral 1250 designates a Zener diode whose anode is grounded through a resistor 1251 and an input terminal 1254 (the cathode side) is connected to the positive side of the electromagnetic coil of the fuel injection valves which are not shown.
  • Numeral 1252 designates a variable resistor whose one end is grounded. The variable terminal of the variable resistor 1252 is connected to the input terminal of a conventional A-D converter 1253.
  • Numeral 1255 designates the output terminal of the A-D converter 1253.
  • the Zener voltage is selected 10 volts.
  • the voltage at the anode of the Zener diode 1250 increases in accordance with the applied voltage.
  • the applied voltage is 10 volts the anode of the Zener diode 1250 is 0 volt, whereas when the former is 11 volts and 16 volts, respectively, the latter is 1 volt and 6 volts, respectively.
  • the variable resistor 1252 adjusts the voltage range of 0 to 6 volts to a gradient of 0 to 1 volt, 0 to 3 volts or the like, and the A-D converter 1253 converts the voltage at the variable terminal of the variable resistor 1252 into a binary code by the process of analog-to-digital conversion.
  • the second adder circuit 13 adds in parallel the binary coded output X 10 X 9 . . . X 1 of the second multiplier circuit 11 and the binary coded output of the compensation circuit 12, and it will not be described in any detail since the required function can be performed with a single parallel adder of a known type (such as the RCA IC CD4008).
  • the output of the second adder circuit 13 is assumed Y 10 Y 9 . . . Y 1 .
  • the conversion circuit 14 comprises first, second, third and fourth conversion circuits 141, 142, 143 and 144.
  • the first conversion circuit 141 comprises a 10-bit binary counter 1423, EXCLUSIVE OR gates 1424, 1425, 1426, 1427, 1428, 1429, 1430, 1431, 1432 and 1433, a 10-input NOR gate 1434 and an R-S flip-flop 1435.
  • the binary counter 1423 has its clock input terminal 1411 connected to the oscillator circuit 6 and its reset terminal 1412 connected to the output terminal 3012 of the reshaping circuit 3.
  • the respective output terminals of the counter 1423 are connected to one input terminals of the associated EXCLUSIVE OR gates, and the other input terminals of the EXCLUSIVE OR gates are respectively connected to the outputs Y 10 . . . Y 1 of the second adder circuit 13.
  • the outputs of the EXCLUSIVE OR gates are connected to the input terminals of the 10-input NOR gate 1434.
  • the output terminal of the NOR gate 1434 is connected to the set terminal of the R-S flip-flop 1435.
  • the reset terminal of the R-S flip-flop 1435 is connected to the reset terminal 1412 of the binary counter 1423.
  • Numeral 1436 designates an output terminal. In operation, the pulse shown in FIG. 4C(e) is applied to the reset terminal 1412 thus resetting the binary counter 1423 and the R-S flip-flop 1435.
  • the binary counter 1423 starts to count the clock pulses of the predetermined frequency which are generated from the oscillator circuit 6, so that when all the outputs of the counter 1423 coincide with the inputs Y 10 . . . Y 1 (the output of the adder circuit 13), the NOR gate 1434 generates a 1 thus setting the R-S flip-flop 1435 and causing the output terminal 1436 to go from 1 to 0.
  • the time interval between the resetting and setting of the R-S flip-flop 1435 that is, the time duration during which the 1 remains or at the output terminal 1436 is proportional to the input Y 10 . . .
  • the converted time width T QN can be represented by K 5 ⁇ K 1 .K 2 .K 3 .K 4 .Q(1.00 + ⁇ S + ⁇ F + ⁇ I + ⁇ T) + ⁇ E ⁇ , where K 5 is a constant.
  • the second third and fourth conversion circuit 142, 143 and 144 are identical in circuit construction and function with the first conversion circuit 141, input terminals 1440, 1450 and 1460 which are respectively connected to the binary counter and the R-S flip-flop of the second, third and for fourth conversion circuits 142, 143 and 144 are respectively connected to the output terminals 3042, 3022 and 3032 of the reshaping circuit 3.
  • the pulse signals are generated in synchronism with the angular positions of the crankshaft in the sequence of the first, third, fourth and second conversion circuits 141, 143, 144 and 142.
  • the power amplifier circuit 15 is also of a known type. Though the circuit construction of the power amplifier circuit 15 is not shown, it may for example be designed so that when a 1 is generated at each of the output terminals 1436, 1446, 1456 and 1466 of the conversion circuit 14, a transistor is rendered conductive to energize the excitation coil of the fuel injection valve 16 mounted on each cylinder. It is a matter of course that the fuel injection valves 16 provided for the first, second, third and fourth cylinders of the engine are respectively associated with the first, second, third and fourth conversion circuits 141, 142, 143 and 144, and the proper amount of fuel determined in the manner described so far is injected into the engine in the sequence of the first, third, fourth and second cylinders.
  • the constant K can represent the air-to-fuel ratio of the mixture by appropriately determining the oscillation frequency of the oscillator circuit 6, because the constants K 1 , K 2 , K 4 and K 5 depend on the oscillation frequency.
  • the number of operations in the multiplier circuit 11 is increased as compared with that of the multiplier circuit 10 so as to cause the fuel injection quantity to accurately follow the variation in the engine revolutions
  • the number of teeth in the ring gear constituting the revolution sensor 4 may be selected to ensure a 1 : 1 ratio in the number of operations between the multiplier circuits 10 and 11.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Combustion & Propulsion (AREA)
  • Mechanical Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Electrical Control Of Air Or Fuel Supplied To Internal-Combustion Engine (AREA)
  • Combined Controls Of Internal Combustion Engines (AREA)
US05/563,445 1974-06-05 1975-03-31 Fuel injection controlling system for an internal combustion engine Expired - Lifetime US3986006A (en)

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JP49064454A JPS5228175B2 (enrdf_load_stackoverflow) 1974-06-05 1974-06-05
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DE (1) DE2516353C3 (enrdf_load_stackoverflow)

Cited By (14)

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DE2816886A1 (de) * 1977-04-20 1978-10-26 Bendix Corp Impulszeit-additionsschaltung, insbesondere fuer das brennstoffeinspritzsystem einer brennkraftmaschine
US4160429A (en) * 1976-08-08 1979-07-10 Nippon Soken, Inc. Electronically controlled fuel injection system for internal combustion engines
US4167923A (en) * 1976-09-06 1979-09-18 Nippon Soken, Inc. Electronic ignition timing control system for internal combustion engines
US4188922A (en) * 1976-11-16 1980-02-19 Toyota Jidosha Kogyo Kabushiki Kaisha Digital control device for a fuel injection system of an internal combustion engine
FR2436881A1 (fr) * 1978-09-20 1980-04-18 Bosch Gmbh Robert Installation pour determiner un signal de dosage du carburant pour un moteur a combustion interne a partir des caracteristiques de fonctionnement de ce moteur
US4199812A (en) * 1975-11-18 1980-04-22 Robert Bosch Gmbh Apparatus for determining the duration of fuel injection control pulses
US4205377A (en) * 1977-04-22 1980-05-27 Hitachi, Ltd. Control system for internal combustion engine
US4209829A (en) * 1977-03-15 1980-06-24 Regie Nationale Des Usines Renault Digital controller for fuel injection with microcomputer
US4232368A (en) * 1977-09-16 1980-11-04 Lucas Industries Limited Internal combustion engine function control system
EP0026643A3 (en) * 1979-09-27 1982-01-27 Ford Motor Company Limited Fuel metering system for an internal combustion engine
US4357662A (en) * 1978-05-08 1982-11-02 The Bendix Corporation Closed loop timing and fuel distribution controls
US4375668A (en) * 1978-05-08 1983-03-01 The Bendix Corporation Timing optimization control
US4379332A (en) * 1978-09-25 1983-04-05 The Bendix Corporation Electronic fuel injection control system for an internal combustion engine
FR2582731A1 (fr) * 1985-06-04 1986-12-05 Bosch Gmbh Robert Procede et dispositif pour l'enrichissement d'acceleration dans le cas d'un dispositif commande electriquement d'alimentation en carburant, notamment d'une installation d'injection de carburant pour moteurs a combustion interne

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JPS53141828A (en) * 1977-05-17 1978-12-11 Nippon Denso Co Ltd Fuel feeding method and its apparatus for internal combustion engine
JPS55125334A (en) * 1979-03-19 1980-09-27 Nissan Motor Co Ltd Fuel controller
JPS58180734A (ja) * 1982-04-15 1983-10-22 Honda Motor Co Ltd 内燃エンジンの燃料供給制御方法
JPS5928037A (ja) * 1982-08-09 1984-02-14 Toyota Motor Corp 内燃機関の電子制御燃料噴射方法
US5881509A (en) * 1995-11-23 1999-03-16 Inafuku Construction Co., Ltd. Spiral staircase and connecting metals for spiral staircase

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US3727591A (en) * 1969-10-24 1973-04-17 Hitachi Ltd Fuel supply control system for internal combustion engines
US3817225A (en) * 1971-03-10 1974-06-18 J Priegel Electronic carburetion system for low exhaust emmissions of internal combustion engines
US3835820A (en) * 1971-06-17 1974-09-17 Nippon Denso Co Fuel injection system for internal combustion engine
US3884195A (en) * 1969-01-31 1975-05-20 Electronique Informatique Soc Electronic control system for internal combustion engine

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US3884195A (en) * 1969-01-31 1975-05-20 Electronique Informatique Soc Electronic control system for internal combustion engine
US3727591A (en) * 1969-10-24 1973-04-17 Hitachi Ltd Fuel supply control system for internal combustion engines
US3817225A (en) * 1971-03-10 1974-06-18 J Priegel Electronic carburetion system for low exhaust emmissions of internal combustion engines
US3835820A (en) * 1971-06-17 1974-09-17 Nippon Denso Co Fuel injection system for internal combustion engine

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199812A (en) * 1975-11-18 1980-04-22 Robert Bosch Gmbh Apparatus for determining the duration of fuel injection control pulses
US4160429A (en) * 1976-08-08 1979-07-10 Nippon Soken, Inc. Electronically controlled fuel injection system for internal combustion engines
US4167923A (en) * 1976-09-06 1979-09-18 Nippon Soken, Inc. Electronic ignition timing control system for internal combustion engines
US4188922A (en) * 1976-11-16 1980-02-19 Toyota Jidosha Kogyo Kabushiki Kaisha Digital control device for a fuel injection system of an internal combustion engine
US4209829A (en) * 1977-03-15 1980-06-24 Regie Nationale Des Usines Renault Digital controller for fuel injection with microcomputer
DE2816886A1 (de) * 1977-04-20 1978-10-26 Bendix Corp Impulszeit-additionsschaltung, insbesondere fuer das brennstoffeinspritzsystem einer brennkraftmaschine
USRE31906E (en) * 1977-04-22 1985-06-04 Hitachi, Ltd. Control system for internal combustion engine
US4205377A (en) * 1977-04-22 1980-05-27 Hitachi, Ltd. Control system for internal combustion engine
US4232368A (en) * 1977-09-16 1980-11-04 Lucas Industries Limited Internal combustion engine function control system
US4375668A (en) * 1978-05-08 1983-03-01 The Bendix Corporation Timing optimization control
US4357662A (en) * 1978-05-08 1982-11-02 The Bendix Corporation Closed loop timing and fuel distribution controls
US4275695A (en) * 1978-09-20 1981-06-30 Robert Bosch Gmbh Device for determining a fuel metering signal for an internal combustion engine
FR2436881A1 (fr) * 1978-09-20 1980-04-18 Bosch Gmbh Robert Installation pour determiner un signal de dosage du carburant pour un moteur a combustion interne a partir des caracteristiques de fonctionnement de ce moteur
US4379332A (en) * 1978-09-25 1983-04-05 The Bendix Corporation Electronic fuel injection control system for an internal combustion engine
EP0026643A3 (en) * 1979-09-27 1982-01-27 Ford Motor Company Limited Fuel metering system for an internal combustion engine
FR2582731A1 (fr) * 1985-06-04 1986-12-05 Bosch Gmbh Robert Procede et dispositif pour l'enrichissement d'acceleration dans le cas d'un dispositif commande electriquement d'alimentation en carburant, notamment d'une installation d'injection de carburant pour moteurs a combustion interne

Also Published As

Publication number Publication date
DE2516353C3 (de) 1980-01-10
DE2516353A1 (de) 1975-12-18
DE2516353B2 (enrdf_load_stackoverflow) 1979-05-17
JPS50154623A (enrdf_load_stackoverflow) 1975-12-12
JPS5228175B2 (enrdf_load_stackoverflow) 1977-07-25

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