US3880307A - Bin address memory system - Google Patents

Bin address memory system Download PDF

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Publication number
US3880307A
US3880307A US336284A US33628473A US3880307A US 3880307 A US3880307 A US 3880307A US 336284 A US336284 A US 336284A US 33628473 A US33628473 A US 33628473A US 3880307 A US3880307 A US 3880307A
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United States
Prior art keywords
bin
signals
location
tote
memory
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Expired - Lifetime
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US336284A
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English (en)
Inventor
Robert H Peterson
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Kenway Engineering Inc
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Kenway Engineering Inc
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Publication date
Application filed by Kenway Engineering Inc filed Critical Kenway Engineering Inc
Priority to US336284A priority Critical patent/US3880307A/en
Priority to CA192,902A priority patent/CA1011464A/en
Priority to FR7405905A priority patent/FR2219465B1/fr
Priority to GB874674A priority patent/GB1467448A/en
Priority to DE2409410A priority patent/DE2409410A1/de
Priority to JP2369774A priority patent/JPS5740041B2/ja
Priority to IT67533/74A priority patent/IT1016501B/it
Application granted granted Critical
Publication of US3880307A publication Critical patent/US3880307A/en
Priority to CA265,185A priority patent/CA1019457A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q10/00—Administration; Management
    • G06Q10/08—Logistics, e.g. warehousing, loading or distribution; Inventory or stock management

Definitions

  • One set of shift registers, with digital display, is enabled to receive input address data. Thereafter, com- U-S. t A mand and enable functions Cause data from the [51] Int. Cl Glle 7/00; B65g 1/00 play registers to be issued through a Set of execute [58] held of Search 340/1725; 214/1 shift registers to a data transmitter which controls op- 214/11 17 R eration of the stacker crane and, where preservation of an address is needed, as when the tote pan is being [56] References cued delivered to the picking station, to place said data in a UNITED STATES PATENTS predetermined one of a plurality of sets of storage 3.576.978 5/1971 Rosenberg 340/1725 Shift registers, from which the data is likewise, thereaf- 3599156 8/1971 Miller l/l ter. transmitted to the E registers to cause the stacker Primary Eraminer-Garfith D Shaw Assistant Examiner-Paul R. Woods Attorney
  • the present invention relates generally to computercontrolled warehousing systems using stacker cranes and more particularly to a novel bin address memory system for such warehousing systems permitting retrieval of a tote pan from a right or left bin storage location, placement of the tote pan center, right or left at a picking station and restoration of the tote pan to the desired bin location.
  • Prior Art Warehousing systems comprising stacker cranes are used to automatically pick up and deliver tote pans or pallets from bin storage on either side of a warehouse aisle.
  • the address of a desired tote pan storage bin is sent to the stacker from a keyboard or card reader at a picking station, following which the desired tote pan is brought from bin storage and is deposited at the picking station.
  • order-picking personnel remove the required parts, transistors, resistors, nuts, bolts, washers and the like from the pan.
  • the parts are counted or weighed, labeled and packaged for delivery to the customer.
  • the operator uses the keyboard to command the stacker to return the tote pan from the picking station to its proper bin location.
  • the bin address of the tote pan retrieved and placed at the picking station must be re-entered by the operator prior to restoration. This permits human error.
  • photoelectric reflective tape readers are used to. read the bin address from the tote pan as the bin is in the process of being restored in order to prevent loss of the bin address.
  • the present invention comprises a novel bin address memory system for computer-controlled stacker cranes wherein a tote pan from a storage bin on the right or left side of a warehouse aisle may be automatically delivered to the center, left or right location at a picking station. Time is saved and the human error alleviated in addition to which a higher number of order-picking personnel may function efficiently at the picking station at the same point in time.
  • the address of each tote pan at the picking station is electronically preserved, eliminating the need to re-enter the address or to externally read the same and re-introduce the reading into the stacker electronics. Restoration of a tote pan to storage, therefore, requires only that the operator depress a restore button.
  • FIG. is a circuit diagram of the presently preferred computer-controlled warehousing stacker bin address memory system of the present invention.
  • the preferred bin address is a four to six digit number, depending on the size of the warehouse. In situations where a four digit number is used, the thousands and hundreds decimal digits are used to identify the horizontal bin location. Thus, if the thousands and hundreds decimal digit is the stacker crane would be commanded toproceed down the warehouse aisle until it had reached the 35th vertical column of bins on either side of the aisle. The tens and units digits are used to define the vertical bin location. If the units digit is odd, the bin location will be on the left side of the aisle, if even on the right. This number instructs the stacker crane not only as to the side from which retrieval is to be made but the correct vertical elevation of the bin containing the tote pan to be retrieved.
  • Priority encoder E1 is preferably integrated circuit SN74147 manufactured by Texas Instruments (see page 147 of said Texas Instruments text) and serves to convert nine bits of data mally, when the keyboard is inactive, all of the input signals to priority encoder E1 will be high, a state where nothing is occurring. When it is desired to enable the primary encoder E1, the voltage signal EB No.* is
  • the priority encoder El functions such that, with respect to the site designations 1-9 on the interior of E1, the low signal, if only one occurs, or the rightmost low signal, if more 55 than one low signal is presented, constitutes the El input and the collective output at sites A-D at pins 9, 7, 6 and 14 will be the complement of said El input. Consequently, in the state just mentioned when signal EB No.* goes low, the input to priority encoder E1 is It is further to be appreciated that when any input signal to El goes low following receipt of the EB No.* siging the low voltage signal to control the output of priority encoder E1.
  • the letter designation of the input signals to E1 are defined as follows:
  • the bin address may be manually entered into system by a ten-key keyboard or automatically from a card reader or computer.
  • the binary address comprises binary ones and zeros appearing at inputs SDI, SD2, SD4 and In a manner hereinafter 0 be xpl in the into four lines containing the same information.
  • Norindicated input bin address is passed by dual 4 to 1 line multiplexers E2 and E3, upon receipt of clock pulses to a set of display (D) registers El6-El9.
  • multiplexers E2 and E3 each comprises integrated circuit SN74153, manufactured by Texas Instruments and disca d t go l Th other i l as ide tifi d closed on page 302 of the text The TTL Data Book for Design Engineers, copyrighted 1973 by Texas Instruments, lnc.
  • the D registers E16-El9 communicate the binary bin address to a seven segment light emitting diode display, in a well known manner.
  • the keyboard is equipped such that if the wrong address is entered in the display registers, it may be cleared by pressing the proper keyboard button causing the display register reset signal DRR* to go low, clearlhg p y registers following which the a 9 and the output is the complement of binary 9, i.e. rect entry may be made by the operator.
  • signal 88* is used to send a new bin to warehouse storage for the first time. Specifically, the address in the D register is caused to be shifted to the E register. This function is also used nal, the EB No.* signal returns to its high state, allowto restore bins after a power failure.
  • the card reader or keyboard causes the input signals identified on the drawing to selectively reach the input DBC* Deliver Bin Center DBL* Deliver Bin Left DBR* Deliver Bin Right RCB* Restore Center Bin RLB* Restore Left Bin RRB* Restore Right Bin 58* Store Bin EB No.* Enter Bin Number.
  • read only memory E4 is integrated circuit lM5610 manufactured by lntersil, Inc. of 10900 North Tantau Ave., Cupertino, Calif. 95014. See all six pages of the Technical Bulletin entitled lntersil 256 BITOLAR READ ONLY MEMORY lM 5,600 IM 5,610.
  • the ROM E4 is preset (electrically programmed) in its condition to create as an output any of the ones centrally listed in Truth Table 1, when the adjacent corresponding input to E4 exists, as shown on the left thereof in Table 1.
  • the O3 high signal is designated DSE (display shift enable) because it conditions display (D) registers El6-El9 to receive the bin address earlier keyed to the dual 4 to 1 line multiplexers E2 and the E3.
  • DSE display shift enable
  • the low state of E4 terminals Q1 and O2 (signals RTA and RTB), which connect to terminals A and B, respectively, of E2 and E3 together form a zero state causing the inputs at the two zero terminals to be gated to output terminals lY and 2Y.
  • This circuit is of such a nature that when the input signals RTA and RTB at terminals A and B are both binary zeros, the lY and 2Y outputs are connected to the input terminals; when RTA and RTB are a binary one and zero, respectively, the gates within integrated circuit E2 and E3 connect the lY and ZY outputs to the 1 input terminal; when signals RTA and RTB are zero and one, respectively, outputs lY and 2Y are connected to the 2 input terminals; and when the RTA and RTB signals are both binary ones, the 3 input terminals are gated to the lY and 2Y output terminals.
  • each display register E16-E19 A clock signal 4SC is input to terminal 8 of each display register El6-El9 causing the binary bin address to enter at lo- 60 cation one and shift from left to right to the fourth location. This binary number once placed in the display register is visually displayed on a 7 segment LED display.
  • clock signals 4DC and 45C are preferably pulses derived from a suitable clock issuing 4 pulses per operation.
  • the left column will receive and store only a binary l, the second column from the left a binary 2, the third a binary 4 and the fourth a binary 8.
  • the manner in which the priority encoder E1, the read only memory E4, the multiplexers E2 and E3 and the registers in sets E8- Ell, E12-El5, El6-E19 and E20-E23 function for each input at priority encoder E1 should be apparent. Selecting, for purposes of example only, a situation where the keyboard operator depresses the deliver right bin" key causing the DBR* signal to go low, the priority encoder E1 would output the complement of 4, i.e., a binary 11. Read only memory E4 would then have high outputs at sites Q2, Q4, Q7 and Q8, the other outputs being low.
  • the O1 and Q2 outputs (RTA and RTB, respectively) being low and high, respectively, condition multiplexers E2 and E3 such that the 1 input terminals are respectively gated to lY and 2Y output terminals.
  • the high signal from O4 (ECE) enables AND gate E7, while the high voltage signal from O7 (RCE) enables AND gate E6.
  • the high signal from O4 (ECE) is also delivered to each of the execute (E) registers E20-E23 at the 2 input terminal thereby enabling those registers.
  • the positive voltage signal (RSE) from terminal O8 is delivered to the 2 terminal of each of the right (R) registers E12-E15 to enable the same.
  • AND gates E6 and E7 pass the four clock pulses to the 8 input of R registers E12-E15 causing the bin address previously in the D registers El6-El9 to be placed in the left position and sequentially shifted to the right position in the register.
  • the identified bin address previously stored in the D registers E16- E19 is also placed in the left location and shifted to the right location in E registers E20-E23 and parallel output by a data transmitter to the stacker crane.
  • the tote pan the address of which is transmitted, is caused to be retrieved by the stacker crane, brought to the picking station and shifted to the right at that station 55 for removal of desired merchandise.
  • the EB No.* signal be retained high when a tote pan is delivered by the stacker crane to the center position of the picking station following delivery of the DB signal to the priority encoder El. This disables the priority encoder, making it impossible for the operator to effectively signal for delivery of an additional tote pan. Otherwise, a plurality of tote pans may be delivered and situated in left, right and, lastly, center positions, the electrical system illustrated in the drawing accommodating storage and retrieval of the address of the left tote pan in the L registers, the address of the right tote pan in the R registers and the address of the center tote pan in the D and E registers.
  • a method of controlling an automated warehousing system comprising a stacker crane, storage bins and tote pans, the steps of:
  • tote pan retrieve command signals from control means to said first memory causing the bin address data to be fed back and gated through said gating means to both a storage memory and through an additional third memory to a data transmitter which controls the stacker crane to retrieve the desired tote pan and locate the same at a picking station.
  • a method of controlling an automated warehouse system comprising a stacker crane, storage bins, tote pans and a plurality of memory means, comprising the steps of:

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  • Business, Economics & Management (AREA)
  • Engineering & Computer Science (AREA)
  • Economics (AREA)
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  • Entrepreneurship & Innovation (AREA)
  • Human Resources & Organizations (AREA)
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US336284A 1973-02-27 1973-02-27 Bin address memory system Expired - Lifetime US3880307A (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
US336284A US3880307A (en) 1973-02-27 1973-02-27 Bin address memory system
CA192,902A CA1011464A (en) 1973-02-27 1974-02-19 Bin address memory system
FR7405905A FR2219465B1 (ja) 1973-02-27 1974-02-21
GB874674A GB1467448A (en) 1973-02-27 1974-02-26 Control of automated warehouse systems
DE2409410A DE2409410A1 (de) 1973-02-27 1974-02-27 Verfahren und elektrische steuerschaltung zum steuern einer einrichtung zum selbsttaetigen aus- und einlagern von behaeltern aus regalfaechern
JP2369774A JPS5740041B2 (ja) 1973-02-27 1974-02-27
IT67533/74A IT1016501B (it) 1973-02-27 1974-03-06 Procedimento e sistema di memoria per l esercizio di un magazzino sotto controllo di un calcolatore
CA265,185A CA1019457A (en) 1973-02-27 1976-11-09 Bin address memory system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US336284A US3880307A (en) 1973-02-27 1973-02-27 Bin address memory system

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US3880307A true US3880307A (en) 1975-04-29

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US336284A Expired - Lifetime US3880307A (en) 1973-02-27 1973-02-27 Bin address memory system

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US (1) US3880307A (ja)
JP (1) JPS5740041B2 (ja)
CA (1) CA1011464A (ja)
DE (1) DE2409410A1 (ja)
FR (1) FR2219465B1 (ja)
GB (1) GB1467448A (ja)
IT (1) IT1016501B (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4415975A (en) * 1980-12-31 1983-11-15 Mid-West Conveyor Company, Inc. Apparatus and method for rough positioning a vehicle at a storage bin in an automatic storage and retrieval system
US5174454A (en) * 1991-11-15 1992-12-29 Parkander Gothe A K Method for sorting form stacks in storage systems and a device for carrying out the method
US20070135961A1 (en) * 2004-09-03 2007-06-14 Murata Kikai Kabushiki Kaisha Automated warehouse system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5324364U (ja) * 1976-08-06 1978-03-01

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3576978A (en) * 1968-05-13 1971-05-04 Ibm System for accomodating various machine tool resolutions from a standard program
US3599156A (en) * 1968-02-06 1971-08-10 Schlumberger Technology Corp Methods and apparatus for transmitting data between remote locations

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1091858A (en) * 1965-07-24 1967-11-22 Ferranti Ltd Improvements relating to storage systems
US3677420A (en) * 1965-10-20 1972-07-18 Cutler Hammer Inc Storage and retrieval system with a motor current sensing to detect obstructions
US3537602A (en) * 1965-10-20 1970-11-03 Cutler Hammer Inc Automatic storage and retrieval system
JPS4527372Y1 (ja) * 1967-02-15 1970-10-23
US3646890A (en) * 1969-11-28 1972-03-07 Clark Equipment Co Means for controlling automatically moved vehicle

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3599156A (en) * 1968-02-06 1971-08-10 Schlumberger Technology Corp Methods and apparatus for transmitting data between remote locations
US3576978A (en) * 1968-05-13 1971-05-04 Ibm System for accomodating various machine tool resolutions from a standard program

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4415975A (en) * 1980-12-31 1983-11-15 Mid-West Conveyor Company, Inc. Apparatus and method for rough positioning a vehicle at a storage bin in an automatic storage and retrieval system
US5174454A (en) * 1991-11-15 1992-12-29 Parkander Gothe A K Method for sorting form stacks in storage systems and a device for carrying out the method
US20070135961A1 (en) * 2004-09-03 2007-06-14 Murata Kikai Kabushiki Kaisha Automated warehouse system

Also Published As

Publication number Publication date
IT1016501B (it) 1977-06-20
JPS5024984A (ja) 1975-03-17
FR2219465B1 (ja) 1979-05-25
DE2409410A1 (de) 1974-08-29
CA1011464A (en) 1977-05-31
GB1467448A (en) 1977-03-16
JPS5740041B2 (ja) 1982-08-25
FR2219465A1 (ja) 1974-09-20

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