US3792464A

US3792464A - Graphic display device

Info

Publication number: US3792464A
Application number: US00322540A
Authority: US
Inventors: I Yasuda; N Hamada; M Miyanaka
Original assignee: Hitachi Ltd
Current assignee: Hitachi Ltd
Priority date: 1973-01-10
Filing date: 1973-01-10
Publication date: 1974-02-12
Anticipated expiration: 1991-02-12

Abstract

A graphic display device for displaying a desired pattern on the screen of a cathode ray tube utilizing a raster of scanning lines. Means are provided for computing both starting and stopping positions on each scanning line for the desired pattern display in accordance with given information. Based on the results of the computation, a signal is delivered to the cathode ray tube for generating a brightened or unblanked line between the starting and stopping positions to form a display, the start position of each scanning line being determined by the scanning positions of the brightened or unblanked line of the previous scanned line.

Description

United States Patent 91 Hamada et al.

1 Feb. 12, 1974 1 GRAPHIC DISPLAY DEVICE [75] Inventors: Nagaharu Hamada, Hitachi; Motosi Miyanaka, Kumage-gun; Isao Yasuda, Hitachi, all of Japan Related US. Application Data [63] Continuation of Ser. No. 70,663, Sept. 9, 1970,

3,343,030 9/1967 Dragon et al. 340/324 A 3,406,387 10/1968 Werme .'..L 340/324 A 3,471,848 10/1969 Manber... 340/324 A 3,480,943 11/1969 Manber... 340/324 A 3,686,662 8/1972 Blixt 340/324 A Primary ExaminerDonald J. Yusko Assistant ExaminerMarshall M. Curtis Attorney, Agent, or FirmCraig and Antonelli [57] ABSTRACT A graphic display device for displaying a desired pattern on the screen of a cathode ray tube utilizing a raster of scanning lines. Means are provided for computing both starting and stopping positions on each scanning line for the desired pattern display in accordance with given information. Based on the results of the computation, a signal is delivered to the cathode ray tube for generating a brightened or unblanked line between the starting and stopping positions to form a display, the start position of each scanning line being determined by the scanning positions of the brightened or unblanked line of the previous scanned line.

17 Claims, 6 Drawing Figures mmwm 2 yl y Ya W sum 1 or 5 FIG. ab

INVENTORS NAGAHARU HAMADA) MoTosl MIIANAKA BY AND lsao YASUDA Cami- 3, Antonelli, stewk q mu ATTORNEYS PAIENIEBFEBI 2 m4 SHEU 2 OF 5 FIG. 2

v 296 204 COUNTER 4O5- COUNTER 4n I 207 F ,205 R9 L COMPARATOR s COMPARATOR 3 AND t J REGISTER FF REGISTER FF F ANO 2A4 405 2A5 2A2 {208 42 W COUNTER AND} COUNTER COMPARATOR COMPARATOR REGISTER REG I NVENTORS NAGAHARU HAMAOA, MoTosl MIIANAKA BY AND ISAO VASUDA Cvok Antpnelli, Stewart 4 ATTORNEYS PATENTEB FEB I 2 I974 SHEET 3 BF 5 9 FIG. 3 (3 R COUNTER COUNTER F F 395 F F 307 rs COMPARATOR s COMPARATOR R -4l6 R 4-40 y "a REGISTER REGISTER F31 F32 303 302 l REGISTER MEMORY ARITHMETIC UNIT REGISTER REGISTER ,3l2 (SIO COMPARATOR COMPARATOR DELAY COUNTER CIRCUIT R INVENTORS NAGAHARU HAMADA, OTOSI MIYANAKH LF33 BY AND ISI-\o vasuon Cwraig, qntbnelh', SLemark q. HLLL ATTORNEYS GRAPHIC DISPLAY DEVICE This is a continuation, of application Ser. No. 70,663 filed Sept. 9, 1970, now abandoned.

This invention relates to a device in which the information from a computer and other various information sources is stored in a memory, the instantaneous position of the scanning line on the display screen of a cathode-ray tube CRT is formed according to the signal from a control signal generating device for controlling the scanning of the scanning lines on the display screen,

and a display signal based on the information supplied from the memory is sent to the display device whereby a figure, such as a graph, is displayed on the screen.

Acccording to the general conventional method of displaying a graph or the like, the screen is divided into a large number of points in the vertical and horizontal directions and thus a picture is displayed as a combination of such points. To obtain a sharp, smooth figure, such as graph, it is necessary to increase the number of the points on the screen. In the device based on this method, the point corresponding to the given information is recognized, and such information is sent as a digital signal from the control circuit to the deflection circuit. In the deflection circuit, the digital signal is converted into an analog signal, and the beam is deflected. According to this method, the beam is deflected always by the digital signal and, therefore, it is not always necessary to determine a definite path for beam deflection, and it is easy to accomplish'deflection by the signal which is provided only when it is necessary. This makes it possible to depict graphs of various figures and to use such device in many ways. This type of device, however, has several drawbacks. For example, the information provided from a certain information source must contain the values of x and y coordinates with respect to the individual points against the reference point on the screen. Accordingly, the number of display points is inevitably increased. As a result, a memory having a larger capacity and the accompanying complicated control circuits must be provided. Also, in the conventional device, the same information from an information source is to be often repeatedly received keeping pace with the display speed. This results in exclusive possession of one information source, and the processing capacity of the information source is lowered.

Furthermore, the D-A converter and beam deflecting device must be operated with high speed and high accuracy. This is the reason why the conventional graphic display device has not been easy to manufacture and why its cost has been high.

It is therefore an object of the present invention to provide an inexpensive but highly reliable graphic display capable of comparatively complicated graphic display in spite of its need of a small number of information factors and a small memory capacity.

It is another object of the present invention to provide a reliable graphic display device in spite of its use of a simple circuit configuration.

It is a further object of the present invention to provide a reliable graphic display device in spite of its use of a simple deflecting method similar to that employed for the general television receiver.

The graphic display device of this invention receives an information processed by a computer or device and displays it on the screen. Hence, the display device of this invention is suitably used for a monitoring purpose or the like. The scanning of the scanning line is performed repeatedly at a certain definite speed and by way of a certain definite path regardless of the given information. Each scanning line is brightened or unblanked to an extent corresponding to the given information, and a graph is formed by these bright lines.

Therefore this invention provides an inexpensive but highly reliable graphic display device capable of comparatively complicated graphic display in spite of its use of a small number of information factors, a small memory capacity, a simple circuit configuration, and a simple deflecting method similar to that employed for the general television receiver.

These and other objects, features and advantages will become more apparent from the following detailed description of one exemplary embodiment of the invention, when taken in conjunction with the accompanying drawings, wherein:

FIG. la is a simplified diagram showing a graph displayed on the display screen, with which the principles of the invention are explained;

FIG. 1b is an enlarged partical view of the origin of coordinates;

FIG. 2 is a block diagram showing a circuit embodying this invention, which circuit is to generate a display signal for displaying the coordinates of the graph;

FIG. 3 is a block diagram showing a circuit embodying this invention, which circuit, is to generate a display signal for displaying the function of the graph;

FIG. 4 is a diagram showing a control signal generating device embodying this invention, which device is to generate a clock pulse for controlling the individual circuits of this invention; and

FIG. 5 is a block diagram showing an arithmetic unit embodying this invention, which unit is to compute the display start position and display stop position of each scanning line and to apply the resultant information to the corresponding storing register.

In FIG. la, the area on the whole screen face which is actually used for displayis indicated by a quadrilateral (ZUVW). The arrows indicate the scanning directions of the scanning line; the X direction is the lateral direction with respect to the scanning line, and the Y direction is the longitudinal direction with respect to the scanning line. The line Xo- Yn is the ordinate representing function values, and the line Yo- Ym is the abscissa indicating variables of the graph. The line Ogk indicates the function of the graph. FIGS. 1b is an enlarged view of the portion of FIG. 1a indicated by the points 0g, a, b and c. The graphic display method of this invention will be explained in detail by referring to FIG. lb.

In FIG. lb, the lines y,, y indicate individual scanning lines. The scanning lines yl through y7 make up one group, and the scanning line yl of each group is considered as the representative of the group. The individual scanning lines yl are designated Y Y,, Y Ym in the figures, each of which is used as the unit length of the variable of the graph. The lines x x indicate the unit length of the function value. Each of x,, x x is called a clot. The dots x, through x make up one division, and each division is represented by X X X The quadrilaterals formed by the dots x through at; and the scanning lines y, through y, are called segments.

The scanning of the scanning line is started from a certain time; for example, y, of the group Y is scanned from the left to the right at a certain constant speed.

When the scanning of y, ends, y is scanned in the same way. Such scanning is done in an orderly manner on the groups Y to Ym and also on the rest of the portion of the display screen. Then scanning of the same figure is started again. For display of the function of the graph in FIG. 1b, it is assumed that the scanning is started from the scanning line y, of the group Y0, and that the coordinates of the graph are not taken into consideration. Then, a display operation starts when the scanning position comes to 0,, and stops when the scanning position moves by a predetermined length (in this case, 1,). The position from which the display of the scanning line y starts is the point ,g which is distant from the point 0,, by the length 1 (Note: For simplicity of explanation, it is assumed that the display length within each group is constant, and the display lengths of the individual groups are l l l and 1 By the next scanning line, the display starts from the point g which is distant from the point g by the length 1 This display stops after running the length I In other words, the display stop position of the previous scanning line becomes the display start position of the next scanning line.

By repeating the above process, display is accomplished sequentially as far as the scanning line y, of the group Yo. Now, how the display moves from the group Yo to Y will be described below.

When the display starts from the point g; on the scanning line y, of the group Y0, and stops after running the length 1 the display start position for the scanning line y of the group Y is equal to the display stop position of the previous scanning line y, if in the group Y the increment value of the function is positive. In this case, therefore, the display starts from the point a0 and stops after running the length 1 For the next scanning line y the display operation starts from the display stop position of y,. In this way, it is possible to provide a display for the scanning lines sequentially from the group Yo to Y In this case, the display length or unblanked portion of each scanning line corrresponds to the increment of the function with respect to the variable corresponding to each scanning line. In the portion in which the value of the function tends to decrease, the increment value is negative, and the value of the display start position is also negative.

Since, as described above, the display length or unblanked portion may be considered as an increment, the term increment" will hereafter be used for the display length. The instance wherein the increment is negative will be explained using the part of the group Y in FIG. lb. A display starts from the display start point a of the scanning line y, of the group Y and stops at the point a, after running the increment 1 of the function.

The increment of the next scanning line y, is negative. In this case, the display stop position a, of the previous scanning line y should not become the display start position of the next scanning line y, but should become the display stop position of y Therefore, on the scanning line y,, the point b, is the display start position, and the point h is the display stop position. While, for the next scanning line y the display start point b, of the previous scanning line is the display stop position, and the point b, which is the sum of the increment and the point [2, becomes the display start position. By repeating the above process, the display goes as far as the scanning line y,. The increment of the group Y; is

positive. When the display moves from the scanning line y, to y,, the value of the display start point 17 of the scanning line y, is taken directly as the value of the display start point Co of the scanning line y Then, the display starts from the point C0 and stops after displaying the increment. This display stop position is the point C from which another display starts for the next scanning line y and stops after displaying the increment. By repeating the above operation, the function of a graph can be displayed.

coordinates of a graph are displayed by the use of two axes; the axis X0 Xn (hereinafter designated the function axis) which indicates the unit length of the function value, and the axis Y0 Ym (hereinafter designated the variable axis) which indicates the unit length of the variable. A display starts when the scanning position of the scanning line is moved at a constant speed and scanning of the scanning line y, of the group Yo is started and the scanning position comes to the dot x of the segment X0. This display continues to the dot ar of the segment X in FIG. 1b. For the next scanning line y the display is provided only when the scanning position comes to the dot x, of the segment X0. The same operation is repeated sequentially as far as the scanning line y, of the group Ym, and thus the coordinates are displayed.

According to this invention, the following data are necessary for graphic display:

1. start points (X, Y) of the coordinates,

2. axial lengths of the coordinates,

3. start points (X, Y) of the function, and

4. increment (I) of the function of each group.

In FIG. 1a, the point Z on the display area (ZUVW), which is actually used among the whole screen of the CRT, is considered as the absolute origin, and the location of the start point of the coordinates and of the function are designated by the number of segments based on the point Z.

The axial lengths of the coordinates from the start points (X0, Y0) in the X direction and Y direction are designated by the number of the segment. The increment of the function with respect to each variable is designated by the number of the dot or by the minor unit clock.

The above operation will be explained in detail in conjunction with an embodiment of the invention.

FIG. la shows the situation in which a graph is displayed on the whole display screen. It is assumed that the whole area of the screen is divided into the foregoing segments.

The screen face is divided into parts in the X direction, and 38 parts in the Y direction. In practice, the peripheral area of the screen tends to cause distortion in the display, or the displayed graph is not always cleanly observed in such area. This is why the area corresponding to 10 parts each from both sides, in the X direction and six parts each from both sides in the Y direction is unused. In other words, the screen after excluding this area is used for practical display, This practical area is indicated by the quadrilateral area ZUVW. Namely, in this embodiment, the interval between the points Z and U is divided into 40 parts, and the interval between the points Z and W into 26 parts. Each of the divided quadrilaterals is called a segment. Each of the 40 parts divided in the X direction corresponds to eight dots, and each dot is divided into three portions, each of which is called unit clock. Each of the 26 parts divided in the Y direction corresponds to one group, which consists of seven scanning lines, as described above.

This situation is illustrated in FIG. lb wherein y,, y y, denote scanning lines respectively. The scanning beam to scan the screen is deflected by the deflecting device (not shown diagrammatically), and the synchronous signals for the X direction and the Y direction supplied from the control signal generating device are applied to the deflection circuit, whereby the speed and path of the beam are determined. This deflecting operation is nearly equal to that in the general television receiver.

Since the scanning of the scanning line is controlled by the synchronous signals for the X direction and Y direction supplied from the control signal generating device, the signals obtained by dividing the synchronous signals for the X direction and Y direction into 60 parts and 38 parts, respectively, correspond to X X X and Y Y Y The signals obtained by further dividing the above signal correspond to dots and unit clock signal lines. Accordingly, the instantaneous position and moving distance of the scanning line can be found by receiving the above signals from the control signal generating device and by counting these signals.

Now, how the coordinates are displayed will be explained below by referring to FIGS. 10, lb and 2. In FIG. 2, the

numeral references

200, 201, and 203 denote registers, while 204, 206, 208 and 210 designate counter, 205, 207, 209 and 211 designate coincidence detecting circuits, 2A1, 2A2, 2A4 and 2A5 designate AND gates, F20 and F21 designate flip-flops, and 2A3 identifies an OR gate.

The

registers

200 and 201 store the information as to the locations of the origins of the coordinates in the X direction and Y direction, the locations of which are designated by the number of segments based on the absolute origin 2. The origin location of the coordinate is provided from an information source by way of the route (not shown diagrammatically). For example, the signal indicating an information as regards the coordinates, the data such as the number of segments in the X direction, the number of segments in the Y direction, the axial lengths in the X direction and Y direction, etc., are provided sequentially, whereby the first signal is recognized. Then the data is introduced into the

registers

200, 201, 202, and 203, respectively.

When the scanning line starts scanning on the screen of the CRT and the scanning position comes to the absolute origin Z, the

counters

204 and 206 receive from the control signal generating device the signals X and Y corrresponding to the respective segments, and start counting the signal. By the counted value, the instantaneous scanning position of the scanning line is determined. When this scanning position comes to the point (X0, Y0) in the FIG. 1, the value of the register 200 becomes coincident with that of the counter 204. In response to this condition, the comparator 205 delivers an output to set the flip-flop F20. When the content of the register 200 becomes equal to that of the register 204, the coincidence detecting circuit 207 delivers an output to set the flip-flop F21.

When the

comparators

205 and 207 deliver their outputs, this shows that the scanning position comes to the point (X0, Y0). The outputs of the flip-flops F20 and F21 have respectively been set by the outputs of the

comparators

207 and 205 are applied to the AND gates 2A1 and 2A2, respectively, and the display signal is applied to the display device from the AND gate 2A1 by way of OR gate 2A3. Thus, the display signal is continuously applied from the point (X Y The comparator 205 does not deliver its output unless the value of counter 204 is coincident with that of the register 200. Thus, when the scanning line moves to the next segment X,, the flip-flop F20 temporarily holds the output of the comparator 205 and thus keeps applying the output signal to the AND gate 2A1 as the scanning line moves from X,, to X Xn. In order to determine that the scanning position has moved by the axial length X0, Xn in the X direction, the counter 2 0 st a t s coimting the number of segments X from the time when the scanning position comes to the point (X0, Y0). When the counted value becomes coincident with the content of the register 202, which holds the predetermined value of the axial length, the flip-flop F20 is reset by the output of the computer 209, the signal from the AND gate 2A1 is stopped, and the display signal is stopped.

The AND gate 2A4 receives from the control signal generating device a signal corresponding to the segment by way of the channel 405, and applies to the counter 208 a signal corresponding to the segment X. In this manner, the value of the coordinate axis in the X direction is displayed. After scanning the line y a signal corresponding to the scanning line y, is applied to the AND gate 2A1 from the control signal generating device via the channel 411. Therefore no display signal will be obtained from the AND gate 2A1.

The flip-flop F21 is kept set during scanning of the scanning line y When the content of the counter 204 is cleared upon completion of the scanning of the scanning line y, and scanning of the scanning line y starts and crosses the lines Z and W (FIG. la), the counter 204 starts counting the signal again. When the scanning position comes to the point above the dot x, of the segment X0, the comparator 205 delivers an output signal to the AND gate 2A2. Then the output of the AND gate 2A2 is provided as a display signal to the display device via the OR gate 2A3 whereby the signal is displayed on the screen. A signal corresponding to x, is supplied to the AND gate 2A2 from the control signal generating device via the channel 417. Therefore, as shown in FIG. 10, display is effected only on the dot x, of the segment X0. In this case, the flip-flop F20 is set. However, since no signal is obtained from the comparator 207, an unneccessary display is prevented. By the scanning of the next scanning line y display is effected only on the dot x, of the segment X0.

The coordinate in the Y direction is displayed up to the point Ym in FIG. la, and this display must be stopped at the point Ym. To do this, when the display in the Y direction starts, the output of the flip-flop F21 is applied to the AND gate 2A5 and, by this output, a signal corresponding to a segment (or a group) in the Y direction is supplied from the control signal generating device to the counter 210 via the channel 412. When the value of the counter 210 becomes coincident with the content of the register 203 which holds the value of the axial length in the Y direction, the flip-flop P21 is reset by the output of the comparator 213. By this means, the display signal is stopped and the existing display is stopped. In this manner, the coordinates are displayed by the circuit as shown in FIG. 2.

FIG. 3 shows the composition of the function display circuit. In FIG. 3, the

references

300 and 301 denote registers which respsectively store the locations of start points of the functions, 302 designates a memory for storing the increment corresponding to each group, and 303 designates a register for holding said incre ment obtained from the memory 302. The

references

304, 306, and 308 identify counters, 305, 307, 312 and 310 designate comparators, 31 1 and 309 designate registers for storing the display stop position and display start position, respectively, 313 identifies a delay circuit, and 314 designates an arithmetic unit.

The function display method will be described in detail by referring to FIGS. la, 1b and 3. The

registers

300 and 301 store the start point of a function. This information is supplied to these registers beforehand from an information source (not shown diagrammatically), as in the case with the display for the coordinates. When it is desired to designate the start point of the function from the information source, it is necessary that the information is given in terms of dot number to the register 301 in the X direction based on the absolute origin Z, by way of a route (not shown herein diagrammatically). While, the information is provided to the register 300 in terms of the number of scanning lines in the Y direction via a route (not shown diagrammatically). The memory 302 stores the individual increments of all the groups. This information is supplied to the memory beforehand as in the

registers

300 and 301.

Practically, a displayed function is smoothest when the increment is designated from the information source for each scanning line which is the minimum unit of the variable. This, however, requires a greater amount of information. In this embodiment, therefore, it is assumed that the increment of the function within one group is constant and one group is composed of 7 scanning lines, as shown in FIG. 1b. By this arrangement, the increment can be designated corresponding to each group. When the number of scanning lines which make up a group is increased, the function will take the form of a segment line graph having a certain definite slope in each group. By reducing the number of scanning lines which make up a group, the graph becomes smooth and may be considered as a curve. According to this embodiment, the interval between the groups is made equal to the interval between the segments in the Y direction. This arrangement serves favorably to simplify the control signal circuit. The increment corresponding to each of the groups is stored in the memory 302 in the order of the groups, and the increments corresponding to individual groups are applied sequentially to the register 303. As in the case with the coordinate display, when the scanning line comes to the absolute origin Z, a signal is sent from the control signal generating device to the counter 304 for each scanning line. By this means, the counter 304 counts the signal.

At the same time, a signal is applied from the control signal generating device to the counter 306 for each dot, to allow the counter 306 to count the dots. The counter 306 is cleared upon each completion of scanning of a scanning line. Then, the counter 306 restarts counting the nu@er of dots as soon as the scanning crosses the line ZW in FIG. 1a.

When the scanning position comes to the point Og in FIG. 1a, the contents of the

registers

300 and 301 become coincident with those of the

counters

304 and 306, respectively. As a result, the

comparators

305 and 307 deliver their outputs to set the flip-flops F31 and F32. When these flip-flops are set, the outputs of these flip-flops are supplied to the AND gate 3A1 whereby a unit clock signal is delivered from the control signal generating circuit to the counter 308 via the channel 401. The purpose of the register 300 is to hold the display start position. In this embodiment, since the display starts from the point Og in FIG. 1b, the content of the register 309 is zero. In the state wherein no signal is in the counter 308, the content of the register 309 is always coincident with that of the counter 308. Therefore, the coincidence detecting circuit 310 gives out its output to the AND gate 3A2. This signal sets the flipflop F33 via the AND gate 3A2 when a signal comes in the AND gate 3A1. By this, the display signal is sent from the flip-flop F33 to the display device by way of the OR gate 3A3 whereby a display is effected. The flip-flop F33 is set when the scanning position comes to the point 0g. A display appears on the screen corresponding to the scanning line whenever the flip-flop F33 is in the set state.

The content (an increment) of the register 303 is added to the content of the register 311, and the total value is stored in the register 311. Since the content of the register 311 is zero in the beginning, the content of the register 303 is held as it is in the register 311. The content of this register 31 l is equal to the increment L, of the Yo group in FIG. 1b, and this length is held in terms of the number of unit clocks. When the scanning line passes through the point Og, a signal is applied from the control signal generating circuit on line 401 to the counter 308 via the AND gate 3A1 as the scanning advances over the length corresponding to the unit clock. Then the counter 308 counts the signal. When the scanning position moves by the length I, the content of the register 311 becomes coincident with that of the counter 308, and the comparator 312 delivers its output to reset the flip-flop F33, and thus to stop the display signal. The content of the register 311 is transferred to the register 309 when the scanning of the scanning line y, is over but before starting the scanning of y By this means, the display start position of the scanning line y is determined to be the point g,, as in FIG. 1b.

At the same time, the content of the register 311 is applied to the arithmetic unit 314, wherein the content of the register 303 is added to that of the register 311, and the total value is stored in the register 311.

When the scanning of the scanning line y starts and the content of the counter reaches the value of the point Og, a unit signal clock is applied to the counter 308 via the AND gate 3A1. By this means the counter 308 starts counting the signal. When the counted value becomes coincident with the content of the register 309, the comparator 310 delivers its output to set the flip-flop F33 whereby the display starts. In this case, the display start position is the point 3, which represents the content of the register 309. When scanning advances from the point g, by the length 1,, the content of the register 311 becomes coincident with that of the counter 308, and the coincidence detecting circuit 312 delivers its output to reset the flip-flop F33, whereby the display stops.

By repeating the above operation, the display goes as far as to the scanning line y, of the group Yo.

-When the scanning of the scanning line y, of the group Y is over, the increment l of the group Y 'is applied from the memory 302 to the register 303. On the other hand, the content of the register 31 l is applied to the arithmetic unit 314, as well as to the register 309. The content of the register 303 is added to that of the register 311 via the arithmetic unit 314. By this means, the flip-flop F33 is set by the output of the comparator 310 (this output is obtained at the point a, in FIG. 1b). When the scanning position moves by the length corresponding to the increment 1 the flip-flop F33 is reset by the output of the comparator 312 and thus the display is effected on the screen from the point a, for the length 1 In this way, display is accomplished as far as the scanning line y, of the group Y,.

The above operation may be applied to the display where the scanning is moved from one scanning line,

the value of the increment of which is positive to another scanning line, the value of the increment of which is also positive. The increment 1 corresponding to the group Y, is transferred from the memory 302 to the register 303 and stored in the register 303 when the scanning of the scanning line y, of the group Y is completed but before starting the scanning of the scanning line y, of the group Y The increment 1 held in the register 303 is then applied to the arithmetic unit 314.

When the increment is negative, rather than the display stop position, the display start position is changed. Therefore the content of the register 311 may be left unchanged. The increment I is added algebraically to the content of the register 311 by the arithmetic unit, and the total value is applied to the register 309. As a result, the display of the scanning line y, of the group Y starts from the point b and stops at the point h The above manner of operation is necessary for the display where the scanning is moved from one scanning line, the value of the increment of which is positive to another scanning line, the value of the increment of which is negative.

In the operation wherein the scanning position moves from the scanning line y, to the line y of the group Y the display start point b, becomes the display stop point for the next scanning line y Accordingly, the content of the register 309 is applied to the register 311 simply through the arithmetic unit 314. Then the increment l is algebraically added to the content of the register 309, and the summed value is stored in the register 309.

The display start point for the scanning line y of the group Y is the point b at which the content of the counter 308 is coincident with that of the register 309. When the scanning position runs as far as the length l;,, the content of the counter 308 becomes coincident with that of the register 31 1, and the display stops. The above operation is repeated for the display where the scanning is moved from the scanning line whose increment is negative to the scanning whose increment is also negative. In this manner the display is generated as far as the scanning line y of the group Y In the operation wherein the scanning moves from the scanning line y, of the group Y to the next scanning line y,, the display start point [1,, which represents the content of the register 309, is equal to the display start point Co of the next scanning line y Therefore, the content of the register 309 is left unchanged. The increment, being the display length is algebraically added to the point Co, which is the content of the register 309, by the arithmetic unit 314, and the summed value is stored in the reg sponding to the dot.

ister 311. When the scanning position comes to the point C0, the content of the counter 308 becomes coincident with that of the register 309. Thus, the flip-flop F33 is set by the output of the coincidence detecting circuit 310. When the content of the counter 308 is coincident with that of the register 311, the coincidence detecting circuit 312 delivers its output to reset the flipflop F33, and thus to stop the display. In this operation, the displayed length of scanning line is I, from the point Co. This manner of operation is used for the display wherein the scanning moves from a scanning line whose increment is negative to another scanning line whose increment is positive.

The display for the succeeding scanning lines is accomplished according to the method employed for the display wherein the scanning moves from a scanning line whose increment is positive to another scanning line whose increment is also positive. Thus, the function is displayed. The purpose of the delay circuit 313 is to emphasize the graphic display in the event that the increment is as small as one or two.

No detailed description has been given for the memory 302 and register 303, which are provided for the increment one. For example, a circulating memory using an MOS dynamic shift register may be used for the memory 302 and register 303. The use of such a circulating memory makes it possible to simplify the circuit composition and control operation. Various control signals are applied to these components by way of channels (not shown diagrammatically). As described, a certain constant increment is provided in one group. Therefore the output of the register 303 is set at a certain constant value. In other words, the increment of the next group stored in the memory 302 is given to the register 303 each time the group is changed, and thus the increment is controlled to be kept at a specified value.

The control signal generating device for controlling the circuits as in FIGS. 2 and 3 will be explained below.

FIG. 4 shows the composition of this device which is to supply a signal to the deflecting device, control the scanning speed of the scanning lines, and supply the necessary counters with a signal corresponding to the group of the segment, scanning line, dot and unit clock, and thus to designate the instantaneous position of the scanning line. The control signal generating device consists mainly of a main oscillator 400, a ternary counter 402, an octal counter 404, a quinary counter 406, a duodecimal counter 407, a heptal counter 410, a binary counter 413, and a nonadecimal counter 414.

The oscillation frequency of the main oscillator 400 is determined to be 22.6 MHz so that the X direction synchronous signal (horizontal synchronous signal) output 408 will be nearly 15.7 kHz. This frequency is sent out as a unit clock by way of the channel 401.

At the same time, the unit clock is applied to the ternary counter 402 to set the frequency to 7.5 MHz, which is then applied to the AND gate 4A1. The output is taken from the AND gate 4A1 as a signal corre- The output of the ternary counter is applied to the octal counter 404 to reduce the frequency to 942 kHz. This frequency is applied to the AND gates 4A2 and 4A9, and also the pulse corresponding to the eighth dot of each segment is applied to the AND gate 4A2 whereby the pulse corresponding to the segment is taken from the channel 405. At the same time, the

pulse corresponding to the first dot of each segment is applied to the AND gate 4A9 so that the pulse corresponding to the first dot is taken as the output of the AND gate 4A9. The quinary counter 406 and the duodecimal counter 407 form a hexacontal counter. When the output of the octal counter 404 is applied to the quinary counter 406, a pulse of about 15.7 kHz can be obtained as the output of the duodecimal counter 407 whereby the x direction synchronous signal is supplied to the deflecting device via the channel 408, and thus the scanning speed is controlled.

In order that the pulses corresponding to the individual dots and the first dot segment are generated only within the display area (ZVVW), as in FIG. la, the output of the flip-flop F400 is applied to the AND gates 4A1, 4A2 and 4A9. When the

counters

406 and 407 count 10, the flip-flop F400 is set by the output of the AND gate 43. When its count value reaches 51, the flip-flop F400 is reset by the output of the AND gate 4A4. The output of the counter 407 is applied to the heptal counter 410 and also to the AND gate 4A5. Thus, a signal corresponding to the scanning line is sent out as the output of the AND gate 4A5 to the channel 409.

The frequency is further reduced by the heptal counter 410, and the output is applied to the binary counter 413. At the same time, the output is applied to the AND gate 4A6, and a pulse corresponding to the first raster of each group is sent out to the channel 411.

The purpose of supplying an output to the AND gate 4A7 is to send out a pulse corresponding to the seventh scanning line of each group to the channel 412. The binary counter 413 and the nonadecimal counter 414 make up an octariacontal counter. A control signal of about 60 Hz is obtained as an output of the nonadecimal counter 414. This output is sent out to the channel 416 as the vertical synchronous signal.

The output of the flip-flop 401 is applied to the AND gates 4A5, 4A6 and 4A7, thus controlling these gates so that the pulses corresponding to each scanning line, the first and the seventh scanning lines of each group are supplied to the display device to effect a display only within the display area (ZUVW), as seen in FIG. la.

The flip-flop F401 is actuated by the output of the counter 413. When the value of the octariacontal counter reaches 6, the flip-flop F401 is set by the output of the AND gate 4A10. When the value of the counter reaches 32, the flip-flop F40! is reset by the output of the AND gate 4A8, and thus the output to the

channels

409, 411 and 412 are stopped. In this manner, the necessary signals are sent out to the corresponding channels.

FIG. 5 shows an arithmetic unit embodying this invention, in which the function display start point and stop point are computed and the resultant value is supplied to the corresponding registers. In FIG. 5, the reference FA indicates a full adder circuit, FS designates a full subtractor circuit, 303 designates a register for holding the increment value, 309 designates a register for holding the display start point. The reference 501 denotes a delay circuit in which the data supplied to the input terminals X and Y of the full adder circuit and full subtractor circuit are synchronized with the data given to these circuits via terminals C and B. References 5A1, 5A2, 5A3, 5A4, 5A5, 5A6, 5Al0, 5A11,

5A12 and 5A13 designate AND gates, and references 5A7, 5A8 and 5A9 designate OR gates.

Also in FIG. 5, the

references

51, 52, 53 and 54 denote the terminals to receive the signal by which the arithmetic unit is controlled. The terminal 51 receives a signal when the increment of the scanning line for which the scanning is started is positive. While, the terminal 54 receives a signal when it is negative.

When the increment of the scanning line for which the scanning is completed is positive, a signal is applied to the terminal 52. While, when the increment thereof is negative, a signal is applied to the terminal 53. The arithmetic unit, as seen in FIG. 5, will be specifically explained by referring to FIG. 1b. After ending the scanning of the scanning line y, of the group Y but before starting the scanning of the next scanning line y the information as to the display stop position of the scanning line y, for which the scanning is completed is stored in the register 309, which is to hold the display start position, and the information as to the position reperesenting the sum of the increment of the next scanning line y and the display stop position of the scanning line y, for which the scanning is completed is stored in the register 311, which is to hold the display stop position. When the increment of the scanning line y, for which the scanning is completed is positive, a signal is applied to the terminal 51, the AND gates 5A3 and 5A12 are opened, and the increment of the scanning line for which the scanning is about to start is applied to the terminal Y of the full adder circuit from the register 303 which holds the increment. In this case, because the increment of the scanning line for which the scanning is about to start is positive, a signal is applied to the terminal 52, AND gates 5A1, and 5A4 are opened, and the display stop position of the scanning line y, is applied to the terminal X of the full adder circuit FA by way of the OR gate 5A7.

The full adder circuit FA is a series adder circuit. When this adder circuit has a carry of the previous digit, this carry is applied to the terminal C'. The output (S) of the full adder circuit FA is provided at its output terminal S. This output is expressed as S= which holds the display stop position of the scanning line y for which the scanning has been over, and also the register 303 which holds the increment of the scanning line y, for which the scanning is about to start are shifted in the smaller digit direction, and the respective .minimum digits are applied to the full adder circuit FA.

The output of FA is sent into the locations of the maximum digit of the

registers

311 and 303. (These locations are vacant due to the shift.) The output (C) o f the full adder circuit FA is expressed as C X'Y'C X-VC +Y-Y-C. When the output C is present, this output is applied to the delay circuit 501 by way of the OR gate 5A9. At the instant the registers 31] and 309 are shifted, the output C is applied to terminal C; of the full adder circuit from the delay circuit 501. In the same way as above, the increment of the scanning line for which'the scanning is about to start is added to the content of the register 311 which holds the display stop position, and the summed value is applied to the register 311. Thus, the display is started from the point g for the scanning line y, and stopped after running the length of the increment 1,. In this manner of operation, the necessary data is supplied to the corresponding registers when the value of the increment of the scanning line for which the scanning is completed is positive and the value of the increment of the scanning line for which the scanning is about to start is also positive. When the scanning moves from the group Y, to Y the display stop point a-, of the scanning line y, for which the scanning is completed becomes the display stop point of the next scanning line y Ths display start point b is found by adding the negative increment l to the display stop point b,,.

Since the increment of the scanning line y, for which the scanning is over is positive, a signal is applied to the terminal 52, the AND gate A4 is opened, and the content of the register 311 which holds the position of point a is applied to the full subtractor circuit FS. Also, since the increment of the scanning line y for which the scanning is about to start is negative, a signal is applied to the terminal 54, and the absolute value of the increment is applied from the register 303 which holds the increment to the full subtractor circuit FS and also to the register 309 which holds the display start point. The output (D) of the full adder circuit is expressed as =X' 'F- X:Y;.B'+X'Y'Bl+X;X'BLAEQL QQUI: put (B) is expressed as B X-Y-l? +x-YB' x-Y-B' X-Y-B. Therefore the display is effected from the point b to b by scanning the scanning line y,. In this manner, the necessary data is applied to the corresponding registers when the increment of the scanning line for which the scanning is over is positive and the increment of the scanning line for which the scanning is about to start is negative. When the scanning moves from the scanning line y to y of the group Y the display start point b, of the scanning line y, becomes the display stop point of the next scanning line y Namely, the display start point of the scanning line y is represented by the value given by adding the negative increment to the location of point 1),. Since the increment of the scanning line y for which the scanning is completed is negative, a signal is applied to the terminal 53, and the AND gate SAS is opened. Thus the content of the register 309 which holds the display start position is applied to the full subtractor circuit FS. Also, since the increment of the scanning line y for which the scanning is about to start is negative, the absolute value of the increment is applied to the full subtractor circuit F S from the register 303. Then the content of the register 303 is subtracted from that of the register 309, and the resultant value is applied to the register 309 which holds the display start position. Thus, for the scanning line y a display is effected to the length 1 from the point b In the above manner, suitable values are supplied to the corresponding registers when the increment of the scanning line for which the scanning is completed is negative and the increment of the scanning line for which the scanning is about to start is also negative.

When the scanning moves from the scanning line y, of the group Y to the next scanning line y,, the display start position is unchanged, and the display stop point is represented by the value given by adding the increment to the display start position. Since the increment of the scanning line y, for which the scanning is completed is negative, a signal is applied to the terminal 53, the AND' gate 5A2 is opened, and the content of the register 309 is transferred to the full adder circuit. Also, since the increment of the scanning line for which the scanning is about to start is positive, a signal is applied to the terminal 51, the AND gate 5A is opened,

and the content of the register 303 is supplied to the full adder circuit FA. The summed value is applied to the register 311, and thus for the scanning line y,, a display is effected to the length of the increment I, from the point C. In this manner, suitable values are supplied to the corresponding registers when the scanning line for which the scanning is completed is negative and the scanning line for which the scanning is about to start is positive. Now, the addition and subtraction operations for the display can berealized according to four methods as has been described above.

In the foregoing embodiments, the object to be displayed is continuous. In addition, a discontinuous graph may easily be depicted by designating the brightness thereof at the same time when the increment of a group is designated. For this, a brightness signal, together with the increment, is supplied to the memory. This brightness signal is read out at the same time as the increment corresponding to the group is read out. The display signal is applied not directly to the display device but to an AND gate, together with the brightness signal. Therefore the display signal will not be supplied to the display device unless the brightness signal is provided at the same time. In this way, whether a group is displayed or not can arbitrarily be determined.

Also, several mutually independent graphs can be displayed on one screen in the following manner. The function display circuit and coordinate display circuit which are to display a single graph are provided in number equal to the number of graphs to be depicted. These circuits are controlled by the signal provided from a common control signal generating device. Then, the display signals from the individual function display circuits and coordinate display circuits are supplied in parallel to the display device. In this case, high speed devices, such as the arithmetic unit, can be used in common by processing the graphs in a certain predetermined time order. It is also possible to apparently display several graphs at a time by the following arrangement. The speed of the scanning of the display screen is increased, and the graphs to be displayed are processed in sequence, a new graph being processed each time one screen scanning is over. More specifically, several groups of graphic displaying data are stored in the memory which is divided into several parts. Then, each time one screen scanning is over, a new group of information is used by switching from one group to the next in the predetermined order of the graphs. Thus, several graphs displayed rapidly in sequence seem as if they are displayed at the same time.

In the foregoing, the various graphic displays can be displayed in multicolor. Namely, a colordisplay device is used for the foregoing display arrangement, and a color signal of each group is added to the increment of each group. The display signals generated according to the color signal are assorted by colors and then sent to the color display device whereby the graph is displayed in colors.

According to the invention, as has been described above, the scanning line being driven at a certain specific speed and with a certain time relation is controlled by the video signal which is controlled through designation of the starting point and increment thereof whereby a graphic display is done as in the case with the general television receiver and, hence, a simple control circuit will suffice for the device of this invention. This makes it possible to utilize the usual television receiver as the display unit of this invention. Also, it is possible to realize a graphic display having its origin located in the left lower part on the screen when it is so arranged that the vertical and horizontal deflecting coils are rotated at an angle of 90 or the CRT itself is rotated to an angle of 90 together with the deflecting coils. w

' While we have shown and described several embodiments in accordance with the present invention, it is understood that the same is not limited thereto but is susceptible of numerous changes and modifications as known to a person skilled in the art, and we therefore do not wish to be limited to the details shown and described herein but intend to cover all such changes and modifications as are obvious to one of ordinary skill in the art.

We claim:

1. A graphic display system for controlling the graphical display of information in a coordinate scanning pattern capable of generating a plurality of horizontal scanning lines, each scanning line being made up of a plurality of information positions, and a plurality of scanning lines forming a display group, said graphic display system comprising memory means for storing information representing a length and one of a negative and positive sign of an increment of each display group, means for counting a plurality of timing pulses designating the timing characteristics of said scanning pattern, the timing pulses being representative of predetermined information positions and predetermined scanning lines of said scanning pattern, means for generating signals for controlling the display of the coordinate axes of the graph, start position control means for providing a value representative of the information position on each scanning line at which display is to be started, stop position control means for providing a vlaue representative of the information position on each scanning line at which display is to be stopped, and processing control means for controlling said start and stop position control means in response to the information stored in said memory means, said start position of each scanning pattern being determined by the information positions of the previously scanned and displayed pattern, and the length of said scanning pattern on each scanning line being equal to the length of the increment of a respective display group.

2. A graphic display system as defined in claim 1, wherein said start position control means provides a signal for initiating display when said value representative of the information position on which display is to be started is obtained and said stop position control means provides a signal for stopping display when said value representative of the information position on which display is to be stopped is obtained.

3. A graphic display system as defined in claim 1, wherein said coordinate axes generating means includes a first register for storing digital information values representing a starting point of the coordinate axes in the X direction, a second register for storing digital information values representing a starting point of the coordinate axes in the Y direction, a third register for storing digital information values representing a length of the axes in the X direction, a fourth register for storing digital information values representing a length of the axes in the Y direction, a first comparator providing a first output upon coincidence between the values in said first register and a first counter means of said counting means for counting the timing pulses corresponding to the information positions in each scanning line, a second comparator providing a second output upon coincidence between the values in said second register and a second counter means of said counting means for counting the timing pulses corresponding to said scanning lines, a third comparator providing a third output upon coincidence between the values in said third register and third counter means of said counting means for counting the timing pulses corresponding to the information positions in each scanning line, and a fourth comparator providing a fourth output upon coincidence between the values in said fourth register and a fourth counter means of said counting means for counting the timing pulses corresponding to said scanning lines.

4. A graphic display system as defined in claim 3, wherein said third counter means begins to count the timing pulses in response to the first output from said first comparator, and said fourth counter means begins to count the timing pulses in response to the second output from said second comparator.

5. A graphic display system as defined in claim 4, wherein said coordinate axes generating means further includes a first flip-flop connected to said first comparator and to said third comparator so as to be set by said first output from said first comparator and to be re-set by said third output from said third comparator, a second flip-flop connected to said second comparator and said fourth comparator so as to be set by said second output from said second comparator and to be re-set by said fourth output from said fourth comparator, a first gate through which said timing pulses corresponding to the information position in each scanning line are transferred to said third counter means when said first flip-flop is set, and a second gate through which said timing pulses corresponding to scanning lines are transferred to said fourth counter means when said second flip-flop is set.

6. A graphic display system as defined in claim 5, wherein said coordinate axes generating means further includes a third gate having input terminals connected to said first flip-flop and to said second comparator and an output terminal is connected to an OR gate, a fourth gate having input terminals connected to said second flip-flop and to said first comparator and an output terminal connected to said OR gate.

7. A graphic display system as defined in claim 1, wherein said processing control means includes means for providing clock pulses spaced to correspond in time to correspond to scanning positions forming a subdivision of said information positions, said counting means counts said clock pulses, said start position control means includes a fifth register for storing the value representative of the start scanning position on each scanning line and a fifth comparator providing a fifth register and values in a fifth counter means of said counting means, said stop position control means includes a sixth register for storing the value representative of the stop scanning position on each scanning line and a sixth comparator providing a sixth output coincidence between said sixth register and said value in said fifth counter means, said fifth counter means counting the timing pulses corresponding to the scanning positions in each scanning line.

8. A graphic display system as defined in claim 7, further including a third flip-flop connected to said fifth and sixth comparators so as to be set by the output of said first comparator and reset by the output of said second comparator, said third flip-flop providing a set output which is utilized as a display brightening signal.

9. A graphic display system as defined in claim 8, wherein said processing control means includes arithmetic control means for algebraically adding data values from said memory means to said stop position control means or said start position control means prior to each line scan depending upon whether the data values are positive or negative, repsectively.

10. A graphic display system as defined in claim 9, wherein said processing control means includes further means for shifting the value in said stop position control means to said start position control means at the end of a line scan when the next data value in said memory means is positive and shifting the value in said start position control means to said stop position control means at the end of a line scan when the next data 'value in said memory means is negative.

11. A graphic display system as defined in claim 10, wherein said arithmetic control means includes a full adder'circuit and a full subtractor circuit.

12. A graphic display system for controlling the graphical display of a predetermined pattern which is displayed in the form of a plurality of raster lines with a scanning point being scanned repeatedly along a predetermined path of said raster lines, a plurality of said raster lines forming a display group, said graphic display system comprising means for controlling the display of said pattern by controlling the unblanking positions of said raster lines, memory means for storing information representing a length and one of a negative and positive sign of an increment of each display group, means for counting a plurality of timing pulses representative of predetermined positions and predetermined raster lines of said pattern, a coordinate generating means for generating display signals for displaying the coordinate axes of the graph, said means for controlling the unblanking positions of said raster lines being responsive to said memory means and said counting means for calculating each position of an unblanking line portion in accordance with the increment of its respective display group which is the difference between the unblanking positions of one raster line and the following raster line of the display group, the length of the unblanking line portion being equal to the value of the increment of the display group.

13. A graphic display device as defined in claim 12, wherein a display start point of each unblanking line portion is determined by algebraically adding the difference between the unblanking positions to a display start point of said unblanking line portion on the previous raster line.

14. A graphic display device as defined in claim 12, wherein the length of the unblanking line portion on each raster line indicates the difference between the unblanking positions of its raster line and next raster line.

15. A graphic display system as defined in claim 12, wherein said memory means stores information values representative of a length of unblanking line portion on each raster line and information signals representative of an increase or decrease signal of pattern position on each raster line, said means for controlling the unblanking positions including means for connecting a display start point of the unblanking line portion to be displayed to a display stop point of the unblanking line portion which has already displayed in case of an increase signal and for connecting a display stop point of said unblanking line portion to be displayed to a display start point of the unblanking line portion which has already displayed in case of a decrease signal.

16. A graphic display system as defined in claim 15, further including a display plane formed of a plurality of display groups said length of unblanking line portion on each raster line and said increase or decrease signal being the same in a respective group.

17. A graphic display system as defined in claim 16, wherein said means for controlling the unblanking positions includes a start position control means having a first register for storing a starting point digital information value at which display of the unblanking line portion is to be started and a stop position control means having a second register for storing a stopping point digital information value at which said display of the unblanking line portion is to be stopped, the digital information value of said second register of said stop position control means being transmitted to said first register of said start position control means from said second register, and said second register storing a new digital information value determined by adding the value representative of the length of said unblanking line to a value of said second register when the increments of the last unblanking line portion of the previously scanned line and the unblanking line portion of the previously scanned line and the unblanking line portion to be displayed have an increase signal, and the digital information value of said first register of said start position control means being transmitted to said second register of said stop position control means from said first register, said first register storing a new digital information value determined by subtracting said length of said unblanking line from the value of said first register when said increments of the last unblanking line portion of the previously scanned line and the unblanking line portion to be displayed have a decrease signal.

Claims

10. A graphic display system as defined in claim 9, wherein said processing control means includes further means for shifting the value in said stop position control means to said start position control means at the end of a line scan when the next data value in said memory means is positive and shifting the value in said start position control means to said stop position control means at the end of a line scan when the next data value in said memory means is negative.

11. A graphic display system as defined in claim 10, wherein said arithmetic control means includes a full adder circuit and a full subtractor circuit.