US3894292A - Display apparatus - Google Patents

Display apparatus Download PDF

Info

Publication number
US3894292A
US3894292A US338842A US33884273A US3894292A US 3894292 A US3894292 A US 3894292A US 338842 A US338842 A US 338842A US 33884273 A US33884273 A US 33884273A US 3894292 A US3894292 A US 3894292A
Authority
US
United States
Prior art keywords
output
counter
raster
digital
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US338842A
Inventor
Brian Wilkinson
David John Jibb
Martin Neil Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Allard Way Holdings Ltd
Original Assignee
Elliott Brothers London Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elliott Brothers London Ltd filed Critical Elliott Brothers London Ltd
Application granted granted Critical
Publication of US3894292A publication Critical patent/US3894292A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R13/00Arrangements for displaying electric variables or waveforms
    • G01R13/20Cathode-ray oscilloscopes
    • G01R13/22Circuits therefor
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/20Function-generator circuits, e.g. circle generators line or curve smoothing circuits

Definitions

  • G08b 5/36 each raster line notionally divide each line into a Field Of Search 340/324 AD; 315/22 number of equal ng h s q n i y n mber se tions changes in the brightness being effected when 1[56] References Ci there is correspondence between the digital output UNITED STATES PATENTS and the counter 3.388.391 6/1968 Clark 340/324 AD X 8 Claims, 7 Drawing Figures FATE-1 mm SHEET Cyclic A2 )4 Counter i0 H ⁇ v Delay B Compul'er ulpur dam Q 7 M Pulse Shaping Fig.2
  • This invention relates to display apparatus of the kind in which a display area is scanned in a raster and in which a symbol can be produced on the display area by causing a change in a visual parameter, e.g., brightness, of one or more selected portions of the raster lines.
  • a visual parameter e.g., brightness
  • this invention provides display apparatus of the kind hereinbefore defined comprising means for producing a digital output defining the position of each raster line portion required to be selected to display a desired symbol, means for producing reference signals corresponding to points along each raster line and an output circuit for producing a signal for changing said visual parameter at each selected raster line portion determined by the digital output.
  • the display apparatus includes a cyclic counter operating in synchronism with the raster line scanning generator such that a large number of pulses occur during each raster line, thereby notionally dividing each raster line into a large number of equal length, sequentially numbered, sections changes in said visual parameter being effected when there is correspondence between the digital output and the output of said counter.
  • the display apparatus includes at least one delay circuit for delaymg the signal from the output circuit whereby the number of sections into which each raster line is divided is effectively increased without increasing the pulse frequency from the cyclic counter.
  • the display apparatus includes a circuit for changing the shape of the signal from the output circuit whereby the number of raster lines is effectively increased
  • FIG. 1 is a schematic diagram of a cathode ray tube screen showing the parameters defining a line symbol
  • FIG. 2 is a block diagram of the display apparatus
  • FIG. 3 is a block diagram of the output stage of FIG. 2:
  • FIG. 4 is a block diagram of the delay circuit of FIG. 2;
  • FIGS. 5a and 5b show respectively the optimum and actual shapes of bright-up pulses applied to the cathode ray tube under certain conditions of operation of the apparatus.
  • FIG. 6 is a block diagram of the pulse shaping circuit of FIG. 2.
  • FIG. 1 a line symbol 1 l5 shown displayed on the screen 2 of a cathode ray tube.
  • the screen is scanned by an interlaced field raster having even field lines 3 and odd field lines 3a.
  • the raster may be a 625 line, 50 Hz, raster, but for the sake of simplicity FIG. 1 shows a 12 line raster.
  • the line symbol is made up of a series of brightened-up portions of the raster line. These brightened-up portions are produced by applying bright-up pulses to the brightness control circuitry of the cathode ray tube. For each brightened-up portion, it is necessary therefore to determine on which line of the raster the brightened-up portion is to occur (Y-co-ordinates) and at which points on the raster line the brightened-up portions are to begin and end (X-coordinates).
  • the X co-ordinates for successive brightened-up portions increase by thesame amount each time. This amount is called the increment and is equal to h tan 6 where h is the spacing between the raster lines.
  • the values of Xst and Xop for the first line of the odd field can be found and values of Xst and Xop for succeeding lines of the odd field can be found by successively adding twice the increment to the values of Xst and Xop for the first line of the odd field.
  • the increment is zero whereas at 0 45 the increment is equal to h. If the raster lines are considered to have unit spacing then at 6 45 the increment is 1. In this case the increment must, be fractional for lines having 6 between 0 and 45, which implies that Xst and Xop must contain a fractional part. Since, from equations (2) Xop Xs! w sec 6 this fractional part must be the same for successive values of X5! and Xop. Therefore. if the increment is split into two words inc and inc frac, each of bits. lines having these angles can be drawn.
  • inc frac On each line inc frac is added to X frac and inc is added to X51 and Xop. On the line where X frac overflows the carry is added to Xsr and Xop.
  • the binary output from the computer is fed to and stored in an output circuit 11 which is also fed by pulses from a cycle counter 12 in synchronism with the line scan.
  • the cyclic counter 12 provides the division of the raster lines into X coordinate sections. To provide 780 sections per raster line, the frequency of the pulses must be 780X( 1/52) US which equals MHz. (52 US is the time of line scan).
  • Coincidence between Xst and Xop and the relevant clock pulses causes the generation of a bright-up pulse which is fed to the brightness control of a cathode ray tube 13 through a delay circuit 14 and a pulse shaping circuit 15 or through the delay circuit 14 alone depending on the value of 0 as explained below.
  • the actual output therefrom involves only the current values of Xsl and Xop. As shown in FIG. 3 these values are stored in respective output registers l6, 17. Each register has an associated comparator l8, 19 so that the value of Xst and Xop can be compared with the count from the cyclic counter 12. The outputs from the comparators l8, 19 are fed to a gate circuitry 20 which in response to the outputs develops a signal during the period when the output from the counter 12 is 2 X5! and s Xop.
  • the stepped appearance of a near vertical line is due to the X position being limited by the number of steps along the raster line provided by the cyclic counter 12.
  • the steps are most apparent when the increment is zero and inc frac is non-zero, i.e., at the point when X frac is carried over and Xst and Xop shift by one place which is approximately a 60ns shift.
  • the X definition needs to be increased and the pulses shifted according to X-frac. This could be done by increasing the pulse frequency but 15 MHz is the practical limit using standard components.
  • the solution adopted is to use delay circuitry and select the delay according to the value of X-frac.
  • To increase the X-definition by a factor of 4 three 15 ns delay circuits 21, 22, 23 are used as shown in FIG. 4.
  • the outputs from the delay circuits are fed to a 4/1 multiplexer 24.
  • the two most significant bits of X frac are applied by way of line 24a to data select lines of the multiplexer to select an appropriate delay.
  • n delay circuits each having a delay x, and an (n l)/l multiplexer can be used, provided that (n 1 )x equals the cyclic counter pulse length.
  • the use of the delay technique means that the pulse frequency can be reduced if required, without losing the original definition. For example, seven 15 ns delay circuits and a frequency of 7 /2 MHz gives an effective frequency of 60 MHz which is the same as if three 15 ns delay circuits and a 15 MHZ frequency are used.
  • Such a reduction in the pulse frequency has definite advantages particularly with regard to the output stage where Xst and Xop are compared with the output of the cyclic counter. As there is a reduction in the number of bits to be compared, a significant reduction in the amount of hardware is produced.
  • the length of the bright-up pulse must vary.
  • the increase in length of the sections defined by the cyclic counter at a reduced frequency means that the actual length of the bright-up pulse may not be the same as the right length to give a constant width line symbol.
  • a differential delay factor must be introduced; i.e., a brightup pulse is delayed by different amounts at its rising and falling edges.
  • a 2/1 multiplexer 50 shown dotted
  • the integer bits are fewer and accordingly, no penalty is incurred as regards storage requirements.
  • FIG. 5A shows the optimum shape of the bright-up pulse.
  • FIG. 6 shows the leading and trailing edges of the pulse.
  • the pulse shaping circuit of FIG. 6 consists of a bi nary rate multiplier (BRM) fed by pulses from the cyclic counter and having its output connected to the input of an up-down counter 26.
  • Output signals from the counter 26 on lines 30-32 are fed to a l of 8 decoder 33.
  • the output from the decoder 33 is fed to an non-linear digital to analogue converter 34 which has a non-linear characteristic of such terms as to control the bright-up circuitry of the tube so as to provide visually acceptable symbols.
  • the BRM 25 is a device which performs the function frequency in X M frequency out where M is a 6 bit number in the range 0-63.
  • the frequency out is in fact a pulse rate which can be made repeatable using the clear facility on the BRM.
  • the up-down counter 26 is fed by the frequency out and counts at a rate determined by the frequency out.
  • the counter 26 begins counting at the beginning of the bright-up pulse, i.e., at Xst. The counting stops after seven counts and when Xop is reached the counter begins counting down to zero.
  • the final output from the converter 34, which is applied to the brightness control is a pulse having leading and trailing edges formed of eight steps. The brightened-up portions of the raster thus have a brightness varying through eight shades of grey.
  • the control circuitry from the BRM 25 and the counter 26 consists of gates, A, B and C.
  • the gates-A, B receive the outputs from the output circuit gate 20 (FIG. 3) and from the lines 30-32 of the counter.
  • the outputs from gates A and B form the input to gate C which has its output connected to the clear-enable facility of the BRM. Considering the output from the counter to be initially zero, the sequence of events is as follows:
  • the gate A is enabled thus enabling the gate C and the BRM and the counter.
  • the gate B is inhibited, thus inhibiting the gate C and clearing the BRM.
  • the gate B is enabled, thus enabling the gate C and the BRM and the counter again with the counter in the count-down state.
  • the gage A is inhibited, thus inhibiting the gate C and clearing the BRM.
  • the technique described above only allows the use of graded bright-up pulses over angles of 0 +77 to and -77 to 90". Outside these angles the appearance of the line is degraded. To overcome this, the influence of the BRM is extended by reducing the number of shades of grey to four. An extra bit of information added to the 6 bit word M, is required to define the different angle region. As the counter counts only to four, the significance of the count has to be doubled. This is achieved by the insertion of a 2/1 multiplexer 35 (shown dotted) before the l of 8 decoder. The control of the multiplexer uses the extra bit of information and is switched for the duration of a bright-up pulse. The output of the multiplexer counts at twice the rate of the counter and hence the same peak value of the bright-up pulse is reached. The technique is used for angles of 74 58 to 77 and 58 to 77. 1
  • the delay circuit 14 and the pulse shping circuit 15 are in series, but that a switching circuit 60 allows the pulse shaping circuit to be by-passed.
  • the pulse shaping technique is only suitable for values of 0 in the ranges 58 to 90 and -5 8 to 90.
  • a further bit of information on Xst or Xop operates the switching circuit to bypass the pulse shaping circuit.
  • a final defect in the appearance of the line which must be overcome is flicker at the beginning and end of the line.
  • cyclic digital counter means operating in synchronism with the raster line scan so that successive counts of the counter correspond to successive sections of each raster line, thereby notionally dividing each raster line into sections respectively corresponding to different counts of the counter;
  • an output circuit comprising means for comparing said digital output with the output of the counter means to produce an output signal for changing said visual parameter when there is correspondence between said digital outputs and the output of the counter means;
  • delay means connectable to delay the output of said output circuit by a fraction of the period between successive counts of the counter means when a said digital output fractionally exceeds the corresponding count of the digital counter by a predetermined amount, thereby to effectively increase the number of sections into which each raster line is notionally divided.
  • the output circuit comprises means for comparing the digital outputs defining the beginning and end of the selected raster portion with the output of the cyclic counter and for developing an output signal during the period when the output from the counter is greater than or equal to the digital output defining the beginning and less than or equal to the digital output defining the end, of the selected raster portion.
  • said delay means includes a number of equal length delay circuits arranged to produce delays of 0, x, 2x nx (where n is the number of delay circuits, x is the delay of each delay circuit and (n 1) x equals the period between successive counts of the counting means); and an (n 1 multiplexer for selecting an appropriate delay according to the amount by which a said digital output exceeds the output of the digital counter.
  • said digital outputs define the beginning and end of each said raster line portion required to be selected, and said output circuit comprises means for producing an output signal when the digital counter output is greater than or equal to the digital output defining the beginning, and less than or equal to the digital output defining the end of a said raster line portion.
  • said delay means comprises means for delaying the beginning and end of the output signal of the output circuit by different amounts.
  • Display apparatus including pulse shaping means for shaping the output of the output circuit so that the degree of change in the visual parameter varies along the length of a said raster line portron.
  • the shaping means comprises circuitry for producing a signal having stepped leading and trailing edges.
  • Display apparatus including means for varying the number of steps forming the leading and trailing edges of the signal in dependence on the angle the desired symbol makes with the raster

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Video Image Reproduction Devices For Color Tv Systems (AREA)

Abstract

Display apparatus in which line symbols are displayed by scanning a CRT in a raster and brightening up portions of the raster lines. The portion of raster line to be brightened-up is defined by a digital output. A cyclic counter produces a large number of pulses during each raster line to notionally divide each line into a number of equql length, sequentially numbered sections changes in the brightness being effected when there is correspondence between the digital output and the counter output.

Description

United States Patent Wilkinson et al. July 8, 1-975 \[54] DISPLAY APPARATUS 3,668,687 6/1972 Hale 340/324 AD 3,671,957 6 1972 K I t l. 340 324 AD [751 Inventors: Bria" Wilkinson Ramhami Dim-d 3,686,662 851972 1355: 340324 AD John Jlbb, Chatham; Mart"! Nell 3,792,464 2/1974 Hamada et al 340/324 AD Smith, Rochester, all of England 73 Assignee: Elliott Brothers (London) Limited, Primwy EXaminerDavid Trafton ch l f d England Attorney, Agent, or Firm-Kirschstein, Kirschstein, Ottinger & Frank \[22] Filed: Mar. 7, 1973 [211 App]. No.: 338,842 [57] ABSTRACT Display apparatus in which line symbols are displayed [30] Foreign Application Priority Data by scanning a CRT in a raster and brightening up por- Mar. 10, 1972 United Kingdom 11275/72 tions Of the raster lines- The Portion of raster line to be brightened-up is defined by a digital output. A cy- 52 us. (:1. 340/324 AD; 315/22 clic counter produces a large number of pulses during [51} int. Cl. G08b 5/36 each raster line notionally divide each line into a Field Of Search 340/324 AD; 315/22 number of equal ng h s q n i y n mber se tions changes in the brightness being effected when 1[56] References Ci there is correspondence between the digital output UNITED STATES PATENTS and the counter 3.388.391 6/1968 Clark 340/324 AD X 8 Claims, 7 Drawing Figures FATE-1 mm SHEET Cyclic A2 )4 Counter i0 H\ v Delay B Compul'er ulpur dam Q 7 M Pulse Shaping Fig.2
From Compul'er A6 p /47 Reglsl'er Regisl'er I I CFr0|r n Xsl' A8 x0 A9 Comparator Comparator comm PIITEIITEITIIII 8 m5 3.894.292
SHEET 2 From OUIpuI- CircuII' l/ ISnS. DeIav I\ l/ A I 22 ISnS From Computer Delay M-uIhpIexer XFrac XsI Frac --1 Xopfrac "1 i fins E g 23 Delay -24 I 24a D I I I I I L z I i I --I I 1I Js: :=:I%F
A VoIIs Volrs XISI' Xop I i i I I I I I i I I I I I I l I I l Time DISPLAY APPARATUS This invention relates to display apparatus of the kind in which a display area is scanned in a raster and in which a symbol can be produced on the display area by causing a change in a visual parameter, e.g., brightness, of one or more selected portions of the raster lines.
Accordingly. this invention provides display apparatus of the kind hereinbefore defined comprising means for producing a digital output defining the position of each raster line portion required to be selected to display a desired symbol, means for producing reference signals corresponding to points along each raster line and an output circuit for producing a signal for changing said visual parameter at each selected raster line portion determined by the digital output.
According to a preferred feature, the display apparatus includes a cyclic counter operating in synchronism with the raster line scanning generator such that a large number of pulses occur during each raster line, thereby notionally dividing each raster line into a large number of equal length, sequentially numbered, sections changes in said visual parameter being effected when there is correspondence between the digital output and the output of said counter.
According to a further preferred feature, the display apparatus includes at least one delay circuit for delaymg the signal from the output circuit whereby the number of sections into which each raster line is divided is effectively increased without increasing the pulse frequency from the cyclic counter.
According to yet a further preferred feature, the display apparatus includes a circuit for changing the shape of the signal from the output circuit whereby the number of raster lines is effectively increased The invention will be more readily understood from the following description of a preferred embodiment in which a line symbol is produced on the screen of a cathode ray tube by brightening up portions of the raster, taken in conjunction with the accompanying drawings in which:
FIG. 1 is a schematic diagram of a cathode ray tube screen showing the parameters defining a line symbol;
FIG. 2 is a block diagram of the display apparatus;
FIG. 3 is a block diagram of the output stage of FIG. 2:
FIG. 4 is a block diagram of the delay circuit of FIG. 2;
FIGS. 5a and 5b show respectively the optimum and actual shapes of bright-up pulses applied to the cathode ray tube under certain conditions of operation of the apparatus, and
FIG. 6 is a block diagram of the pulse shaping circuit of FIG. 2.
Although a number of lines symbols can be generated at the same time, for the sake of simplicity the following description relates to the generation of a single symlbol.
In the schematic diagram of FIG. 1, a line symbol 1 l5 shown displayed on the screen 2 of a cathode ray tube. The screen is scanned by an interlaced field raster having even field lines 3 and odd field lines 3a. Typically the raster may be a 625 line, 50 Hz, raster, but for the sake of simplicity FIG. 1 shows a 12 line raster.
.As can be seen from FIG. 1, the line symbol is made up of a series of brightened-up portions of the raster line. These brightened-up portions are produced by applying bright-up pulses to the brightness control circuitry of the cathode ray tube. For each brightened-up portion, it is necessary therefore to determine on which line of the raster the brightened-up portion is to occur (Y-co-ordinates) and at which points on the raster line the brightened-up portions are to begin and end (X-coordinates).
With a 625 line raster, 585 of the lines are visible, the remainder being hidden in field blank. The Y- resolution is therefore 1 in 585. To give an X-resolution comparable to the Y-resolution, each raster line must be divided into sufficient number of sections such that each section is equal to the distance between the raster lines. This number is equal to L X2=Xc+ TSinO As can be seen in FIG. 1, X, lies at the centre of the brightened-up portion having co-ordinate Y1. Therefore, Xst and Xop, the co-ordinates of the beginning and end of the brightened-up portion are given by X0p=Xl+VzWsecl9 (2 The X co-ordinates for successive brightened-up portions increase by thesame amount each time. This amount is called the increment and is equal to h tan 6 where h is the spacing between the raster lines. Thus, once Xst and Xop for the first line of the even field are known, Xst and Xop for succeeding lines of the even field can be found by successively adding twice the increment to the initial values of Xst and Xop. By adding once the increment to the initial values of Xst and Xop, the values of Xst and Xop for the first line of the odd field can be found and values of Xst and Xop for succeeding lines of the odd field can be found by successively adding twice the increment to the values of Xst and Xop for the first line of the odd field.
Thus, the only calculation necessary, once the values of Xst and Xop for the first brightened-up portion and the values of Y1 and Y2 have been calculated, is the successive addition of once or twice the increment to Xst and Xop.
Referring now to FIG. 2, the calculation of Y1, Y2, Xst, Xop and increment is carried out by a digital computer l0, and thus values of these quantities are in binary form.
As mentioned above, only 585 lines of the raster are visible. If the line symbol always started on an even field and finished on an odd field then the Ycoordinates need only be of! in 292 /2 resolution and a word length of 9 bits would be required to define Y and Y However, to avoid the necessity of the line having to start and finish in this way. a further bit is added to the words to indicate whether or not the first or last (or both) bright-up pulses should be suppressed. The X resolution is 1 in 780 and therefore 10 bit words are required to define Xst and Xop.
As the X co-ordinate sections are equal to the raster line spacing h at 0, the increment is zero whereas at 0 45 the increment is equal to h. If the raster lines are considered to have unit spacing then at 6 45 the increment is 1. In this case the increment must, be fractional for lines having 6 between 0 and 45, which implies that Xst and Xop must contain a fractional part. Since, from equations (2) Xop Xs! w sec 6 this fractional part must be the same for successive values of X5! and Xop. Therefore. if the increment is split into two words inc and inc frac, each of bits. lines having these angles can be drawn. For example, consider the situation where Xop 102 inc 0 inc frac 0.25 (6 14) X frac 3 0 Then for successive raster lines X3! 100, Xop 102 X frac 0.25 Xst=100.X0p 102 X frac 0.5 Xst=100,X0p =102 X frac 0.75
Xst 101. Xop 103 X frac =0.00
X5! 101, Xop 103 X frac 0.25, etc.
On each line inc frac is added to X frac and inc is added to X51 and Xop. On the line where X frac overflows the carry is added to Xsr and Xop. The binary output from the computer is fed to and stored in an output circuit 11 which is also fed by pulses from a cycle counter 12 in synchronism with the line scan. The cyclic counter 12 provides the division of the raster lines into X coordinate sections. To provide 780 sections per raster line, the frequency of the pulses must be 780X( 1/52) US which equals MHz. (52 US is the time of line scan). Coincidence between Xst and Xop and the relevant clock pulses causes the generation of a bright-up pulse which is fed to the brightness control of a cathode ray tube 13 through a delay circuit 14 and a pulse shaping circuit 15 or through the delay circuit 14 alone depending on the value of 0 as explained below.
As the increment is added by the computer, the actual output therefrom involves only the current values of Xsl and Xop. As shown in FIG. 3 these values are stored in respective output registers l6, 17. Each register has an associated comparator l8, 19 so that the value of Xst and Xop can be compared with the count from the cyclic counter 12. The outputs from the comparators l8, 19 are fed to a gate circuitry 20 which in response to the outputs develops a signal during the period when the output from the counter 12 is 2 X5! and s Xop.
If 0 45, for every increment in X there is the same increment in Y (increment l) and the definition in X equals the definition in Y and a visually acceptable line is formed. However, for angles near the vertical (6 small). for an increment in X there is a large number of increments in Y and the line appears stepped. For angles near the horizontal (0 large) the limit is in the Y direction and the line again appears stepped.
The stepped appearance of a near vertical line is due to the X position being limited by the number of steps along the raster line provided by the cyclic counter 12. The steps are most apparent when the increment is zero and inc frac is non-zero, i.e., at the point when X frac is carried over and Xst and Xop shift by one place which is approximately a 60ns shift. To overcome this problem the X definition needs to be increased and the pulses shifted according to X-frac. This could be done by increasing the pulse frequency but 15 MHz is the practical limit using standard components.
The solution adopted is to use delay circuitry and select the delay according to the value of X-frac. To increase the X-definition by a factor of 4 three 15 ns delay circuits 21, 22, 23 are used as shown in FIG. 4. The outputs from the delay circuits are fed to a 4/1 multiplexer 24. The two most significant bits of X frac are applied by way of line 24a to data select lines of the multiplexer to select an appropriate delay. Thus, if
0 S X frac 0.25 No delay is selected 0.25 X frac 0.5 15 ns delay is selected 05 s X frac 0.75 30 ns delay is selected 0.75 S X frac 1.00 45 ns delay is selected 0+1 5 X frac 0.25+1 No delay is selected but as the value of X frac has overflowed, the position has been shifted by 60ns.
If even better X definition is required then seven 7 /2 ns delay circuits or fifteen 3% ns delay circuits can be used with a corresponding increase in the number of bits of X frac applied to the data selection lines and replacement of the 4/1 multiplexer by an 8/1 or 16/1 multiplexer as appropriate. Generally, n delay circuits each having a delay x, and an (n l)/l multiplexer can be used, provided that (n 1 )x equals the cyclic counter pulse length.
The use of the delay technique means that the pulse frequency can be reduced if required, without losing the original definition. For example, seven 15 ns delay circuits and a frequency of 7 /2 MHz gives an effective frequency of 60 MHz which is the same as if three 15 ns delay circuits and a 15 MHZ frequency are used. Such a reduction in the pulse frequency has definite advantages particularly with regard to the output stage where Xst and Xop are compared with the output of the cyclic counter. As there is a reduction in the number of bits to be compared, a significant reduction in the amount of hardware is produced.
As can be seen from FIG. I, for the width W to re main constant as the angle 6 varies, the length of the bright-up pulse must vary. However, the increase in length of the sections defined by the cyclic counter at a reduced frequency means that the actual length of the bright-up pulse may not be the same as the right length to give a constant width line symbol.
To overcome this problem, a differential delay factor must be introduced; i.e., a brightup pulse is delayed by different amounts at its rising and falling edges. This can be achieved as shown in FIG. 4, by introducing a 2/1 multiplexer 50 (shown dotted) so that the values of fractional values for Xst and Xop can be multiplexed on to the data select lines of the multiplexer 24. This means that the computer must store the fractional values for Xst and Xop. However, the integer bits are fewer and accordingly, no penalty is incurred as regards storage requirements.
The stepped appearance of a near horizontal line is due to the limited number of raster lines on the screen. It is impractical to increase the number of raster lines and the disadvantage is overcome by shaping the bright-up pulses so that each brightened-up portion varies in brightness along its length and blends with the other brightened-up portions to give the illusion of a continuous line. FIG. 5A shows the optimum shape of the bright-up pulse. As the output pulses from the gate (FIG. 3) are square with rise and fall times corresponding to the logic circuitry used, a further circuit, as shown in FIG. 6 is required for producing an approximation to this optimum shape. This approximation is shown in FIG. 5B. The leading and trailing edges of the pulse are formed by seven steps.
The pulse shaping circuit of FIG. 6 consists of a bi nary rate multiplier (BRM) fed by pulses from the cyclic counter and having its output connected to the input of an up-down counter 26. Output signals from the counter 26 on lines 30-32 are fed to a l of 8 decoder 33. The output from the decoder 33 is fed to an non-linear digital to analogue converter 34 which has a non-linear characteristic of such terms as to control the bright-up circuitry of the tube so as to provide visually acceptable symbols.
The BRM 25 is a device which performs the function frequency in X M frequency out where M is a 6 bit number in the range 0-63. The frequency out is in fact a pulse rate which can be made repeatable using the clear facility on the BRM.
The up-down counter 26 is fed by the frequency out and counts at a rate determined by the frequency out.
The counter 26 begins counting at the beginning of the bright-up pulse, i.e., at Xst. The counting stops after seven counts and when Xop is reached the counter begins counting down to zero. The final output from the converter 34, which is applied to the brightness control is a pulse having leading and trailing edges formed of eight steps. The brightened-up portions of the raster thus have a brightness varying through eight shades of grey.
The control circuitry from the BRM 25 and the counter 26 consists of gates, A, B and C. The gates-A, B receive the outputs from the output circuit gate 20 (FIG. 3) and from the lines 30-32 of the counter. The outputs from gates A and B form the input to gate C which has its output connected to the clear-enable facility of the BRM. Considering the output from the counter to be initially zero, the sequence of events is as follows:
i. At Xsl, the gate A is enabled thus enabling the gate C and the BRM and the counter. When the counter reaches seven, the gate B is inhibited, thus inhibiting the gate C and clearing the BRM.
. ii. At Xop, the gate B is enabled, thus enabling the gate C and the BRM and the counter again with the counter in the count-down state. When the counter reaches zero, the gage A is inhibited, thus inhibiting the gate C and clearing the BRM.
It will be realised that as the pulse does not commence until Xst and has longer rise and fall times, the pulse as a whole will be later than it should be. A suitable correction is calculated by the computer to allow for this.
The technique described above only allows the use of graded bright-up pulses over angles of 0 +77 to and -77 to 90". Outside these angles the appearance of the line is degraded. To overcome this, the influence of the BRM is extended by reducing the number of shades of grey to four. An extra bit of information added to the 6 bit word M, is required to define the different angle region. As the counter counts only to four, the significance of the count has to be doubled. This is achieved by the insertion of a 2/1 multiplexer 35 (shown dotted) before the l of 8 decoder. The control of the multiplexer uses the extra bit of information and is switched for the duration of a bright-up pulse. The output of the multiplexer counts at twice the rate of the counter and hence the same peak value of the bright-up pulse is reached. The technique is used for angles of 74 58 to 77 and 58 to 77. 1
Referring once more to FIG. 2, it can be seen that the delay circuit 14 and the pulse shping circuit 15 are in series, but that a switching circuit 60 allows the pulse shaping circuit to be by-passed.
As mentioned above, the pulse shaping technique is only suitable for values of 0 in the ranges 58 to 90 and -5 8 to 90. For values of 0 in the range 58 to +5 8, a further bit of information on Xst or Xop operates the switching circuit to bypass the pulse shaping circuit.
A final defect in the appearance of the line which must be overcome is flicker at the beginning and end of the line.
Referring again to FIG. 1, it can be seen that the first part of the initial brightened-up portion and the last part on the final brightened-up portion are only drawn on one field. This effect is particularly noticeable with a near horizontal line where these parts are quite long.
This effect is overcome by extending the length of the line at both ends and by generating a blanking signal outside the required length. The flickering regions thus lie in the blanked off parts.
From the above description, it is apparent that in order to draw a line symbol the current values of Xst and Xop have to be incremented line by line to give the new values. Hence, computation must be carried out on every raster line between Y1 and Y2. The obvious time to carry out this computation is during line blanks. However, this period is only 12 us long whereas the period of line scan is 52 us long. Therefore, by carrying out the computation for a particular raster line in the previous line scan and storing the values in the output registers during line blank, four times as many line symbols can be drawn. The actual number of line symbols that can be drawn is thus dependent on how many computations the computer can carry out in 52 us.
We claim:
1. Display apparatus in which the display comprises a raster of parallel lines and a symbol is displayed by changing a visual parameter of one or more selected portions of the raster lines comprising:
a. cyclic digital counter means operating in synchronism with the raster line scan so that successive counts of the counter correspond to successive sections of each raster line, thereby notionally dividing each raster line into sections respectively corresponding to different counts of the counter;
b. means for producing digital outputs defining the position of each raster line portion required to be selected to display a required symbol, in accordance with the notional numbering of sections of the raster lines effected by the counter means;
c. an output circuit comprising means for comparing said digital output with the output of the counter means to produce an output signal for changing said visual parameter when there is correspondence between said digital outputs and the output of the counter means; and
d. delay means connectable to delay the output of said output circuit by a fraction of the period between successive counts of the counter means when a said digital output fractionally exceeds the corresponding count of the digital counter by a predetermined amount, thereby to effectively increase the number of sections into which each raster line is notionally divided.
2. Display apparatus according to claim 1, in which the output circuit comprises means for comparing the digital outputs defining the beginning and end of the selected raster portion with the output of the cyclic counter and for developing an output signal during the period when the output from the counter is greater than or equal to the digital output defining the beginning and less than or equal to the digital output defining the end, of the selected raster portion.
3. Display apparatus according to claim 1 wherein said delay means includes a number of equal length delay circuits arranged to produce delays of 0, x, 2x nx (where n is the number of delay circuits, x is the delay of each delay circuit and (n 1) x equals the period between successive counts of the counting means); and an (n 1 multiplexer for selecting an appropriate delay according to the amount by which a said digital output exceeds the output of the digital counter.
4. Display apparatus according to claim 3 wherein said digital outputs define the beginning and end of each said raster line portion required to be selected, and said output circuit comprises means for producing an output signal when the digital counter output is greater than or equal to the digital output defining the beginning, and less than or equal to the digital output defining the end of a said raster line portion.
5. Display apparatus according to claim 4 wherein said delay means comprises means for delaying the beginning and end of the output signal of the output circuit by different amounts.
6. Display apparatus according to claim 1 including pulse shaping means for shaping the output of the output circuit so that the degree of change in the visual parameter varies along the length of a said raster line portron.
7. Display apparatus according to claim 6, in which the shaping means comprises circuitry for producing a signal having stepped leading and trailing edges.
8. Display apparatus according to claim 7, including means for varying the number of steps forming the leading and trailing edges of the signal in dependence on the angle the desired symbol makes with the raster

Claims (8)

1. Display apparatus in which the display comprises a raster of parallel lines and a symbol is displayed by changing a visual parameter of one or more selected portions of the raster lines comprising: a. cyclic digital counter means operating in synchronism with the raster line scan so that successive counts of the counter correspond to successive sections of each raster line, thereby notionally dividing each raster line into sections respectively corresponding to different counts of the counter; b. means for producing digital outputs defining the position of each raster line portion required to be selected to display a required symbol, in accordance with the notional numbering of sections of the raster lines effected by the counter means; c. an output circuit comprising means for comparing said digital output with the output of the counter means to produce an output signal for changing said visual parameter when there is correspondence between said digital outputs and the output of the counter means; and d. delay means connectable to delay the output of said output circuit by a fraction of the period between successive counts of the counter means when a said digital output fractionally exceeds the corresponding count of the digital counter by a predetermined amount, thereby to effectively increase the number of sections into which each raster line is notionally divided.
2. Display apparatus according to claim 1, in which the output circuit comprises means for comparing the digital outputs defining the beginning and end of the selected raster portion with the output of the cyclic counter and for developing an output signal during the period when the output from the counter is greater than or equal to the digital output defining the beginning and less than or equal to the digital output defining the end, of the selected raster portion.
3. Display apparatus according to claim 1 wherein said delay means includes a number of equal length delay circuits arranged to produce delays of 0, x, 2x . . . nx (where n is the number of delay circuits, x is the delay of each delay circuit and (n + 1) x equals the period between successive counts of the counting means); and an (n + 1) multiplexer for selecting an appropriate delay according to the amount by which a said digital output exceeds the output of the digital counter.
4. Display apparatus according to claim 3 wherein said digital outputs define the beginning and end of each said raster line portion required to be selected, and said output circuit comprises means for producing an output signal when the digital counter output is greater than or equal to the digital output defining the beginning, and less than or equal to the digital output defining the end of a said raster line portion.
5. Display apparatus according to claim 4 wherein said delay means comprises means for delaying the beginning and end of the output signal of the output circuit by different amounts.
6. Display apparatus according to claim 1 including pulse shaping means for shaping the output of the output circuit so that the degree of change in the visual parameter varies along the length of a said raster line portion.
7. Display apparatus according to claim 6, in which the shaping means comprises circuitry for producing a signal having stepped leading and trailing edges.
8. Display apparatus according to claim 7, including means for varying the number of steps forming the leading and trailing edges of the signal in dependence on the angle the desired symbol makes with the raster lines.
US338842A 1972-03-10 1973-03-07 Display apparatus Expired - Lifetime US3894292A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1127572A GB1401022A (en) 1972-03-10 1972-03-10 Display apparatus

Publications (1)

Publication Number Publication Date
US3894292A true US3894292A (en) 1975-07-08

Family

ID=9983223

Family Applications (1)

Application Number Title Priority Date Filing Date
US338842A Expired - Lifetime US3894292A (en) 1972-03-10 1973-03-07 Display apparatus

Country Status (6)

Country Link
US (1) US3894292A (en)
DE (1) DE2311826A1 (en)
FR (1) FR2175851B1 (en)
GB (1) GB1401022A (en)
IL (1) IL41679A0 (en)
IT (1) IT980539B (en)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4127850A (en) * 1974-10-03 1978-11-28 Smiths Industries Limited Scanning display apparatus
US4145754A (en) * 1976-06-11 1979-03-20 James Utzerath Line segment video display apparatus
US4231032A (en) * 1977-09-09 1980-10-28 Hitachi, Ltd. Variable accuracy trend graph display apparatus
US4276563A (en) * 1976-12-04 1981-06-30 Robert Bosch Gmbh Representing a video signal upon the picture screen of a video display device
US4298867A (en) * 1979-07-06 1981-11-03 System Concepts, Inc. Cathode ray tube character smoother
US4307393A (en) * 1977-11-11 1981-12-22 Hitachi, Ltd. Trend graph display system
US4318097A (en) * 1978-03-15 1982-03-02 Nippon Electric Co., Ltd. Display apparatus for displaying a pattern having a slant portion
US4454507A (en) * 1982-01-04 1984-06-12 General Electric Company Real-time cursor generator
US4496976A (en) * 1982-12-27 1985-01-29 Rockwell International Corporation Reduced memory graphics-to-raster scan converter
US4774508A (en) * 1985-08-15 1988-09-27 Citizen Watch Co., Ltd. Method of forming matrix image
US5028914A (en) * 1988-06-23 1991-07-02 Motorola, Inc. Method and apparatus for waveform digitization

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2940088C2 (en) * 1979-10-03 1986-04-10 Hewlett-Packard Co., Palo Alto, Calif. Raster display device
US4622545A (en) * 1982-09-30 1986-11-11 Apple Computer, Inc. Method and apparatus for image compression and manipulation
JPS60191293A (en) * 1984-03-12 1985-09-28 ダイキン工業株式会社 Fast linear interpolation circuit for crt display unit
GB2215570A (en) * 1988-03-01 1989-09-20 Kontron Instr Limited Improving the legibility of traces close to the line direction

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3388391A (en) * 1965-04-07 1968-06-11 Rca Corp Digital storage and generation of video signals
US3668687A (en) * 1969-11-17 1972-06-06 Sanders Associates Inc Raster scan symbol generator
US3671957A (en) * 1969-03-12 1972-06-20 Computer Optics Character generation display system
US3686662A (en) * 1970-11-12 1972-08-22 Int Standard Electric Corp Circuit arrangement for the presentation of waveforms on viewing screens utilizing raster deflection
US3792464A (en) * 1973-01-10 1974-02-12 Hitachi Ltd Graphic display device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3388391A (en) * 1965-04-07 1968-06-11 Rca Corp Digital storage and generation of video signals
US3671957A (en) * 1969-03-12 1972-06-20 Computer Optics Character generation display system
US3668687A (en) * 1969-11-17 1972-06-06 Sanders Associates Inc Raster scan symbol generator
US3686662A (en) * 1970-11-12 1972-08-22 Int Standard Electric Corp Circuit arrangement for the presentation of waveforms on viewing screens utilizing raster deflection
US3792464A (en) * 1973-01-10 1974-02-12 Hitachi Ltd Graphic display device

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4127850A (en) * 1974-10-03 1978-11-28 Smiths Industries Limited Scanning display apparatus
US4145754A (en) * 1976-06-11 1979-03-20 James Utzerath Line segment video display apparatus
US4276563A (en) * 1976-12-04 1981-06-30 Robert Bosch Gmbh Representing a video signal upon the picture screen of a video display device
US4231032A (en) * 1977-09-09 1980-10-28 Hitachi, Ltd. Variable accuracy trend graph display apparatus
US4307393A (en) * 1977-11-11 1981-12-22 Hitachi, Ltd. Trend graph display system
US4318097A (en) * 1978-03-15 1982-03-02 Nippon Electric Co., Ltd. Display apparatus for displaying a pattern having a slant portion
US4298867A (en) * 1979-07-06 1981-11-03 System Concepts, Inc. Cathode ray tube character smoother
US4454507A (en) * 1982-01-04 1984-06-12 General Electric Company Real-time cursor generator
US4496976A (en) * 1982-12-27 1985-01-29 Rockwell International Corporation Reduced memory graphics-to-raster scan converter
US4774508A (en) * 1985-08-15 1988-09-27 Citizen Watch Co., Ltd. Method of forming matrix image
US5028914A (en) * 1988-06-23 1991-07-02 Motorola, Inc. Method and apparatus for waveform digitization

Also Published As

Publication number Publication date
GB1401022A (en) 1975-07-16
FR2175851A1 (en) 1973-10-26
FR2175851B1 (en) 1979-05-11
DE2311826A1 (en) 1973-09-13
IT980539B (en) 1974-10-10
IL41679A0 (en) 1973-07-30

Similar Documents

Publication Publication Date Title
US3894292A (en) Display apparatus
US4591897A (en) System for generating a display of graphic objects over a video camera picture
EP0186828B1 (en) Method and apparatus for providing anti-aliased edges in pixel-mapped computer graphics
EP0609980B1 (en) Motion detection method and apparatus
US5844532A (en) Color display system
US4422019A (en) Apparatus for providing vertical as well as horizontal smoothing of convergence correction signals in a digital convergence system
US4272808A (en) Digital graphics generation system
US3845243A (en) System for producing a gray scale with a gaseous display and storage panel using multiple discharge elements
GB2040146A (en) Electronic graticule system
US6556214B1 (en) Multilevel image display method
CA1243138A (en) High speed memory access circuit of crt display unit
US4868548A (en) Clock synchronization system
US3786481A (en) Digital television character generator
US4513278A (en) Video Synthesizer for a digital video display system employing a plurality of grayscale levels displayed in discrete steps of luminance
US5038139A (en) Half tone display driving circuit for crystal matrix panel and half tone display method thereof
US4276563A (en) Representing a video signal upon the picture screen of a video display device
US3725723A (en) Graphic display system
EP0032126A2 (en) Random pattern generator
JPH0258635B2 (en)
US3761765A (en) Crt display system with circle drawing
US6281950B1 (en) High speed digital zone control
US4012735A (en) Dual mode pattern generator
US5990855A (en) Image information process apparatus for causing a display to display continuous tones in a pseudo manner
US3713135A (en) Digital symbol generator
SU934537A1 (en) Device for forming dial on crt screen