US3772581A

US3772581A - Torpedo presetting system

Info

Publication number: US3772581A
Application number: US00241764A
Authority: US
Inventors: W Cormier
Original assignee: US Department of Navy
Current assignee: US Department of Navy
Priority date: 1972-04-06
Filing date: 1972-04-06
Publication date: 1973-11-13
Anticipated expiration: 1990-11-13

Abstract

An automatic presetting circuit for controlling remotely located rotary stepping relays of a torpedo in a torpedo launching system. The average of a COMMAND signal voltage and a READBACK signal voltage is compared with a single standard voltage to determine any unbalanced condition between the two. As a result of an unbalanced condition, one of the two high gain D.C. amplifiers used as comparators is triggered to give rise to an output which energizes the solenoid of a stepping relay of the torpedo and move the position of the relay arm until a balanced condition is attained.

Description

United States Patent [1 1 Cormier 1 Nov. 13, 1973 TORPEDO PRESETTING SYSTEM [75] Inventor: William F. Cormler, Middletown,

[73] Assignee: The United States of America as represented by the Secretary of the Navy [22] Filed: Apr. 6, 1972 21 Appl. No.: 241,764

[52] U.S. Cl 318/685, 3l7/DIG. 5, 323/75 N [51] Int. Cl. G05b 11/14 [58] Field of Search 114/20 R, 25; 318/674, 678, 681, 685; 323/75 N; 317/DlG.

2, DIG. 5, 136

[56] References Cited UNlTED STATES PATENTS 2,497,514 2/1950 Palmer 318/674 3,673,484 6/1972 Tabet 3,660,747 5/1972 Kruer et a1...

3,419,790 12/1968 Guhn 3,469,151 9/1969 Newland 317/136 If Conn/ 1 w SIGNAL.

3,619,757 ll/l97l loeger 318/685 Primary Examiner-J. D. Miller Assistant Examiner-Harry E. Moose, Jr.

Attorney-Richard S. Sciascia et al.

[57] ABSTRACT An automatic presetting circuit for controlling remotely located rotary stepping relays of a torpedo in a torpedo launching system. The average of a COM- MAND signal voltage and a READBACK signal voltage is compared with a single standard voltagelto determine any unbalanced condition between the two. As a result of an unbalanced condition, one of the two high gain D.C. amplifiers used as comparators is triggered to give rise to an output which energizes the solenoid of a stepping relay of the torpedo and move the position of the relay arm until a balanced condition is attained.

4 Claims, 1 Drawing Figure lls TORPEDO PRESETTING SYSTEM STATEMENT OF GOVERNMENT INTEREST The invention described herein may be manufactured and used by or for The Government of the United States of America for governmental purposes without the payment of any royalties thereon or therefor.

BACKGROUND OF THE INVENTION This invention relates to a torpedo fire control system and more specifically to a presetting circuit for controlling rotary stepping relays of a torpedo in a torpedo launching system.

In anti-submarine warfare, it is important to control preset functions, known as Initial Search Depth and Floor/Gyro (abbreviated as ISD and W6 respectively), prior to launching certain torpedoes in order that the torpedo internal controls will maximize the post launch acquisition capability. Most of the circuits used for this purpose sense the difference between a COMMAND voltage signal and a READBACK voltage signal. Any difference between the two signals gives rise to an unbalanced condition as a result of which the solenoid of a stepping relay of a torpedo is energized moving the arm of the stepping relay until the difference between the COMMAND voltage signals and the READBACK voltage signal is reduced to zero and thus a balanced condition is obtained. However, prior art presetting circuits make use of one or more auxiliary power supplies for biasing various active components of the circuit and electromagnetic relays which are commonly failure prone.

SUMMARY OF THE INVENTION The objects and advantages of the present invention are accomplished by utilizing an improved torpedo presetting circuit which comprises a.balancing subcircuit which compares the average of a COMMAND signal and a corresponding READBACK signal with a fixed DC. voltage using a pair of high gain D.C. amplifiers as comparators. An unbalanced condition existing as a result of any difference between the average value of the COMMAND and READBACK signals and the fixed DC. voltage makes the output of one of the comparators drop to a very low value. This, in turn, makes a zener diode conduct and eventually supplying a sufficiently high voltage to the coil of the stepping relay of the torpedo so as to move the position of the relay arm until balanced condition is reached. The presetting system uses a single power supply which is that of a ship itself to bias various elements of the circuit and uses no failure prone electromagnetic relays.

An object of this invention is to have a torpedo presetting circuit which uses a ships own power supply to bias various elements of the circuit and thereby enhance chances of a successful torpedo launch.

Another object is to use a single DC. voltage level to obtain a balanced condition corresponding to READ- BACK signal automatically following the COMMAND signal.

Still another object is to eliminate all failure prone electromagnetic relays used ina torpedo presetting circuit.

Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawing, the single figure of which illustrates'an improved torpedo presetting circuit constructed in accordance with the teachings of the present invention.

DESCRIPTIONOF A PREFERRED EMBODIMENT A preferred embodiment of a torpedo presetting circuit is shown in the attached figure, wherein numeral 10 represents a single power supply used to bias various elements of the circuit and is preferably a ships power supply having an output of 28 volts DC. with its negative terminal connected to a common ground terminal 12. As shown in the figure, the positive terminal of power supply 10 is connected to (a) a first voltage dividing network comprising a first group of interconnected series resistors l4, 16, 18, 20, 22, 24, and 26 with one end of resistor 14 connected to the positive terminal of power supply 10 and one end of resistor 26 connected to ground terminal 12; (b) a second voltage dividing network comprising a second group of interconnected

series resistors

28, 30, 32, 34, 36, 38, and 40 with one end of resistor 28 connected to the positive terminal of power supply 10 and a point terminal 42 and one end of resistor 40 connected to ground terminal 12. and Box 44 represents manual ISD COM MAND or F/G COMMAND from where Command information is transferred to a COMMAND SIGNAL arm 46 whereby arm 46 is movable at one of tie points or

positions

48, 50, 52, 54, 56, and 58. Movable arm 46 is connected to one end of resistor 60, also called R The other end of resistor 60 is connectedto an averaging point terminal 62 used as a referenceterminal; to a terminal 64 of a high gain D.C. amplifier 66 used as a first comparator; to the anode'of a low forward impedance diode 68 having its cathode connected to terminal 70 of amplifier 66, one end of resistor 71 with the second end thereof to terminal 42 and one end of resistor 72; to one plate of a capacitor 74 having its other plate connected to the second end of resistor 72 and to the source terminal of a field effect transistor (commonly known as FET) 76; to READBACK SIG- NAL arm 78 through a resistor 80 known as RREADBACK; to the cathode of a low forward impedance diode 82 having its anode connected to terminal 84 of a high gain D.C. amplifier 86 used as a second comparator; and to terminal 88 of amplifier 86. The anode of diode 82 is also connected to the source terminal of PET 76 through a resistor 90 and to ground terminal 12 through a resistor 92. The gate terminal of PET 76 is connected to the cathode of a diode 94 having its anode connected to ISD INHIBIT terminal 96 and to one terminal of a capacitor 98. The second terminal of capacitor 98 is connected to. ISD INHIBIT terminal 96. Terminal 100 of amplifier 66 and terminal 102 of amplifier 86 are both connected to terminal 42. Terminal 104 of amplifier 66 and terminal 106 and amplifier 86 are connected to ground terminal 12. Output terminal 108 of amplifier 66 is connected to cathode of a diode 110 which has is anode connected to terminal 42 through a resistor 112. Output terminal 114 of amplifier 86 is connected to cathode of a diode 116 which has its anode connected to F/G INHIBIT terminal 118 and to the anode of diode 110. Terminal 118 is also connected to terminal 120 of a zener diode 122 through a resistor 123. Terminal 124 of zener diode 122 is connected to one end of a resistor 126 and base terminal 128 of transistor 130. Terminal 42 is also connected to (a) the second end of resistor 126; (b) one end of resistor 132 having its other end connected to emitter terminal 134 of transistor 130 and to base terminal 136 of transistor 138; (c) emitter terminal 140 of transistor 138; and collector terminal 142 of transistor 138 through a pilot lamp 144. The collector terminal 142 of transistor 138 is also connected to collector terminal 146 of transistor 130 and one end of normally closed switch 148 of a stepping relay 150 of a torpedo. The other end of the switch 148 is connected to ground terminal 12 through the solenoid 152 of the stepping relay 150. The normally closed switch 148 is mechanically connected to READBACK SIGNAL arm 78 which can be set at one of the

positions

154, 156, 158, 160, 162, and 164 to attain a balanced condition in the circuit, i.e., when the average of a COMMAND SIG- NAL and the corresponding READ SIGNAL is in balance with a preset reference D.C. voltage signal to one of the high gain D.C. amplifiers 66 and 86. It should be noted that the stepping relay 150 is a conventional stepping relay used in torpedoes and does not constitute a part of the presetting circuit and is thus not described in detail.

OPERATION OF THE CIRCUIT The presetting circuit shown in the drawing shows a presetting circuit for an ISD COMMAND for illustration. The same circuit can be used for F/G COM- MAND with legends at

terminals

96 and 118 interchanged. A D.C. voltage, preferably 28 volts, is provided by source and is applied between terminal 42 and ground terminal 12 and across a voltage dividing

network comprising resistors

71, 72, 90, and 92. Resistors 71 and 92 have preferably equal and matched value and

resistors

72 and 90 have preferably equal values which are smaller than the value of resistor 71 or resistor 92. Resistors 71 and 92 thus have equal potential drops across them.

Resistors

72 and 90 provide socalled dead band voltage area of 0.8 volt or so. This voltage divider network thus provides refemce voltages for high gain D.C. amplifiers 66 and 86. Because of dead band voltage, high gain D.C. amplifier 66 can compare signals up to approximately 0.8 volt above 14.0 volts and high gain D.C. amplifier 86 can compare signals up to approximately 0.8 volt below 14.0 volts.

A command, manual or otherwise, which can be either ISD COMMAND or F/G COMMAND is originated at box 44. For illustration purposes it is the-ISD COMMAND presetting circuit which is shown and described. Thus an ISD COMMAND sets the COM- MAND SIGNAL arm 46 at one of the

positions

48, 50, 52, 54, 56 and 58. As an example, a potential difference of 28 volts D.C..is applied between positive terminal of source 10 and ground terminal 12, and across the voltage dividing

network comprising resistors

14, 16, 18, 20, 22, 24, and 26 each of these resistors having the same value. There is thus a potential drop of 4.0 volts across each of these resistors. Similarly a potential difference of 28 volts applied across voltage dividing

network comprising resistors

28, 30, 32, 34, 36, 38, and 40, each resistor having the same value, gives rise a potential drop of 4.0 volts across each of these resistors. Thus, with the COMMAND SIGNAL arm 46 at position 52 and the READBACK SIGNAL arm 78 at position 160 as shown in the drawing, the average value of the COMMAND SIGNAL and READBACK SIGNAL is 14.0 volts as position 52 is at a potential of 16.0 volts and position 160 is at a potential of 12.0 volts with respect to the ground terminal 12. Since the average value of the COMMAND SIGNAL and the READ- BACK SIGNAL in this particular example is within the range of the standard voltage of 14.0 volts set on the two high gain D.C. amplifiers for comparison, a balanced condition exists and the READBACK SIGNAL arm 78 will stay in position to maintain a balanced condition and output of the high gain D.C. amplifiers is close to 28.0 thus making

diodes

110 and 116 nonconductive. It is to be noted that

resistors

60 and 80 are two matched resistors and have equal value in order to perform averaging function of the COMMAND SIG- NAL and the READBACK SIGNAL respectively. When

resistors

60 and 80 are matched to be equal, terminal 62 is at a potential halfway between the potentials of the positions where

arms

46 and 78 are located.

When the READBACK SIGNAL arm 78 is at position 156 which is a position other than position 160 and is at a potential of 20.0 volts relative to the ground ter minal 12 when a command is given to place COM- MAND SIGNAL arm 46 at position 52, the average value of COMMAND SIGNAL and READBACK SIG- NAL appearing at the averaging terminal 62 is 18.0 volts which is greater than the standard voltage of 14.0 set for comparison. Thiscreates an unbalanced condition involving a positive excursion above 14.0 volts which goes to high gain D.C. amplifier 66 or the first comparator for comparison. Any unbalanced condition involving a negative excursion or excursion below the standard voltage of 14.0 volts by the average value of a COMMAND SIGNAL and READBACK SIGNAL below the standard voltage of 14.0 volts is processed through the high gain D.C. amplifier 86 or the second comparator. For an unbalanced condition involving a positive excursion above the standard voltage of 14.0 volts as indicated above, the output of high gain D.C. amplifier 66 or the first comparator is very low, usually approximately +4 volts, making diode to conduct which in turn causes zener diode 122 to conduct. Resistor 123 limits the current flowing through the zener diode 122 to a safe value. A signal generated at terminal 118 in case of an unbalanced condition is used to FIG INHIBIT terminal in a similar presetting circuit for F/G COMMAND. Likewise while a COMMAND SIG- NAL for a similar circuit F/G presetting is being processed for an unbalanced condition, a similar inhibit signal, called ISD INHIBIT, is applied at terminal 96 to stop the operation of ISD presetting circuit. The current flowing through the zener diode 122 due to an unbalanced condition in turn switches on the output driver transistors and 138 which connects the power from source 10 to the coil 152 of the remote stepping relay of the torpedo. The mechanical connection between the stepping relay 150 and READ- BACK SIGNAL arm 78 is then energized and the READBACK SIGNAL arm 78 is moved to one of the

positions

154, 158, 160, 162, and 164 until a balanced condition is reached. When a balance condition is reached

transistors

130 and 138 stop conducting and the pilot lamp 144 is energized to show a balanced condition.

Diodes 68 and 82 are used to prevent extreme input voltage excursions from appearing at the input terminals 64 and 70 of comparator 66 and

terminals

84 and 88 of comparator 86. Capacitor 74 is used to eliminate any high frequency noise signals from the ship which may upset a balanced condition.

Diodes

110 and 116 decouple the outputs of comparators 66 and 86 and thus allowing the comparators to be in opposite states of being conductive or non-conductive.

A field effect transistor (commonly abbreviated as FET) 76 is connected as a switch for shorting the average terminal 62, the junction of

resistors

60 and 80, to preferably the point of exactly half of the voltage of the source 10. FET 76 is turned on when a similar circuit for F/G presetting senses an unbalanced condition and thereby sends 'out an ISD INHIBIT signal which is applied at terminal 96. This makes FET 76 conduct and thus brings terminal 62 to 14.0 volts and creates an artificial balanced condition in the circuit as long as a FIG COMMAND presetting circuit similar to the ISD COMMAND presetting circuit is in operation to create a balanced condition. After a balanced condition is attained in FIG COMMAND presetting circuit, FET 76 becomes non-conductive due to lack of ISD INHIBIT signal at terminal 96 and the ISD COMMAND presetting circuit starts operating normally as described above. Consequently, the presetting circuits, one for [SD COMMAND presetting and the other for F/G COMMAND presetting, are connected to cross inhibit each other which prevents simultaneous presetting and the problems associated therewith.

Obviously many modifications and variation of the present invention are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.

I claim: 1. An improved torpedo launching system comprismg:

a single source of power having a first terminal and a second terminal;

a first voltage divider having a first plurality of positions and being connected across said single source of power;

a second voltage divider having a second plurality of positions and being connected across said single source of power and parallel to said first voltage divider;

balancing means for comparing an average of a command signal and a readback signal with a standard voltage and sensing an unbalanced condition therebetween, said balancing means having a first end connected to said first voltage divider and a second end connected to said second voltage divider;

a movable command signal arm resettable at one of said first plurality of positions and being connected to the first end of said balancing means;

a movable readback signal arm resettable at one end of said second plurality of positions and being connected to the second end of said balancing means;

a switching means including a solenoid having a first end connected to said balancing means and a second end connected to the second terminal of said source of power, said switching means being mechanically connected to said readback signal am, said solenoid of said switching means being energized for an unbalanced condition of said balancing means for resetting said readback signal arm to a position in said second plurality of positions and achieving a balanced condition in said balancing means.

2. The torpedo launching system of claim 1 wherein said single source of power is a ships own power source.

3. The torpedo launching system of claim 1 wherein said single source of power is an unregulated source of power.

4. The torpedo launching system of claim 1 wherein one terminal of said single source of power is coupled to ground.

Claims

1. An improved torpedo launching system comprising: a single source of power having a first terminal and a second terminal; a first voltage divider having a first plurality of positions and being connected across said single source of power; a second voltage divider having a second plurality of positions and being connected across said single source of power and parallel to said first voltage divider; balancing means for comparing an average of a command signal and a readback signal with a standard voltage and sensing an unbalanced condition therebetween, said balancing means having a first end connected to said first voltage divider and a second end connected to said second voltage divider; a movable command signal arm resettable at one of said first plurality of positions and being connected to the first end of said balancing means; a movable readback signal arm resettable at one end of said second plurality of positions and being connected to the second end of said balancing means; a switching means including a solenoid having a first end connected to said balancing means and a second end connected to the second terminal of said source of power, said switching means being mechanically connected to said readback signal arm, said solenoid of said switching means being energized for an unbalanced condition of said balancing means for resetting said readback signal arm to a position in said second plurality of positions and achieving a balanced condition in said balancing means.

2. The torpedo launching system of claim 1 wherein said single source of power is a ship''s own power source.