US3758791A - Current switch circuit - Google Patents
Current switch circuit Download PDFInfo
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- US3758791A US3758791A US00043497A US3758791DA US3758791A US 3758791 A US3758791 A US 3758791A US 00043497 A US00043497 A US 00043497A US 3758791D A US3758791D A US 3758791DA US 3758791 A US3758791 A US 3758791A
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- 230000001105 regulatory effect Effects 0.000 claims abstract description 16
- 230000033228 biological regulation Effects 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims description 2
- 230000001276 controlling effect Effects 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 4
- 102000003712 Complement factor B Human genes 0.000 description 2
- 108090000056 Complement factor B Proteins 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 240000005373 Panax quinquefolius Species 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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- 230000004048 modification Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/14—Modifications for compensating variations of physical values, e.g. of temperature
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/086—Emitter coupled logic
Definitions
- ABSTRACT A current switch circuit consisting of a couple of transistors, one transistor acting as a reference element and the other as an input element, a pair of series connections of a resistance element and a diode being connected between the respective collectors of the said transistors with the polarity of the diodes opposite to each other, so that the emitter current of the transistors 'are automatically regulated to maintain a predetermined value, whereby the DC levels of the output voltages of the current, switch circuit-are kept constant against temperature variation of the transistors.
- a typical circuit including the current switch circuit as the basic component is a circuit known as a CML (current mode logic) which includes a plurality of input transistors, the respective emitters as well as collectors of the input transistors being mutually connected respectively, so that an OR output can be taken out from the collector of the reference transistor and a NOR output from the common collector lead of the input transistors.
- CML current mode logic
- the CML in which the transistors are operated in the respective non-saturation regions so as not to be affected by the stored charge is an effective logic circuit compatible to the so-called CTL (complementary transistor logic) especially in the operation speed
- CTL complementary transistor logic
- a further stage of an emitter follower is connected to each output circuit of the reference and the input transistors soas to reduce the output impedance and to equalize the levels of the input and output signals.
- Conventional current switch circuits including the above-mentioned CML have a common drawback that the DC voltage levels of the output signals changewith variation in the temperature at the junctions of the transistors because of the temperature dependence of the forward base-emitter voltage.
- the 1 level signal is subject to the variations with a temperature coefficient of about 1.3 to 2.0 mV/C, especially under the influence of transistors of the emitter followers.
- the temperature coefficient of the drift is found to be about 0.5 to 0.8 mV/C which is much lower than that for the 1 level signal. This is due to the fact that the 0 level signal is affected also by the temperature characteristics of the input transistors and reference transistors which more or less compensate for the influence of the drift of the emitter follower transistors.
- the conventional CML is fabricated in an integrated circuit formation, such a circuit would sometimes fail to operate at the intended logic swing voltage, as the component circuit elements are not allowed sufficient heat dissipation.
- the limit level of the input signal below which the logic circuit can operate in a nonsaturation state also varies with the temperature coefficient of about i .5 to l .8 mV/C in a range of 0.4 to 0.8 V. Therefore, if the 1 level signal rises with a temperature rise, it is possible for the signal level to trespass on the saturation region, exceeding the abovementioned limit level. This necessitates a more limited tolerance of the temperature characteristics of the component circuit elements.
- the object of this invention is to provide a current switch circuit of which the DC levels of the output voltages are not affected by temperature variations of transistors.
- the current switch circuit of this invention comprises a reference transistor and an input transistor with the respective emitters connected together, the common emitter lead being connected to an emitter source terminal through a means for regulating the emitter current, output signals being derived from the respective collectors of the said transistors through emitter follower circuits respectively, and further the said current switch circuit is provided with a pair of additional routes connecting both collectors, each consisting of a series connection of a diode and a resistance element, the conducting direction of said pair of routes being mutually opposite.
- FIG. 1 is a circuit diagram of an embodiment of this invention.
- FIG. 2 is a characteristic diagram of a transistor showing the relation between the temperature coeffi' cient of the base-emitter forward voltage and the emitter current.
- FIG. 3 is a diagram showing manners of connection of semiconductor elements used in this invention.
- FIGS. 40 and 4b are circuit diagrams of two other embodiments of this invention.
- FIG. 5 is a complete circuit diagram of a logic circuit incorporating the circuit shown in FIG. 1
- FIGS. 6 and 7 are circuit diagrams showing modifications of a portion of the circuit shown in FIG. 5.
- FIG. 8 is a circuit diagram of an alternative setup of the circuit shown in FIG. 5
- reference numeral 10 designates a reference transistor .to whose base terminal 11 is applied a reference voltage V and 20 an input transistor to whose base terminal 21 is applied an input voltage. It is assumed that the input transistor 20 represents a plurality of similar transistors connected in parallel to receive a corresponding number of input signals of the CML.
- the emitters l2 and 22 of the reference and input transistors 10 and 20 are connected together and led to the emitter source terminal 31 through an emitter current regulating means 30.
- the respective collectors 13 and 23 of the reference and input transistors 10 and 20 are connected to the collector source terminal 32 respectively through load resistors 14 and 24 whose resistance values are R and R respectively.
- Another transistor 15 constitutes an emitter follower with the base thereof connected with the collector 13 of the reference transistor 10.
- emitter of the transistor is the OR output terminal 16 of the CML.
- still another transistor 25 constitutes another emitter follower with the base thereof connected with the collector 23 of the input transistor 20.
- the emitter of the transistor 25 is the NOR output terminal 26 of the CML.
- Reference numerals l7 and 27 respectively designate load resistors connected between the emitter source terminal 31 and the emitters of the transistors 15 and 25.
- a pair'of series connections respectively consisting of a resistance element 36 and a diode 33, and a resistance element 35 and a diode 34, are connected between the collector l3 and 23 of the transistors 10 and in a manners that the conducting direction of the series connections are opposite to each other.
- the temperature compensation for the output signal of the CML is acheved by providing these series connections, as will be described hereinafter.
- the circuit shown in FIG. 1 is operated, for example, with the collector source terminal 32 grounded, therefore the potential V at the collector source terminal 32 being zero Volt and the potential V at the emitter source terminal 3l-being negative. It is assumed in the following description that the input signal V, is at the 1 level and the input transistor 20 is conducting while the reference transistor 10 is in the shutoff state. For convenience of the explanation, it is further assumed that the emitter-grounded current amplification factor B and the base-emitter forward voltage drop V are identical for all of the above transistors, and that the forward voltage drop V of the diodes 33 and 34 are identical. Moreover, the base current of the transistors 15 and are neglected in the following explanation.
- the reference voltage source in the conventional CML should be so designed that the reference voltage V renders an intermediate temperature coefficient between those for the levels V, and V 1.1 mV/" C for example.
- the reference voltage source should be designed so as to produce a constant voltage, as both output signals V, and V have zero temperature coefficient.
- FIGS. 4a and 4b show further embodiments of this invention.
- the diodes 33 and 34 connected in parallel in opposite directions, the parallel connection of these diodes being connected between the respective collectors of the transistors 10 and 20 through resistors 35 and 36.
- a resistor 37 is seen to be substituted for the two resistors 35 and 36 in FIG. 4a, the resistance value of the resistor 37 being equal to the sum of the resistance values R and R of the resistors 35 and 36.
- Other components shown in FIGS. 4a and 4b correspond to those indicated by similar reference numerals in FIG. 1.
- the principle and operation of the temperature compensation with the circuits shown in FIGS. 4a and 4b are the same as those described above in connection with FIG. 1. Therefore, repeated explanation is omitted.
- the reference base voltage V of the reference transister 10 is supplied from a biasing circuit 40 indicated by a dot-and-dash line box in FIG. 5.
- This biasing circuit consists of a transistor 41, biasing resistance elements. 42, 43, 44 and 45, and an appropriate number of diodes 46 for temperature compensation, and is composed in a manner that the variation in the baseemitter voltage drop of the transistor 41 due to the change of the temperature is compensated by a voltage drop in the above diodes 46 to thereby make the temperature coefficient for the reference voltage V zero.
- the emitter current regulating means 30 which is connected between the emitter source terminal and the common emitter lead of the reference and input transistors, consists of a transistor 50 and a resistance element 54 connected to the emitter 51 of this transistor for providing a feedback voltage.
- the base 53 of the transistor 50 is connected to the biasing circuit 40to be driven with a voltage divided by the resistors 44 and 45 in the biasing circuit 40. 1
- the condition CML that is, may be incorporated in a semiconductor integrated circuit. Or, it may be a separate unit from the main part of a CML. Further, various other circuit configurations are possible for the biasingcircuit 40 so as to be adapted for various emitter source voltages V reference voltages V and other requirements.
- FIG. 6 shows one example of such other configurations of the biasing circuit 40.
- a resistance element 47 is connected across one (46a) of the plurality of temperature compensating diodes'46 in order to facilitate accurate matching of the temperaturecoeffrcients of the reference voltage V,,,, and the driving voltage V
- FIG. 7 is another example of the biasing circuit 40.
- the driving voltage V, for the transistor 50 is not kept constant, as a diode 48 is inserted between the reference voltage terminal 11 for the reference transistor 10 and the driving voltage terminal 53 for the transistor 50.
- the circuit is designed so that the reference voltage V is immune to temperature variation, while the driving voltage V,i ncreases with the temperature risebecause of the for producing an emitter current I, which will satisfy the condition of the afore-mentioned equation 9 can be determined as follows.
- R /R 2/0: 2 2 (12) This is the condition for setting the value of the emitter current I, at the desired level.
- the condition of the equation 9 is satisfled by setting the resistance of the element 54 ataptemperature dependence of the forward voltage drop V of the diode 48.
- VJ ss 0 z an as- RCN/REE z 1
- FIG. 8 shows another example of the CML in which the circuit of this-invention is incorporated.
- the base-emitter voltage of the transistor 50 which regulates the emitter currents of the reference and input transistors 10 and 20, is set by a diode 55 .connected between the base 53 and the emitter 51 of the transistor 50, and the base 53 is also connected to the reference voltage terminal 11 through a resistance element 44.
- the emitter current I is about 7 times as large as the current flowing through the diode 55.
- the greater part of the current I which flows through the resistance element 44 (whose resistance value is assumed to be R flows through the diode 55. Therefore, assuming that the forward voltage drop in the diode 55 is V,,, the emitter current I; of the transistor 50 is determined by the following formula.
- the above relation is the condition for setting the emitter current 1,, in this circuit.
- the DC voltage levels of the output signals can be stabilized against temperature variations by setting the emitter currents of the reference and input transistors at a proper amount.
- the manner of setting the emitter current of the current switch circuit has been described under the assumption expressed by the previously shown equation 7, it will be clear that the principle of this invention can be put into practice regardless of the above assumption. Further, it will be understood that the emitter current regulating means used in the circuit of this invention is not limited to such types as shown in the above embodiments, and that other types of circuits which can render the emitter current to have an appropriate temperature characteristics can also be used as the regulating means.
- a current switch circuit comprising;
- emitter followers connected respectively with the collectors of said input and reference transistors
- each of said diode circuits comprising a diode and a resistor connected in series with said diode for controlling current flowing through said diode, and wherein said diodes-disposed in said two diode circuits are oriented in mutually opposite directions with respect to each other;
- emitter current regulating means connected in common with the emittersof said input and reference transistors for regulating the emitter current flowing through the commonly connected emitters, so that said emitter current has a certain temperature coefficient
- a power supply source having a first power terminal connected with said load resistors respectively and a second power terminal connected with said emitter current regulating means for providing a power potential between said first and second power terminals
- a current switch circuit as defined in claim 2 which further comprises a temperature-compensated biasing circuit which produces a reference voltage having a substantially zero temperature coefficient coupled to the base of said reference transistor.
- said emitter current regulating means comprises a first transistor whose collector is connected in common with the emitters of said input and reference transistors and to whose base a regulation voltage is applied, and means for connecting the emitter of said first transistor with said second power terminal.
- a second transistor having its emitter-collector circuit coupled between said first power supply terminal and the base of said reference transistor;
- a first biasing resistor coupled between the base of said second transistor and said first power supply terminal
- a voltage dividing circuit which comprisesfirst and second impedance means connected in series between the emitter of said second transistor and the second power supply terminal, the common connection of said first and second impedance means being connected with the base of said first transistor.
- a current switch comprising:
- At least one input transistor having an emitter, a base and a collector
- first and second output circuits each of which is connected to receive a signal from the collector of said at least one input transistor and to provide output signals therefrom, the output of one of said output circuits being at a first level while the output of the other of said output circuits is at a level, different from said first output level;
- circuits each of which comprises a pn junction and a resistor connected in series, said pn junctionresistor circuits being connected in parallel, and wherein the pn junctions are oppositely poled with respect to each other within said parallelconnected circuits.
- a current-switch according to claim 9 further inence transistor and a power supply terminal.
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- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP44044009A JPS4818671B1 (enrdf_load_stackoverflow) | 1969-06-06 | 1969-06-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
US3758791A true US3758791A (en) | 1973-09-11 |
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ID=12679681
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US00043497A Expired - Lifetime US3758791A (en) | 1969-06-06 | 1970-06-04 | Current switch circuit |
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US (1) | US3758791A (enrdf_load_stackoverflow) |
JP (1) | JPS4818671B1 (enrdf_load_stackoverflow) |
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3946246A (en) * | 1974-09-03 | 1976-03-23 | Motorola, Inc. | Fully compensated emitter coupled logic gate |
DE2900539A1 (de) * | 1978-01-09 | 1979-07-12 | Hitachi Ltd | Logische schaltung |
US4249091A (en) * | 1977-09-09 | 1981-02-03 | Hitachi, Ltd. | Logic circuit |
US4346343A (en) * | 1980-05-16 | 1982-08-24 | International Business Machines Corporation | Power control means for eliminating circuit to circuit delay differences and providing a desired circuit delay |
US4383216A (en) * | 1981-01-29 | 1983-05-10 | International Business Machines Corporation | AC Measurement means for use with power control means for eliminating circuit to circuit delay differences |
FR2516723A1 (fr) * | 1981-11-13 | 1983-05-20 | Hitachi Ltd | Dispositif a circuits integres a semi-conducteurs |
US4390799A (en) * | 1978-07-05 | 1983-06-28 | Raytheon Company | Temperature compensated switchable current source |
US4492914A (en) * | 1982-07-29 | 1985-01-08 | Tokyo Shibaura Denki Kabushiki Kaisha | Temperature-compensating bias circuit |
US4593211A (en) * | 1982-11-24 | 1986-06-03 | Cselt - Centro Studi E Laboratori Telecommunicazioni S.P.A. | Low-dissipation output stage for binary transmitters |
US4623802A (en) | 1984-05-17 | 1986-11-18 | Fairchild Semiconductor Corporation | Multiple-stage gate network having independent reference voltage sources |
US4736125A (en) * | 1986-08-28 | 1988-04-05 | Applied Micro Circuits Corporation | Unbuffered TTL-to-ECL translator with temperature-compensated threshold voltage obtained from a constant-current reference voltage |
US4849659A (en) * | 1987-12-15 | 1989-07-18 | North American Philips Corporation, Signetics Division | Emitter-coupled logic circuit with three-state capability |
US5013941A (en) * | 1989-08-17 | 1991-05-07 | National Semiconductor Corporation | TTL to ECL/CML translator circuit |
US5028820A (en) * | 1989-06-23 | 1991-07-02 | Digital Equipment Corporation | Series terminated ECL buffer circuit and method with an optimized temperature compensated output voltage swing |
US5045729A (en) * | 1989-11-15 | 1991-09-03 | National Semiconductor Corporation | TTL/ECL translator circuit |
US5094546A (en) * | 1990-01-09 | 1992-03-10 | Ricoh Company, Ltd. | Ic temperature sensor with reference voltages supplied to transistor bases |
EP0531615A3 (enrdf_load_stackoverflow) * | 1991-08-09 | 1994-03-09 | Nec Corp | |
US20050200418A1 (en) * | 2004-03-09 | 2005-09-15 | Darrell Barabash | Temperature compensating circuit |
Citations (11)
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US2999173A (en) * | 1958-04-11 | 1961-09-05 | Bendix Corp | Wave-clipping circuit |
US3259761A (en) * | 1964-02-13 | 1966-07-05 | Motorola Inc | Integrated circuit logic |
US3437840A (en) * | 1965-09-09 | 1969-04-08 | Motorola Inc | Gated storage elements for a semiconductor memory |
US3440449A (en) * | 1966-12-07 | 1969-04-22 | Motorola Inc | Gated dc coupled j-k flip-flop |
US3509362A (en) * | 1966-08-19 | 1970-04-28 | Rca Corp | Switching circuit |
US3518986A (en) * | 1967-11-20 | 1970-07-07 | Beckman Instruments Inc | Patient monitoring safety system |
US3523194A (en) * | 1967-03-31 | 1970-08-04 | Rca Corp | Current mode circuit |
US3522446A (en) * | 1967-08-31 | 1970-08-04 | Tokyo Shibaura Electric Co | Current switching logic circuit |
US3524141A (en) * | 1968-08-26 | 1970-08-11 | Rca Corp | Transistor amplifier having emitter bypass through an auxiliary transistor |
US3538348A (en) * | 1967-07-10 | 1970-11-03 | Motorola Inc | Sense-write circuits for coupling current mode logic circuits to saturating type memory cells |
US3590274A (en) * | 1969-07-15 | 1971-06-29 | Fairchild Camera Instr Co | Temperature compensated current-mode logic circuit |
-
1969
- 1969-06-06 JP JP44044009A patent/JPS4818671B1/ja active Pending
-
1970
- 1970-06-04 US US00043497A patent/US3758791A/en not_active Expired - Lifetime
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
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US2999173A (en) * | 1958-04-11 | 1961-09-05 | Bendix Corp | Wave-clipping circuit |
US3259761A (en) * | 1964-02-13 | 1966-07-05 | Motorola Inc | Integrated circuit logic |
US3437840A (en) * | 1965-09-09 | 1969-04-08 | Motorola Inc | Gated storage elements for a semiconductor memory |
US3509362A (en) * | 1966-08-19 | 1970-04-28 | Rca Corp | Switching circuit |
US3440449A (en) * | 1966-12-07 | 1969-04-22 | Motorola Inc | Gated dc coupled j-k flip-flop |
US3523194A (en) * | 1967-03-31 | 1970-08-04 | Rca Corp | Current mode circuit |
US3538348A (en) * | 1967-07-10 | 1970-11-03 | Motorola Inc | Sense-write circuits for coupling current mode logic circuits to saturating type memory cells |
US3522446A (en) * | 1967-08-31 | 1970-08-04 | Tokyo Shibaura Electric Co | Current switching logic circuit |
US3518986A (en) * | 1967-11-20 | 1970-07-07 | Beckman Instruments Inc | Patient monitoring safety system |
US3524141A (en) * | 1968-08-26 | 1970-08-11 | Rca Corp | Transistor amplifier having emitter bypass through an auxiliary transistor |
US3590274A (en) * | 1969-07-15 | 1971-06-29 | Fairchild Camera Instr Co | Temperature compensated current-mode logic circuit |
Cited By (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3946246A (en) * | 1974-09-03 | 1976-03-23 | Motorola, Inc. | Fully compensated emitter coupled logic gate |
US4249091A (en) * | 1977-09-09 | 1981-02-03 | Hitachi, Ltd. | Logic circuit |
DE2900539A1 (de) * | 1978-01-09 | 1979-07-12 | Hitachi Ltd | Logische schaltung |
US4390799A (en) * | 1978-07-05 | 1983-06-28 | Raytheon Company | Temperature compensated switchable current source |
US4346343A (en) * | 1980-05-16 | 1982-08-24 | International Business Machines Corporation | Power control means for eliminating circuit to circuit delay differences and providing a desired circuit delay |
US4383216A (en) * | 1981-01-29 | 1983-05-10 | International Business Machines Corporation | AC Measurement means for use with power control means for eliminating circuit to circuit delay differences |
FR2516723A1 (fr) * | 1981-11-13 | 1983-05-20 | Hitachi Ltd | Dispositif a circuits integres a semi-conducteurs |
US4492914A (en) * | 1982-07-29 | 1985-01-08 | Tokyo Shibaura Denki Kabushiki Kaisha | Temperature-compensating bias circuit |
US4593211A (en) * | 1982-11-24 | 1986-06-03 | Cselt - Centro Studi E Laboratori Telecommunicazioni S.P.A. | Low-dissipation output stage for binary transmitters |
US4623802A (en) | 1984-05-17 | 1986-11-18 | Fairchild Semiconductor Corporation | Multiple-stage gate network having independent reference voltage sources |
US4736125A (en) * | 1986-08-28 | 1988-04-05 | Applied Micro Circuits Corporation | Unbuffered TTL-to-ECL translator with temperature-compensated threshold voltage obtained from a constant-current reference voltage |
US4849659A (en) * | 1987-12-15 | 1989-07-18 | North American Philips Corporation, Signetics Division | Emitter-coupled logic circuit with three-state capability |
US5028820A (en) * | 1989-06-23 | 1991-07-02 | Digital Equipment Corporation | Series terminated ECL buffer circuit and method with an optimized temperature compensated output voltage swing |
US5013941A (en) * | 1989-08-17 | 1991-05-07 | National Semiconductor Corporation | TTL to ECL/CML translator circuit |
EP0413228A3 (en) * | 1989-08-17 | 1991-12-27 | National Semiconductor Corporation | Ttl to ecl/cml translator circuit |
US5045729A (en) * | 1989-11-15 | 1991-09-03 | National Semiconductor Corporation | TTL/ECL translator circuit |
US5094546A (en) * | 1990-01-09 | 1992-03-10 | Ricoh Company, Ltd. | Ic temperature sensor with reference voltages supplied to transistor bases |
EP0531615A3 (enrdf_load_stackoverflow) * | 1991-08-09 | 1994-03-09 | Nec Corp | |
US20050200418A1 (en) * | 2004-03-09 | 2005-09-15 | Darrell Barabash | Temperature compensating circuit |
US20050200419A1 (en) * | 2004-03-09 | 2005-09-15 | Darrell Barabash | Temperature compensating circuit |
US7034618B2 (en) * | 2004-03-09 | 2006-04-25 | Nokia Corporation | Temperature compensating circuit |
US7095282B2 (en) * | 2004-03-09 | 2006-08-22 | Nokia Corporation | Temperature compensating circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS4818671B1 (enrdf_load_stackoverflow) | 1973-06-07 |
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