US3701988A - Character display device for television monitor - Google Patents

Character display device for television monitor Download PDF

Info

Publication number
US3701988A
US3701988A US799396A US3701988DA US3701988A US 3701988 A US3701988 A US 3701988A US 799396 A US799396 A US 799396A US 3701988D A US3701988D A US 3701988DA US 3701988 A US3701988 A US 3701988A
Authority
US
United States
Prior art keywords
line
characters
character
picture
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US799396A
Other languages
English (en)
Inventor
Houterman Jan Allaart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
US Philips Corp
Original Assignee
US Philips Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by US Philips Corp filed Critical US Philips Corp
Application granted granted Critical
Publication of US3701988A publication Critical patent/US3701988A/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
    • G09G5/222Control of the character-code memory

Definitions

  • a device for displaying digital information in the form of characters on a television screen comprising a circulation memory in which the information for a line of characters circulates and in which during the display on a screen of a normal television monitor the information of the characters for a line is available per picture line at the output of the circulation memory for forming in a character generator control signals for producing dots on the television screen dependent upon the parts of the characters to be displayed on one line and coinciding with the picture line to be written at that instant, and in which during a space time between lines of characters the circulation memory is provided with information for a following line of characters from a buffer memory.
  • the invention relates to a device for displaying digital information in the form of characters on a television screen.
  • a device for displaying digital information in the form of characters on a television screen employs a circulation memory in which during the display process information circulates once per pictureline of the television screen, a decoder, and a character generator.
  • the characters to be displayed are formed in the character generator and a checking device is provided with which, at given instants, only that information appears at the outputs of the circulation memory which serves for the character to be formed in the character generator and to be displayed on the television screen at that instant.
  • Such devices are known. It is desirable to use in such television display systems normal television monitors which need not be provided with additional means. This has been achieved in the known device by using a so-called monoscope tube as a character generator and using the video signal produced therein for the desired characters for the control of one or more normal television monitors. For both the monoscope tube and the television receiver(s) a common time base control device is present which also controls the circulation memory.
  • a drawback of this known device is the fact that for displaying several lines of characters on the television screen, a complete circulation memory is necessary for each line. This extensive circulation memory is provided with information from a computer, a tape recorder, a typewriter, a light-pen and the like.
  • the invention is characterized in that the storage capacity of the circulation memory is sufficient to take up the total digital information for a line of characters to be displayed on the television screen, and that a buffer memory with selection members is available in which the information for the characters to be displayed simultaneously on the screen can be collected.
  • a checking device is provided with a characters-per-line counter and a picture counter which control the buffer memory selection members in such manner that during a period which corresponds maximally to the display time of a space between the lines on the television screen, the digital information for a line of characters can be displaced from the buffer memory to the circulation memory.
  • a buffer memory has become necessary in which the information for the characters to be displayed simultaneously on a picture screen from information sources, for example, a computer, a magnetic tape and the like, can be stored.
  • the buffer memory may be, for example, a component of a computer memory itself or a separate memory. However, this memory need not be a very fast memory (see below).
  • the circulation memory is always provided with new information for a following line at the correct instants during line spaces.
  • the circulation memory is filled from the buffer memory during the space between lines of characters and the buffer memory is not necessary during the display of the characters, the buffer memory is available during the display for communication with an information source, so that new information can be recorded. If the buffer memory forms part of the computer memory, this memory is available for the computer itself during the said spaces. Thus, only a part of the computing period of the computer is occupied.
  • the use of the combination buffer memory and circulation memory according to the invention has very advantageous consequences, particularly with regard to the possibility of displaying a large number of characters simultaneously on one or more normal television monitors.
  • a television picture on a normal television screen is rewritten 25 to 60 times per second. if, for example, 2,000 characters are to be displayed simultaneously on a television screen, then this means that per 12.5 to 30 m-sec (10- sec) all these characters have to be presented once to the television display system or, on average, one character every 10p. sec (10 sec.
  • m-sec 10- sec
  • a character is characterized, for example, in a binary form with eight bits. These eight bits are usually read in parallel.
  • the control of the buffer memory selection members is carried out by the characters-per-line counter and the picture line counter in such manner that successively the digital information of characters to be displayed and located not immediately beside each other on a line can be displaced from the buffer memory to the circulation memory and that the circulation memory is filled during the time of a number of picture lines of a space between the lines while circulating in such manner that at least after the last picture line of a space the circulation memory is filled in the sequence of successive characters to be displayed on a line.
  • the time required for this transport is 64 X 6p. sec. This corresponds to a space of minimally six picture lines between two lines.
  • the circulation memories required in the devices according to the invention must have a circulating time which is equal to the duration of a television picture line. They may be all types of shift registers controlled by clock pulses. However, delay lines as they are normal in television monitors themselves may advantageously be used. These may be, for example, glass delay lines or the so-called lumped component delay lines which are cheap and have a sufficiently large information bit storage capacity.
  • the storage capacity of such a line is at least sufficient for storing a number of bits which is equal to the number of characters to be displayed on a line (for example 64).
  • a character is represented, for example, by six bits, so that in that case six glass lines in parallel arrangement are necessary.
  • the storage capacity is substantially larger so that fewer delay lines will suffice (see below).
  • the rate at which it must be possible to read the information for a character from a circulation auxiliary memory lies in the order of the above mentioned 1p. sec. This is easily possible with the circulation auxiliary memories which may be used. If, for example, only two glass delay lines in parallel arrangement are used for six bits per character, it must be possible to read per line a bit in one-third 0.33;. sec.
  • a further great advantage of the use of such a television delay line is that its delay time can be used for deriving a synchronization signal for the whole device.
  • the digital information of the successive characters is supplied from the circulation memory to the decoder succeeded by the character generator.
  • the digital character information is decoded (in the case of 64 characters a decoding of l-out-of-64) and then supplies an energization signal for the character input in question of the character generator.
  • a monoscope tube may be used as a character generator.
  • a diode matrix made suitable for that purpose may alternatively be used as a character generator.
  • a diode matrix as a character generator is known per se, (see US. Pat. N 0. 2,987,715 However, this serves for the formation of a full character at a time and therefore is designed and controlled for that purpose.
  • the known diode matrix for use in a device according to the invention has one input per character which is connected to the relative output of the decoder and which comprises a number of control inputs corresponding to the number of picture lines per character. The inputs are energized after each other each time after the completion of a complete preceding picture line from the checking device.
  • the diode matrix further includes a number of outputs which corresponds to a number of dots per character corresponding in the direction of the picture line which are controlled from the checking device during one picture line so many times after each other as characters can be displayed on a line at these outputs, dependent upon the parts of the characters to be displayed on a line coinciding with the picture line to be written at that instant, control signals for the television monitor are formed on which the characters appear in the form of a number of dots.
  • FIG. 1 shows a diagram of a device according to the invention
  • FIG. 2 shows a diagram of another device according to the invention
  • FIG. 3 is a detailed diagram of a device according to the invention.
  • FIG. 4 shows a time generator for a device according .to the invention
  • FIG. 5 shows a diagram of a device for obtaining an intensity signal for a television monitor
  • FIG. 6 shows a circulation memory delay line with inputs and output circuits
  • FIG. 7 is a diagram of a picture on a television screen.
  • FIG. 8 shows a character diode matrix for a device according to the invention.
  • FIG. 1 shows a principle circuit diagram of a device according to the invention.
  • reference numeral 1 denotes a buffer memory which receives the information from without, for example, from a computer and the like, via inputs 1 l.
  • the buffer memory may altematively be a component of a computer memory itself which is not, shown.
  • This information contains per character, for example, eight bits which, for example, may include two parity bits and six character code bits.
  • the address selection of the buffer memory 1 takes place by means of selection members 2 controlled from an address control device 3.
  • the address control device 3 transmits the successive memory address places for the incoming information to the selection members 2, for example, from a memory place counter 30 commanded through an input 31.
  • the address control device 3 is controlled through input 32 from the checking device 4.
  • the information of a selected address is applied through outputs 12 of the buffer memory to a register 5, and also supplied through line 13 again to the inputs ll of the buffer memory 1 so as to write the information again in the normal manner in the buffer memory 1.
  • the character code bits are assumed to be at the register places 51, 52, 56 of the register 5.
  • Reference numeral 6 denotes the circulation memory.
  • the circulation memory consists of 6 shift registers 61, 62, 63, 64, 65, 66, a number of controllable input gates 61a, 62a, 66a, and an output register 60.
  • a decoder is denoted by 7, 7a, 7b.
  • Reference 8 is a character generator in the form of a monoscope tube which is controlled through lines 80, 81, 82, 83, 84. The video signal produced in the monoscope tube is applied through line 90 to an amplifier 9 and thence to a device to which also time base signals are presented through lines 101 and 102.
  • One or more television monitors TV are fed from the device 10.
  • the checking device 4 contains a picture line counter 41 and a characters per-picture line counter 42.
  • G is a control output from the device 4 to the gates 61a 66a., of the circulation memory. The presence or absence of a control signal on line G determines whether information has to be transported from the buffer memory 1 to the circulation memory 6 or whether the information just has to circulate in the circulation memory 6.
  • C is a clock pulse output connected to the shift registers 61 66 and R is a resetting output connected to the register 60.
  • the picture line counter 41 counts the number of picture lines, for example 512 in a rhythm equal to the picture frequency of a normal television monitor tube.
  • a picture line has a duration of, for example, 64p. sec.
  • the charactersper-line counter 42 counts the number of characters per line during one ormore picture line periods dependent upon the space between the lines.
  • the character code bits in the places 51, 56 of the register 5 are supplied parallel to the gates 61a, 66a of the respective shift registers 61, 66.
  • these gates transmit the respective character code bits, for example b b b bfl, b b, of a character b, controlled through the line G from the device 4, after which the register Sis prepared again for a following character code through line 50.
  • the information of a preceding line of characters possibly present in the shift registers 61, 66 is erased. So the speed of this transport is determined by the cycle time of the buffer memory.
  • the shift registers 61, 66 are synchronized through line C with a clock pulse per cycle period.
  • each shift register has a number of bit places equal to the number of characters per line, so in this case 20.
  • the circulation register 6 is filled with information for the next line of characters.
  • the information stored in the circulation memory must circulate eight times during the display process. This circulation must be carried out at a speed which corresponds to the picture line frequency. So in this case one circulation in 64p. sec.
  • the clock pulse frequency is increased twice through line C from device 4, so that now every 3 11. sec. a shift in the shift registers 61, 66 takes place instead of every 6 [L sec.
  • the character code bits of a character are sup plied to the register 60 and that for each character per line, so once per picture line of the line.
  • the register 60 after handling a character information therein, is erased through the line R.
  • the character code bits from the register 60 are supplied to the decoder 7, 7a, 7b.
  • the brightness signal of the monoscope tube is controlled from the bits in 7 which is a logical network.
  • 7a the horizontal deflection signal and in 7b the vertical deflection signal for the monoscope is formed, for which purpose 7a and 7b are simple digital-toanalog converters which supply a voltage for selecting the relative character in the mask of the monoscope.
  • the selective character appears on the screen of the monoscope.
  • the place thereof is determined by the value of the horizontal and of the vertical sweep signals which are supplied through lines 83 and 84, respectively, from the checking device to the horizontal and vertical deflection system input lines 81 and 82, respectively, for example, through an inductive coupling.
  • the picture on the monoscope is scanned and supplied per picture line of a normal monitor picture screen a video signal which corresponds to the parts of the characters to be displayed on a line coinciding with that picture line.
  • This video signal is amplified inan amplifier 9 and, together with the time base signals for a normal television monitor, formed to a signal immediately suitable for such a television monitor TV in a device 10.
  • FIG. 2 shows a diagram of a second device according to the invention.
  • the circulation memory 6 consists of three shift registers or particularly of three delay lines (hereinafter referred to as delay lines) 261, 262, 263, a number of input gates 264, 265, 266, a number of output gates 267, 268, 269 and a character register 60.
  • the input gates 264, 265, 266 are commanded through lines AB from the checking device 4 and that in such manner that a character code b' of register place 51 of the register 5, a character code bit I: of register place 53, and a character code bit b of register place 55 are simultaneously applied to the delay lines 261, 262, 263, respectively, through the gates 264, 265 and 266, respectively, if in addition a control voltage which releases the information transport is applied to the line G. Then a character code bit I: of register place 52, bit b of 54 and b of 56 are simultaneously applied, through gates 264, 265 and 266, respectively, to the delay lines 261, 262, 263, respectively.
  • a character code b b b bfl, I2 b for a character b is incorporated in the delay lines as shown in the Figure.
  • the character code b' b b for a subsequent character b to be displayed on the same line must immediately succeed the code of the preceding character b, in the delay lines.
  • the cycle time of the buffer memory is smaller than the bit speed in a delay line. For example, every 6p. sec. a new character code is presented to the register 5.
  • this code is the character code of the character b; to be displayed immediately on the preceding character b the bit space in a delay line can only be used for a small part.
  • this may be obviated as follows.
  • the picture line,counter 41 and the characters-per-line counter 42 command the address control device 3 through line 32 in such manner that successively the addresses of characters to be displayed which are located not immediately beside each other on a line, are selected through the selecting members 2.
  • the circulation memory circulates during the time of a space between the lines lasting a number of picture lines, in such manner, that at least after the last picture line of a space the circulation memory is filled with characters on a line succeeding each other in sequence.
  • the address selection for filling the circulation memory takes place, for example, as follows: After a character b, a character b, is selected which should be nine places furtheron on the line. Then b and so on. The character code of this character b comes at a distance of 6p. sec. relative to the code of character b, in the circulation register (see the figure). When the 64 sec. of the delay line have expired, for example, the codes of eight characters b b b b b are incorporated in the lines in this manner and the code of character b again appears at the input. The next circulation cycle begins and during the next 64p. sec. successively the characters b b 12, b are selected and incorporated in the lines. This is continued during the space time between two lines, so in this case 8 X 64 p. sec. After termination of this, the characters b b b b for a line are incorporated in the circulation register exactly after each other.
  • the character code bits b b b g, b and so on appear after each other at the output gate 267 of line 261, the bits b b b b; and so on appear at the output gate 268 of the line 262, and the bits b,, b,; b2, b and so on appear at the output gate 269 of line 263.
  • a control input W at these gates, controlled from the checking device, ensures that the bits per character are recorded in the character register 60 parallel beside each other.
  • This character register 60 is again succeeded by a decoder 7 and a character generator 8 as, for example, in FIG. 1, to which a normal television monitor TV is connected.
  • the whole series of character codes appears once per picture line time circulation time of the circulation register) at the character register 60 and that so many times after each other as there are picture lines for a character.
  • FIG. 3 shows a more detailed diagram according to the invention. Much attention is paid particularly to the checking device 4, in addition to another form for a character generator (namely a diode matrix).
  • a character generator namely a diode matrix
  • circulation memory 6 comprises six, for example, television glass delay lines,
  • the buffer memory 1 in this case, for example a memory of 4 X 512 words of eight bits, produces for each new word a pulse through line 712 to a word counter 311.
  • This counter 311 consists of a number of flip-flops F F FF with which 2,048 4 X 512) words can be counted. With this large number of 2,048 words characters to be displayed) a flicker effect will occur in normal television monitors. When this is inadmissible one may proceed to delaying the frame deflection generator two times and using a tube having a longer afterglow. A number of characters, for example, 1,024, gives no flicker effect, for in that case the known interlacing method may be used.
  • the word counter 311 may be a part of a computer memory place counter.
  • the position of the counter 311 is supplied to the address control device 3 through lines 31.
  • This address control device 3 consists of a number of OR-gates, 300, 301, 310 which are connected to the selection members 2 of the buffer memory.
  • the address control device 3 transmits the counter position from the counter 311 as an address code to the selection members 2. Therefrom the place in the buffer memory for the incoming word is indicated in known manner.
  • the successive counter positions give the successive addresses for aseries of incoming words.
  • the next character is not b but, for example, b then b,-, b and after one circulation of the circulation memory b b b and so on.
  • This sequence of characters is ensured by means of the charactersper-line counter 42 and the picture line counter 41 in collaboration with the address control device 3.
  • the characters-per-line counter 42 consists of a number of flipflops H H H H H 1-1 with which 2 64 characters per line can be counted.
  • the picture line counter 41 comprises a number of flipflops V V V with which 2 512 picture lines can be counted. This counting occursin groups of eight picture lines with the flipflops V V V A first group of eight picture lines serves for the transport of information from the buffer memory to the circulation memory command to AND-gate G through line L (see below). 2 32 first groups of eight picture lines are to be distinguished (by flipflops V V also 32 second groups of eight picture lines, so that 32 lines for characters with the line spaces are available.
  • connections (lines 32) between the flipflops V V V with the OR- gates 300, 301, and 302, respectively, the flipflops H'.,, H',,, H' with the OR-gates 303, 304 and 305, respectively, and the flipflops V V V V V with the OR- gates 306, 307, 308, 309, 310, respectively, of the address device 3 ensure the above-mentioned sequence for the address selection to be present.
  • the flipflops H'.,, H H, which lead four counts with respect to the flipflops H H H and not the flipflops H H H themselves are connected to the gates 303, 304, 305, because, due to the fact that the flipflops I-i H' H' lead by four counts, it is ensured that the selection of a following address has occurred timely before reading out the selected address place in question. Herewith it is prevented that the starting pulse of the buffer memory should already arrive before the information is transported to the circulation memory.
  • the counting positions of the flipflops 11 ,11 1-1 of counter 42, and of the flipflops V V V of counter 41 are compared with each other in a comparison device B.
  • a pulse is supplied which is also supplied to the AND-gate G
  • the gate G is opened. in this manner the gate G, is opened at the instants at which information may be transported from the register 5 to the input gates 61a, 66a of the delay lines 601, 606.
  • the requirement that the counting positions of the said parts of the counters 41 and 42 should be equal has for its result that with every picture line of a group of 8, after a character b a following character b of a line after a time precisely equal to 8 character widths counted in the characters-per-line counter is transmitted to the circulation memory.
  • a counting pulse is supplied to the characters-perline counter 42 from a generator D each time exactly after a time corresponding a character width.
  • the transition between these two groups is recognized in the flip-flop V, which supplies a circulation memory upon filling thereof, no bits are written on each other but beside each other exactly at distances equal to 1 step of the characters-per-line counter.
  • the read-write command pulses for the buffer memory are produced in a generator M after every eight pulses from generator D, counted by means of the flipflops H H H of the counter 42. These eight counting pulses indicate a time of 8 X a character width which is 768 nanoseconds sec.) for example, with: a space between characters (see below), so that every 8 X 768 11, see. a read-write command for the buffer memory is given. So this can be handled for a buffer memory having a cycle time of 6 .4. sec.
  • the character generator is assumed to be a diode matrix having one input (so 64) per character and having a number of control inputs I (in this case eight) corresponding to the number of picture lines per character. These control inputs are energized after each other each time after termination of a picture line. This may be effected by using the counting positions of the flipflops V V V;, of the line counter 41 which give a 1-out-of-8 selection for the eight control inputs I in a decoder part 71.
  • the diode matrix has a number of outputs U succeeded by a register DR with a number of places 01, 02, 03, 04, 05, 06 which corresponds to a number of dots per character corresponding in the direction of the picture line.
  • the device D is a time pulse generator which supplies a pulse to the outputs T T T at fixed instants, t t t respectively.
  • This may be, for example, a delay line, having a tapping at certain places and the output of which is again connected to the input.
  • the generator is impulsed, for example, by means of a pulse from a monostable multivibrator E which is started from an OR-gate P to which are connected the output T of the delay line D as a generator feedback coupling and a synchronization lead K originating from one of the glass delay lines, for example, 601 of the circulation memory.
  • a dot of a character on a television screen will be, for example, 96 nanoseconds (10 sec.).
  • Per character there are, for example, six dots in the width with between the characters a space of two dots. This means that for a character space (6+2) X96 768 nanoseconds are required and hence for a line of 64.
  • the generator D now supplies pulses at six successive instants t t t which are at a distance of 96 nanoseconds. With these successive pulses the register places 01, 02, 06 of register DR are scanned and pulses or no pulses appear after each other after the ORgate Q, dependent upon the part of the presented character coinciding with the picture line to be written.
  • pulses are control signals for the television monitor, particularly for the brightness signal, which gives light dots on the screen.
  • a pulse appears at the output T of generator D after 7 X 96 nanoseconds.
  • This pulse is a counting pulse for the characters-per-line counter 42, and a resetting pulse across the line R for the character code register 60.
  • a following character code must be transmitted from the circulation memory 6 to the decoder 7.
  • said pulse is presented to a synchronization pulse generator S to which the synchronization signal from the circulation memory 6 is also presented through line K.
  • the synchronization pulses produced in generator S are then also applied to the device 10.
  • the video signal is formed in said device which is applied to the television monitor TV.
  • FIG. 4 shows how the generator D may be constructed, for example, by means of a delay line.
  • 400 denotes the delay line.
  • the input is constituted by two transistors 401, 402 as amplifiers,
  • the tappings for the various outputs T T T are denoted by T',, T';, T' at the point T,, of the line 400 an emitter follower with transistor 403 is provided.
  • T', T';, T' at the point T, of the line 400 an emitter follower with transistor 403 is provided. Through this and through the output T the output pulse of the line is returned to the input of the OR-gate P.
  • Amplifiers with transistors 404 and 405 are present at the other taps T,, T, T, and supply pulses to the outputs T T T at the above-mentioned instants t t t,.
  • the line is terminated by the impedance Z.
  • FIG. 5 shows how the outputs T T T of generator D can cooperate with the outputs 01, 02 06 of the character register DR to obtain the intensity signal for the television monitor.
  • the output T, of generator D and the output 01 of register DR (FIG. 3) are connected to inputs of a part Q of the OR-gate Q (FIG. 3).
  • the outputs T of the generator D is also connected, through a gate 0, which serves for inverting the signal at T to a further input 0,.
  • the function of Q is such that only at the instant that a time pulse appears at T and no pulse has been transmitted yet to T is the signal transmitted to the output 01 of the register DR. A signal or no signal is then formed at the line N suitable for a dot on the television screen.
  • Q with Q'z, Q3 with Q's e with 's for the instants t t t
  • FIG. 6 shows a diagram of a part of the circulation memory particularly of a delay line with input and output circuits. It relates, for example, to the delay line 606 of FIG. 3.
  • 607 is the input, 608 the output of the line 606.
  • an input amplifier with transistors 609, 610 to which the input signal is presented through line 611.
  • the output 608 is connected to an amplifier with the transistor 612 together with a diode resistance network 613 so as to bring the output pulse at a certain level.
  • the amplifier with transistor 612 is succeeded for impedance matching by an emitter follower with emitter 614.
  • the line 615 constitutes the output of the circuit.
  • FIG. 7 shows a television screen picture of a character.
  • E picture lines subdivided into 1 1, 1 totally eight picture lines per line R of characters, 1 are the picture lines of a second line R of characters.
  • a line space S Between the two lines R and R there is a line space S, likewise shown by eight picture lines s s s,,,.
  • the picture In the horizontal direction the picture is divided into pieces K K K K K K K, K over the length T of a picture line. On these line pieces, a light dot is formed or not formed dependent on the character to be displayed controlled from the matrix.
  • FIG. 8 shows how a diode matrix can be constructed. as a character generator. The inputs on the upper side of the Figure are the 64 character inputs from right to left for P.
  • the control inputs I are shown on the right by 1 I
  • the outputs U to the character register DR are denoted by U U U
  • the meanings of the various symbols in the matrix are shown on the right top side of FIG. 8.
  • the matrix is constructed so that parts of characters which correspond to other characters are used for all those characters in common. This provides the advantage that many diodes can be saved.
  • the part 800 of the matrix serves for making the connections for those common parts. The operation is as follows: Let it be assumed that character input K is energized. K has its I limb in common with many other characters for example L, P and so on. For this purpose the part of the matrix which is constructed for this is to be connected to the K"-input. Diode 801 serves for this purpose.
  • the K input is connected, besides to the matrix line 802, also to the matrix line 803.
  • lines 802 and 803 also convey voltage for K as a character to be displayed. At those points where these lines 802, 803, 804, 809 intersect each other and a diode is provided, in this case 810 and 811, current paths are produced.
  • the control input I When the whole picture line I with the further character parts of the character for that line R, coinciding therewith is written, the control input I is energized and the lines 824, 825 829 convey voltage.
  • the diodes 830 and 831 now play a part with the diode 801 and the diodes U U U Herewith the dots Y and Y are formed (see FIG. 7). Preceding in this manner a character is formed as may be read from the matrix.
  • the character forms may be chosen differently, if desired, for which purpose the diodes may be placed at other places on the matrix.
  • a character display device for display on a television monitor having a plurality of picture lines comprising a buffer memory for storing a plurality of rows of characters, a circulating memory for storing a line of characters, said circulating memory including a plurality of circulating registers each storing a portion of said row of characters, a decoder coupled to said circulating registers, said decoder responsive to the output of said circulating registers for providing a signal for selecting a character, a character generator coupled to said decoder and responsive to said decoder signal for generating the selected character, said television monitor coupled to said character generator for displaying each selected character, a checking device coupled to said circulating memory for recirculating said character line for as many times in succession as there are picture lines per line of characters, said checking device including a picture line counter and a character line counter, said checking device further coupled to said buffer memory for transferring the next successive character line to said circulating memory during the time interval corresponding to the plurality of picture lines representative of the space between adjacent rows of characters, said buffer memory including an
  • each of said circulating registers is a delay line.
  • said character generator is a diode matrix having one input per character which is connected to the relative output of the decoder and which has a-plurality of control inputs corresponding to the number of picture lines per character, said control inputs being energized after each other each time after termination of a complete preceding picture line from said checking device, said diode matrix further comprising a number of outputs corresponding to a number of corresponding dots per character in the direction of the picture line said outputs controlled from the checking device during a picture line a number of times after each other in accordance with the numbers of characters which can be displayed on one line and at which outputs, dependent upon the parts of the characters to be displayed on one line coinciding with the picture line to be written at that instant, control signals are formed for the television monitor on which the characters appear in the form of a number of dots.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
US799396A 1968-02-16 1969-02-14 Character display device for television monitor Expired - Lifetime US3701988A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL686802281A NL153347B (nl) 1968-02-16 1968-02-16 Inrichting voor het op een televisiescherm weergeven van digitale informatie.

Publications (1)

Publication Number Publication Date
US3701988A true US3701988A (en) 1972-10-31

Family

ID=19802796

Family Applications (1)

Application Number Title Priority Date Filing Date
US799396A Expired - Lifetime US3701988A (en) 1968-02-16 1969-02-14 Character display device for television monitor

Country Status (7)

Country Link
US (1) US3701988A (nl)
BE (1) BE728471A (nl)
DE (1) DE1903045C3 (nl)
FR (1) FR2002094A1 (nl)
GB (1) GB1263281A (nl)
NL (1) NL153347B (nl)
SE (1) SE336693B (nl)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3774161A (en) * 1971-05-14 1973-11-20 Raytheon Co Visual display system
US3787819A (en) * 1971-07-23 1974-01-22 Hollandse Signaalapparaten Bv Device for the processing of digital symbol data for the purpose of displaying text on a television monitor
US3803583A (en) * 1972-09-28 1974-04-09 Redactron Corp Display system for several fonts of characters
US3822363A (en) * 1972-08-09 1974-07-02 Digi Log Syst Inc Portable computer terminal using a standard television receiver
US3858196A (en) * 1973-09-27 1974-12-31 Department Of Transportion Display system employing digitally-addressable crt
DE2435794A1 (de) * 1973-07-30 1975-03-13 Indep Broadcasting Authority Fernsehempfaengereinrichtung
US3872446A (en) * 1971-05-14 1975-03-18 Raytheon Co Visual display system
US3896417A (en) * 1973-11-30 1975-07-22 Bell Telephone Labor Inc Buffer store using shift registers and ultrasonic delay lines
US3898622A (en) * 1973-06-26 1975-08-05 Addressograph Multigraph Data entry display terminal
US3955189A (en) * 1974-07-24 1976-05-04 Lear Siegler Data display terminal having data storage and transfer apparatus employing matrix notation addressing
US3996583A (en) * 1973-07-30 1976-12-07 Independent Broadcasting Authority System for processing data signals for insertion in television signals
US3996585A (en) * 1974-06-11 1976-12-07 International Business Machines Corporation Video generator circuit for a dynamic digital television display
US4079458A (en) * 1976-08-11 1978-03-14 Xerox Corporation High resolution character generator
US4081797A (en) * 1972-11-03 1978-03-28 Heath Company On-screen channel display
US4193112A (en) * 1976-01-22 1980-03-11 Racal-Milgo, Inc. Microcomputer data display communication system with a hardwire editing processor
US4208723A (en) * 1977-11-28 1980-06-17 Gould Inc. Data point connection circuitry for use in display devices
USRE30785E (en) * 1975-02-27 1981-10-27 Zentec Corporation Microcomputer terminal system
US4368463A (en) * 1979-03-21 1983-01-11 Sigma Electronics Limited Graphic display area classification
US4727288A (en) * 1984-10-15 1988-02-23 Anritsu Corporation Digital wave observation apparatus
US5668577A (en) * 1994-08-12 1997-09-16 Sutter; Erich E. Video circuit for generating special fast dynamic displays

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3774161A (en) * 1971-05-14 1973-11-20 Raytheon Co Visual display system
US3872446A (en) * 1971-05-14 1975-03-18 Raytheon Co Visual display system
US3787819A (en) * 1971-07-23 1974-01-22 Hollandse Signaalapparaten Bv Device for the processing of digital symbol data for the purpose of displaying text on a television monitor
US3822363A (en) * 1972-08-09 1974-07-02 Digi Log Syst Inc Portable computer terminal using a standard television receiver
US3803583A (en) * 1972-09-28 1974-04-09 Redactron Corp Display system for several fonts of characters
US4081797A (en) * 1972-11-03 1978-03-28 Heath Company On-screen channel display
US3898622A (en) * 1973-06-26 1975-08-05 Addressograph Multigraph Data entry display terminal
US3996583A (en) * 1973-07-30 1976-12-07 Independent Broadcasting Authority System for processing data signals for insertion in television signals
DE2435794A1 (de) * 1973-07-30 1975-03-13 Indep Broadcasting Authority Fernsehempfaengereinrichtung
US3858196A (en) * 1973-09-27 1974-12-31 Department Of Transportion Display system employing digitally-addressable crt
US3896417A (en) * 1973-11-30 1975-07-22 Bell Telephone Labor Inc Buffer store using shift registers and ultrasonic delay lines
US3996585A (en) * 1974-06-11 1976-12-07 International Business Machines Corporation Video generator circuit for a dynamic digital television display
US3955189A (en) * 1974-07-24 1976-05-04 Lear Siegler Data display terminal having data storage and transfer apparatus employing matrix notation addressing
USRE30785E (en) * 1975-02-27 1981-10-27 Zentec Corporation Microcomputer terminal system
US4193112A (en) * 1976-01-22 1980-03-11 Racal-Milgo, Inc. Microcomputer data display communication system with a hardwire editing processor
US4079458A (en) * 1976-08-11 1978-03-14 Xerox Corporation High resolution character generator
US4208723A (en) * 1977-11-28 1980-06-17 Gould Inc. Data point connection circuitry for use in display devices
US4368463A (en) * 1979-03-21 1983-01-11 Sigma Electronics Limited Graphic display area classification
US4727288A (en) * 1984-10-15 1988-02-23 Anritsu Corporation Digital wave observation apparatus
US5668577A (en) * 1994-08-12 1997-09-16 Sutter; Erich E. Video circuit for generating special fast dynamic displays

Also Published As

Publication number Publication date
DE1903045A1 (de) 1969-09-18
FR2002094A1 (nl) 1969-10-03
GB1263281A (en) 1972-02-09
NL6802281A (nl) 1969-08-19
DE1903045B2 (de) 1975-04-30
SE336693B (nl) 1971-07-12
BE728471A (nl) 1969-08-14
NL153347B (nl) 1977-05-16
DE1903045C3 (de) 1975-12-11

Similar Documents

Publication Publication Date Title
US3701988A (en) Character display device for television monitor
US3453384A (en) Display system with increased manual input data rate
US3798610A (en) Multiplexed intelligence communications
US3685039A (en) Video data display system
US3293614A (en) Data converter system
US3643252A (en) Video display apparatus
US3878536A (en) Apparatus for improving the shape of characters formed by a row and column coordinate matrix for display on a cathode-ray tube
US3746780A (en) Video display system
US3396377A (en) Display data processor
US3996583A (en) System for processing data signals for insertion in television signals
US4042958A (en) Row grabbing system
US4129748A (en) Phase locked loop for providing continuous clock phase correction
US3836902A (en) Graphic display having recirculating video memory
US3581290A (en) Information display system
US4825306A (en) Video translation system for translating a binary coded data signal into a video signal and vice-versa
US3609743A (en) Display unit
US4232376A (en) Raster display refresh system
JPS6153908B1 (nl)
GB2253539A (en) Mixing images in a still video camera
CA1141021A (en) Processor for a graphic terminal
US3555520A (en) Multiple channel display system
US4797746A (en) Digital image interface system
US2987715A (en) Signal-character translator
US3571807A (en) Redundancy reduction system with data editing
US3801961A (en) System for providing a video display having differing video display formats