US3594719A - System of controlling traffic signals - Google Patents
System of controlling traffic signals Download PDFInfo
- Publication number
- US3594719A US3594719A US829968A US3594719DA US3594719A US 3594719 A US3594719 A US 3594719A US 829968 A US829968 A US 829968A US 3594719D A US3594719D A US 3594719DA US 3594719 A US3594719 A US 3594719A
- Authority
- US
- United States
- Prior art keywords
- pulse
- offset
- circuit
- signals
- split
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000011664 signaling Effects 0.000 claims abstract description 8
- 125000004122 cyclic group Chemical group 0.000 claims description 21
- 230000008878 coupling Effects 0.000 claims description 6
- 238000010168 coupling process Methods 0.000 claims description 6
- 238000005859 coupling reaction Methods 0.000 claims description 6
- 230000005540 biological transmission Effects 0.000 abstract description 3
- 230000001276 controlling effect Effects 0.000 description 8
- 238000000034 method Methods 0.000 description 5
- 238000009434 installation Methods 0.000 description 3
- 238000012423 maintenance Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005065 mining Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G08—SIGNALLING
- G08G—TRAFFIC CONTROL SYSTEMS
- G08G1/00—Traffic control systems for road vehicles
- G08G1/07—Controlling traffic signals
- G08G1/081—Plural intersections under common control
- G08G1/082—Controlling the time between beginning of the same phase of a cycle at adjacent intersections
Definitions
- a coordinated traffic signalling control system comprises a plurality of local controllers having no interconnecting cables.
- Each controller includes a radio receiver tuned to receive a standard frequency and time transmission, broadcast by a preexisting standard signal services station, such as WWV; and a time signal discriminator coupled to the receiver generates time signals from the received radiosignals.
- a programmer circuit responsive to the generated time signals, in turn generates traffic pattern instruction signals. Circuits responsive to the generated timing signals and to the generated pattern instruction signals, automatically control the offset and split selection for that controller.
- the present invention relates to a system of controlling traffic signals, more particularly to a method for regulating signal installations of a multistage coordinated control system to synchronize with one another, and to an apparatus for performing the method.
- the invention to be described constitutes an improvement on the invention described in our prior British Pat. No. 1,086,664, imued Oct. 1 l, 1967, for An Offset Control System for Trafiic Signal.
- Another object of the present invention is to provide an apparatus for carrying out the above-described method.
- standard-signal receiver 1 is provided to receive a standard frequency and time transmission from a standard-signal services radio station, such as station WWV.
- the received radio signal is delivered into a-time discriminator circuit 2.
- the circuit 2 discriminates the information in the received signal, i.e. the width of a clock pulse, the interruption of the radio wave, and the Morse code of time, and produces a time signal which is delivered to a programmer3 and a coder 8.
- the programmer 3 has a timing portion and a pattern establishing portion, and is adapted to deliver a predetermined signal to a circuit 4 for establishing a signal cycle length and one of split offset determining circuits 14-1, 14-2, l4-n, respectively, when the output of the timing portion is coincident with a predetermined pattern of the pattern establishing portion.
- the split and offset circuits, and their operation, are described in British Pat. No. 1,086,664.
- the pattern establishing portion of programmer 3 replaces the master controller of said British patent, and is responsive to the time signal from circuit 2 to generate a pattern set, or traffic pattern instruction signals, establishing the appropriate values of the cycle, offset, and split for that controller.
- the signal cycle length establishing circuit 4 in which there is set a period corresponding to a selected pattern instruction of the pattern establishing portion of the programmer 3 determines the scale of a first variable scale counter 6 by receiving a set signal for establishing a corresponding signal cycle length signal from the programmer.
- the first variable scale counter 6 receives an input of a pulse ofa predetermined period which is produced by an oscillator or from the frequency of the commercial power, and converts the received pulse into asignal having a cycle length in accordance witha signal entered from the signal cycle length establishing circuit 4, the signal thus obtained being transmitted to a second variable scale counter 7 and a sync counter 9.
- the sync counter 9 counts the cyclic signal to thereby develop a sync pulse every cycle, and the sync signal is then transmitted to an offset adjusting circuit 10.
- the sync counter 9 is adapted to periodically be reset by the coder 8 which gates the time signal delivered from the time discriminator circuit 2.
- the other local controllers are also adapted to be reset at the same time in a similar manner, and thus, all the local controllers develop their sync signals simultaneously.
- the second variable scale counter 7 operates as a scale of m counter to count m digits when it receives a normal instruction signal from the offset adjusting circuit 10.
- the counter 7 i also operates as a scale of (ma) counter to count m-a digits when it receives an advance" instruction signal and operates as a scale of (m+a) counter to count m+a digit upon receiving a "delay" instruction signal.
- a normal instruction signal is entered into the second variable scale counter 7, then the counter 7 makes an m digit count and develops one output pulse after receiving m input pulses. This output pulse is delivered to the first counter 11 whereby the counter effects a decimal digit count.
- the output signal of the counter 11 is entered into a second counter 12, in which a decimal count is made.
- the first and second counters 11 and 12 are connected to areference split circuit 13 (which is usually set at 0 percent) and n numbers of the split-offset determinating circuits 144, 14-2, 14-n.
- Each of these split-offset determining circuits provides a predetermined split and ofiset, whereby a pulse is developed at one set point of the split-offset determining circuit selected by the programmer 3.
- the reference split circuit 13 establishes a signal for beginning the traffic movement phase along an arterial road, and a signal for terminating said traffic movement phase is established by a pulse developing at a split set point of the split-offset deter mining circuit 14.
- the offset pulse generated by the split offset determining circuit 14 is also delivered to the offset adjusting circuit 10 through an OR circuit 15.
- the offset adjusting circuit 10 becomes nonnal," so that the second variable scale counter 7 makes m digit counts as described above.
- the offset adjusting circuit 10 is in its delay condition, so that the second variable scale counter 7 counts (m+a) digits.
- the offset adjusting circuit 10 goes into its advance" condition, so that the counter 7 counts (ma) digits.
- the counter 7 is made to stop by a stop signal.
- the offset pulse is made to gradually approach the sync pulse by a 50 percent shifting even when there is maximum delay of the offset pulse.
- the offset pulse is in coincidence with the sync signal.
- the second variable scale counter 7 is stopped by means of a stop signal when the offset pulse is within a predetermined time of period, 100 a/m percent of one cycle, for example, 10 to 12.5 percent, before a sync pulse comes in while the counter 7 begins to operate again when receiving a sync pulse.
- the present invention is such that an offset is adjusted by the use of a radio wave of a standard signal as each local controller is corrected to synchronize, thus each local controller being synchronized. Therefore, the present invention needs no cables such as are used in conventional coordinated control systems, and achieves significant advantages in that the installation of traffic controllers is simplified, and less expensive, and the maintenance and extension of the controllers are facilitated.
- a coordinated traffic signalling control system comprising a plurality of local controllers, each of said controllers including an offset circuit and a split circuit, radio receiver means at each controller tuned to receive the standard frequency and time signals broadcast for general reception by a preexisting standard signal radio station, a time discriminator circuit coupled to said receiver for generating timing signals from the broadcast signals received by said receiver, programmer means responsive to said generated timing signals for generating traffic pattern instruction signals, and control means responsive to said generated timing signals and to said generated trafiic pattern instruction signals for controlling the operation of said offset and split circuits.
- control means includes an offset adjusting circuit, and counter means connected to said split circuit, to said offset circuit, and to said offset adjusting means.
- control means includes counter means responsive to said traffic pattern instruction signals for generating a sync pulse and a cyclic pulse in accordance with said instruction signals, offset pulse and split pulse generating circuits including further counter means controlled by said cyclic pulse, an offset adjusting circuit, means coupling said sync pulse to said offset adjusting circuit, said offset adjusting circuit being operative to compare said sync pulse with the pulses generated by said offset pulse and split pulse generating circuits for selectively generating a correcting signal, and means coupling said correcting signal to said further counter means to control the outputs of said offset pulse and split pulse generating circuits.
- control means includes means responsive to said traffic pattern instruction signals for generating a sync pulse and a cyclic pulse, said offset circuit including means responsive to said cyclic pulse for generating an offset pulse, and means for comparing said generated offset pulse and said sync pulse, said comparing means being operative to selectively generate a correcting signal for controlling the operation of said offset circuit.
- control means includes means responsive to said traffic pattern instruction signals for generating a sync pulse and a cyclic pulse, said split circuit including means responsive to said cyclic pulse for generating a split pulse, and means for comparing said generated split pulse and said sync pulse, said comparing means being operative to selectively generate a correcting signal for controlling the operation of said split circuit.
- a coordinated traffic signalling control system having a plurality of local controllers, each controller including radio receiver means for receiving a radio wave signal from an external radio station thereby to control traffic signals synchronously with other controllers, said receiver means being tuned to a transmitting station broadcasting standard frequency and time signal emissions in the service area in which the traffic signalling control system is located, each local controller comprising time signal discriminator means for developing a series of time signals from the standard frequency and time signal received by said receiver means, a traffic control pattern selector responsive to said developed time signals and operative to generate a selected pattern of instruction signals, means responsive to said instruction signals for generating a sync pulse and a cyclic pulse in accordance with selected instruction signals, an offset and split circuit coupled to said pattern selector for control thereby, counter means responsive to said cyclic signal for further controlling said offset and split circuit, whereby said offset and s lit circult generates an output corresponding to said selecte traffic control pattern, and an offset control circuit connected to compare said sync pulse with the output of said offset and split circuit, said offset control circuit being
- said means for generating said sync pulse and said cyclic pulse includes further counter means.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Traffic Control Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP43042228A JPS4814000B1 (enrdf_load_stackoverflow) | 1968-06-20 | 1968-06-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
US3594719A true US3594719A (en) | 1971-07-20 |
Family
ID=12630160
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US829968A Expired - Lifetime US3594719A (en) | 1968-06-20 | 1969-06-03 | System of controlling traffic signals |
Country Status (5)
Country | Link |
---|---|
US (1) | US3594719A (enrdf_load_stackoverflow) |
JP (1) | JPS4814000B1 (enrdf_load_stackoverflow) |
DE (1) | DE1931033B2 (enrdf_load_stackoverflow) |
FR (1) | FR2011282A1 (enrdf_load_stackoverflow) |
GB (1) | GB1277095A (enrdf_load_stackoverflow) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3825890A (en) * | 1969-07-17 | 1974-07-23 | Hattori Tokeiten Kk | Control system for a traffic signalling apparatus |
US3828307A (en) * | 1971-06-29 | 1974-08-06 | Georgia Tech Res Inst | Automatic traffic control system |
US4250483A (en) * | 1978-01-30 | 1981-02-10 | Rubner Anthony C | System for signalized intersection control |
US4481515A (en) * | 1982-04-01 | 1984-11-06 | Philmont Electronics, Inc. | Coordinator for traffic signal controller |
US20120161982A1 (en) * | 2010-12-27 | 2012-06-28 | Musachio Nicholas R | Variable Speed Traffic Control System |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT377863B (de) * | 1979-04-03 | 1985-05-10 | Strahlen Umweltforsch Gmbh | Steuervorrichtung fuer eine verkehrs-lichtsignalanlage |
DE2923121A1 (de) * | 1979-06-07 | 1980-12-18 | Siemens Ag | Verfahren und schaltungsanordnung zur vornahme einer plausibilitaetspruefung bezueglich aufeinanderfolgend auftretender zeitinformationen in verkehrssignalanlagen |
DE2923167A1 (de) * | 1979-06-07 | 1980-12-11 | Siemens Ag | Verfahren und schaltungsanordnung zum synchronisieren des betriebs von steuereinrichtungen, insbesondere von strassenverkehrssignalanlagen |
DE3371718D1 (en) * | 1982-02-17 | 1987-06-25 | Fabema Funkampeldienst Manfred | Method of controlling traffic lights, flashing warning lights and similar devices |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3015802A (en) * | 1953-04-07 | 1962-01-02 | Roy R Newsom | Remote control of traffic signals |
US3175193A (en) * | 1960-06-29 | 1965-03-23 | Motorola Inc | Traffic signal synchronizing system |
US3483508A (en) * | 1967-01-18 | 1969-12-09 | Tamer Electronics Ind Inc | Offset transition control system for a traffic controller |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB889604A (en) * | 1959-06-26 | 1962-02-21 | Automatic Telephone & Elect | Improvements in or relating to signalling systems for the control of street traffic |
US3174131A (en) * | 1959-07-28 | 1965-03-16 | Bliss E W Co | Remote control of traffic cycle length |
-
1968
- 1968-06-20 JP JP43042228A patent/JPS4814000B1/ja active Pending
-
1969
- 1969-06-03 US US829968A patent/US3594719A/en not_active Expired - Lifetime
- 1969-06-11 GB GB29668/69A patent/GB1277095A/en not_active Expired
- 1969-06-18 FR FR6920285A patent/FR2011282A1/fr not_active Withdrawn
- 1969-06-19 DE DE19691931033 patent/DE1931033B2/de not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3015802A (en) * | 1953-04-07 | 1962-01-02 | Roy R Newsom | Remote control of traffic signals |
US3175193A (en) * | 1960-06-29 | 1965-03-23 | Motorola Inc | Traffic signal synchronizing system |
US3483508A (en) * | 1967-01-18 | 1969-12-09 | Tamer Electronics Ind Inc | Offset transition control system for a traffic controller |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3825890A (en) * | 1969-07-17 | 1974-07-23 | Hattori Tokeiten Kk | Control system for a traffic signalling apparatus |
US3828307A (en) * | 1971-06-29 | 1974-08-06 | Georgia Tech Res Inst | Automatic traffic control system |
US4250483A (en) * | 1978-01-30 | 1981-02-10 | Rubner Anthony C | System for signalized intersection control |
US4481515A (en) * | 1982-04-01 | 1984-11-06 | Philmont Electronics, Inc. | Coordinator for traffic signal controller |
US20120161982A1 (en) * | 2010-12-27 | 2012-06-28 | Musachio Nicholas R | Variable Speed Traffic Control System |
US8711005B2 (en) * | 2010-12-27 | 2014-04-29 | Nicholas R. Musachio | Variable speed traffic control system |
Also Published As
Publication number | Publication date |
---|---|
DE1931033B2 (de) | 1971-12-30 |
DE1931033A1 (de) | 1970-04-30 |
FR2011282A1 (enrdf_load_stackoverflow) | 1970-02-27 |
JPS4814000B1 (enrdf_load_stackoverflow) | 1973-05-02 |
GB1277095A (en) | 1972-06-07 |
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