US3586983A - Print hammer control system - Google Patents

Print hammer control system Download PDF

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US3586983A
US3586983A US778500A US3586983DA US3586983A US 3586983 A US3586983 A US 3586983A US 778500 A US778500 A US 778500A US 3586983D A US3586983D A US 3586983DA US 3586983 A US3586983 A US 3586983A
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circuit
state
bistable circuit
coil
output
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Lynn W Marsh Jr
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Momentum Systems Corp
Mohawk Systems Corp
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Mohawk Data Sciences Corp
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J9/00Hammer-impression mechanisms
    • B41J9/44Control for hammer-impression mechanisms

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  • ABSTRACT A print hammer firing circuit incorporating 1 Int. econdary storage includes a s hmitt trigger two logical 1 Field of Search 0, circuits and a logical OR circuit. One of the AND circuits and 232, 233, 245, 328/72 the OR circuit are mutually interconnected input-to-output to provide the stora e function and to drive the Schmitt tri er. [56] Rdennm Clad The second AND circuit is connected to gate the trigger ut- UNYTED STATES PATENTS put under control of the storage circuit.
  • This invention relates to print hammer control systems and, more particularly, to hammer control systems adapted for use in high speed line printers.
  • one of the most widely used techniques for controlling the timing of print hammer actuation involves storing a full print line of data in a buffer memory during a load cycle and subsequently, during the print cycle, scanning the stored data in a predetermined pattern and comparing each scanned character with a representation of the character coming into print position on the print carrier.
  • a timing pulse generally called a character pulse
  • each time a horizontal row of drum characters passes a stationary reference point For each such character pulse the full amount of data in the buffer memory is scanned and compared with the drum character next coming into print position.
  • Each character match that is obtained during the scan-comparison operation requires that a print hammerbe fired to effect printing of the character when the character row is in print position.
  • the secondary storage function has been performed by use of a conventional bistable storage flip-flop, trigger or latch circuit for each print hammer driver circuit together with the required ancillary circuits to set the appropriate flipflops for each positive comparison that occurs, and for employing the set output of the flip-flop to condition some form of gate circuit which thereafter is enabled by a common fire pulse fed to the gate circuits for all print hammers.
  • the output of each activated gate circuit is thereafter employed to trigger a timing circuit, such as a single-shot multivibrator, the output of which is in turn used to energize an appropriate print hammer coil driver circuit.
  • further circuits are required for resetting the secondary storage flipflops at some point prior to the next subsequentprint cycle.
  • skewed drum approach In order to avoid the need for secondary storage in a drum printer the so-called skewed drum approach has been devised. This is a technique wherein the characters of each horizontal row on the print drum do not pass the print line at the same instant but instead are circumferentially displaced by a slight amount from each other so that each passes the print line at a different instant.
  • each positive comparison signal can be used to actuate a coil drive circuit directly and the requirement for secondary storage is eliminated.
  • skewed print drums are costlier than straight print drums and, more undesirably, control of the angular velocity of the print drum in a skewed drum system is much more critical than for a straight drum system.
  • the frequency of the internal oscillator used to time the scan-compare operation must be closely matched with the mechanical movement of the drum since the oscillator itself determines the timing of the hammer firing pulses.
  • the oscillator is used only to time the internal scan-compare operation and fire pulses are generated from the print drum mechanics independent of the oscillator frequency thus giving the straight drum system a much greater capacity to operate reliably in an environment where drum speed is likely to fluctuate over a relatively wide range.
  • Another object is to provide a print hammer control system that realizes substantially the economic benefits of the skewed drum approach without incurring the inherent disadvantages thereof.
  • a Schmitt trigger two logical AND circuits and a logical OR circuit are arranged to provide the complete secondary storage plus measured drive pulse generation function.
  • One of the AND circuits and the OR circuit are mutually interconnected input-to-output to provide the storage function and to drive the Schmitt trigger.
  • the second AND circuit is connected to gate the trigger output under control of the storage circuit.
  • An integrating network at the trigger input causes the gated output, which drives the hammer coil, to define an accurate time interval. This provides an extremely simple, low cost and reliable print hammer drive circuit incorporating the secondary storage function.
  • BRIEF DESCRlPTlON OF THE DRAWINGS F IG. 1 is a block circuit diagram showing the overall control circuits for performing the scan-compare operation in a print system utilizing the hammer firing control circuits of the invention. To simplify the description, the system is set up to print lines having four print positions (columns), although as will be readily apparent from the following detailed description, any size print line can be accommodated.
  • FIG. 2 is a schematic circuit diagram showing the four print hammer control circuits for the four print hammers of the system.
  • FIG. 3 is a waveform diagram illustrating the operation of the circuits of FIGS. 1 and 2.
  • character signals representing a line of data to be printed are transmitted by an input circuit 10 to a magnetic core buffer memory 12. Since each print line constitutes four characters, memory 12 has four character storage locations which are addressable in accordance with conventional coincident current techniques by a pair of address circuits l4 and 16. Each storage location is identified by one X address and one Y address. The four locations in memory 12 are therefore designated Xl-Yl, Xl-YZ, XZ-Yl and X2-Y2 and are accessed by signals generated on the appropriate ones of output lines X1 and X2 from circuit 14 and Y1 and Y2 from circuit 16.
  • control circuit 18 drives the circuits 14 and 16 in a predetermined pattern during each load cycle so that the print column location of each data character is designated by its storage location in memory 12.
  • control circuit 18 is governed by character pulses C received at an input 28 from the type carrier mechanism.
  • a pulse C is produced each time a horizontal row of type characters on the drum passes a stationary reference point.
  • a character pulse C is generated by the type carrier mechanism as each character on the carrier passes a fixed reference point.
  • One conventional way of generating character pulses is to employ a slotted disc and an optical sensing station.
  • the disc is con- I nected directly to the type carrier drive train and the sensing station generates the-character pulses by sensing the slots in the disc, the number of slots and the speed of rotation of the discbeing arranged such that each slot represents a character row (for a print drum system) or an individual character (for a horizontal type carrier system).
  • each character pulse is transmitted to control circuit 18 and causes the generation of a sequence of four T pulses on line 30.
  • the four pulses are transmitted to the X and Y address circuits l4 and 16 to step them through the predetermined addressing pattern for accessing the four memory locations for readout. As each location is accessed the data character therein is presented via a line 32 to the first input of a comparator circuit 22.
  • Each C pulse is also fed to a character generator circuit 20 which conventionally comprises a counting circuit.
  • the count represented at the output of circuit 20 indicates the row of characters on the print drum next approaching print position. This count is fed to the second input of comparator 22.
  • a positive comparison pulse is produced at the output of comparator 22 and is fed to one input of an AND gate 24.
  • the second input to AND 24 is taken from output line 30 from control circuit 18, thus causing the outputs from comparator 22 to be gated by the T pulses. Therefore, each time a positive comparison is achieved AND 24 generates an equal signal E.
  • the character pulses are also passed through an inverter circuit 29 to a delay circuit 26 whereupon the output of the latter constitutes a sequence of negative going fire pulses F lagging the C pulses by the delay of circuit 26 and having a repetition rate equal to the C pulses.
  • FIG. 1 While the above description of FIG. 1 was given in the context of a system employing a print drum, essentially the same system can be used for a horizontal type carrier. The difference is that character generator 20, instead of producing a single character output for each C pulse, produces a sequence of different character pulses under the control of the T pulses. This, of course, is to account for the fact that for each C pulse a different character on the carrier comes into alignmentwith each print hammer.
  • the individual hammer control circuits which operate on the signals generated by the circuit of FIG. 1 to effect printing in accordance with the invention are shown in FIG. 2.
  • the four print hammers are actuated by supplying drive current to the four print hammer drive coils 48, 58, 68 and 78.
  • the four control circuits 40, 50, 60 and 70 are identical to one another and therefore a detailed description is given only for circuit 40.
  • the circuit 40 comprises an AND circuit 41 which receives at its inputs the two character selection signals X1 and Y1 and the equal signal E. Therefore, when a positive comparison signal E results during the time that the Xl-Yl character from memory 12 is being compared with the output from character generator 20, AND 41 produces a positive output signal. This output is transmitted to an input of an OR circuit 49.
  • OR 49 has its output connected to an input ofan AND circuit 42 and receives at its second inputthe output from AND 42.
  • OR 49 and AND 42 are therefore arranged in a mutual input-output interconnection constituting a storage latch.
  • AND 42 receives at its second input the fire signal F, which is a negative signal for releasing or resetting the latch.
  • an AND circuit produces a positive voltage at its output if and only if all its inputs are positive.
  • An 0R produces a positive output it and only if one or more of its inputs is positive.
  • An inverter convens a positive signal to a negative signal and vice versa.
  • positive and negative signals are used herein to denote the two relative voltage levels of the logic system. In practice both levels could be above ground or below ground or one of them could be ground.
  • the logic symbology used herein is consistent with the standards of MIL-STD-806B (Feb. 26, 1962).
  • OR 49 is also fed, via an inverter circuit 43, to one input of a two-input AND circuit 45.
  • a Schmitt trigger circuit 44 supplies the second input to AND 45.
  • the output from AND 45 is fed through amplifier 46 to the hammer coil 48. Coil 48 is energized in response to the generation of a positive output signal from AND 45.
  • the Schmitt trigger 44 is a conventional form of bistable circuit which is voltage level responsive. That is to say, voltage levels at its input A which are above the threshold level of the trigger caused it to switch to a positive output state (i.e., the output from the trigger is positive). When the voltage level at input A falls below the threshold the output from the trigger shifts to a more negative level.
  • the input A to the Schmitt trigger is connected through a diode 47 and a resistor R1 to the output of AND 42.
  • an integrating network comprising a resistor R2 and a capacitor C is also connected to input A.
  • Resistor R2 has a substantially greater resistance value then R] so that a positive-going voltage shift at the output of AND 42 charges the capacitor C through resistor R1 at a relatively rapid rate (the Rl-C time constant is relatively small) so that the trigger 44 switches to its positive output state rapidly in response to a positive shift at the output of AND 42.
  • R1 may be ohms
  • R2 may be 1,000 ohms
  • C may be 1 microfarad.
  • these component values yield a delay of 50 microseconds between the appearance of a positive-going output from AND 42 and the switching of trigger 44 to its positive output state and a delay of 1.3 milliseconds between the appearance of a negativegoing output at AND 42 and the switching of trigger 44 to its negative output state.
  • circuits 50, 60, and 70 are identical in construction to circuit 40 except that their respective input AND circuits 51, 61 and 71 are responsive to different combinations of the address signals X and Y.
  • AND 51 generates a positive output signal when an E pulse occurs during comparison of the X1-Y2 data character.
  • AND 61 generates an output if E occurs during comparison of the X2-Y1 data character and
  • AND 71 generates an output when E occurs during comparison of the X2-Y2 data character.
  • AND 41 may be energized only during the first T pulse of the four pulse sequence and since the X1-Y1 character is designated for printing in column 1, coil 48 controls print hammer number 1.
  • AND 51 may be energized only during the second T pulse and coil 58 controls hammer number 2 for printing the X1-Y2 data character in print column 2.
  • Coils 68 and 78 control the column 3 and column 4 hammers respectively, for printing the X2-Y1 and X2-Y2 data characters, respectively. Comparison of the latter two data characters occurs during the third and fourth T pulses.
  • the first C pulse (FIG. 3) occurring during the print cycle initiates a series of four T pulses.
  • the first T pulse sets the address circuits 14 and 16 (FIG. I) to the Xl-YI condition, causing the first character of the line to be read out over line 32 to the comparator 22.
  • the X1 and the Y1 signals are received by AND 41 (FIG. 2) and, assuming the first data character in the buffer memory matches the output of the character generator, the resulting E pulse activates AND 41 and the output thereof goes positive (FIG. 3).
  • the second, third and fourth T pulses occur well prior to the first F pulse.
  • the second T pulse in switching the buffer address circuits to the Xl-Y2 state to present the second data character to the comparator 22, also conditions AND 51 (FIG. 2) of hammer control circuit 50 so that if an E pulse is generated the sequence of operation described above for circuit 40 is initiated for circuit 50 with the result that hammer drive current is also supplied to coil 58 in response to the F pulse.
  • ANDs 61 and 71 are partially conditioned during the third and fourth T pulses so that the third and fourth hammer coils 68 and 78 can also be driven in response to the F pulse if the appropriate character matches are obtained.
  • the print cycle continues in this manner until a number of C pulses equal to the total number of characters in the type carrier font have occurred. When that happens all print hammers have been presented with all printable characters and the line has been fully printed.
  • circuits of FIG. 2 can be implemented by logic components other than the positive AND-OR components illustrated.
  • AND 41, OR 49 and AND 42 can each be replaced by a circuit that generates a negative output if and only if all its inputs are positive.
  • AND 45 can be replaced by a circuit that generates a positive output if and only if all its inputs are negative.
  • inverter 43 is unnecessary and the output of the OR 49 substitute can be fed directly to the AND 45 substitute.
  • the integration network at the input to ST 44 has to be changed to provide the longer time constant in response to the a positive-going transition.
  • a circuit for firing a print hammer in a high speed line printer comprising:
  • a coil adapted to fire the hammer in response to a coil drive signal
  • bistable circuit selectively settable to two different output states in response to voltage level transitions presented at its input, 'a transition of a first polarity switching said bistable circuit to a first of said two output states and a transition of the opposite polarity switching said circuit to the second state, said bistable circuit further including means for delaying said switching by a predetermined interval after occurrence of said opposite transition;
  • gating means connected to the output of said bistable circuit for generating, when open, a coil drive signal in response to said first output state of said bistable circuit
  • control means for causing said bistable circuit to switch into said first output state when said coil is to be driven at a subsequent instant
  • said control means comprising: a logical AND circuit and alogical OR circuit mutually connected output-to-input, means for presenting a signal to a second input of said OR circuit when the coil is to be driven at a subsequent instant, means for presenting a signal to a second input of said AND circuit at said subsequent instant, means for transmitting the output of said OR circuit to an input of said gating means, and means for transmitting the output of said AND circuit to the input of said bistable circuit; and
  • control means for causing said control means to simultaneously supply a voltage transition of said opposite polarity to said bistable circuit and to open said gating means at said subsequent instant, whereby said gating means generates a coil drive signal having a duration substantially equal to said predetermined interval.
  • a circuit for driving a print hammer actuating coil comprising, in combination:
  • bistable circuit settable to a first and a second state
  • timing circuit operable in response to said resetting of said bistable circuit for supplying a drive current to said coil for a predetermined length of time
  • said timing circuit comprising: a Schmitt trigger connected to the output of said bistable circuit; an integrating network connected to the input of said Schmitt trigger and constructed and arranged to present a rapidly changing voltage transition to switch said trigger to a first state in response to the setting of said bistable circuit and to present a slowly changing voltage transition to switch said trigger from said first to a second state in response to the resetting of said bistable circuit; and a coincidence circuit operable to supply said drive current to said coil only when said bistable circuit is in said second state when said trigger is in said first state.
  • a circuit for driving a print hammer actuating coil comprising, in combination:
  • bistable circuit settable to a first and a second state
  • said bistable circuit comprising: a logical OR circuit having at least two inputs; a logical AND circuit having at least two inputs, a first one of which is connected to the output of said R circuit; means for activating one of said OR inputs when the coil is to be driven at a subsequent instant; means for feeding the output from said AND circuit to the other of said OR inputs; and means for feeding said fire signal to the second one of said AND inputs, the output from said bistable circuit being manifested at the output of said OR circuit;
  • timing circuit operable in response to said resetting of said bistable circuit for supplying a drive current to said coil for a predetermined length of time.
  • a circuit for driving an actuating coil comprising:
  • bistable circuit adapted to be set to a first and reset to a second state
  • Schmitt trigger responsive to said storage means, said Schmitt trigger being adapted to be switched to a first state in response to charging of said storage means and switched to a second state a period of time after discharge of said storage means is initiated;
  • gating means for providing, when opened, a signal for driving the coil, said gating means adapted to be opened in response to the first state of said Schmitt trigger;
  • said storage means is an integrating network connected to the input of said Schmitt trigger and adapted to present a rapidly changing voltage transition to switch said trigger to its first state in response setting of said bistable circuit and to present a slowly changing voltage transition to switch said trigger from said first to said second state in response to the resetting of said bistable circuit.
  • bistable circuit comprises: a logical OR circuit having at least two inputs; a logical AND circuit having at least two inputs, a first one of which is connected to the output of said OR circuit; means for feeding the output from said AND circuit to one of the inputs of said OR circuit; and wherein: the other of said OR circuit is activated to set said bistable circuit, and the other input of said AND circuit is activated to reset said bistable circuit.

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Abstract

A print hammer firing circuit incorporating secondary storage includes a Schmitt trigger, two logical AND circuits and a logical OR circuit. One of the AND circuits and the OR circuit are mutually interconnected input-to-output to provide the storage function and to drive the Schmitt trigger. The second AND circuit is connected to gate the trigger output under control of the storage circuit. An integrating network at the trigger input causes the gated output, which drives the hammer coil, to define an accurate hammer actuation time interval.

Description

Q Umted States Patent 1 l3,586,983
[72] Inventor Lynn W. Marsh, Jr. 3,246,209 4/1966 Multari 307/246 Melrose, Mass. 3,318,479 5/1967 Houle 307/246 [211 App]. No. 778,500 3,339,089 8/1967 Bergman 307/238 [22] Filed Nov. 25, 1968 3,365,623 1/1968 Stacey 307/235 [45] Patented June 22, 1971 3,444,470 5/1969 Bolt et a1. 307/232 [73] Assignee Mohawk Data Sciences Corporation 3,488,519 1/1970 Vadrot 307/252 East Hammer Primary ExaminerDonald D. Forrer Assistant Examiner-Harold A. Dixon PRINT HAMMER CONTROL SYSTEM Al[OflI2)/SRih3ld H. Smith, Francis J. Thomas and Sughrue,
7 Claims, 3 Drawing Figs, Rothwell. Mion. Zinn and Mac Peak [52] US. Cl 328/75, 7 I M q g 317/1 323/94 323/ 13] ABSTRACT: A print hammer firing circuit incorporating 1 Int. econdary storage includes a s hmitt trigger two logical 1 Field of Search 0, circuits and a logical OR circuit. One of the AND circuits and 232, 233, 245, 328/72 the OR circuit are mutually interconnected input-to-output to provide the stora e function and to drive the Schmitt tri er. [56] Rdennm Clad The second AND circuit is connected to gate the trigger ut- UNYTED STATES PATENTS put under control of the storage circuit. An integrating net- 2,509,910 5/1950 Dike 328/72 work at the trigger input causes the gated output, which drives 3,126,449 3/ 1964 Shirman 307/290 the hammer coil, to define an accurate hammer actuation time 8/1965 Ryon 307/238 interval.
PATENIEU JUH22 lElYl SHEEI1UF3 C'\ & .F
CHAR.
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-COMP L24 R a X R ss CONTROL T ADD E XI x2 30 ,L V XI v f'\ V f 32 BUFFER INPUT -R MEMORY Yl Y2 Y ADDRESS FIG. I
INVENTOR LYNN W. MARSH, JR.
ATTORNEY PATENTEI] 22 19?;
SHEET 2 BF 3 so F31 Lug FIG. 2
PRINT HAMMER CONTROL SYSTEM BACKGROUND OF THE INVENTION This invention relates to print hammer control systems and, more particularly, to hammer control systems adapted for use in high speed line printers.
In high speed line printing one of the most widely used techniques for controlling the timing of print hammer actuation involves storing a full print line of data in a buffer memory during a load cycle and subsequently, during the print cycle, scanning the stored data in a predetermined pattern and comparing each scanned character with a representation of the character coming into print position on the print carrier. ln printing systems using a print drum, means are provided for generating a timing pulse, generally called a character pulse, each time a horizontal row of drum characters passes a stationary reference point. For each such character pulse the full amount of data in the buffer memory is scanned and compared with the drum character next coming into print position. Each character match that is obtained during the scan-comparison operation requires that a print hammerbe fired to effect printing of the character when the character row is in print position.
With a so-called straight print drum (meaning that all the characters of a horizontal row pass the print line at the same instant) all hammers required to print the same character have to be fired at the same instant. Therefore, since economy dictates serial-by-character comparison (so that only a single character comparator is required), it is obvious that the results of each character comparison performed during a scan-compare sequence must be stored in some manner until the correct instant for hammer firing occurs. The hardware required to perform the function of temporarily storing the comparison results is sometimes referred to as secondary storage. In general, the secondary storage function has been performed by use of a conventional bistable storage flip-flop, trigger or latch circuit for each print hammer driver circuit together with the required ancillary circuits to set the appropriate flipflops for each positive comparison that occurs, and for employing the set output of the flip-flop to condition some form of gate circuit which thereafter is enabled by a common fire pulse fed to the gate circuits for all print hammers. The output of each activated gate circuit is thereafter employed to trigger a timing circuit, such as a single-shot multivibrator, the output of which is in turn used to energize an appropriate print hammer coil driver circuit. In addition, further circuits are required for resetting the secondary storage flipflops at some point prior to the next subsequentprint cycle.
In order to avoid the need for secondary storage in a drum printer the so-called skewed drum approach has been devised. This is a technique wherein the characters of each horizontal row on the print drum do not pass the print line at the same instant but instead are circumferentially displaced by a slight amount from each other so that each passes the print line at a different instant. By properly synchronizing the scan-comparison operation with the rotation of the print drum, each positive comparison signal can be used to actuate a coil drive circuit directly and the requirement for secondary storage is eliminated. However, skewed print drums are costlier than straight print drums and, more undesirably, control of the angular velocity of the print drum in a skewed drum system is much more critical than for a straight drum system. This is because in the skewed system the frequency of the internal oscillator used to time the scan-compare operation must be closely matched with the mechanical movement of the drum since the oscillator itself determines the timing of the hammer firing pulses. In the straight drum system the oscillator is used only to time the internal scan-compare operation and fire pulses are generated from the print drum mechanics independent of the oscillator frequency thus giving the straight drum system a much greater capacity to operate reliably in an environment where drum speed is likely to fluctuate over a relatively wide range.
The above described situation applies with equal force to systems employing horizontal type carriers (carriers which move the type characters parallel to the print line, e.g., print chains, print trains, print belts, etc.). The chief difference is that with the horizontal system a character pulse is generated as each character on the carrier passes a stationary reference point and that each hammer is presented with a different character during each print subcycle rather than .with the same character as is the case with a drum having rows of identical characters. The functional equivalent to the skewed drum principle in the horizontal type system is where the characters on the carrier are spaced apart by intervals which are slightly different (either wider or narrower) from the spacing of the print hammers/As in the drum system, however, if, to avoid secondary storage, the result of each individual comparison operation is employed directly as the hammer firing pulse the system becomes extremely sensitive to slight variations in the velocity of the type carrier and reliability is severely diminished.
Objects and Summary of the Invention It is therefore an object of the invention to provide an improved print hammer control system that enables low cost implementation of secondary storage in a high speed line printer, therefore achieving substantially the cost advantages of the skewed drum approach in a straight drum system.
Another object is to provide a print hammer control system that realizes substantially the economic benefits of the skewed drum approach without incurring the inherent disadvantages thereof.
In accordance with the invention a Schmitt trigger, two logical AND circuits and a logical OR circuit are arranged to provide the complete secondary storage plus measured drive pulse generation function. One of the AND circuits and the OR circuit are mutually interconnected input-to-output to provide the storage function and to drive the Schmitt trigger. The second AND circuit is connected to gate the trigger output under control of the storage circuit. An integrating network at the trigger input causes the gated output, which drives the hammer coil, to define an accurate time interval. This provides an extremely simple, low cost and reliable print hammer drive circuit incorporating the secondary storage function. These and other objects, features and advantages will be made apparent by the following detailed description of a preferred embodiment of the invention, the description being supplemented by drawings as follows:
BRIEF DESCRlPTlON OF THE DRAWINGS F IG. 1 is a block circuit diagram showing the overall control circuits for performing the scan-compare operation in a print system utilizing the hammer firing control circuits of the invention. To simplify the description, the system is set up to print lines having four print positions (columns), although as will be readily apparent from the following detailed description, any size print line can be accommodated.
FIG. 2 is a schematic circuit diagram showing the four print hammer control circuits for the four print hammers of the system.
FIG. 3 is a waveform diagram illustrating the operation of the circuits of FIGS. 1 and 2.
Referring to FIG. 1, character signals representing a line of data to be printed are transmitted by an input circuit 10 to a magnetic core buffer memory 12. Since each print line constitutes four characters, memory 12 has four character storage locations which are addressable in accordance with conventional coincident current techniques by a pair of address circuits l4 and 16. Each storage location is identified by one X address and one Y address. The four locations in memory 12 are therefore designated Xl-Yl, Xl-YZ, XZ-Yl and X2-Y2 and are accessed by signals generated on the appropriate ones of output lines X1 and X2 from circuit 14 and Y1 and Y2 from circuit 16.
During the input or loading cycle when the print line data is being stored in memory, the input circuit feeds timing signals to a control circuit 18 which supplies drive signals T on a line 30 to the X and Y address circuits 14 and 16, respectively. Since the characters are transmitted to the memory in the order in which they are to appear in the print line, control circuit l8 drives the circuits 14 and 16 in a predetermined pattern during each load cycle so that the print column location of each data character is designated by its storage location in memory 12.
After the memory has been filled with a full print line, the system is switched into a print cycle. During the print cycle the operation of control circuit 18 is governed by character pulses C received at an input 28 from the type carrier mechanism. As previously mentioned, in a system employing a print drum a pulse C is produced each time a horizontal row of type characters on the drum passes a stationary reference point. In a system employing a horizontal type carrier, a character pulse C is generated by the type carrier mechanism as each character on the carrier passes a fixed reference point. One conventional way of generating character pulses is to employ a slotted disc and an optical sensing station. The disc is con- I nected directly to the type carrier drive train and the sensing station generates the-character pulses by sensing the slots in the disc, the number of slots and the speed of rotation of the discbeing arranged such that each slot represents a character row (for a print drum system) or an individual character (for a horizontal type carrier system).
During the print cycle each character pulse is transmitted to control circuit 18 and causes the generation of a sequence of four T pulses on line 30. The four pulses are transmitted to the X and Y address circuits l4 and 16 to step them through the predetermined addressing pattern for accessing the four memory locations for readout. As each location is accessed the data character therein is presented via a line 32 to the first input of a comparator circuit 22.
Each C pulse is also fed to a character generator circuit 20 which conventionally comprises a counting circuit. The count represented at the output of circuit 20 indicates the row of characters on the print drum next approaching print position. This count is fed to the second input of comparator 22. Thus, if any of the data characters stored in memory 12 matches the output of character generator 20, a positive comparison pulse is produced at the output of comparator 22 and is fed to one input of an AND gate 24. The second input to AND 24 is taken from output line 30 from control circuit 18, thus causing the outputs from comparator 22 to be gated by the T pulses. Therefore, each time a positive comparison is achieved AND 24 generates an equal signal E.
The character pulses are also passed through an inverter circuit 29 to a delay circuit 26 whereupon the output of the latter constitutes a sequence of negative going fire pulses F lagging the C pulses by the delay of circuit 26 and having a repetition rate equal to the C pulses.
While the above description of FIG. 1 was given in the context of a system employing a print drum, essentially the same system can be used for a horizontal type carrier. The difference is that character generator 20, instead of producing a single character output for each C pulse, produces a sequence of different character pulses under the control of the T pulses. This, of course, is to account for the fact that for each C pulse a different character on the carrier comes into alignmentwith each print hammer.
The individual hammer control circuits which operate on the signals generated by the circuit of FIG. 1 to effect printing in accordance with the invention are shown in FIG. 2. The four print hammers are actuated by supplying drive current to the four print hammer drive coils 48, 58, 68 and 78. The four control circuits 40, 50, 60 and 70 are identical to one another and therefore a detailed description is given only for circuit 40.
The circuit 40 comprises an AND circuit 41 which receives at its inputs the two character selection signals X1 and Y1 and the equal signal E. Therefore, when a positive comparison signal E results during the time that the Xl-Yl character from memory 12 is being compared with the output from character generator 20, AND 41 produces a positive output signal. This output is transmitted to an input of an OR circuit 49. OR 49 has its output connected to an input ofan AND circuit 42 and receives at its second inputthe output from AND 42. OR 49 and AND 42 are therefore arranged in a mutual input-output interconnection constituting a storage latch. AND 42 receives at its second input the fire signal F, which is a negative signal for releasing or resetting the latch.
For the purposes of this description, an AND circuit produces a positive voltage at its output if and only if all its inputs are positive. An 0R produces a positive output it and only if one or more of its inputs is positive. An inverter convens a positive signal to a negative signal and vice versa. It should be further understood that the terms positive and negative signals are used herein to denote the two relative voltage levels of the logic system. In practice both levels could be above ground or below ground or one of them could be ground. The logic symbology used herein is consistent with the standards of MIL-STD-806B (Feb. 26, 1962).
The output from OR 49 is also fed, via an inverter circuit 43, to one input of a two-input AND circuit 45. A Schmitt trigger circuit 44 supplies the second input to AND 45. The output from AND 45 is fed through amplifier 46 to the hammer coil 48. Coil 48 is energized in response to the generation of a positive output signal from AND 45.
The Schmitt trigger 44 is a conventional form of bistable circuit which is voltage level responsive. That is to say, voltage levels at its input A which are above the threshold level of the trigger caused it to switch to a positive output state (i.e., the output from the trigger is positive). When the voltage level at input A falls below the threshold the output from the trigger shifts to a more negative level.
The input A to the Schmitt trigger is connected through a diode 47 and a resistor R1 to the output of AND 42. In addition, an integrating network comprising a resistor R2 and a capacitor C is also connected to input A. Resistor R2 has a substantially greater resistance value then R] so that a positive-going voltage shift at the output of AND 42 charges the capacitor C through resistor R1 at a relatively rapid rate (the Rl-C time constant is relatively small) so that the trigger 44 switches to its positive output state rapidly in response to a positive shift at the output of AND 42.
On the other hand, due to the presence of diode 47 and the large value of resistor R2, a negative-going voltage transition at the output of AND 42 appears at A as a relatively slowly decreasing voltage level due to the long time constant of R2- C. This results in a relatively long period of delay between the appearance of the negative-going shift at the output of AND 42 and the switching of trigger 44 to its negative output state. As exemplary of values for R1, R2 and C in a logic system where the positive voltage level is nominally +5 volts and the negative voltage level is ground, R1 may be ohms, R2 may be 1,000 ohms and C may be 1 microfarad. If the switching threshold of trigger 44 is set at +1.0 volt, these component values yield a delay of 50 microseconds between the appearance of a positive-going output from AND 42 and the switching of trigger 44 to its positive output state and a delay of 1.3 milliseconds between the appearance of a negativegoing output at AND 42 and the switching of trigger 44 to its negative output state.
As shown in FIG. 2 circuits 50, 60, and 70 are identical in construction to circuit 40 except that their respective input AND circuits 51, 61 and 71 are responsive to different combinations of the address signals X and Y. AND 51 generates a positive output signal when an E pulse occurs during comparison of the X1-Y2 data character. AND 61 generates an output if E occurs during comparison of the X2-Y1 data character and AND 71 generates an output when E occurs during comparison of the X2-Y2 data character. AND 41 may be energized only during the first T pulse of the four pulse sequence and since the X1-Y1 character is designated for printing in column 1, coil 48 controls print hammer number 1. Similarly, AND 51 may be energized only during the second T pulse and coil 58 controls hammer number 2 for printing the X1-Y2 data character in print column 2. Coils 68 and 78 control the column 3 and column 4 hammers respectively, for printing the X2-Y1 and X2-Y2 data characters, respectively. Comparison of the latter two data characters occurs during the third and fourth T pulses.
OPERATION Referring now to FIGS. 1, 2 and 3, operation of the system is hereinafter described. After the buffer memory has been filled with a line of data, the load cycle terminates and the system is switched into the print cycle. The first C pulse (FIG. 3) occurring during the print cycle initiates a series of four T pulses. The first T pulse sets the address circuits 14 and 16 (FIG. I) to the Xl-YI condition, causing the first character of the line to be read out over line 32 to the comparator 22. At the same time the X1 and the Y1 signals are received by AND 41 (FIG. 2) and, assuming the first data character in the buffer memory matches the output of the character generator, the resulting E pulse activates AND 41 and the output thereof goes positive (FIG. 3).
The output from AND 41 feeds through OR 49 to the input of AND 42 and since the second input of the latter is already positive (due to the inactive state of the F signal) a positive output signal is fed from AND 42 back to the second input of OR 49, latching the outputs of AND 42 and OR 49 in the positive state.
The positive-going voltage transition from AND 42 rapidly charges capacitor C through resistor R1 and the voltage level at A rapidly rises above the threshold of Schmitt trigger 44 and the output of the latter goes positiverSince the output from OR 49 has been latched positive, the inverter 43 is presenting a negative level to the second input of AND 45 and that circuit is therefore held negative at its output inhibiting energization of coil 48.
When the first F pulse (which is a negative pulse) of the print cycle is fed to AND 42 the output of that circuit goes negative and the latched-on condition of the AND 42-0R 49 combination is broken. Inverter 43 thus activates AND 45 and the coil drive pulse begins. The negative transition presented to the anode of diode 47 reverse biases the diode and as a result capacitor C begins to discharge through resistor R2 toward ground. The voltage level at A begins to slowly decrease in accordance with the R2-C time constant. When the voltage at A diminishes to the threshold point of trigger 44 the latter switches negative and the output from AND 45 is cut off, terminating the coil drive pulse. It is thus seen that the time constant of R2-C determines the duration of the hammer firing pulse. 1
As can be seen from FIG. 3 the second, third and fourth T pulses occur well prior to the first F pulse. The second T pulse, in switching the buffer address circuits to the Xl-Y2 state to present the second data character to the comparator 22, also conditions AND 51 (FIG. 2) of hammer control circuit 50 so that if an E pulse is generated the sequence of operation described above for circuit 40 is initiated for circuit 50 with the result that hammer drive current is also supplied to coil 58 in response to the F pulse. Of course, ANDs 61 and 71 are partially conditioned during the third and fourth T pulses so that the third and fourth hammer coils 68 and 78 can also be driven in response to the F pulse if the appropriate character matches are obtained. The print cycle continues in this manner until a number of C pulses equal to the total number of characters in the type carrier font have occurred. When that happens all print hammers have been presented with all printable characters and the line has been fully printed.
It should be understood that, if design convenience dictates, the circuits of FIG. 2 can be implemented by logic components other than the positive AND-OR components illustrated. For example, AND 41, OR 49 and AND 42 can each be replaced by a circuit that generates a negative output if and only if all its inputs are positive. AND 45 can be replaced by a circuit that generates a positive output if and only if all its inputs are negative. When these substitutions are made, inverter 43 is unnecessary and the output of the OR 49 substitute can be fed directly to the AND 45 substitute. Also the integration network at the input to ST 44 has to be changed to provide the longer time constant in response to the a positive-going transition.
It will be appreciated that the above as .well as additional changes in the form and details of the described preferred embodiments may be effected by persons of ordinary skill without departing from the true spirit and scope of the invention.
I claim:
1. A circuit for firing a print hammer in a high speed line printer comprising:
a coil adapted to fire the hammer in response to a coil drive signal;
a bistable circuit selectively settable to two different output states in response to voltage level transitions presented at its input, 'a transition of a first polarity switching said bistable circuit to a first of said two output states and a transition of the opposite polarity switching said circuit to the second state, said bistable circuit further including means for delaying said switching by a predetermined interval after occurrence of said opposite transition;
gating means connected to the output of said bistable circuit for generating, when open, a coil drive signal in response to said first output state of said bistable circuit;
control means for causing said bistable circuit to switch into said first output state when said coil is to be driven at a subsequent instant, said control means comprising: a logical AND circuit and alogical OR circuit mutually connected output-to-input, means for presenting a signal to a second input of said OR circuit when the coil is to be driven at a subsequent instant, means for presenting a signal to a second input of said AND circuit at said subsequent instant, means for transmitting the output of said OR circuit to an input of said gating means, and means for transmitting the output of said AND circuit to the input of said bistable circuit; and
means for causing said control means to simultaneously supply a voltage transition of said opposite polarity to said bistable circuit and to open said gating means at said subsequent instant, whereby said gating means generates a coil drive signal having a duration substantially equal to said predetermined interval.
2. In a high speed line printer, a circuit for driving a print hammer actuating coil comprising, in combination:
a bistable circuit settable to a first and a second state;
means for setting said bistable circuit to said first state when the coil is to be driven at a subsequent instant;
means for generating a fire signal at said subsequent instant;
means for resetting said bistable circuit from said first to said second state in response to said fire signal; and
a timing circuit operable in response to said resetting of said bistable circuit for supplying a drive current to said coil for a predetermined length of time, said timing circuit comprising: a Schmitt trigger connected to the output of said bistable circuit; an integrating network connected to the input of said Schmitt trigger and constructed and arranged to present a rapidly changing voltage transition to switch said trigger to a first state in response to the setting of said bistable circuit and to present a slowly changing voltage transition to switch said trigger from said first to a second state in response to the resetting of said bistable circuit; and a coincidence circuit operable to supply said drive current to said coil only when said bistable circuit is in said second state when said trigger is in said first state.
3. In a high speed line printer, a circuit for driving a print hammer actuating coil comprising, in combination:
a bistable circuit settable to a first and a second state, said bistable circuit comprising: a logical OR circuit having at least two inputs; a logical AND circuit having at least two inputs, a first one of which is connected to the output of said R circuit; means for activating one of said OR inputs when the coil is to be driven at a subsequent instant; means for feeding the output from said AND circuit to the other of said OR inputs; and means for feeding said fire signal to the second one of said AND inputs, the output from said bistable circuit being manifested at the output of said OR circuit;
means for setting said bistable circuit to said first state when the coil is to be driven at a subsequent instant;
means for generating a fire signal at said subsequent instant;
means for resetting said bistable circuit from said first to said second state in response to said fire signal; and
a timing circuit operable in response to said resetting of said bistable circuit for supplying a drive current to said coil for a predetermined length of time.
4. A circuit for driving an actuating coil comprising:
a bistable circuit adapted to be set to a first and reset to a second state;
means for setting said bistable circuit in its first state when the coil is to be driven at a subsequent instant;
storage means adapted to be charged in response to setting of said bistable circuit and discharged in response to resetting of said bistable circuit;
means for resetting said bistable circuit when the coil is to be driven;
a Schmitt trigger responsive to said storage means, said Schmitt trigger being adapted to be switched to a first state in response to charging of said storage means and switched to a second state a period of time after discharge of said storage means is initiated;
gating means for providing, when opened, a signal for driving the coil, said gating means adapted to be opened in response to the first state of said Schmitt trigger; and
means, responsive to said bistable circuit, for, inhibiting said gating means when said bistable circuit is set in its first state, whereby said gating means provides a signal for driving the coil for the period of time beginning when said bistable circuit is reset and ending when said Schmitt trigger is switched to its second state.
5. The circuit as recited in claim 4 wherein said storage means is an integrating network connected to the input of said Schmitt trigger and adapted to present a rapidly changing voltage transition to switch said trigger to its first state in response setting of said bistable circuit and to present a slowly changing voltage transition to switch said trigger from said first to said second state in response to the resetting of said bistable circuit.
6. The circuit as recited in claim 4 wherein said bistable circuit comprises: a logical OR circuit having at least two inputs; a logical AND circuit having at least two inputs, a first one of which is connected to the output of said OR circuit; means for feeding the output from said AND circuit to one of the inputs of said OR circuit; and wherein: the other of said OR circuit is activated to set said bistable circuit, and the other input of said AND circuit is activated to reset said bistable circuit.
7. The circuit as recited in claim 4 wherein the coil is adapted to activate a print hammer in a high speed printer.

Claims (7)

1. A circuit for firing a print hammer in a high speed line printer comprising: a coil adapted to fire the hammer in response to a coil drive signal; a bistable circuit selectively settable to two different output states in response to voltage level transitions presented at its input, a transition of a first polarity switching said bistable circuit to a first of said two output states and a transition of the opposite polarity switching said circuit to the second state, said bistable circuit further including means for delaying said switching by a predetermined interval after occurrence of said oPposite transition; gating means connected to the output of said bistable circuit for generating, when open, a coil drive signal in response to said first output state of said bistable circuit; control means for causing said bistable circuit to switch into said first output state when said coil is to be driven at a subsequent instant, said control means comprising: a logical AND circuit and a logical OR circuit mutually connected outputto-input, means for presenting a signal to a second input of said OR circuit when the coil is to be driven at a subsequent instant, means for presenting a signal to a second input of said AND circuit at said subsequent instant, means for transmitting the output of said OR circuit to an input of said gating means, and means for transmitting the output of said AND circuit to the input of said bistable circuit; and means for causing said control means to simultaneously supply a voltage transition of said opposite polarity to said bistable circuit and to open said gating means at said subsequent instant, whereby said gating means generates a coil drive signal having a duration substantially equal to said predetermined interval.
2. In a high speed line printer, a circuit for driving a print hammer actuating coil comprising, in combination: a bistable circuit settable to a first and a second state; means for setting said bistable circuit to said first state when the coil is to be driven at a subsequent instant; means for generating a fire signal at said subsequent instant; means for resetting said bistable circuit from said first to said second state in response to said fire signal; and a timing circuit operable in response to said resetting of said bistable circuit for supplying a drive current to said coil for a predetermined length of time, said timing circuit comprising: a Schmitt trigger connected to the output of said bistable circuit; an integrating network connected to the input of said Schmitt trigger and constructed and arranged to present a rapidly changing voltage transition to switch said trigger to a first state in response to the setting of said bistable circuit and to present a slowly changing voltage transition to switch said trigger from said first to a second state in response to the resetting of said bistable circuit; and a coincidence circuit operable to supply said drive current to said coil only when said bistable circuit is in said second state when said trigger is in said first state.
3. In a high speed line printer, a circuit for driving a print hammer actuating coil comprising, in combination: a bistable circuit settable to a first and a second state, said bistable circuit comprising: a logical OR circuit having at least two inputs; a logical AND circuit having at least two inputs, a first one of which is connected to the output of said OR circuit; means for activating one of said OR inputs when the coil is to be driven at a subsequent instant; means for feeding the output from said AND circuit to the other of said OR inputs; and means for feeding said fire signal to the second one of said AND inputs, the output from said bistable circuit being manifested at the output of said OR circuit; means for setting said bistable circuit to said first state when the coil is to be driven at a subsequent instant; means for generating a fire signal at said subsequent instant; means for resetting said bistable circuit from said first to said second state in response to said fire signal; and a timing circuit operable in response to said resetting of said bistable circuit for supplying a drive current to said coil for a predetermined length of time.
4. A circuit for driving an actuating coil comprising: a bistable circuit adapted to be set to a first and reset to a second state; means for setting said bistable circuit in its first state when the coil is to be driven at a subsequent instant; storage means adapted to be Charged in response to setting of said bistable circuit and discharged in response to resetting of said bistable circuit; means for resetting said bistable circuit when the coil is to be driven; a Schmitt trigger responsive to said storage means, said Schmitt trigger being adapted to be switched to a first state in response to charging of said storage means and switched to a second state a period of time after discharge of said storage means is initiated; gating means for providing, when opened, a signal for driving the coil, said gating means adapted to be opened in response to the first state of said Schmitt trigger; and means, responsive to said bistable circuit, for, inhibiting said gating means when said bistable circuit is set in its first state, whereby said gating means provides a signal for driving the coil for the period of time beginning when said bistable circuit is reset and ending when said Schmitt trigger is switched to its second state.
5. The circuit as recited in claim 4 wherein said storage means is an integrating network connected to the input of said Schmitt trigger and adapted to present a rapidly changing voltage transition to switch said trigger to its first state in response setting of said bistable circuit and to present a slowly changing voltage transition to switch said trigger from said first to said second state in response to the resetting of said bistable circuit.
6. The circuit as recited in claim 4 wherein said bistable circuit comprises: a logical OR circuit having at least two inputs; a logical AND circuit having at least two inputs, a first one of which is connected to the output of said OR circuit; means for feeding the output from said AND circuit to one of the inputs of said OR circuit; and wherein: the other of said OR circuit is activated to set said bistable circuit, and the other input of said AND circuit is activated to reset said bistable circuit.
7. The circuit as recited in claim 4 wherein the coil is adapted to activate a print hammer in a high speed printer.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4040119A (en) * 1976-07-19 1977-08-02 The United States Of America As Represented By The Secretary Of The Navy Programmer for magnetic latching relays
US4173031A (en) * 1976-11-05 1979-10-30 Regie Nationale Des Usines Renault Solenoid valve current-programme control device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4040119A (en) * 1976-07-19 1977-08-02 The United States Of America As Represented By The Secretary Of The Navy Programmer for magnetic latching relays
US4173031A (en) * 1976-11-05 1979-10-30 Regie Nationale Des Usines Renault Solenoid valve current-programme control device

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