US3510868A - Non-linear decoder - Google Patents
Non-linear decoder Download PDFInfo
- Publication number
- US3510868A US3510868A US577896A US3510868DA US3510868A US 3510868 A US3510868 A US 3510868A US 577896 A US577896 A US 577896A US 3510868D A US3510868D A US 3510868DA US 3510868 A US3510868 A US 3510868A
- Authority
- US
- United States
- Prior art keywords
- zone
- voltage
- decoder
- signal
- voltages
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/78—Simultaneous conversion using ladder network
- H03M1/785—Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders
Definitions
- a first signal generator coupled to the preliminary decoder and the stages of the register storing the most significant weight digits of the code group acts to produce a second control signal indicating the lowest voltage of the segments.
- a second signal generator operated responsive to said first control signals and the stages of the register storing the m least significant weight digits of the code group to produce a third control signal indicating a position along the segment indicated by the second control signal.
- a ladder attenuator and current generators are provided which respond to the second and third control signals to produce the analog signal represented by the stored code group at the output of the attenuator.
- the present invention concerns a non-linear decoder for converting binary numbers into analog quantities.
- Such non-linear digital to analog decoder may be used on the one hand as a decoder-expanser and on the other hand as a decoder associated to a coder-compressor, the coding being carried out by the feedback comparison method.
- Feedback coding consists in comparing the analog value representing a number stored in a register to the signal to be coded, thus enabling to determine whether the number is too big or too small. In the first case, this number is reduced, in the second case, it is increased. These comparison operations are carried out up to the time when the voltages compared do not differ at the most by the value of one quantization step.
- the coding is carried out according to a non-linear characteristic curve. Since the same decoder may be used for coding and for decoding, the compression and expansion characteristics are then perfectly complementary if said decoder presents reproducible characteristics.
- Non-linear decoders which make use of a resistance network and which enable to obtain an hyperbolic characteristic are known. These resistances, the extreme values of which are in the ratio 2, must be switched in accordance with the value of the number to be decoded. But it is known that any resistance presents a certain reactance which depends upon its value. If the switching frequency is high, the effect of this reactance becomes important, and the value of the corresponding complex impedance depends upon the number to be decoded. It is thus realized that a decoder which comprises resistances having such different values is difficult to achieve and cannot provide a high accuracy.
- the said switch pre- 3,510,868 Patented May 5, 1970 sents, when it is conducting, a series resistance (saturation resistance in the case of a transistor) which is not negligible in respect to the small value resistances of the network, and which introduces a new source of errors.
- FIG. 1 represents a certain number of symbols used in FIG. 3,
- FIG. 2 represents the characteristic curve of the decoder according to the invention
- FIG. 3 represents the detailed diagram of this decoder
- FIG. 4 represents the same characteristic curve as that of FIG. 2 using a non-linear scale on the abscissae axis
- FIG. 5 represents the elaboration circuit of the control signals of the complementary voltages.
- a function of two variables A andB may present four possible combinations and, if one writes A B,the three other combinations are globally represented by the expression AXB.
- FIG. 1a represents a simple AND circuit
- FIG. 1b represents a simple OR circuit
- Table II hereafter represents the different pedestal voltages used. It comprises the lines 1, 2, 3, reserved respectively to the value-given in quantization unit stepsof the voltage, to the reference of the voltages, and to the reference of the current generator set into operation in the circuit WR.
- the decoding voltages corresponding to the codes of the zone 07 range between zero volt for the code the decimal equivalence of which is zero, and
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR31509A FR1460676A (fr) | 1965-09-15 | 1965-09-15 | Décodeur non linéaire à caractéristique discontinue |
Publications (1)
Publication Number | Publication Date |
---|---|
US3510868A true US3510868A (en) | 1970-05-05 |
Family
ID=8588399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US577896A Expired - Lifetime US3510868A (en) | 1965-09-15 | 1966-09-08 | Non-linear decoder |
Country Status (8)
Country | Link |
---|---|
US (1) | US3510868A (xx) |
BE (1) | BE686332A (xx) |
CH (1) | CH454221A (xx) |
DE (1) | DE1462704B2 (xx) |
ES (1) | ES331206A1 (xx) |
FR (1) | FR1460676A (xx) |
GB (1) | GB1105717A (xx) |
NL (1) | NL6612942A (xx) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3653033A (en) * | 1968-06-25 | 1972-03-28 | Int Standard Electric Corp | Non-linear decoder with linear and non-linear ladder attenuators |
US3694639A (en) * | 1970-04-07 | 1972-09-26 | Pierre A Deschenes | Pulse code modulation digital compandor |
US3984829A (en) * | 1973-06-29 | 1976-10-05 | Siemens Aktiengesellschaft | Circuit arrangement for converting analog signals into PCM signals and PCM signals into analog signals |
US3993992A (en) * | 1973-06-29 | 1976-11-23 | Siemens Aktiengesellschaft | Circuit arrangement for converting analog signals into PCM signals and PCM signals into analog signals |
US4143363A (en) * | 1972-10-30 | 1979-03-06 | Gte Automatic Electric Laboratories, Inc. | Nonuniform translation between analog and digital signals by a piece-wise linear process |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR1518697A (fr) * | 1966-11-28 | 1968-03-29 | Labo Cent Telecommunicat | Décodeur non linéaire à caractéristique discontinue |
DE2558366C2 (de) * | 1974-03-11 | 1982-06-09 | Siemens AG, 1000 Berlin und 8000 München | Digital-Analog-Umsetzer, insbesondere für einen nach dem Iterativverfahren arbeitenden Codierer |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3290671A (en) * | 1963-04-29 | 1966-12-06 | Ibm | Byte decoder |
US3298017A (en) * | 1963-02-04 | 1967-01-10 | Int Standard Electric Corp | Non-linear decoder |
US3305855A (en) * | 1962-11-08 | 1967-02-21 | Nippon Electric Co | Encoder and a decoder with nonlinear quantization |
US3305857A (en) * | 1963-04-17 | 1967-02-21 | Int Standard Electric Corp | Decoding equipment |
US3345505A (en) * | 1960-10-24 | 1967-10-03 | Gen Precision Systems Inc | Function generator |
-
1965
- 1965-09-15 FR FR31509A patent/FR1460676A/fr not_active Expired
-
1966
- 1966-09-02 BE BE686332D patent/BE686332A/xx unknown
- 1966-09-08 US US577896A patent/US3510868A/en not_active Expired - Lifetime
- 1966-09-08 GB GB40129/66A patent/GB1105717A/en not_active Expired
- 1966-09-14 DE DE19661462704 patent/DE1462704B2/de active Pending
- 1966-09-14 NL NL6612942A patent/NL6612942A/xx unknown
- 1966-09-14 CH CH1329066A patent/CH454221A/fr unknown
- 1966-09-14 ES ES0331206A patent/ES331206A1/es not_active Expired
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3345505A (en) * | 1960-10-24 | 1967-10-03 | Gen Precision Systems Inc | Function generator |
US3305855A (en) * | 1962-11-08 | 1967-02-21 | Nippon Electric Co | Encoder and a decoder with nonlinear quantization |
US3298017A (en) * | 1963-02-04 | 1967-01-10 | Int Standard Electric Corp | Non-linear decoder |
US3305857A (en) * | 1963-04-17 | 1967-02-21 | Int Standard Electric Corp | Decoding equipment |
US3290671A (en) * | 1963-04-29 | 1966-12-06 | Ibm | Byte decoder |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3653033A (en) * | 1968-06-25 | 1972-03-28 | Int Standard Electric Corp | Non-linear decoder with linear and non-linear ladder attenuators |
US3694639A (en) * | 1970-04-07 | 1972-09-26 | Pierre A Deschenes | Pulse code modulation digital compandor |
US4143363A (en) * | 1972-10-30 | 1979-03-06 | Gte Automatic Electric Laboratories, Inc. | Nonuniform translation between analog and digital signals by a piece-wise linear process |
US3984829A (en) * | 1973-06-29 | 1976-10-05 | Siemens Aktiengesellschaft | Circuit arrangement for converting analog signals into PCM signals and PCM signals into analog signals |
US3993992A (en) * | 1973-06-29 | 1976-11-23 | Siemens Aktiengesellschaft | Circuit arrangement for converting analog signals into PCM signals and PCM signals into analog signals |
Also Published As
Publication number | Publication date |
---|---|
FR1460676A (fr) | 1966-01-07 |
NL6612942A (xx) | 1967-03-16 |
ES331206A1 (es) | 1967-07-01 |
CH454221A (fr) | 1968-04-15 |
GB1105717A (en) | 1968-03-13 |
BE686332A (xx) | 1967-03-02 |
DE1462704B2 (de) | 1970-11-05 |
DE1462704A1 (de) | 1968-12-05 |
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