US3200001A

US3200001A - Method for producing extremely planar semiconductor surfaces

Info

Publication number: US3200001A
Application number: US188701A
Authority: US
Inventors: Merkel Hans; Leibenzeder Siegfried
Original assignee: Siemens AG
Current assignee: Siemens Schuckertwerke AG; Siemens AG
Priority date: 1961-04-22
Filing date: 1962-04-19
Publication date: 1965-08-10
Anticipated expiration: 1982-08-10
Also published as: BE616590A; GB1002697A; CH395347A; DE1239669B; NL277330A

Description

10,1965 H. MERKEL ETAL 3,200,001

METHOD FOR PRODUCING EXTREMELY PLANAR SEMICONDUCTOR SURFACES Filed April 19, 1962 IFIG.|

United States Patent 3 12 illaims. lei. 117-4 Our invention relates to the production of semi-conductor bodies with junctions between regions of respectively different types of electric conductance, for example one or more p-n junctions, for use in rectifiers, transistors and other electronic devices.

The electrical properties of such semiconductor bodies depend to a great extent upon the geometry of the junctions which, for best quality, are to constitute planar surfaces as close as possible to ideal geometric configura tion. The production of such precise surfaces involves considerable technological difiiculties, and the problems involved have not yet found a reliably satisfactory solution. Thus, for example, a variety of methods have become known to assume that the alloying or diffusion fronts migrate into the semiconductor body with best obtainable uniformity.

it is an object of our invention to provide a method that affords the production of mechanically undamaged and extremely planar semiconductor surfaces, thus approaching the ideal geometric configuration of these surfaces and any junctions adjacent thereto to an extent beyond the degree heretofore attainable or reliably reproducible. To this end, and in accordance with our invention, we form the semiconductor surfaces by precipitation of the semiconductor material from the gaseous phase upon a monocrystalline carrier or substratum.

We have found, contrary to the heretofore prevailing opinion, that the production of extremely planar semiconductor surfaces during the growing process is not significantly determined by a given crystallographic orientation of the surface upon which the material is grown, but is exclusively determined by the pulling or growing direction of the carrier crystal. For example, when performing the floating-zone pulling operation with a silicon rod, a given preferred direction of growth is enforced whose position corresponds to the geometric longitudinal axis of the monocrystalline rod. In accordance with our invention, extremely planar, faultless grown layers are obtained only if the crystal during the growing process can continue to grow in this preferred direction. In this respect, the crystallographic orientation of the substratum surface for the growth is insignificant. The preferred direction of growth, for example in the above-mentioned floating-zone pulling, need not at all be identical with a given crystallographic orientation of the crystal. In practice, this identity is very rarely attained, but diverges to a greater or lesser extent. For example, with a rod pulled in the (111)-direction, the pulling direction, i.e. the longitudinal axis of the rod, may depart from the crystallographic (111)-direction by several angular degrees, for example up to about According to the prior state of the art in this technology, the true crystallographic orientation was determined for such a rod, and the slices severed from such a rod were so placed as to obtain (111)-surfaces. That is, the rod was not subdivided by cutting in a direction perpendicularly to the pulling direction, but it was out under such an angle that the subsequent surfaces that formed a substratum for further growth were, as much as possible, oriented with crystallographic acfit ice

curacy. According to the present invention, however, the crystallographic orientation can be neglected, which represents a considerable technological simplification. Furthermore, by virtue of the invention, better substratum surfaces for subsequent growth are achieved.

The invention will be further described with reference to examples and the drawings of which FIG. 1 shows an apparatus for depositing semiconductor material according to our invention; FIG. 2 represents the image of the surface of a silicon layer grown according to our inven tion obtained by means of an interference microscope. For producing extremely planar silicon surfaces, a silicon carrier or substratum is prepared from a silicon rod pulled or converted to monocrystalline constitution by zone melting or crystal pulling from a melt in the direction, for example, that is, the longitudinal axis of a rod is within about 6 of the (100) direction of the crystal. Plates or wafers having a diameter of approximately 12 mm. are cut out of such a rod, the cutting faces extending perpendicular to the pulling direction;

the surface of these plates then defines an angle of about 6 with the crystallographic (100) surface. The cut surface is ground, polished, etched and then heated in a hydrogen current. An aqueous solution of hydrofluoric acid and nitric acid is particularly suitable as the etching liquid. It is preferable to add slight quantities of a commercially available wetting agent to this solution. The etching liquid for example may consist of 5% hydrofluoric acid, 33% nitric acid, 2% of a commercial wetting agent, for example a mixture of a fattyalcohol sulfonates and alkyl aryl sulfonates, the remaining 60% being distilled water. The heating in hydrogen current is preferably effected at a temperature between 1100 and 1400 C. for a period between 10 minutes and three hours.

The treated plates are subsequently placed into a silicon pyrolytic precipitation reactor, as shown in FIG. 1, in which hydrogen passes through inlet 1, through semiconductor compound evaporator 2, which may be maintained at 0 C., where the hydrogen picks up a quantity of semiconductor compound (shown in the drawing to be SiCl but other semiconductor compounds are equally suitable), through line 4 into inlet 12 of the reaction vessel. When desired, stopcocks 5 and 6 may be completely or partially closed and stopcock 7 completely or partially opened so as to control the proportions of the entering gas.

The reaction vessel 8 comprises a quartz tube 11 with gas inlet 12; closure cap 13 with gas outlet 14. Fused into the closure cap 13 is a quartz tube 15 with a planar cover 16 on which the holder 17 is fastened. Into holder 1'7 is inserted silicon rod 18, which acts as a heater. The silicon disc 19 is placed upon the rod to serve as a carrier. A graphite plunger 2% is pushed into the quartz tube 15. The high-frequency coil 21 is displaceable in the vertical direction by means not shown. It is first placed in such a position that the graphite plunger 2% as well as the lower portion of the silicon rod 18 are situated in the high-free quency field. The graphite plunger is heated rapidly. Shortly thereafter, the lower portion of the silicon rod 18 starts glowing. The high-frequency coil and thus the heated zone is then moved upwardly along the silicon rod to the position shown in the illustration. The temperature of the silicon disc 19 can be observed through a quartz window 22, thus permitting the apparatus to be adjusted and supervised. As the reaction proceeds waste gases are exhausted at outlet M. It is particularly advantageous to place the carrier plates upon a heating support consisting of the same material as the carrier plates and the semiconductor material to be grown thereon. Monocrystalline silicon is suitable material for the heatas carrier and for precipitation thereon. The surface of i the supporting heater structure can either be polished or have a coating, for example of SiC or of a nitrogencontaining layer such as Si N grown thereon. The supporting heater structure, which may also consist of materials such as tantalum and molybdenum, is preferably inductively heated. This can be done by means of conductance coil 4 energized by high-frequency current, In this manner the carrier is brought up to precipitation temperature.

After placing the carrier plates upon the support in the pyrolytic reactor, the precipitation process is performed in a mixture of SiC1 and H of a molar ratio 1:25 passing into the reaction space through inlet nipple 12 of the quartz tube 11, at a rate of 30 liters per hour, while the carrier plates are kept at a temperature of about 1150" C. In approximately minutes a layer of 3511. thickness silicon is thus produced by decomposition of the reaction gases. The residual gases pass out of the reaction chamber through a'nipple 14. The direction of growth is identical with the pulling direction of the silicon rod from which the carrier plates have been cut.

The particular gaseous atmosphere from which the pyrolytic precipitation of the semiconductor material is effected is not critical for the method of the invention. Thus, the silicon tetrachloride in the above-described example can be substituted without any other change by another silicon halogenide such as SiHCl SiH Cl Sil or SiBr or another silicon compound such as Silt-i or Si(C H The precipitation can also be performed with a gaseous phase comprised of the gaseous semiconductor material and a gaseous carrier, for example hydrogen. When using SiI Sih or Si(C I-l a noble gas, such as argon, may be used as the gaseous carrier.

The extremely planar constitution of the semiconductor surfaces produced according to the invention reveals itself already by microscopic inspection. Thus in FIG. 2, which represents the image of the surface of a silicon layer grown according to the invention, obtained by means of an interference microscope at the same magnification, a conspicuous freedom from disturbance of the interference strips is seen. 7

When joining such. highly planar semiconductor surfaces with electrodes or doped electrodes, by alloying or diffusion, the alloying or diffusion front migrating into the semiconductor material progresses with precise uniformity thus resulting in more strictly planar junctions not heretofore generally obtainable. This is manifested by uniformly excellent electrical qualities of the products.

In this manner as described above, the method of the invention is applicable for the production of planar semiconductor surfaces from other semiconductor materials, for example germanium or A B semiconductor compounds, for example indium antimonide.

We claim:

1. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a monocrystalline carrier, which comprises cutting a pulled semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, and then precipitating the same semiconductor material as the semiconductor crystal upon said etched surface.

2. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a monocrystalline carrier, which comprises cutting a pulled semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates with an etching liquid comprising an aqueous solution of hydrofluoric acid, nitric acid and a Wetting agent, and then precipitating the same semiconductor material as the semiconductor crystal upon said etched surface.

3. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a monocrystalline carrier, which comprises cutting a pulled silicon semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching atleast one cut surface of said carrier plates with an etching liquid consisting essentially of about 5% hydrofluoric acid, about 33% nitric acid, about 2% wetting agent and about 60% water, and then precipitating silicon semiconductor material upon said etched surface.-

4. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a pulled monocrystalline carrier, which comprises cutting a semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surfaceof said carrier plates, heating said carrier plates in a hydrogen current to a temperature between 1100 and 1400 C., and then precipitating the same semiconductor material as the semiconductor crystal upon said etched surface.

5. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a pulled monocrystalline carrier, which camprises cutting a semiconductor crystal into carrier' plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, heating said carrier plates in a hydrogen current at a temperature between 1100 and 1409 C. for a period between about 10 minutes to about 3 hours, and then precipitating the same semiconductor material as the semiconductor .crystal upon said etched surface.

6. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous. phase upon a pulled monocrystal-line carrier, which comprises cutting a semiconductor crystal of the material to be precipitated into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, placing said carrier plates upon a heating support surface of the same material to be precipitated and then precipitating semiconductor material upon said etched surface.

7. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a pulled monocrystalline carrier, which comprises. cutting a silicon semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, placing said carrier plates upon a silicon heating support surface and then precipitating the same semiconductor material as the semiconductor crystal upon said etched surface.

8. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a pulled monocrystalline carrier, which compi'ises'cutting a semiconductor crystal into carrier plates perpendicular, to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, placing said carrier plates upon amonocrystalline silicon heating support surface and then precipitating the same semiconductor material as the semiconductor crystal upon said etched surface. 7

9. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upona pulled monocrystalline car- 'rier, which comprises cutting a semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, placing said carrier plates upon a heating surface upon which a coating is grown and then precipitating semiconductor material upon said etched surface.

10. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a pulled monocrystalline carrier, which comprises cutting a semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, placing said carrier plates upon a heating surface having a grown coating of Si N and then precipitating semiconductor material upon said etched surface.

11. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a pulled monocrystalline carrier, which comprises cutting a semiconductor crystal into carrier plates perpendicular to the direction of crystal pulling; grinding, polishing and etching at least one cut surface of said carrier plates, placing said carrier plates upon a heating surface having a grown coating of SiC and then precipitating semiconductor material upon said etched surface.

12. The method of producing planar semiconductor surfaces by precipitation of semiconductor material from the gaseous phase upon a pulled monocrystalline carrier, which comprises cutting a semiconductor crystal into carrier plates perpendicular to the direction of crystal pull ing; grinding, polishing and etching at least one cut surface of said carrier plates, placing said carrier plates with the etched surface upon a heating support, inductively heating said heating support and then precipitating semiconductor material upon said etched surface.

References Cited by the Examiner UNITED STATES PATENTS 2,930,722 3/60 Ligenza l4 8l.5 3,057,690 10/62 Reuschel et al. 148-16 X 3,063,811 11/62 Kniepkamp et al 23-2235 WILLIAM D. MARTIN, Primary Examiner.

RICHARD D. NEVIUS, Examiner.

Claims

2. THE METHOD OF PRODUCING PLANAR SEMICONDUCTOR SURFACES BY PRECIPITATION OF SEMICONDUCTOR MATERIAL FROM THE GASEOUS PHASE UPON A MONOCRYSTALLINE CARRIER, WHICH COMPRISES CUTTING A PULLED SEMICONDUCTOR CRYSTAL INTO CARRIER PLATES PERPENDICULAR TO THE DIRECTION OF CRYSTAL PULLING: GRINDING, POLISHING AND ETCHING AT LEAST ONE CUT SURFACE OF SAID CARRIER PLATES WITH AN ETCHING LIQUID COMPRISING AN AQUEOUS SOLUTION OF HYDROFLUROIC ACID, NITRIC ACID AND A WETTING AGENT, AND THEN PRECIPITATING THE SAME SEMICONDUCTOR MATERIAL AS THE SEMICONDUCTOR CRYSTAL UPON SAID ETCHED SURFACE.