US3109125A

US3109125A - Electrical control circuit

Info

Publication number: US3109125A
Application number: US120704A
Authority: US
Inventors: David A Wachowiak
Original assignee: NCR Corp
Current assignee: NCR Voyix Corp; National Cash Register Co
Priority date: 1961-06-29
Filing date: 1961-06-29
Publication date: 1963-10-29
Anticipated expiration: 1980-10-29
Also published as: GB941863A; DE1249976B

Description

United States Patent 3,109,125 ELECTRICAL CONTROL CIRCUIT David A. Wachowiak, Dayton, Ohio, assignor to The National Cash Register Company, Dayton, Ohio, 2 corporation of Maryland Filed June 29, 1961, Ser. No. 120,704 15 Claims. (Cl. 317-1485) This invention relates to electrical control circuits and in particular to an electrical control circuit incorporating a time delay for providing energization of a ribbon clutch solenoid of a high-speed printer.

For high-speed printers of the type disclosed in United States Letters Patent No. 2,787,210, which issued to Francis H. Shepard, Jr., on April 2, 1957, an electrical control circuit including a ribbon clutch solenoid is provided to advance (slew") the ribbon. Because of the possibility of the ribbons advancing at an oblique course (skewing") relative to the printing type wheel, it is desirable that the control circuit be activated only during actual printing. A close approach to this is to have the ribbon move only if a command is given to advance the paper, and then to move the ribbon only a distance equal to the height of one character of the type wheel if the command is single slew. This will insure that the print hammers strike a spot on the ribbon only once during one cycle of the ribbon under the type wheel. The time to move the ribbon a distance equal to one character height is approximately equal to one second. When the printer is typing continuously, a signal to move the ribbon a second time would be received before the first move has been completed. Thus. a control circuit is needed in a highspeed printer of the above type which will cause the ribbon to move a distance equal to a character height on the occurrence of a single slew command at random intervals, and will cause integration of the ribbon move signals in the case of continuous printing.

Therefore. it is an object of the present invention to provide an electrical control circuit for accomplishing the foregoing objectives.

A further object of the present invention is to provide an electrical control circuit incorporating a time delay for energizing a winding for a relay or a solenoid for the period of an input signal and its corresponding time delay.

A still further object of the present invention is to provide an electrical control circuit incorporating a prede termined time delay which provides a time delay after each input signal such that, if an input signal occurs before completion of the time delay started by the previous input signal, the time delay will begin over again.

A still further object of the present invention is to provide an electrical control circuit providing a time delay which, if not completed before the occurrence of another input signal, will begin over again.

A still further object of the present invention is to provide an electrical control circuit in which a capacitive means is charged through the low impedance of a conducting signal translating device for short charging times compared to a long charging time which is obtained through a large impedance element coupled to a power source.

A still further object of the present invention is to provide an electrical control circuit of the above type in which the signal translating device is rendered conducting and non-conducting, thus allowing the capacitive means to be switched from a short charging time in one potential direction to a long charging time in the other potential direction.

Another object of the present invention is to provide an electrical control circuit of the above type with means for obtaining a well-determined charge voltage on the 3,109,125 Patented Oct. 29, 1963 capacitive means thereof through the use of a Zener diode.

In accordance with one aspect of the present invention, a control circuit is provided which includes a signal translating device having an input circuit and an output circuit. A means is coupled to the input circuit for rendering the translating device conducting in response to the application of an input signal thereto. The output circuit includes a direct-current impedance element and a source of direct-current energizing potential connected in series. A capacitive means is coupled across the output circuit. The capacitive means is charged to a first predetermined voltage during the time that the translating device is conducting, and is charged to a second predetermined voltage when the translating device becomes non-conducting upon termination of the input signal. A means is connected to the output circuit which is responsive to an output signal therefrom.

In accordance with another aspect of the present invention, a control circuit is provided which includes first and second transistors each having emitter, base, and collector electrodes. A capacitive means is connected between the emitter electrode of the first transistor and a point of reference potential. A first source of direct-current energizing potential is connected between the collector electrode of the first transistor and the reference potential point. A direct-current impedance element and a second source of direct-current energizing potential are connected in series between the emitter electrode of the first transistor and the reference potential point. A means for applying an input signal to the base of the first transister is provided to render the first transistor conducting for a time substantially equal to the time duration of the input signal, whereby the capacitive means is charged to a first predetermined voltage during the time the first transistor is conducting, and is charged to a second predetermined voltage through the direct-current impedance element when the first transistor becomes non-conducting upon termination of the input signal. A means is pro vided for connecting the emitter electrode of the first transistor to the base electrode of the second transistor, whereby the second transistor is rendered conducting in response to said second predetermined voltage appearing across said capacitive means. Accordingly, the second transistor is rendered conducting a period of time after the termination of the input signal, which period of time is determined by the time which the capacitance means takes to be charged to the second predetermined voltage. The magnitude of the direct-current impedance element is so chosen that the second predetermined voltage charging time is that desirable in a particular circuit application.

The prior known art in the obtaining of a time delay through the use of a capacitor has centered around a circuit as a one-shot or monostable multivibrator. A disadvantage of the one-shot circuit for the encrgization of a ribbon clutch solenoid of a high-speed printer is that. once the time delay of this circuit has started, it is not possible to recycle the time delay until the present time delay has finished. Any input signals which occur during a time delay will not affect the one-shot circuit. In distinction, in the circuit provided by the present invention, a time delay will always be obtained corresponding to the last input signal applied to the circuit.

The novel features which are believed to be characteristic of the invention, as to both its organization and its method of operation. together with further objects and advantages thereof, will be better understood from the following description, considered in connection with the accompanying drawing. in which the sole FIGURE is a schematic circuit diagram of a control circuit providing a time delay which, if not completed before the occurrence of another input signal, will begin over again.

Referring now to the drawing, there is shown a control circuit which includes five signal translating devices, 10, 14, 18, 22, and 26. The

signal translating devices

10, 14, 22, and 26 are illustrated as junction transistors of the p n-p type, while the signal translating device 18 is illustrated as a junction transistor of the n-p-n type. It is to be understood that other types of signal translating devices may be utilized as the active elements of the control circuit, with appropriate changes of operating voltages to insure their proper operation.

The transistor includes an emitter electrode 11, a collector electrode 12, and a base electrode 13; the transistor 14 includes an emitter electrode 15, a collector electrode 16, and a base electrode 17; the transistor 18 includes an emitter electrode 19, a collector electrode 20, and a base electrode 21; the transistor 22 includes an emitter electrode 23, a collector electrode 24, and a base electrode 25; and the transistor 26 includes an emitter electrode 27, a collector electrode 28, and a base electrode 29.

An input signal source 30, having two output terminals 31 and 32, is connected across the base-emitter junction of the transistor 10 by means of a gating element 33, such as a semiconductor diode. As shown, the anode of the diode 33 is connected to the output terminal 31, the cathode of the diode 33 is connected to the base 13 by way of a resistor 3-1, and the terminal 32 is connected to ground. One or more additional signal sources, such as the input signal source 35, having two output terminals 36 and 37, is connected across the base-emitter junction of the transistor 10 by means of another gating element 38, such as a semi-conductor diode. As shown, the anode of the diode 38 is connected to the output terminal 36, the cathode of the diode 38 is connected to a point 39, betwcen the cathode of the diode 33 and the resistor 34, and the terminal 37 is connected to ground.

A resistor 40 is connected between the point 39 (the cathodes oi the diodes 33 and 38) and a negative terminal of a source of direct-current energizing potential 41 such as a battery. A resistor 42 is connected between a point 43, between the resistor 34 and the base 13, and a positive terminal of another source of direct-current energizing potential 44, which also may be a battery. The values of the potential sources 41 and 44 are chosen to render the transistor 10 conducting in the presence of a negative input signal of the proper amplitude. The emitter 11 is connected to ground to complete the base-emitter circuit of the transistor 10.

The collector 12 is energized through a resistor 45 by a negative source of energizing potential such as tlle battery 46.

Unilateral conducting means 47 and 48, which may be semiconductor diodes, are connected in series between the collector 12 of the transistor 10 and the base 17 of the transistor 14. The cathode of the diode 47 is connected to the collector 12, the anode of the diode 47 is connected to the cathode of the diode 48, and the anode of the diode 48 is connected to the base 17. A voltage-limiting means 49, such as a Zencr type diode, is connected between a point 50, which is between the diodes 47 and 48, and ground. The anode of the diode 49 is connected to the point 50, while its cathode is connected to ground.

A resistor 51. is connected between the base 17 of the transistor 14 and a positive terminal of a source of directcurrcnt energizing potential 52, such as a battery.

The collector 16 of the transistor 14 is energized through a resistor 53 by a negative source of energizing potential, such as the battery 54.

The emitter of the transistor 14 is connected dircctly to the base 21 of the transistor 18. A storage clement, such as a capacitor 55. is connected between the emitter 15 and ground.

A resistor 56 is connected between the base 21 of the transistor 18 and a positive terminal of a source of directcurrcnt energizing potential 57, such as a battery. The

emitter 19 is connected to ground to complete the baseemitter circuit of the transistor 18.

The collector 20 of the transistor 18 is energized through a resistor 58 by the source of energizing potential 57.

Unilateral conducting means, which may be

semiconductor diodes

59 and 60, which are connected in series, is connected between the collector 20 of the transistor 18 and the base 25 of the transistor 22. The anode of the diode 59 is connected to the collector 20, and the cathode of the diode 60 is connected to the base 25. A resistor 61 is connected between the base 25 and a negative terminal of a source of direct-current energizing potential 62, such as a battery. The emitter 23 is connected to ground to complete the base-emitter circuit of the transistor 22.

The collector 24 of the transistor 22 is energized through a resistor 63 by the source of energizing potential 62.

Unilateral conducting means 64, which may be a semiconductor diode, is connected between the collector 24 of the transistor 22 and the base 29 of the transistor 26. The cathode of the diode 64 is connected to the collector 24, while its anode is connected to the base 29. A resistor 65 is connected between a point 66, between the anode of the diode 64 and the base 29, and a positive terminal of a source of direct-current energizing potential 67. such as a battery. The emitter 27 of the transistor 26 is connected to ground to complete the basc-cmitter circuit of the transistor 26.

The collector 28 or the transistor 26 is connected in series with a resistor 68 and a solenoid winding 69 to a suitable source of direct-current energizing potential 70, such as a battery. The current flowing through the solcnoid winding 69 controls the operation of the armature of a solenoid (not shown). In parallel with the winding 69, there is provided a semiconductor diode 71, having its cathode connected to a junction point 72, between the resistor 68 and the winding 69, and having its anode connected to the negative terminal of the battery 70.

The operation of the control circuit will now be described. When the voltage at the

output terminals

31 and 36 is at a negative potential of approximately eight volts, the circuit will not be activated. Prior to the appearance of an input signal (at a negative potential of approximately 0.3 volt) at either of the

output terminals

31 and 36, and with the diodes 33 and 38 poled as shown, a current flows from the positive terminal of the battery 44 through the resistor 42, the resistor 34, and the resistor 40 to the negative terminal of the battery 41. The voltage at the junction point 39 will always be more positive than minus eight volts. The voltage at the junction point 43 is sufficiently negative with respect to the emitter 11 that the transistor 10 is caused to conduct to saturation. Since the anodes of the diodes 33 and 38 are more negative than their cathodes, these diodes will not be conducting.

The voltage drop across the crnittercollector electrodes of the transistor 10 is small. Hence, the voltage between the collector 12 and ground is approximately equal to ground potential, being in the neighborhood of a few tenths of a volt negative.

A current will llow from the positive terminal of the battery 52 through the resistor 51. through the diodes 48 and 47, and through the resistor 45 to the negative terminal of the battery 46. The diodes 47 and 48 will be conducting, as their anodes are more positive than their cathodes. The voltage drop across the diodes 47 and 48 is sutficient to cause the voltage at the base 17 to be more positive than the emitter 15, and so the base'emittcr junction of the transistor 14 is biased in the reverse direction. Hence, the transistor 14 will be non-conducting at this time.

The battery 57 biases the base-emitter junction of the transistor 18 in the forward direction to rcndcrthattrr1nsistor conducting. A current will llow from the positive terminal of the battery 57 through the resistor 56 and through the conducting transistor 18 to ground. This current is sulficient to cause the transistor 18 to conduct to saturation. The voltage of the emitter of the transistor 14, which is also the voltage of the base 21 of the transistor 18, will be approximately equal to ground potential, being in the neighborhood of from 0.i to 0.4 volt positive, depending on the voltage drop across the baseemitter junction of the transistor 18. This slightly positive voltage is reverse voltage on the capacitor 55, and hence this capacitor must be capable of withstanding such potential.

The battery 57 biases the

diodes

59 and 60 in their forward direction, causing them to be conductive. A current flows from the positive terminal of the battery 57, through the resistor 58, through the

diodes

59 and 60, and through the resistor 61 to the negative terminal of the battery 62. The battery 62 biases the base-emitter junction of the transistor 22 in the forward direction to render that transistor conducting. The current through the resistor 61 is greater than the total current through the

diodes

59 and 60 and the minimum stauration current through the base-emitter junction of the transistor 22. Accordingly, the transistor 22 will conduct to saturation.

The battery 67 biases the base-emitter junction of the transistor 26 in the reverse direction, so that the transistor 26 is non-conducting and no substantial current is flowing in the collector circuit of this transistor. Hence, the current fiow through the winding 69 is substantially zero when the transistor 26 is non-conducting. The volt age at the collector 24 of the transistor 22 is in the neighborhood of a few tenths of a volt negative at this time. The voltage drop across the conducting diode 64 due to the current through the resistor 65 is sufiicient to cause a positive potential on the base 29 to maintain the transistor 26 non-conducting.

When the voltage at either of the

output terminals

31 or 36 rises to approximately 0.3 volt negative, the circuit will be activated. This slightly negative voltage will bias either of the diodes 33 or 38 in their forward direction. A current will fiow from either of the input signal sources 30 or 35 through its associated diode 33 or 38, through the resistor 40, to the negative terminal of the battery 41. The voltage at the point 43 goes positive with respect to the emitter 11 and biases the base-emitter junction of the transistor 10 in the reverse direction. Hence, the transistor 10 will become non-conducting.

As the transistor 10 becomes non-conducting, the voltage between the collector 12 and ground goes more negative. The current flowing from the positive terminal of the battery 52, through the resistor 51, through the diodes 48 and 47, and through the resistor 45 to the negative terminal of the battery 46 causes the voltage at the base 17 of the transistor 14 to go negative with respect to the emitter 15. Accordingly, the base-emitter junction of the transistor 14 is biased in the forward direction. Hence, the transistor 14 will conduct to saturation.

The negative terminal of the capacitor 55 commences to charge from a positive potential of several tenths of a volt towards a negative potential of volts or the value of the battery 54 through the collector-emitter junction of the transistor 14 and through the resistor 53. Hence, the base-emitter junction of the transistor 18 is reversebiased, causing the transistor 18 to be non-conducting. The current flow from the positive terminal of the battery 57, through the resistor 58, through the

diodes

59 and 60, and through the resistor 61 to the negative terminal of the battery 62 causes a positive voltage to appear at the base of the transistor 22. The transistor 22 will become non-conducting.

When the transistor 22 becomes non-conducting, the current through the diode 64 and the resistor 63 causes the point 66 to go increasingly negative in potential. Hence, the transistor 26 becomes conducting to saturation. A current will flow from the positive terminal of 6 the battery 70 through the emitter-collector junctions of the transistor 26, through the resistor 68, and through the control winding 69 to the negative terminal of the battery 70. Hence, the control winding 69 (the ribbon clutch solenoid) will be energized.

As the capacitor 55 charges towards the negative potential of the battery 54 through the emitter-collector junction of the transistor 14, the junction point 50 of the diodes 47, 48, and 49 will go increasingly negative. The junction point 50 will be about one volt more negative than the charge on the capacitor 55, due to the forward potential drop across the emitter-base junction of the transistor 14 and due to the forward potential drop across the diode 48. When the junction point 50 reaches a negative potential of approximately eight volts, the breakdown voltage of the diode 49 is reached, and the diode 49 then switches or breaks down. Accordingly, the voltage charge on the negative terminal of the capacitor 55 is effectively limited to the breakdown voltage rating of the diode 49 plus the voltage drops across the emitterbase junction of the transistor 14 and the diode 48. In the circuit illustrated, this voltage is approximately seven volts negative. The input signal (the voltage at either of the output terminals 31 or 36) will be at the 0.3'volt negative level for an interval of approximately ten milliseconds. Within this ten-millisecond time interval, the capacitor 55 will become completely charged to the negative seven volts level.

After the ten-millisecond time interval, the

output terminals

31 and 36 will go more negative and return to approximately eight volts. The diodes 33 and 38 will not be conducting. The current fiow through the

resistors

34 and 40 will cause the base 13 of the transistor 10 to go increasingly negative in potential. Hence, the transistor 10 will conduct to saturation. The transistor 14 will cease to be conducting, which will open the circuit from the capacitor 55 to the resistor 53. The negative terminal of the capacitor 55 will begin to charge from a negative potetntial (approximately minus seven volts) towards a positive potential through the resistor 56. The resistor 56 is chosen to be very large in value with respect to the value of the resistor 53, so that the capacitor 55 can charge negatively within the ten-millisecond time interval of an input signal, but the capacitor 55 will take approximately one second to charge positively from approximately minus seven volts to a slight positive voltage.

As the negative terminal of the capacitor 55 charges a few tenths of a volt positive with respect to ground, the transistor 18 will become conducting. This will cause the transistor 22 to become conducting, which, in turn, will cause the transistor 26 to become non-conducting. Accordingly, the control winding 69 will be energized for a time interval of one second after a ten-millisecond input signal.

If another input signal occurs at either of the

output terminals

31 or 36 before the capacitor 55 has reached a positive potential sufiicient to cause the transistor 18 to become conducting, the capacitor 55 would recharge negatively to approximately seven volts, and the one-second time interval would commence over again.

In rendering the transistor 26 non-conducting, and thereby cutting otf the current through the winding 69, a back E.M.F. which is developed by reason of the inductance of the control winding 69 is established. This back E.M.F. may be sutficient to exceed the potential difierence tolerance between the emitter electrode 27 and the collector electrode 28 of the transistor 26. Accordingly. the diode 71 serves to short-circuit this back E.M.F. and therefore prevents the potential across the transistor 26 from becoming greater than the voltage of the source 70.

While it is understood that the circuit specifications of the control circuit of the present invention may vary ac cording to the desired design for any particular application, the following circuit specifications for the circuit of the drawing are included by way of example only:

Transistors

10 and 22 Type 2N404, manufactured by Radio Corporation of America.

Type 2N597, manufactured by Philco Corporation. Type 2N388, manufactured by Sylvania Electric Products Incorporated.

Type 2Nl073B, manufactured by Bendix Corpo- Transistor 14 Transistor 18 Transistor 26 ration. Source of potential 4l -20 volts. Source of potential 44 +20 volts. Source of potential 46 20 volts. Source of potential 52 +20 volts. Source of potential 54 20 volts. Source of potential 7 +20 volts. Source of potential 62 20 volts. Source of potential 67 +20 volts. Source of potential 70 60 volts. Semiconductor diodes 33 and 38 Type 1N949, manufactured by Raytheon Corporation. Resistor 34 1.300 ohms. Resistor 40 3.300 ohms. Resistor 42 16,000 ohms.

lcsistor 45 700 ohms. Resistor SI 13.000 ohms. Re istor 53 100 ohms. Resistor 56 24,000 ohms. Resistor 58 2.400 ohms. Resistor 61 4.300 ohms. Resistor 63 350 ohms. Resistor 65 700 ohms. Resistor 68 100 ohms. Capacitor 55 100 microfarads at 75 volts Semiconductor diodes 47, 48,

59, 60, and 64 Type SGZZ, manufactured by Transitron Electronic Corporation.

Type 1N602, manufactured by International Rectifier Corporation.

Type SVlZS, breakdown voltage of -8 volts, manufactured by Transitron Electronic Corporation.

Semiconductor diode 7l Semiconductor diode 49 Control or solenoid winding 69 Winding of type SF-l60 clutch, manufactured by Warner Electric Brake and Clutch Company.

While the fundamental novel features of the invention have been shown, described, and pointed out as applied to a preferred embodiment, it will be understood that various omissions and substitutions and changes in the form and details of the circuit illustrated and its operation may be made by those skilled in the art without dcparting from the spirit of the invention. it is the intention, therefore, to be limited only as indicated by the following claims.

What is claimed is:

l. A control circuit comprising a transistor having an emitter electrode. a base electrode, and a collector electrode: an external network interconnecting said elctrodes with a common iunction point and including capacitive means connected between said emitter electrode and said junction point; a first source of direct-current energizing potential connected between said collector electrode and said junction point; a direct-current impedance element and a second source of direct-current energizing potential connected in series between said emitter electrode and said junction point; and means for applying an input signal to said base electrode to render said transistor conducting for a time substantially equal to the time duration of said input signal, whereby said capacitive means is charged to a first predetermined voltage during the time said transistor is conducting and is charged to a second predetermined voltage through said direct-current impedance clement when said transistor becomes nonconducting upon termination of said input signal.

2. A control circuit comprising a transistor having an emitter electrode, a base electrode. and a collector electrode; an external network interconnecting said electrodes with a common junction point and including a voltagelimiting means connected between said base electrode and said junction point; capacitive means connected between said emitter electrode and said junction point; a first source of direct-current energizing potential connected between said collector electrode and said junction point; a direct-current impedance element and a second source of direct-current energizing potential connected in series between said emitter electrode and said junction point; and means for applying an input signal to said base electrode to render said transistor conducting for a time substantially equal to the time duration of said input signal, whereby said capacitive means is charged to a first predetermined voltage during the time said transistor is conducting and is charged to a second predetermined voltage through said direct-current impedance element when said transistor becomes non-conducting upon termination of said input signal.

3. The control circuit as defined in claim 2 where said voltage-limiting means comprises a Zener type diode for limiting the charge voltage on said capacitive means to substantially said first predetermined voltage during the time said transistor is conducting.

4. The control circuit as defined in claim 3 comprising means responsive to said second predetermined voltage appearing across said capacitive means.

5. A control circuit comprising a first transistor having an emitter electrode. a base electrode. and a collector electrode; capacitive means connected between said emitter electrode and a point of reference potential; :1 first source of directcurrent energizing potential connected between said collector electrode and said point of reference potential; a direct-current impedance element and a second source of dircct-currcnt energizing potential connected in series between said emitter electrode and said point of reference potential; means for applying an input signal to said base electrode to render said first transistor conducting for a time substantially equal to the time duration of said input signal, whereby said capacitive means is charged to a first predetermined voltage during the time said first transistor is conducting and is charged to a second predetermined voltage through said direct-current impedance clement when said said first transistor becomes non-conducting upon termination of said input signal; a second transistor having an emitter electrode. a base electrode. and a collector electrode; and means for connccling said emitter electrode of said first transistor to said base electrode of said second transistor. whereby said second transistor is rendered conducting in response to said second predetermined voltage appearing across said capacitive means.

6. The control circuit as defined in claim 5 further including a voltagc limiting means connected between said base electrode of said first transistor and said point of reference potential for limiting the charge on said capacitive means to substantially said first predetermined voltage.

7v The control circuit as defined in claim 6 wherein said first and second transistors are of opposite conductivity types.

it. A control circuit comprising a first transistor having a first input circuit and a first output circuit; means coupled to said first input circuit for rendering said first transistor non-cnducting in response to the application of an input signal thereto; a second transistor having a second input circuit and a second output circuit, said second input circuit being coupled to said first output circuit for rendering said second transistor conducting when said first transistor is rendered non-conducting; capacitive means connected across said second output circuit, said second output circuit including a direct-current impedance element and a source of direet-current ensrgis'ing potential, said capacitive means being charged to a first predetermined voltage when said second transistor is conducting and before termination of said input signa a third tra -1tor having a third input circuit and a third output circuit, said third input circuit being coupled to said second output circuit for rendering said third transistor non-conducting when said second transistor is conducting, said first and second transistors being rendered conducting' and non-conducting respectively upon termination of said input signal, said capacitive means being operable to maintain said third transistor nonconducting for a predetermined time interval after termination of said input signal, said capacitive means being charged to a second predetermined voltage at the completion of said predetermined time interval, whereupon said third transistor is rendered conducting; and means connected to said third output circuit responsive to an output signal therefrom.

9. The control circuit as defined in claim 8 further comprising voltagcdimiting means connected across said second input circuit of said second transistor for limiting the charge on said capacitive means to substantially said first predetermined voitage,

10. The control circuit as defined in claim 9 wherein said voltage-limiting means comprises a Zener type diode.

ll. The control circuit as defined in claim 10 wherein said first and second transistors are of one conductivity type and said third transistor is of the opposite conductivity type.

12. A control circuit comprising a first transistor having a first input circuit and a first output circuit; means coupled to said first input circuit for rendering said first transistor non-conducting in response to the application of an input signal; a second transistor having a second input circuit and a second output circuit, said second input circuit being coupled to said first output circuit for rendering said second transistor conducting when said first transistor is rendered non-conducting; voltage-limiting means connected across said second input circuit; capacitive means connected across said second output circuit, said second output circuit including a directcurreat impedanre element and a source of direct-current energizing potential, said capacitive means being charged to a first predetermined voltage when said second transistor is conducting and before termination of said input signal: a third transistor having a third input circuit and a third output circuit. said third input circuit being coupled to said second output circuit for rendering said third transistor non-conducting when said second transistor is conducting; a fourth transistor having a fourth input circuit and a fourth output circuit, said fourth input circuit being copied to said third outpt circuit for rendering said fourth transistor non-conducting when said third transister is non-conducting; and a fifth transistor having a filth input circuit and a fifth output circuit, said fifth input circuit being coupled to said fourth output circuit for rendering said fifth transistor conducting when said fourth transistor is conducting, said fifth output circuit including a control winding for a solenoid energized for the time interval that said fifth transistor is conducting, said first and second transistors being rendered conducting and non-conducting respectively upon termination of said input signal. said capacitive means being operable to main tain said third transistor non-conducting for a predctcrmined time interval after termination of said input signal,

lit

whereby said fourth and fifth transistors are maintained non-conducting and conducting respectively and said control winding remains energ zed, said capacitive means being charged to a second predetermined voltage at the completion of said predetermined interval. whereupon said tlzird transistor is rendered conducting, said fourth and fifth transistors are rendered conducting and nonconducting respectively, and said control Winding is deenergized.

13. The control circuit as defined in claim 12 wherein said voltage-limiting means comprises a Zener type diode.

14. The control circuit as defined in claim 12 wherein said first, second, fourth, and fifth transistors are of one conductivity type and said third transistor is of the opposite conductivity type.

15. A control circuit comprising a first transistor having a first emitter electrode, a first base electrode, and a first collector electrode; an input signal source adapted to render said first transistor non-conducting in response to the application of an input signal of a predetermined polarity and time duration between said first base electrode and said first emitter electrode; a second transistor having a second emitter electrode, a second base electrodc, and a second collector electrode, said second base electrode being coupled to said first collector electrode, said second transistor being rendered conducting when said first transistor is rendered non-conducting; capacitive means coupled between said second emitter electrode and a point of reference potential; a direct-current impedance element and a source of direct-current energizing potential in series connected in parallel with said capacitive means, said capacitive means being charged to a first predetermined voltage while said second transistor is conducting; voltage-limiting means coupled between said second base electrode and said point of reference potential for limiting the charge on said capacitive means to substantially said first predetermined voltage, said capacitive means being charged to a second predetermined voltage in a predetermined time through said direct-current impedance element when said second transistor becomes non-conducting upon termination of said input signal; a third transistor having a third emitter electrode, a third base electrode, and a third collector electrode, said second emitter electrode being coupled to said third base electrode, said third transistor being rendered non-conducting when said second transistor is rendered conducting and being rendered conducting when said capacitive means is charged to said second predetermined voltage; a fourth transistor having a fourth emitter electrode, a fourth base electrode, and a fourth collector electrode, said third collector electrode being coupled to said fourth base electrode, said fourth transistor being rendered nonconducting when said third transistor is rendered nonconducting and being rendered conducting when said third transistor is rendered conducting; a fifth transistor having a fifth emitter electrode, a fifth base electrode, and a fifth collector electrode. said fourth collector electrode being coupled to said fifth base electrode, said fifth transister being rendered conducting when said fourth transistor is rendered non-conducting and being rendered noncondueting when said fourth transistor is rendered eondueting; and a control winding for a solenoid coupled to said fifth collector electrode energized for an interval of time that said fifth transistor is conducting, said interval of time being substantially equal to said time duration of said input signal plus said predetermined time that it takes said capacitive means to be charged to said second predetermined voltage.

References Cited in the file of this patent UNITED STATES PATENTS 2,958,017 Hogue Oct. 25, 1960 2,970,228 White et al. Jan. 31, 1961 3,069,552 Thomson Dec. 18, 1962 UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No 3 lO9,125 October 29 1963 David A. Wachowiak It is hereby certified that error appears in the above numbered patent requiring correction and that the said Letters Patent should read as corrected below.

- potential Column 6, line 39, for "potetntial" read column 8, line 38 before "comprising" inserL @W further column 9, line 02, for "outpt" read output Signed and sealed this 21st day of April 1964,

(SEAL) EDWARD J BRENNER Attest: ERNEST W. SWIDER Attesting Officer Commissioner of Patents UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Patent No, 3, 109, 125 0c tober 29 1963 David A. Wachowiak It is hereby certified that error appears in the above numbered patent requiring correction and that the said Letters Patent should read as correc ted below for "potetntial" read potential Column 6, line 39, column 8, line 38, before "comp ri sing" inser t further column 9, 11' no 62, for "outpt" read outpu t Signed and sealed this 21st day of April 1964.

XSEAL) ttest: m r

EJWAR!) BRENNER ERNEST w. SWIDER Attesting Officer Commissioner of Patents

Claims

1. A CONTROL CIRCUIT COMPRISING A TRANSISTOR HAVING AN EMITTER ELECTRODE, A BASE ELECTRODE, AND A COLLECTOR ELECTRODE; AN EXTERNAL NETWORK INTERCONNECTING SAID ELECTRODES WITH A COMMON JUNCTION POINT AND INCLUDING CAPACITIVE MEANS CONNECTED BETWEEN SAID EMITTER ELECTRODE AND SAID JUNCTION POINT; A FIRST SOURCE OF DIRECT-CURRENT ENERGIZING POTENTIAL CONNECTED BETWEEN SAID COLLECTOR ELECTRODE AND SAID JUNCTION POINT; A DIRECT-CURRENT IMPEDANCE ELEMENT AND A SECOND SOURCE OF DIRECT-CURRENT ENERGIZING POTENTIAL CONNECTED IN SERIES BETWEEN SAID EMITTER ELECTRODE AND SAID JUNCTION POINT; AND MEANS FOR SPPLYING AN INPUT SIGNAL TO SAID BASE ELECTRODE TO RENDER SAID TRANSISTOR CONDUCTING FOR A TIME SUBSTANTIALLY EQUAL TO THE TIME DURA-