US2540442A

US2540442A - Electronic counter

Info

Publication number: US2540442A
Application number: US43604A
Authority: US
Inventors: Igor E Grosdoff
Original assignee: RCA Corp
Current assignee: RCA Corp
Priority date: 1948-08-11
Filing date: 1948-08-11
Publication date: 1951-02-06
Anticipated expiration: 1968-02-06

Description

Filed Aug. 11, 1948 INVENTOR ATTORN EY [gar E Grog/61 016 Patented Feb. 6, 1951 ELECTRONIC COUNTER Igor E. Grosdoff, Princeton, N. J., assignor to Radio Corporation of America, a corporation of Delaware Application August 11, 1948, Serial No. 43,604

3 Claims. (01; 235 92) This invention relates to electronic counters having a cycle of operation which is completed in response to the application of a predetermined number of electrical pulses. More particularly, it relates to an improved circuit by which the number of applied pulses is indicated. at each step in the operating cycle of such a counter.

The improved indicating circuit herein disclosed is similar in many respects to that disclosed in my co-pending application, Serial No. 580,446, filed March 1, 1945, now PatentNo. 2,521,788, issued September 12, 1950, but differs therefrom in that the potentials applied to it are derived from the screen grids of the pentodes which form a part of the difierent trigger circuit stages of the counter.

The illustrated form of the invention includes four trigger circuits or stages, each of which.

comprises a pair of pentodes. These four stages have tandem and feedback connections such that the operating cycle of the counter is completed once for each ten pulses applied to the input of the counter. Energized from the screen grids of the pentodes is an indicating circuit which functions to indicate the number of input pulses applied between the beginning and end of the opcrating cycle. These screen grids may have potential applied to them from a lead separate from that connected to the anodes of the trigger circuits.

The principal object of the invention is the provision of an improved indicating circuit and method of operation which contribute to high speed operation of the counter. An important object of the invention is the provision of an indicating system such that only a relatively low voltage is required for operating the trigger circuits and the RC constants of these circuits may be made relatively low, thus enabling satisfactory operation at higher speeds than heretofore possible.

The invention will be better understood from the following description considered in connection with the accompanying drawing and its scope is indicated by the appended claims.

The single figure of the drawing is a wiring diagram of a preferred form of the invention.

This wiring diagram shows four trigger circuits Vi, V2, V3 and VA. Each of these trigger circuits or counter stages includes two anodes ll|2, l3-Hi, !5i6 or i'l-l8. Each stage also includes a pair of control. grids l9 and 2!], a pair of screen grids 2i and 22 and a cathode 23 which is grounded and connected to a pair of suppres sor grids, one of which is interposed between the anode II and the screen grid 2| and the other of which is interposed between the anode l2 and the screen grid 22.

The difierent counter stages are all illustrated as of the type wherein operating potential is applied from a +3 lead 24 to their anodes respectively through a pair of resistors 25 and 26and through a pair of resistors?! and 28. Itwill be noted that (l) the anode H is connected to the control grid 29 through the resistor 26 and a resistor 23 which is shunted by a capacitor 30, (2) the anode I2 is connected to the control grid l9 through the resistor 28 and a resistor 3| which is shunted by a capacitor 32, and (3) bias potential is applied from a lead 33 through a resistor 34 to the control grid l9 and from the lead 33 through a reset switch 35, a lead 36 and a resistor 31 to the control grid 20. By momentarily opening the reset switch 35, current conduction is established in the anodes l2, It, It and I 8 as indicated by the arrows placed adjacent the an; ode resistors 21.

The stages VI, V2, V3 and V4 are connected in tandem through circuits which include respectively, a capacitor 38, a capacitor 39 and a capacitor 411. The anode I8 of the last stage V4 is coupled through a capacitor 4| to an output lead 42. A lead 44 is connected to the various coupling elements of the counter as hereinafter indicated.

Thus, the lead M is connected, respectively, (1) through a resistor 45 to the counter input capacitor '65 and to the cathodes of a pair of coupling rectifiers 46 and i1, (2) through a resistor 48 to the coupling capacitor 38 and to the cathodes of a pair of coupling rectifiers ifi and 50, (3) through a resistor 5! to the coupling capacitor 39 and the cathodes of a pair of 0011-. pling rectifiers 52 and 53, and (4) through a resistor 54 to the coupling capacitor 40 and to the cathodes of a pair of coupling rectifiers 55 and 56. With these connections, each feedforward coupling includes a capacitor and a pair of rectifiers which have their cathodes biased to aoommon potential. Y I

Between the anode l5 of the stage V3 and the control grid 25]: of the stage V2 is a feedback coupling which includes a capacitor 57 and a rectifier 5t. A'similar feedback coupling including a capacitor 55 and a, rectifier is connected between the anode ll of the stage V4 and the control grid 20 of the stage SQ The lead 44 is connected to these two feedback couplings respectively through a resistor SI and a resistor 62.

I t pu s of n ve. Pola i a e ap l e of resistors and capacitors which are of relatively low value and are therefore more suitable for circuits operated at high frequency.

What the invention provides is a counter which is operable at a relatively high speed and provides, within its counting range, a positive indication of the number of input pulses fed to it.

I claim as my invention:

1. The combination of a counter includin a plurality of tandem connected stages each of which stages includes a pair of pentodes each in cluding an anode, control grid and screen grid, said pentodes having their anodes each cross connected to the grid of the other through a resistor shunted by a capacitor so that current is conducted by one or the other of said anodes, means for applying potential to each anode and each screen grid of said pentodes through a separate resistor, a plurality of indicators one half of which have one of their terminals connected to one screen grid of the first stage of said counter and the other half of which have one of their terminals connected to the other screen grid of said first stage, and means for applying to the other terminals of said indicators from the screen grids of the other of said stages potentials such that said indicators are energized successively in response to the application of pulses to the input of said counter.

2. The combination of a counter including a plurality of tandem connected stages each of which stages includes a pair of pentodes each in= eluding an anode, control grid and screen grid, said pentodes having their anodes each cross connected to the grid of the other through a resistor shunted by a capacitor so that current is conducted by one or the other of said anodes, a plurality of resistors separate ones of which are respectively connected for applying potentiaI to each anode and each screen grid of said pentodes, and a plurality of indicators some of which have one of their terminals connected through only Number a part of one screen grid lead resistor to one screen grid of the first stage of said counter and others of Which have one of their terminals connected through only a part of another screen grid lead resistor to the other screen grid of said first stage, and means for applying to the other terminals of said indicators from the screen grids of the other or said stages potentials such that said indicators are energized successively in response to the application of pulses to the input of said counter.

3. The combination of a counter including a plurality of tandem stages each of which stages includes a pair of pentodes each including an anode, control grid and screen grid, said pentodes having their anodes each cross connected to the grid of the other through a resistor shunted by a capacitor so that current is conducted by one or the other of said anodes, means for applyin potential to each anode and each screengrid of said pentodes through a separate resistor, a plurality of indicators arranged in pairs each having one of its indicators connected through only a part of a first screen grid lead resistor to one screen grid of the first stage of said counter and the other of its indicators connected through only a part of a second screen lead resistor to the other screen grid of said first stage, and means interconnecting said pairs and the screen grids of the other of said stages for applying a predetermined maximum negative potential successively to said indicator pairs.

IGOR E. GROSDOFF.

REFERENCES CITED The following references are of record in the file of this patent:

UNITED STATES PATENTS Name Date 2,407,320 Miller Sept. 10, 1946