US2535377A - Coincidence circuit - Google Patents
Coincidence circuit Download PDFInfo
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- US2535377A US2535377A US55621A US5562148A US2535377A US 2535377 A US2535377 A US 2535377A US 55621 A US55621 A US 55621A US 5562148 A US5562148 A US 5562148A US 2535377 A US2535377 A US 2535377A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/06—Generation of synchronising signals
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/06—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using vacuum tubes
Definitions
- This invention relates to a coincidence circuit and more particularly, to a multiple coincidence circuit.
- circuits for the determination of the coincident occurrence of a plurality of pulses have been generally so arranged that two or more externally impressed simultaneous pulses produce a signal larger in magnitude in the output than that produced by a lesser number of simultaneous pulses.
- a description of such circuits of the prior art is incorporated herein by reference to Electrical Counting by W. B. Lewis, published in 1943 by the MacMillan Company, New York city, New York. Circuits of the type described have the limitation that their resclution, which is determined by their high frequency response, is limited. by the input admittances oi the various tubes.
- An object ofthis invention is to provide a coincidence indicating device having an improved high frequency response.
- a further object of this invention is to provide a mixing circuit responsive only to pulses from various sources coincident in time.
- a still further object of this invention is the ease with which the output of this circuit may be limited to networks having low time constants without undue loading effects and the consethe provision of input means to a plurality of tion time is decreased since it is proportional,
- a coincidence circuit is shown provided with a plurality of input circuits, for example, three for purposes of explanation.
- Three tubes iii, H and I2 are provided with inputs l3, l4 and 15 respectively.
- the grids of the tube are coupled to the individual inputs by coupling condensers I6, I? and I8.
- Ancdes 25 and 26 are connected in parallel with each other and are connected directly to a suitable positive potential source indicated by conductor 26.
- Control grids 2E, 22 and 23 are returned to ground 30 through their respective grid resistors 2?, 28 and 29 respectively, and to a tap on the common cathode resistor 3
- the diode 36 is provided.
- Cathode 35 of the diode is directly connected to cathodes 32, 33 and 3 of the respective input tubes.
- the circuit input admittance In order that a suitable response may be obtained even in the cases of pulses having a steep wave front, i. e., pulses including high frequency components, the circuit input admittance must be minimized.
- the input admittance is the ratio of control grid current to the voltage applied between the cont ol grid and the cathode. Because the potential on the control grid is afiected by all electric factors in its environment, the input admitt nce takes into account the capacitance between the input and output circuits throu h interelettrocle coupling, and the interaction between the control grid the electron stream.
- the input admittance of a triode is mostly determined by the displacement currents flowing between the control grid and cathode and between the control grid and anode through the respective capacitance.
- the current flow through the grid-anode capacitance is dependent on the nature of the load impedance in the anode circuit for the reason that the A. C. voltage between th anode and grid is equal to the amplifled voltage across the load minus the signal voltage between the cathode and grid.
- anode load impedance is deleterious where fast pulses are to be processed.
- circuit of this invention avoids the use of anode load impedance by placing the load impedance in the cathode circuits.
- the pulse Under he influence of a negative pulse impressed on input terminal !3, the pulse is fed through coupling condenser it to control grid 25 of tube l6 driving it toward cutofi and thereby tending to decrease the total current through common cathode resistor 3i. Simultaneously with this decrease, the bias on the control grids 22 and 23 of tubes 5! and i2 is decreased allowing tubes H and E2 to conduct more current. Th sum of the currents of tubes l and I2 under this condition very nearly approaches the sum of all three tubes 16, H and E2 in the quiescent stage. Therefore, the resultant signal appearing on the cathode 35 of tube 38 is an insignificantly small negative pulse.
- Anode 3 of tube 35 is maintained at a positive potential by a connection through load resistor 38 to conductor 46 upon which is impressed a positive potential.
- This anode potential is of a selected value less than the lowest potential that will appear at cathode 35 as a result of two simultaneous input pulses on any two input terminals of the circuit.
- the potential on cathode 35 of diode 36 is depressed to a. negative potential with respect to the anode 31.
- a negative pulse is created across load resistor 38 which is transmitted through condenser 4
- the potential applied to anode 31 of diode 36 is preferably adjustable whereby the relation between the potential on the anode with respect to the cathode of diode 36 can be so selected that the coincidence system herein described is reliably operative independently of the magnitude within wide limits of the input pulses.
- a multiple coincidence circuit for receiving signals coincident in time and for producing a large single si nal, comprising at least two electron discharge devices each including an anode, cathode and control electrode, said cathodes being connected to each other and to a common cathode resistive load, said cathode resistive load being divided to furnish bias potential for said control electrodes, means for impressing said bias potential on said control electrodes, input means applied to each of said control electrodes, output means including a diode having an anode and a cathode, said cathode being connected to said first mentioned cathodes; a positive potential source connected to said diode anode whereby the simultaneous impression of negative ulses on all of said input means decreases the positive potential on said cathode and thereby results in the creation of an output pulse.
- a multiple coincidence circuit for receiving signals coincident in time and for producing in its output a large single signal, comprising at least two electron discharge devices each including an anode, cathode and control electrode, said cathodes being connected together and to a common cathode resistive load, said cathode resistive load being provided with a tap; a grid leak resistor connected to each control electrode and to said tap to furnish bias potential for each of said control electrodes, input means coupled to each of said control electrodes, output means including a diode having an anode and a cathode, said diode cathode being connected to said first mentioned cathodes, said diode being biased at a value at which only the creation of a potential by the simultaneous application of pulses to all of said input means is sufficient to exceed said bias and render said diode conducting.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
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Description
v E. W. TITTERTON COINCIDENCE CIRCUIT Filed 001;. 20, 1948 Dec. 26, 1950 WITNESSES m M la/md Patented Dec. 26, 1950 COINCIDENCE CIRCUIT Ernest William Titterton, Harwell, Didcot, England, assignor to the United States of America as represented by the United States Atomic Energy Commission Application October 20, 1948, Serial No. 55,621
2 Claims.
This invention relates to a coincidence circuit and more particularly, to a multiple coincidence circuit.
Prior to this invention, circuits for the determination of the coincident occurrence of a plurality of pulses have been generally so arranged that two or more externally impressed simultaneous pulses produce a signal larger in magnitude in the output than that produced by a lesser number of simultaneous pulses. A description of such circuits of the prior art is incorporated herein by reference to Electrical Counting by W. B. Lewis, published in 1943 by the MacMillan Company, New York city, New York. Circuits of the type described have the limitation that their resclution, which is determined by their high frequency response, is limited. by the input admittances oi the various tubes.
Coincidence circuits described in the prior art are also deficient in operation under the influence of fast pulses due to plate load impedance for the reason that if the plate load impedance is great enough to produce appreciable amplification, the input admittances will so vary as to by-pass high frequency components of the fast input pulses.
An object ofthis invention is to provide a coincidence indicating device having an improved high frequency response.
A further object of this invention is to provide a mixing circuit responsive only to pulses from various sources coincident in time.
A still further object of this invention is the ease with which the output of this circuit may be limited to networks having low time constants without undue loading effects and the consethe provision of input means to a plurality of tion time is decreased since it is proportional,
to the time constant of the input resistance coupled network in shunt with the input impedance of the tubes.
This invention will be described by referring to the drawing made part of this specification in which the single figure is a schematic circuit diagram of an embodiment of this invention.
Referring to the drawing, a coincidence circuit is shown provided with a plurality of input circuits, for example, three for purposes of explanation. Three tubes iii, H and I2 are provided with inputs l3, l4 and 15 respectively. The grids of the tube are coupled to the individual inputs by coupling condensers I6, I? and I8. Ancdes 25 and 26 are connected in parallel with each other and are connected directly to a suitable positive potential source indicated by conductor 26. Control grids 2E, 22 and 23 are returned to ground 30 through their respective grid resistors 2?, 28 and 29 respectively, and to a tap on the common cathode resistor 3| Cathodes 32, and 3:3 are connected together and to ground 35; through cathode load resistor 31.
To the end that an indication can be obtained from pulses applied to the circuit thus far described, the diode 36 is provided. Cathode 35 of the diode is directly connected to cathodes 32, 33 and 3 of the respective input tubes.
In order that a suitable response may be obtained even in the cases of pulses having a steep wave front, i. e., pulses including high frequency components, the circuit input admittance must be minimized.
The input admittance is the ratio of control grid current to the voltage applied between the cont ol grid and the cathode. Because the potential on the control grid is afiected by all electric factors in its environment, the input admitt nce takes into account the capacitance between the input and output circuits throu h interelettrocle coupling, and the interaction between the control grid the electron stream.
The input admittance of a triode is mostly determined by the displacement currents flowing between the control grid and cathode and between the control grid and anode through the respective capacitance. The current flow through the grid-anode capacitance is dependent on the nature of the load impedance in the anode circuit for the reason that the A. C. voltage between th anode and grid is equal to the amplifled voltage across the load minus the signal voltage between the cathode and grid. The A. C.
'potential difference between the grid and anode he very large compared to the signal voltage 1th the result that a large displacement current Wi l 19W brtween the grid and anode thereby making this part of the input admittance important. Not Only is the magnitude of the input admittance a function of the grid-anode couplin and the size of the anode load, but also the input phase angle is a function or" the reactive character of the anode load impedance. This last mentioned consideration is very important from the viewpoint of stability.
In accordance with the above discussion, anode load impedance is deleterious where fast pulses are to be processed. ihe circuit of this invention avoids the use of anode load impedance by placing the load impedance in the cathode circuits.
The static operating currents derived from the three triodes If], H and i2 traverse cathode resistor 3! thereby generating a potential drop and consequently establishing the bias potential on all three control grids 25, 22 and 23. With no signal applied on input terminals !3, M' and I5 the currents in the respective tubes W, H and H! are substantially equal and the total current is sufiicient to produce a potential difference between the upper or cathode terminal of resistor 3| and its tap which is proper for biasing the individual tubes low on the linear portion of their grid potential-anode current characteristic.
Under he influence of a negative pulse impressed on input terminal !3, the pulse is fed through coupling condenser it to control grid 25 of tube l6 driving it toward cutofi and thereby tending to decrease the total current through common cathode resistor 3i. Simultaneously with this decrease, the bias on the control grids 22 and 23 of tubes 5! and i2 is decreased allowing tubes H and E2 to conduct more current. Th sum of the currents of tubes l and I2 under this condition very nearly approaches the sum of all three tubes 16, H and E2 in the quiescent stage. Therefore, the resultant signal appearing on the cathode 35 of tube 38 is an insignificantly small negative pulse.
When two simultaneous negative pulses are applied to input terminals l3 and it, they are fed through respective coupling condensers l6 and Il to control grids 2| and 22 respectively, of tubes l6 and H. These negative pulses simulta neously impressed on control grids 2i and 22 of tubes :3 and i I produce a drop across resistor 3! in the same manner as a single pulse. The potential difference across resistor 3| is maintained substantially constant by an increase in current through tube 52, thus the output for a double coincidence may be slightly larger than that registered for a single input pulse, but still is insignificantl small and not suiricient to render tube 36 conducting.
Under the influence of negative pulses simultaneously applied at input terminals l3, [4' and I5 and fed through respective coupling condensers I6, i7 and 18 to control grids 21, 22 and 23 respectively, of tubes 16, H and i2 respectively, all three said tubes cease conducting and the potential drop across resistor 31 is sharply reduced to zero and, as a consequence, the positive potential impressed on cathode 35 of diode 36 is abruptly removed.
Anode 3: of tube 35 is maintained at a positive potential by a connection through load resistor 38 to conductor 46 upon which is impressed a positive potential. This anode potential is of a selected value less than the lowest potential that will appear at cathode 35 as a result of two simultaneous input pulses on any two input terminals of the circuit. Upon the impression of three input pulses the potential on cathode 35 of diode 36 is depressed to a. negative potential with respect to the anode 31. As a consequence, a negative pulse is created across load resistor 38 which is transmitted through condenser 4| to the output terminal 42.
The potential applied to anode 31 of diode 36 is preferably adjustable whereby the relation between the potential on the anode with respect to the cathode of diode 36 can be so selected that the coincidence system herein described is reliably operative independently of the magnitude within wide limits of the input pulses.
With the above described apparatus in mind, other modifications of the invention will become apparent to persons skilled in the art without departing from the spirit and scope of the invention, as defined with particularity in the following claims.
What is claimed is:
1. A multiple coincidence circuit for receiving signals coincident in time and for producing a large single si nal, comprising at least two electron discharge devices each including an anode, cathode and control electrode, said cathodes being connected to each other and to a common cathode resistive load, said cathode resistive load being divided to furnish bias potential for said control electrodes, means for impressing said bias potential on said control electrodes, input means applied to each of said control electrodes, output means including a diode having an anode and a cathode, said cathode being connected to said first mentioned cathodes; a positive potential source connected to said diode anode whereby the simultaneous impression of negative ulses on all of said input means decreases the positive potential on said cathode and thereby results in the creation of an output pulse.
2. A multiple coincidence circuit for receiving signals coincident in time and for producing in its output a large single signal, comprising at least two electron discharge devices each including an anode, cathode and control electrode, said cathodes being connected together and to a common cathode resistive load, said cathode resistive load being provided with a tap; a grid leak resistor connected to each control electrode and to said tap to furnish bias potential for each of said control electrodes, input means coupled to each of said control electrodes, output means including a diode having an anode and a cathode, said diode cathode being connected to said first mentioned cathodes, said diode being biased at a value at which only the creation of a potential by the simultaneous application of pulses to all of said input means is sufficient to exceed said bias and render said diode conducting.
ERNEST WILLIAM TI'ITERTON.
REFERENCES CITED The following references are of record in the file of this patent:
UNITED STATES PATENTS Number Name Date 2,258,732 Blumlein et a1 Oct. 14, 1941 2,432,188 Bliss Dec. 9, 1947 2,446,850 Roat Aug. 10, 1948 2,485,665 Shepherd Oct. 25, 1949 OTHER REFERENCES Nature, vol. 125, No. 3156, April 26, 1930, Method of Registering Multiple Simultaneous impulses by Rossi, p. 636.
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US55621A US2535377A (en) | 1948-10-20 | 1948-10-20 | Coincidence circuit |
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US55621A US2535377A (en) | 1948-10-20 | 1948-10-20 | Coincidence circuit |
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Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2680194A (en) * | 1949-05-20 | 1954-06-01 | Bell Telephone Labor Inc | Radiotelephone receiving system |
US2713119A (en) * | 1952-07-21 | 1955-07-12 | Adler Benjamin | Switching equipment |
US2763784A (en) * | 1951-10-19 | 1956-09-18 | Jones & Laughlin Steel Corp | Method and apparatus for continuously measuring tin thickness of tinned strip |
US2773982A (en) * | 1952-06-10 | 1956-12-11 | Gen Dynamics Corp | Quasi-regenerative pulse gating circuit |
US2778996A (en) * | 1950-02-16 | 1957-01-22 | Clifford M Ryerson | Transient peak voltmeter |
US2783374A (en) * | 1953-03-14 | 1957-02-26 | Nat Res Dev | Electrical gate circuits |
US2854572A (en) * | 1954-05-12 | 1958-09-30 | Cons Electrodynamics Corp | Gate using variable cathode follower impedance for shorting or passing cathode-fed impulses |
US2872593A (en) * | 1953-12-18 | 1959-02-03 | Ibm | Logical circuits employing junction transistors |
US2880331A (en) * | 1954-09-30 | 1959-03-31 | Ibm | Time controlled signal discriminator circuit |
US2888578A (en) * | 1954-09-30 | 1959-05-26 | Ibm | Transistor emitter-follower circuits |
US2926267A (en) * | 1955-03-10 | 1960-02-23 | Itt | Direct-current transistor switching amplifier circuit |
US2954485A (en) * | 1956-12-24 | 1960-09-27 | Bell Telephone Labor Inc | Transistor binary counters with fast carry |
US2964652A (en) * | 1956-11-15 | 1960-12-13 | Ibm | Transistor switching circuits |
US2990479A (en) * | 1958-02-17 | 1961-06-27 | Ibm | Switching circuits using constant current source |
US3016466A (en) * | 1957-12-30 | 1962-01-09 | Richard K Richards | Logical circuit |
US3031585A (en) * | 1956-11-01 | 1962-04-24 | Thompson Ramo Wooldridge Inc | Gating circuits for electronic computers |
US3283180A (en) * | 1963-03-22 | 1966-11-01 | Rca Corp | Logic circuits utilizing transistor as level shift means |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2258732A (en) * | 1937-12-24 | 1941-10-14 | Emi Ltd | Electric signal pulse controlling circuits |
US2432188A (en) * | 1944-06-22 | 1947-12-09 | Rca Corp | Telegraph secrecy system |
US2446850A (en) * | 1942-11-30 | 1948-08-10 | Gen Electric | Radio echo apparatus |
US2485665A (en) * | 1943-07-16 | 1949-10-25 | Sperry Corp | Mixing circuit |
-
1948
- 1948-10-20 US US55621A patent/US2535377A/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2258732A (en) * | 1937-12-24 | 1941-10-14 | Emi Ltd | Electric signal pulse controlling circuits |
US2446850A (en) * | 1942-11-30 | 1948-08-10 | Gen Electric | Radio echo apparatus |
US2485665A (en) * | 1943-07-16 | 1949-10-25 | Sperry Corp | Mixing circuit |
US2432188A (en) * | 1944-06-22 | 1947-12-09 | Rca Corp | Telegraph secrecy system |
Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2680194A (en) * | 1949-05-20 | 1954-06-01 | Bell Telephone Labor Inc | Radiotelephone receiving system |
US2778996A (en) * | 1950-02-16 | 1957-01-22 | Clifford M Ryerson | Transient peak voltmeter |
US2763784A (en) * | 1951-10-19 | 1956-09-18 | Jones & Laughlin Steel Corp | Method and apparatus for continuously measuring tin thickness of tinned strip |
US2773982A (en) * | 1952-06-10 | 1956-12-11 | Gen Dynamics Corp | Quasi-regenerative pulse gating circuit |
US2713119A (en) * | 1952-07-21 | 1955-07-12 | Adler Benjamin | Switching equipment |
US2783374A (en) * | 1953-03-14 | 1957-02-26 | Nat Res Dev | Electrical gate circuits |
US2872593A (en) * | 1953-12-18 | 1959-02-03 | Ibm | Logical circuits employing junction transistors |
US2854572A (en) * | 1954-05-12 | 1958-09-30 | Cons Electrodynamics Corp | Gate using variable cathode follower impedance for shorting or passing cathode-fed impulses |
US2880331A (en) * | 1954-09-30 | 1959-03-31 | Ibm | Time controlled signal discriminator circuit |
US2888578A (en) * | 1954-09-30 | 1959-05-26 | Ibm | Transistor emitter-follower circuits |
US2926267A (en) * | 1955-03-10 | 1960-02-23 | Itt | Direct-current transistor switching amplifier circuit |
US3031585A (en) * | 1956-11-01 | 1962-04-24 | Thompson Ramo Wooldridge Inc | Gating circuits for electronic computers |
US2964652A (en) * | 1956-11-15 | 1960-12-13 | Ibm | Transistor switching circuits |
US2954485A (en) * | 1956-12-24 | 1960-09-27 | Bell Telephone Labor Inc | Transistor binary counters with fast carry |
US3016466A (en) * | 1957-12-30 | 1962-01-09 | Richard K Richards | Logical circuit |
US2990479A (en) * | 1958-02-17 | 1961-06-27 | Ibm | Switching circuits using constant current source |
US3283180A (en) * | 1963-03-22 | 1966-11-01 | Rca Corp | Logic circuits utilizing transistor as level shift means |
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