US20230335412A1 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- US20230335412A1 US20230335412A1 US18/043,768 US202118043768A US2023335412A1 US 20230335412 A1 US20230335412 A1 US 20230335412A1 US 202118043768 A US202118043768 A US 202118043768A US 2023335412 A1 US2023335412 A1 US 2023335412A1
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- insulating substrate
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 58
- 239000000758 substrate Substances 0.000 claims abstract description 170
- 239000004020 conductor Substances 0.000 claims description 90
- 230000017525 heat dissipation Effects 0.000 claims description 31
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 11
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 7
- 230000005669 field effect Effects 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 5
- 239000000463 material Substances 0.000 description 16
- 230000020169 heat generation Effects 0.000 description 12
- 229910000679 solder Inorganic materials 0.000 description 10
- 238000010586 diagram Methods 0.000 description 4
- 210000004899 c-terminal region Anatomy 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 239000010949 copper Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 241000206607 Porphyra umbilicalis Species 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
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- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Definitions
- the present disclosure relates to a semiconductor device.
- Patent Document 1 a semiconductor device, in which two insulating substrates are provided on a heat dissipation plate, a transistor and a diode of an upper arm are disposed on one substrate of the insulating substrates, and a transistor and a diode of a lower arm are disposed on the other substrate of the insulating substrates, is proposed (Patent Document 1).
- Patent Document 1 Japanese Unexamined Patent Application Publication No. 2015-154079
- a semiconductor device of the present disclosure includes a first insulating substrate, a second insulating substrate, a first transistor provided on the first insulating substrate, and a first diode provided on the second insulating substrate, the first diode being connected in parallel to the first transistor.
- FIG. 1 is a perspective view illustrating a semiconductor device according to a first embodiment.
- FIG. 2 is a top view illustrating the semiconductor device according to the first embodiment.
- FIG. 3 is a cross-sectional view illustrating a relationship between a heat dissipation plate, a first insulating substrate, and a second insulating substrate in the semiconductor device according to the first embodiment.
- FIG. 4 is a cross-sectional view illustrating a first transistor.
- FIG. 5 is a cross-sectional view illustrating a first diode.
- FIG. 6 is a cross-sectional view illustrating a second transistor.
- FIG. 7 is a cross-sectional view illustrating a second diode.
- FIG. 8 is a circuit diagram illustrating the semiconductor device according to the first embodiment.
- FIG. 9 is a schematic diagram (1) illustrating an operation of the semiconductor device according to the first embodiment.
- FIG. 10 is a schematic diagram (2) illustrating the operation of the semiconductor device according to the first embodiment.
- FIG. 11 is a schematic view (3) illustrating the operation of the semiconductor device according to the first embodiment.
- FIG. 12 is a schematic view (4) illustrating the operation of the semiconductor device according to the first embodiment.
- FIG. 13 is a cross-sectional view illustrating a modified example of the heat dissipation plate.
- FIG. 14 is a schematic view illustrating a configuration of a first insulating substrate and a second insulating substrate in a semiconductor device according to a second embodiment.
- the amount of heat generation of a connection member such as a wire connecting the insulating substrates may become excessive.
- the amount of heat generation of the connection member between the insulating substrates can be reduced.
- a wire is provided between two insulating substrates, and a current flowing from a DC voltage load terminal element to an AC voltage load terminal element and a current flowing from the AC voltage load terminal element to the DC voltage load terminal element pass through the wire. That is, the currents flow in two directions through the wire between the insulating substrates. Thus, there is a possibility that a current frequently flows through the wire, and the amount of heat generation becomes excessive, and the wire may become melted and cut.
- the semiconductor device because the first transistor is provided on the first insulating substrate and the first diode is provided on the second insulating substrate, paths of the currents flowing between the first insulating substrate and the second insulating substrate can be different. Therefore, the amount of heat generation of the connection member between the first insulating substrate and the second insulating substrate can be reduced.
- FIG. 1 is a perspective view illustrating a semiconductor device according to the first embodiment.
- FIG. 2 is a top view illustrating the semiconductor device according to the first embodiment.
- FIG. 3 is a cross-sectional view illustrating a relationship between a heat dissipation plate, a first insulating substrate, and a second insulating substrate in the semiconductor device according to the first embodiment.
- FIG. 3 corresponds to a cross-sectional view taken along line in FIG. 2 .
- the semiconductor device 1 mainly includes a heat dissipation plate 2 , a case 9 , a P terminal 3 , an N terminal 4 , a first O terminal 5 , and a second O terminal 6 .
- the P terminal 3 is a power supply terminal on the positive electrode side
- the N terminal 4 is a power supply terminal on the negative electrode side
- the first O terminal 5 and the second O terminal 6 are output terminals.
- the P terminal 3 , the N terminal 4 , and the first O terminal 5 and the second O terminal 6 are assembled in the case 9 .
- a first gate terminal 131 , a first sense source terminal 132 , a sense drain terminal 133 , a second gate terminal 231 , a second sense source terminal 232 , a first thermistor terminal 331 , and a second thermistor terminal 332 are further assembled in the case 9 .
- the X1-X2 direction, the Y1-Y2 direction, and the Z1-Z2 direction are directions orthogonal to each other.
- a plane including the X1-X2 direction and the Y1-Y2 direction is defined as the XY plane
- a plane including the Y1-Y2 direction and the Z1-Z2 direction is defined as the YZ plane
- a plane including the Z1-Z2 direction and the X1-X2 direction is defined as the ZX plane.
- the Z1 direction is defined as an upward direction
- the Z2 direction is defined as a downward direction.
- plan view refers to viewing an object from the Z1 side.
- the X1-X2 direction is a direction along the long side of the heat dissipation plate 2 and the case 9 that have rectangular shapes in plan view
- the Y1-Y2 direction is a direction along the short side of the heat dissipation plate 2 and the case 9
- the Z1-Z2 direction is a direction along the normal to the heat dissipation plate 2 and the case 9 .
- the heat dissipation plate 2 is, for example, a plate body having a uniform thickness and a rectangular shape in plan view.
- the heat dissipation plate 2 has a first main surface 2 A and a second main surface 2 B opposite to the first main surface 2 A.
- the material of the heat dissipation plate 2 is metal, which is a material having a high thermal conductivity, such as copper (Cu), a copper alloy, aluminum (Al), or the like.
- the heat dissipation plate 2 is fixed to a cooler or the like by using a thermal interface material (TIM) or the like.
- TIM thermal interface material
- the case 9 is formed in a frame shape in plan view, for example, and the outer shape of the case 9 is substantially the same as the outer shape of the heat dissipation plate 2 .
- the material of the case 9 is an insulator such as resin or the like.
- the case 9 has a pair of side walls 91 and 92 facing each other, and a pair of end walls 93 and 94 connecting both ends of the side walls 91 and 92 .
- the side walls 91 and 92 are arranged in parallel to the ZX plane, and the end walls 93 and 94 are arranged in parallel to the YZ plane.
- the side wall 92 is disposed on the Y2 side from the side wall 91
- the end wall 94 is disposed on the X2 side from the end wall 93
- the case 9 includes a terminal block 95 projecting from the end wall 93 in the X1 direction and a terminal block 96 projecting from the end wall 94 in the X2 direction.
- the P terminal 3 and the N terminal 4 are arranged on the upper surface (the surface on the Z1 side) of the terminal block 95 , and the first O terminal 5 and the second O terminal 6 are arranged on the upper surface (the surface on the Z1 side) of the terminal block 96 .
- the N terminal 4 is disposed on the Y2 side from the P terminal 3
- the second O terminal 6 is disposed on the Y2 side from the first O terminal 5 .
- the P terminal 3 , the N terminal 4 , the first O terminal 5 , and the second O terminal 6 are formed of metal plates.
- each of the P terminal 3 and the N terminal 4 is exposed on the X2 side of the end wall 93 , and the other end of each of the P terminal 3 and the N terminal 4 is drawn to the upper surface of the terminal block 95 .
- One end of each of the first O terminal 5 and the second O terminal 6 is exposed on the X1 side of the end wall 94 , and the other end of each of the first O terminal 5 and the second O terminal 6 is drawn to the upper surface of the terminal block 96 .
- the first gate terminal 131 , the first sense source terminal 132 , the sense drain terminal 133 , the first thermistor terminal 331 , and the second thermistor terminal 332 are attached to the side wall 91 .
- One end of each of the first gate terminal 131 , the first sense source terminal 132 , the sense drain terminal 133 , the first thermistor terminal 331 , and the second thermistor terminal 332 is exposed on the Y2 side of the side wall 91 , and the other end thereof projects from the upper surface (the surface on the Z1 side) of the side wall 91 to the outside (the Z1 side) of the case 9 .
- the sense drain terminal 133 is disposed in the vicinity of the end of the side wall 91 on the X2 side.
- the first thermistor terminal 331 and the second thermistor terminal 332 are disposed in the vicinity of the end of the side wall 91 on the X1 side.
- the second thermistor terminal 332 is disposed on the X1 side from the first thermistor terminal 331 .
- the first gate terminal 131 and the first sense source terminal 132 are disposed in the vicinity of the center of the side wall 91 in the X1-X2 direction and on the X2 side from the center in the X1-X2 direction.
- the first sense source terminal 132 is disposed on the X2 side from the first gate terminal 131 .
- the second gate terminal 231 and the second sense source terminal 232 are attached to the side wall 92 .
- One end of each of the second gate terminal 231 and the second sense source terminal 232 is exposed on the Y1 side of the side wall 92 , and the other end thereof projects from the upper surface (the surface on the Z1 side) of the side wall 92 to the outside (the Z1 side) of the case 9 .
- the second gate terminal 231 and the second sense source terminal 232 are disposed in the vicinity of the center of the side wall 92 in the X1-X2 direction and on the X1 side from the center in the X1-X2 direction.
- the second sense source terminal 232 is disposed on the X1 side from the second gate terminal 231 .
- a first insulating substrate 10 and a second insulating substrate 20 are disposed on the Z1 side of the heat dissipation plate 2 . That is, the first insulating substrate 10 and the second insulating substrate 20 are disposed on the first main surface 2 A of the heat dissipation plate 2 .
- the second insulating substrate 20 is disposed on the X1 side from the first insulating substrate 10 .
- the first insulating substrate 10 includes conductive layers 11 , 12 , 13 , 14 , and 18 on the Z1 side surface, and a conductive layer 19 on the Z2 side surface.
- the conductive layer 19 is bonded to the heat dissipation plate 2 by a bonding material 7 such as solder or the like.
- Multiple first transistors 110 for example, four first transistors 110 are implemented on the conductive layer 13 .
- the four first transistors 110 are arranged in the X1-X2 direction.
- the four first transistors 110 constitute a first transistor group 110 A.
- Multiple second diodes 220 for example, eight second diodes 220 are implemented on the conductive layer 12 .
- the eight second diodes 220 are arranged in two rows, four each in the X1-X2 direction.
- the eight second diodes 220 constitute a second diode group 220 A.
- the conductive layer 13 is an example of the first conductor
- the conductive layer 12 is an example of the second conductor and a seventh conductor
- the conductive layer 14 is an example of the eighth conductor.
- the second conductor and the seventh conductor are formed by the integrated conductive layer 12 .
- a conductive layer forming the second conductor and a conductive layer forming the seventh conductor may be constituted by different conductive lavers and connected to each other. That is, the present disclosure is not limited to the configuration in which the second conductor and the seventh conductor are integrated into the conductive layer 12 .
- the second insulating substrate 20 includes conductive layers 21 , 22 , 23 , 24 , 25 , 26 , 27 , and 28 on the Z1 side surface, and a conductive layer 29 on the Z2 side surface.
- the conductive layer 29 is bonded to the heat dissipation plate 2 by a bonding material 8 such as solder or the like.
- Multiple second transistors 21 C for example, four second transistors 210 are implemented on the conductive layer 23 .
- the four second transistors 210 are arranged in the X1-X2 direction.
- the four second transistors 210 constitute a second transistor group 210 A.
- Multiple first diodes 120 for example, eight first diodes 120 are implemented on the conductive layer 25 .
- the eight first diodes 120 are arranged in two rows, four each in the X1-X2 direction.
- the eight first diodes 120 constitute a first diode group 120 A.
- the conductive layer 25 is an example of the third conductor
- the conductive layer 24 is an example of the fourth conductor
- the conductive layer 23 is an example of the fifth conductor
- the conductive layer 22 is an example of the sixth conductor.
- FIG. 4 is a cross-sectional view illustrating the first transistor.
- FIG. 5 is a cross-sectional view illustrating the first diode.
- FIG. 6 is a cross-sectional view illustrating the second transistor.
- FIG. 7 is a cross-sectional view illustrating the second diode.
- the first transistor 110 includes a first gate electrode 111 , a first source electrode 112 , and a first drain electrode 113 .
- the first gate electrode 111 and the first source electrode 112 are disposed on the Z1 side main surface of the first transistor 110
- the first drain electrode 113 is disposed on the Z2 side main surface of the first transistor 110 .
- the first drain electrode 113 is bonded to the conductive layer 13 by a bonding material (not illustrated) such as solder or the like.
- the first drain electrode 113 is an example of the first electrode
- the first source electrode 112 is an example of the second electrode.
- the first diode 120 includes a first anode electrode 121 and a first cathode electrode 122 .
- the first anode electrode 121 is disposed on the Z1 side main surface of the first diode 120
- the first cathode electrode 122 is disposed on the Z2 side main surface of the first diode 120 .
- the first cathode electrode 122 is bonded to the conductive layer 25 by a bonding material (not illustrated) such as solder or the like.
- the second transistor 210 includes a second gate electrode 211 , a second source electrode 212 , and a second drain electrode 213 .
- the second gate electrode 211 and the second source electrode 212 are disposed on the Z1 side main surface the second transistor 210
- the second drain electrode 213 is disposed on the Z2 side main surface of the second transistor 210 .
- the second drain electrode 213 is bonded to the conductive layer 23 by a bonding material (not illustrated) such as solder or the like.
- the second drain electrode 213 is an example of the third electrode
- the second source electrode 212 is an example of the fourth electrode.
- the second diode 220 includes a second anode electrode 221 and a second cathode electrode 222 .
- the second anode electrode 221 is disposed on the Z1 side main surface of the second diode 220
- the second cathode electrode 222 is disposed on the Z2 side main surface of the second diode 220 .
- the second cathode electrode 222 is bonded to the conductive layer 12 by a bonding material (not illustrated) such as solder or the like.
- the semiconductor device 1 includes multiple wires 31 , multiple wires 32 , multiple wires 41 , and multiple wires 42 .
- the wires 31 connect the conductive layer 13 provided on the first insulating substrate 10 to the conductive layer 25 provided on the second insulating substrate 20 .
- the wires 32 connect the conductive layer 12 provided on the first insulating substrate 10 to the conductive layer 24 provided on the second insulating substrate 20 .
- the wires 41 connect the conductive layer 12 provided on the first insulating substrate 10 to the conductive layer 23 provided on the second insulating substrate 20 .
- the wires 42 connect the conductive layer 14 provided on the first insulating substrate 10 to the conductive layer 22 provided on the second insulating substrate 20 .
- the wire 31 is an example of the first connection member
- the wire 32 is an example of the second connection member
- the wire 41 is an example of the fifth connection member
- the wire 42 is an example of the sixth connection member.
- the semiconductor device 1 includes multiple wires 51 , multiple wires 52 , multiple wires 53 , multiple wires 54 , and multiple wires 55 .
- the wire 51 connects the first gate electrode 111 provided in each of the four first transistors 110 to the conductive layer 11 provided on the first insulating substrate 10 .
- the wire 52 connects the first source electrode 112 provided in each of the four first transistors 110 to the conductive layer 12 provided on the first insulating substrate 10 .
- the wire 53 connects a first sense source electrode (not illustrated) provided in each of the four first transistors 110 to the conductive layer 18 provided on the first insulating substrate 10 .
- the wire 54 connects the second anode electrode 221 provided in each of the four second diodes 220 disposed on the Y1 side among the eight second diodes 220 to the conductive layer 14 provided on the first insulating substrate 10 .
- the wire 55 connects the second anode electrode 221 provided in each of the four second diodes 220 disposed on the Y1 side among the eight second diodes 220 to the second anode electrode 221 provided in each of the four second diodes 220 disposed on the Y2 side.
- the wire 52 is an example of the third connection member
- the wire 54 is an example of the eighth connection member.
- the semiconductor device 1 includes a wire 61 , multiple wires 62 , multiple wires 63 , a wire 64 , and a wire 65 .
- the wire 61 connects the conductive layer 11 provided on the first insulating substrate 10 to the first gate terminal 131 .
- the wires 62 connect the conductive layer 12 provided on the first insulating substrate 10 to the first O terminal 5 .
- the wires 63 connect the conductive layer 12 provided on the first insulating substrate 10 to the second O terminal 6 .
- the wire 64 connects the conductive layer 13 provided on the first insulating substrate 10 to the sense drain terminal 133 .
- the wire 65 connects the conductive layer 18 provided on the first insulating substrate 10 to the first sense source terminal 132 .
- the semiconductor device 1 includes multiple wires 71 , multiple wires 72 , multiple wires 73 , multiple wires 74 , and multiple wires 75 .
- the wire 71 connects the second gate electrode 211 provided in each of the four second transistors 210 to the conductive layer 21 provided on the second insulating substrate 20 .
- the wire 72 connects the second source electrode 212 provided in each of the four second transistors 210 to the conductive layer 22 provided on the second insulating substrate 20 .
- the wire 73 connects the second sense source electrode (not illustrated) provided in each of the four second transistors 210 to the conductive layer 28 provided on the second insulating substrate 20 .
- the wire 74 connects the first anode electrode 121 provided in each of the four first diodes 120 disposed on the Y2 side among the eight first diodes 120 to the conductive layer 24 provided on the second insulating substrate 20 .
- the wire 75 connects the first anode electrode 121 provided in each of the four first diodes 120 disposed on the Y2 side among the eight first diodes 120 to the first anode electrode 121 provided in the four first diodes 120 disposed on the Y1 side.
- the wire 74 is an example of the fourth connection member
- the wire 72 is an example of the seventh connection member.
- the semiconductor device 1 includes a wire 81 , multiple wires 82 , multiple wires 83 , a wire 85 , a wire 86 , and a wire 87 .
- the wire 81 connects the conductive layer 21 provided on the second insulating substrate 20 to the second gate terminal 231 .
- the wire 82 connects the conductive layer 22 provided on the second insulating substrate 20 to the N terminal 4 .
- the wire 83 connects the conductive layer 25 provided on the second insulating substrate 20 to the P terminal 3 .
- the wire 85 connects the conductive layer 28 provided on the second insulating substrate 20 to the second sense source terminal 232 .
- the wire 86 connects the conductive layer 26 provided on the second insulating substrate 20 to the first thermistor terminal 331 .
- the wire 87 connects the conductive layer 27 provided on the second insulating substrate 20 to the second thermistor terminal 332 .
- the semiconductor device 1 includes a thermistor 330 connected to the
- FIG. 8 is a circuit diagram illustrating the semiconductor device according to the first embodiment.
- the first cathode electrode 122 of the first diode 120 is connected to the P terminal 3 via the wire 83 and the conductive layer 25 . Additionally, the first drain electrode 113 of the first transistor 110 is connected to the P terminal 3 via the wire 83 , the conductive layer 25 , the wire 31 , and the conductive layer 13 .
- the conductive layer 12 is connected to the first O terminal 5 via the wire 62 and is connected to the second O terminal 6 via the wire 63 .
- the first source electrode 112 of the first transistor 110 is connected to the conductive layer 12 via the wire 52 . Additionally, the first anode electrode 121 of the first diode is connected to the conductive layer 12 via the wire 32 , the conductive layer 24 , and the wires 74 and 75 .
- the first gate electrode 111 of the first transistor 110 is connected to the first gate terminal 131 via the wire 61 , the conductive layer 11 , and the wire 51 .
- the first sense source electrode of the first transistor 110 is connected to the first sense source terminal 132 via the wire 65 , the conductive layer 18 , and the wire 53 .
- the first drain electrode 113 of the first transistor 110 is connected to the sense drain terminal 133 via the wire 64 and the conductive layer 13 .
- the first gate electrode 111 is an example of the first control electrode, and the first gate terminal 131 is an example of the first control terminal.
- the second source electrode 212 of the second transistor 210 is connected to the N terminal 4 via the wire 82 , the conductive layer 22 , and the wire 72 . Additionally, the second anode electrode 221 of the second diode 220 is connected to the N terminal 4 via the wire 82 , the conductive layer 22 , the wire 42 , and the wires 54 and 55 . The second cathode electrode 222 of the second transistor 210 is connected to the conductive layer 12 . Additionally, the second drain electrode 213 of the second transistor 210 is connected to the conductive layer 12 via the wire 41 and the conductive layer 23 .
- the second gate electrode 211 of the second transistor 210 is connected to the second gate terminal 231 via the wire 81 , the conductive layer 21 , and the wire 71 .
- the second sense source electrode of the second transistor 210 is connected to the second sense source terminal 232 via the wire 85 , the conductive layer 28 , and the wire 73 .
- One electrode of the thermistor 330 is connected to the first thermistor terminal 331 via the wire 86 and the conductive layer 26 .
- the other electrode of the thermistor 330 is connected to the second thermistor terminal 332 via the wire 87 and the conductive layer 27 .
- the second gate electrode 211 is an example of the second control electrode
- the second gate terminal 231 is an example of the second control terminal.
- the first drain electrode 113 of the first transistor 110 and the first cathode electrode 122 of the first diode 120 are connected to the P terminal 3 in common, and the first source electrode 112 and the first anode electrode 121 are connected to the first O terminal 5 and the second O terminal 6 in common. That is, the first transistor 110 and the first diode 120 are connected in parallel between the P terminal 3 ; and the first O terminal 5 and the second O terminal 6 .
- the second drain electrode 213 of the second transistor 210 and the second cathode electrode 222 of the second diode 220 are connected to the first O terminal 5 and the second O terminal 6 in common, and the second source electrode 212 and the second anode electrode 221 are connected to the N terminal 4 in common. That is, the second transistor 210 and the second diode 220 are connected in parallel between the N terminal 4 ; and the first O terminal 5 and the second O terminal 6 .
- An upper arm 100 includes the first transistor 110 (the first transistor group 110 A) and the first diode 120 (the first diode group 120 A).
- a lower arm 200 includes the second transistor 210 (the second transistor group 210 A) and the second diode 220 (the second diode group 220 A).
- the upper arm 100 and the lower arm 200 are connected in series between the P terminal 3 and the N terminal 4 .
- the upper arm 100 is an example of the first arm
- the lower arm 200 is an example of the second arm.
- the multiple first transistors 110 included in the upper arm 100 may be provided only on the first insulating substrate 10 , and the multiple first diodes 120 included in the upper arm 100 may be provided only on the second insulating substrate 20 . Additionally, the multiple second transistors 210 included in the lower arm 200 may be provided only on the second insulating substrate 20 , and the multiple second diodes 220 included in the lower arm 200 may be provided only on the first insulating substrate 10 .
- FIGS. 9 to 12 are schematic views illustrating the operation of the semiconductor device according to the first embodiment.
- FIG. 9 illustrates a path of the current I 1 flowing from the P terminal 3 to the first O terminal 5 and the second O terminal 6 .
- the current I 1 flows from the P terminal 3 to the first O terminal 5 and the second O terminal 6 via the wire 83 , the conductive layer 25 , the wire 31 , the conductive layer 13 , the first transistor group 110 A, the wire 52 , the conductive layer 12 , and the wires 62 and 63 .
- FIG. 10 illustrates a path of the current I 2 flowing from the first O terminal 5 and the second O terminal 6 to the P terminal 3 .
- the current I 2 flows from the first O terminal 5 and the second O terminal 6 to the P terminal 3 via the wires 62 and 63 , the conductive layer 12 , the wire 32 , the conductive layer 24 , the wires 74 and 75 , the first diode group 120 A, the conductive layer 25 , and the wire 83 .
- the current I 1 flowing from the P terminal 3 to the first O terminal 5 and the second O terminal 6 flows through the wire 31 but does not flow through the wire 32 .
- the current I 2 flowing from the first O terminal 5 and the second O terminal 6 to the P terminal 3 flows through the wire 32 , but does not flow through the wire 31 .
- FIG. 11 illustrates a path of the current I 3 flowing from the N terminal 4 to the first O terminal 5 and the second O terminal 6 .
- the current I 3 flows from the N terminal 4 to the first O terminal 5 and the second O terminal 6 via the wire 82 , the conductive layer 22 , the wire 72 , the second transistor group 210 A, the conductive layer 23 , the wire 41 , the conductive layer 12 , and the wires 62 and 63 .
- FIG. 12 illustrates a path of the current I 4 flowing from the first O terminal 5 and the second O terminal 6 to the N terminal 4 .
- the current I 4 flows from the first O terminal 5 and the second O terminal 6 to the N terminal 4 via the wires 62 and 63 , the conductive layer 12 , the second diode group 220 A, the wires 54 and 55 , the conductive layer 14 , the wire 42 , the conductive layer 22 , and the wire 82 .
- the current I 3 flowing from the N terminal 4 to the first O terminal 5 and the second O terminal 6 flows through the wire 41 but does not flow through the wire 42 .
- the current I 4 flowing from the first C terminal 5 and the second O terminal 6 to the N terminal 4 flows through the wire 42 but does not flow through the wire 41 .
- the first transistor 110 and the first diode 120 are included in the upper arm 100 , the first transistor 110 is provided on the first insulating substrate 10 , and the first diode 120 is provided on the second insulating substrate 20 .
- the first transistor 110 is provided on the first insulating substrate 10
- the first diode 120 is provided on the second insulating substrate 20 .
- the second transistor 210 and the second diode 220 are included in the lower arm 200 , and the second transistor 210 is provided on the second insulating substrate 20 , and the second diode 220 is provided on the first insulating substrate 10 .
- wires through which the current I 3 and the current I 4 pass are different in the wires 41 and 42 . Therefore, the amount of heat generation in the wires 41 and 42 can be reduced in comparison with the case where the current flowing between the first insulating substrate 10 and the second insulating substrate 20 passes through the same connection member.
- the wires 31 , 32 , 41 , and 42 are used for the connection between the first insulating substrate 10 and the second insulating substrate 20 , it is easy to connect the first insulating substrate 10 to the second insulating substrate 20 . That is, it is easy to connect the conductive layer 13 to the conductive layer 25 , it is easy to connect the conductive layer 12 to the conductive layer 24 , it is easy to connect the conductive layer 14 to the conductive layer 22 , and it is easy to connect the conductive layer 12 to the conductive layer 23 .
- a metal plate such as a bus bar or the like may be used. In this case, a larger current easily flows.
- the wire 52 is used for the connection between the first source electrode 112 and the conductive layer 12
- the wire 74 is used for the connection between the first anode electrode 121 and the conductive layer 24
- the wire 72 is used for the connection between the second source electrode 212 and the conductive layer 22 and the wire 54 is used for the connection between the second anode electrode 221 and the conductive layer 14 , it is easy to connect the second source electrode 212 to the conductive layer 22 and it is easy to connect the second anode electrode 221 to the conductive layer 14 .
- the first transistor 110 is disposed between the first gate terminal 131 and the second diode 220 in plan view. That is, the first transistor 110 of the upper arm 100 is disposed closer to the first gate terminal 131 than the second diode 220 of the lower arm 200 . Thus, it is easy to reduce the inductance of the gate loop of the first transistor 110 .
- the second transistor 210 is disposed between the second gate terminal 231 and the first diode 120 in plan view. That is, the second transistor 210 of the lower arm 200 is disposed closer to the second gate terminal 231 than the first diode 120 of the upper arm 100 . Thus, it is easy to reduce the inductance of the gate loop of the second transistor 210 .
- first gate electrodes 111 of the multiple first transistors 110 are connected to the first gate terminal 131 , and the multiple first transistors 110 are disposed between the first gate terminal 131 and the second diode 220 .
- second gate electrodes 211 of the multiple second transistors 210 are connected to the second gate terminal 231 , and the multiple second transistors 210 are disposed between the second gate terminal 231 and the first diode 120 .
- the first transistor 110 and the second transistor 210 each may be a field effect transistor such as a metal-oxide-semiconductor (MOS) field effect transistor formed using silicon carbide, or the like.
- the first diode 120 and the second diode 220 each may be a Schottky barrier diode formed using silicon carbide. By using silicon carbide, excellent breakdown voltage can be obtained.
- the second main surface 2 B of the heat dissipation plate 2 is preferably curved in a convex shape. This is because good heat transfer efficiency can be easily obtained by bringing the heat dissipation plate 2 into close contact with a cooler or the like by using TIM or the like.
- FIG. 14 is a schematic view illustrating a configuration of a first insulating substrate and a second insulating substrate in a semiconductor device according to the second embodiment.
- the first insulating substrate 10 includes a third insulating substrate 10 A and a fourth insulating substrate 10 B
- the second insulating substrate 20 includes a fifth insulating substrate 20 A and a sixth insulating substrate 20 B.
- the fourth insulating substrate 10 B is disposed on the X1 side from the third insulating substrate 10 A
- the sixth insulating substrate 20 B is disposed on the X2 side from the fifth insulating substrate 20 A.
- the third insulating substrate 10 A includes conductive layers 11 A, 12 A, 13 A, 14 A, and 18 A on the Z1 side surface, and includes a conductive layer (not illustrated) on the Z2 side surface.
- the conductive layer provided on the Z2 side surface is bonded to the heat dissipation plate 2 by the bonding material 7 such as solder or the like, similarly as the conductive layer 19 .
- Multiple first transistors 110 for example, two first transistors 110 are implemented on the conductive layer 13 A.
- the two first transistors 110 are arranged in the X1-X2 direction.
- Multiple second diodes 220 for example, four second diodes 220 are implemented on the conductive layer 12 A.
- the four second diodes 220 are arranged in two rows, two each in the X1-X2 direction.
- the fourth insulating substrate 10 B includes conductive layers 11 B, 12 B, 120 , 13 B, 14 B, and 18 B on the Z1 side surface, and includes a conductive layer (not illustrated) on the Z2 side surface.
- the conductive layer provided on the Z2 side surface is bonded to the heat dissipation plate 2 by the bonding material 7 such as solder or the like, similarly as the conductive layer 19 .
- Multiple first transistors 110 for example, two first transistors 110 are implemented on the conductive layer 13 B.
- the two first transistors 110 are arranged in the X1-X2 direction.
- Multiple second diodes 220 for example, four second diodes 220 are implemented on the conductive layer 12 C.
- the four second diodes 220 are arranged in two rows, two each in the X1-X2 direction.
- Wire 411 , wire 412 , wire 413 , wire 414 , wire 415 , and wire 418 are provided.
- the wire 411 connects the conductive layer 11 A to the conductive layer 11 B.
- the wire 412 connects the conductive layer 12 A to the conductive layer 12 B.
- the wire 413 connects the conductive layer 13 A to the conductive layer 13 B.
- the wire 414 connects the conductive layer 14 A to the conductive layer 14 B.
- the wire 415 connects the conductive layer 12 A to the conductive layer 12 C.
- the wire 418 connects the conductive layer 18 A to the conductive layer 18 B.
- the conductive layers 11 A and 11 B are part of the conductive layer 11 .
- the conductive layers 12 A, 12 B, and 12 C are part of the conductive layer 12 .
- the conductive layers 13 A and 13 B are part of the conductive layer 13 .
- the conductive layers 14 A and 14 B are part of the conductive layer 14 .
- the conductive layers 18 A and 18 B are part of the conductive layer 18 .
- the fifth insulating substrate 20 A includes conductive layers 21 A, 22 A, 23 A, 24 A, 25 A, and 28 A on the Z1 side surface, and includes a conductive layer (not illustrated) on the Z2 side surface.
- the conductive layer provided on the Z2 side surface is bonded to the heat dissipation plate 2 by the bonding material 8 such as solder or the like, similarly as the conductive layer 29 .
- Multiple second transistors 210 for example, two second transistors 210 are implemented on the conductive layer 23 A.
- the two second transistors 210 are arranged in the X1-X2 direction.
- Multiple first diodes 120 for example, four first diodes 120 are implemented on the conductive layer 25 A.
- the four first diodes 120 are arranged in two rows, two each in the X1-X2 direction.
- the sixth insulating substrate 20 B includes conductive layers 21 B, 22 B, 23 B, 24 B, 25 B, and 28 B on the Z1 side surface, and includes a conductive layer (not illustrated) on the Z2 side surface.
- the conductive layer provided on the Z2 side surface is bonded to the heat dissipation plate 2 by the bonding material 8 such as solder or the like, similarly as the conductive layer 29 .
- Multiple second transistors 210 for example, two second transistors 210 are implemented on the conductive layer 23 B.
- the two second transistors 210 are arranged in the X1-X2 direction.
- Multiple first diodes 120 for example, four first diodes 120 are implemented on the conductive layer 25 B.
- the four first diodes 120 are arranged in two rows, two each in the X1-X2 direction.
- Wire 421 , wire 422 , wire 423 , wire 424 , wire 425 , and wire 428 are provided.
- the wire 421 connects the conductive layer 21 A to the conductive layer 21 B.
- the wire 422 connects the conductive layer 22 A to the conductive layer 22 B.
- the wire 423 connects the conductive layer 23 A to the conductive layer 23 B.
- the wire 424 connects the conductive layer 24 A to the conductive layer 24 B.
- the wire 425 connects the conductive layer 25 A to the conductive layer 25 B.
- the wire 428 connects the conductive layer 28 A to the conductive layer 28 B.
- the conductive layers 21 A and 21 B are part of the conductive layer 21 .
- the conductive layers 22 A and 22 B are part of the conductive layer 22 .
- the conductive layers 23 A and 23 B are part of the conductive layer 23 .
- the conductive layers 24 A and 24 B are part of the conductive layer 24 .
- the conductive layers 25 A and 25 B are part of the conductive layer 25 .
- the conductive layers 18 A and 18 B are part of the conductive layer 18 .
- substantially the same effect as that of the first embodiment can also be obtained.
- the first insulating substrate 10 includes the third insulating substrate 10 A and the fourth insulating substrate 10 B
- the second insulating substrate 20 includes the fifth insulating substrate 20 A and the sixth insulating substrate 20 B, it is easy to bring the fifth insulating substrate 20 A and the sixth insulating substrate 20 B into closer contact with the first main surface 2 A of the heat dissipation plate 2 .
Abstract
A semiconductor device includes a first insulating substrate, a second insulating substrate, a first transistor provided on the first insulating substrate, and a first diode provided on the second insulating substrate and connected in parallel to the first transistor.
Description
- The present disclosure relates to a semiconductor device.
- This application is based on and claims priority to Japanese Patent Application No. 2020-157444 filed on Sep. 18, 2020, the entire contents of which are incorporated herein by reference.
- As a semiconductor device used in a power module, a semiconductor device, in which two insulating substrates are provided on a heat dissipation plate, a transistor and a diode of an upper arm are disposed on one substrate of the insulating substrates, and a transistor and a diode of a lower arm are disposed on the other substrate of the insulating substrates, is proposed (Patent Document 1).
- [Patent Document 1] Japanese Unexamined Patent Application Publication No. 2015-154079
- A semiconductor device of the present disclosure includes a first insulating substrate, a second insulating substrate, a first transistor provided on the first insulating substrate, and a first diode provided on the second insulating substrate, the first diode being connected in parallel to the first transistor.
-
FIG. 1 is a perspective view illustrating a semiconductor device according to a first embodiment. -
FIG. 2 is a top view illustrating the semiconductor device according to the first embodiment. -
FIG. 3 is a cross-sectional view illustrating a relationship between a heat dissipation plate, a first insulating substrate, and a second insulating substrate in the semiconductor device according to the first embodiment. -
FIG. 4 is a cross-sectional view illustrating a first transistor. -
FIG. 5 is a cross-sectional view illustrating a first diode. -
FIG. 6 is a cross-sectional view illustrating a second transistor. -
FIG. 7 is a cross-sectional view illustrating a second diode. -
FIG. 8 is a circuit diagram illustrating the semiconductor device according to the first embodiment. -
FIG. 9 is a schematic diagram (1) illustrating an operation of the semiconductor device according to the first embodiment. -
FIG. 10 is a schematic diagram (2) illustrating the operation of the semiconductor device according to the first embodiment. -
FIG. 11 is a schematic view (3) illustrating the operation of the semiconductor device according to the first embodiment. -
FIG. 12 is a schematic view (4) illustrating the operation of the semiconductor device according to the first embodiment. -
FIG. 13 is a cross-sectional view illustrating a modified example of the heat dissipation plate. -
FIG. 14 is a schematic view illustrating a configuration of a first insulating substrate and a second insulating substrate in a semiconductor device according to a second embodiment. - In a semiconductor device in the related art that includes two insulating substrates, the amount of heat generation of a connection member such as a wire connecting the insulating substrates may become excessive.
- It is an object of the present disclosure to provide a semiconductor device that can reduce the amount of heat generation of a connection member between insulating substrates.
- According to the present disclosure, the amount of heat generation of the connection member between the insulating substrates can be reduced.
- Embodiments will be described below.
- First, the embodiments of the present disclosure will be listed and described. In the following description, identical or corresponding elements are referenced by the same reference signs and description thereof will not be repeated.
-
- [1] A semiconductor device according to one aspect of the present disclosure includes a first insulating substrate, a second insulating substrate, a first transistor provided on the first insulating substrate, and a first diode provided on the second insulating substrate and connected in parallel to the first transistor.
- In the semiconductor device described in
Patent Document 1, a wire is provided between two insulating substrates, and a current flowing from a DC voltage load terminal element to an AC voltage load terminal element and a current flowing from the AC voltage load terminal element to the DC voltage load terminal element pass through the wire. That is, the currents flow in two directions through the wire between the insulating substrates. Thus, there is a possibility that a current frequently flows through the wire, and the amount of heat generation becomes excessive, and the wire may become melted and cut. With respect to the above, in the semiconductor device according to the one aspect of the present disclosure, because the first transistor is provided on the first insulating substrate and the first diode is provided on the second insulating substrate, paths of the currents flowing between the first insulating substrate and the second insulating substrate can be different. Therefore, the amount of heat generation of the connection member between the first insulating substrate and the second insulating substrate can be reduced. -
- [2] In [1], a first arm including the first transistor and the first diode may be included. In this case, the first transistor and the first diode included in the first arm are provided on the insulating substrates different from each other.
- [3] In [1] or [2], a first conductor provided on the first insulating substrate and connected to a first electrode of the first transistor, a second conductor provided on the first insulating substrate and connected to a second electrode of the first transistor, a third conductor provided on the second insulating substrate and connected to a first cathode electrode of the first diode, a fourth conductor provided on the second insulating substrate and connected to a first anode electrode of the first diode, a first connection member connecting the first conductor to the third conductor, and a second connection member connecting the second conductor to the fourth conductor may be included. In this case, the amount of heat generation of the first connection member and the second connection member can be reduced.
- [4] In [3], the first connection member and the second connection member may be wires. In this case, it is easy to connect the first conductor to the third conductor, and it is easy to connect the second conductor to the fourth conductor.
- [5] In [3], the first connection member and the second connection member may be metal plates. In this case, a larger current easily flows between the first conductor and the third conductor, and a larger current easily flows between the second conductor and the fourth conductor.
- [6] In [3] to [5], a third connection member connecting the second electrode to the second conductor, and a fourth connection member connecting the first anode electrode to the fourth conductor may be included. The third connection member and the fourth connection member may be wires. In this case, it is easy to connect the second electrode to the second conductor, and it is easy to connect the first anode electrode to the fourth conductor.
- [7] In [1] to [6], a second transistor provided on the second insulating substrate and a second diode provided on the first insulating substrate and connected in parallel to the second transistor may be included, and the second transistor and the second diode may be connected in series to the first transistor and the first diode. In this case, because the second transistor is provided on the second insulating substrate and the second diode is provided on the first insulating substrate, paths of the currents flowing between the first insulating substrate and the second insulating substrate can be different. Therefore, the amount of heat generation of the connection members between the first insulating substrate and the second insulating substrate can be reduced.
- [8] In [7], a second arm including the second transistor and the second diode may be included. In this case, the second transistor and the second diode included in the second arm are provided on the insulating substrates different from each other.
- [9] In [7] or [8], a fifth conductor provided on the second insulating substrate and connected to the third electrode of the second transistor, a sixth conductor provided on the second insulating substrate and connected to the fourth electrode of the second transistor, a seventh conductor provided on the first insulating substrate and connected to the second cathode electrode of the second diode, an eighth conductor provided on the first insulating substrate and connected to the second anode electrode of the second diode, a fifth connection member connecting the fifth conductor and the seventh conductor, and a sixth connection member connecting the sixth conductor and the eighth conductor may be included. In this case, the amount of heat generation of the fifth connection member and the sixth connection member can be reduced.
- [10] In [9], the fifth connection member and the sixth connection member may be wires. In this case, it is easy to connect the fifth conductor to the seventh conductor, and it is easy to connect the sixth conductor to the eighth conductor.
- [11] In [9], the fifth connection member and the sixth connection member may be metal plates. In this case, a larger current easily flows between the fifth conductor and the seventh conductor, and a larger current easily flows between the sixth conductor and the eighth conductor.
- [12] In [9] to [11], a seventh connection member connecting the fourth electrode to the sixth conductor, and an eighth connection member connecting the second anode electrode to the eighth conductor may be included. Additionally, the seventh connection member and the eighth connection member may be wires. It is easy to connect the fourth electrode to the sixth conductor, and it is easy to connect the second anode electrode to the eighth conductor.
- [13] In [7] to [12], a first control terminal connected to a first control electrode of the first transistor and a second control terminal connected to a second control electrode of the second transistor may be included. In plan view, the first transistor may be disposed between the first control terminal and the second diode, and the second transistor may be disposed between the second control terminal and the first diode. In this case, paths from the control terminals to the gate of the transistor are shortened, and the inductance of the gate loop can be reduced. Therefore, a malfunction of the module can be suppressed.
- [14] In [13], multiple first transistors may be included, the first control electrodes of the multiple first transistors may be connected to the first control terminal, multiple second transistors may be included, the second control electrodes of the multiple second transistors may be connected to the second control terminal, the multiple first transistors may be disposed between the first control terminal and the second diode, and the multiple first transistors may be disposed between the second control terminal and the first diode. In this case, the multiple first transistors can be concentrated in the vicinity of the first control terminal, and the multiple second transistors can be concentrated in the vicinity of the second control terminal. Therefore, the difference in the inductance of the gate loop between the multiple first transistors and the difference in the inductance of the gate loop between the multiple second transistors are easily reduced. Therefore, a malfunction of the module can be suppressed.
- [15] In [14], multiple second diodes may be included, and the first insulating substrate may include a third insulating substrate on which one part of the multiple first transistors and one part of the multiple second diodes are disposed, and a fourth insulating substrate on which another part of the multiple first transistors and another part of the multiple second diodes are disposed. In this case, it is easy to bring the third insulating substrate and the fourth insulating substrate into close contact with the heat dissipation plate.
- [16] In [14] or [15], multiple first diodes may be included, and the second insulating substrate may include a fifth insulating substrate on which one part of the multiple second transistors and one part of the multiple first diodes are disposed, and a sixth insulating substrate on which another part of the multiple second transistors and another part of the multiple first diodes are disposed. In this case, it is easy to bring the fifth insulating substrate and the sixth insulating substrate into close contact with the heat dissipation plate.
- [17] In [7] to [16], the second transistor may be a field effect transistor formed using silicon carbide, and the second diode may be a Schottky barrier diode formed using silicon carbide. In this case, an excellent breakdown voltage is obtained in the second transistor and the second diode.
- [18] In [1] to [17], the first transistor may be a field effect transistor formed using silicon carbide, and the first diode may be a Schottky barrier diode formed using silicon carbide. In this case, an excellent breakdown voltage is obtained in the first transistor and the first diode.
- [19] In [1] to [18], a heat dissipation plate having a first main surface and a second main surface opposite to the first main surface may be included, the first insulating substrate and the second insulating substrate may be mounted on the first main surface, and the second main surface may be curved in a convex shape. In this case, the heat dissipation plate is brought into close contact with a cooler or the like by using a thermal interface material or the like, and good heat transfer efficiency is easily obtained.
- In the following, the embodiments of the present disclosure will be described in detail, but the embodiments are not limited thereto. Here, in the present specification and the drawings, constituent elements having substantially the same functional configuration are referenced by the same reference signs and description thereof may be omitted.
- First, a first embodiment will be described.
FIG. 1 is a perspective view illustrating a semiconductor device according to the first embodiment.FIG. 2 is a top view illustrating the semiconductor device according to the first embodiment. Here, inFIG. 2 , the drawing is illustrated with seeing through the case.FIG. 3 is a cross-sectional view illustrating a relationship between a heat dissipation plate, a first insulating substrate, and a second insulating substrate in the semiconductor device according to the first embodiment.FIG. 3 corresponds to a cross-sectional view taken along line inFIG. 2 . - The
semiconductor device 1 according to the first embodiment mainly includes aheat dissipation plate 2, acase 9, aP terminal 3, anN terminal 4, afirst O terminal 5, and asecond O terminal 6. TheP terminal 3 is a power supply terminal on the positive electrode side, theN terminal 4 is a power supply terminal on the negative electrode side, and thefirst O terminal 5 and thesecond O terminal 6 are output terminals. TheP terminal 3, theN terminal 4, and thefirst O terminal 5 and thesecond O terminal 6 are assembled in thecase 9. Afirst gate terminal 131, a firstsense source terminal 132, asense drain terminal 133, asecond gate terminal 231, a secondsense source terminal 232, afirst thermistor terminal 331, and asecond thermistor terminal 332 are further assembled in thecase 9. - In the present disclosure, the X1-X2 direction, the Y1-Y2 direction, and the Z1-Z2 direction are directions orthogonal to each other. A plane including the X1-X2 direction and the Y1-Y2 direction is defined as the XY plane, a plane including the Y1-Y2 direction and the Z1-Z2 direction is defined as the YZ plane, and a plane including the Z1-Z2 direction and the X1-X2 direction is defined as the ZX plane. For convenience, the Z1 direction is defined as an upward direction, and the Z2 direction is defined as a downward direction. Additionally, in the present disclosure, plan view refers to viewing an object from the Z1 side. The X1-X2 direction is a direction along the long side of the
heat dissipation plate 2 and thecase 9 that have rectangular shapes in plan view, the Y1-Y2 direction is a direction along the short side of theheat dissipation plate 2 and thecase 9, and the Z1-Z2 direction is a direction along the normal to theheat dissipation plate 2 and thecase 9. - The
heat dissipation plate 2 is, for example, a plate body having a uniform thickness and a rectangular shape in plan view. Theheat dissipation plate 2 has a firstmain surface 2A and a secondmain surface 2B opposite to the firstmain surface 2A. The material of theheat dissipation plate 2 is metal, which is a material having a high thermal conductivity, such as copper (Cu), a copper alloy, aluminum (Al), or the like. Theheat dissipation plate 2 is fixed to a cooler or the like by using a thermal interface material (TIM) or the like. - The
case 9 is formed in a frame shape in plan view, for example, and the outer shape of thecase 9 is substantially the same as the outer shape of theheat dissipation plate 2. The material of thecase 9 is an insulator such as resin or the like. Thecase 9 has a pair ofside walls end walls side walls side walls end walls side wall 92 is disposed on the Y2 side from theside wall 91, and theend wall 94 is disposed on the X2 side from theend wall 93. Thecase 9 includes aterminal block 95 projecting from theend wall 93 in the X1 direction and aterminal block 96 projecting from theend wall 94 in the X2 direction. - The
P terminal 3 and theN terminal 4 are arranged on the upper surface (the surface on the Z1 side) of theterminal block 95, and thefirst O terminal 5 and thesecond O terminal 6 are arranged on the upper surface (the surface on the Z1 side) of theterminal block 96. For example, theN terminal 4 is disposed on the Y2 side from theP terminal 3, and thesecond O terminal 6 is disposed on the Y2 side from thefirst O terminal 5. TheP terminal 3, theN terminal 4, thefirst O terminal 5, and thesecond O terminal 6 are formed of metal plates. One end of each of theP terminal 3 and theN terminal 4 is exposed on the X2 side of theend wall 93, and the other end of each of theP terminal 3 and theN terminal 4 is drawn to the upper surface of theterminal block 95. One end of each of thefirst O terminal 5 and thesecond O terminal 6 is exposed on the X1 side of theend wall 94, and the other end of each of thefirst O terminal 5 and thesecond O terminal 6 is drawn to the upper surface of theterminal block 96. - The
first gate terminal 131, the firstsense source terminal 132, thesense drain terminal 133, thefirst thermistor terminal 331, and thesecond thermistor terminal 332 are attached to theside wall 91. One end of each of thefirst gate terminal 131, the firstsense source terminal 132, thesense drain terminal 133, thefirst thermistor terminal 331, and thesecond thermistor terminal 332 is exposed on the Y2 side of theside wall 91, and the other end thereof projects from the upper surface (the surface on the Z1 side) of theside wall 91 to the outside (the Z1 side) of thecase 9. Thesense drain terminal 133 is disposed in the vicinity of the end of theside wall 91 on the X2 side. Thefirst thermistor terminal 331 and thesecond thermistor terminal 332 are disposed in the vicinity of the end of theside wall 91 on the X1 side. For example, thesecond thermistor terminal 332 is disposed on the X1 side from thefirst thermistor terminal 331. Thefirst gate terminal 131 and the firstsense source terminal 132 are disposed in the vicinity of the center of theside wall 91 in the X1-X2 direction and on the X2 side from the center in the X1-X2 direction. For example, the firstsense source terminal 132 is disposed on the X2 side from thefirst gate terminal 131. - The
second gate terminal 231 and the secondsense source terminal 232 are attached to theside wall 92. One end of each of thesecond gate terminal 231 and the secondsense source terminal 232 is exposed on the Y1 side of theside wall 92, and the other end thereof projects from the upper surface (the surface on the Z1 side) of theside wall 92 to the outside (the Z1 side) of thecase 9. Thesecond gate terminal 231 and the secondsense source terminal 232 are disposed in the vicinity of the center of theside wall 92 in the X1-X2 direction and on the X1 side from the center in the X1-X2 direction. For example, the secondsense source terminal 232 is disposed on the X1 side from thesecond gate terminal 231. - A first insulating
substrate 10 and a second insulatingsubstrate 20 are disposed on the Z1 side of theheat dissipation plate 2. That is, the first insulatingsubstrate 10 and the second insulatingsubstrate 20 are disposed on the firstmain surface 2A of theheat dissipation plate 2. For example, the second insulatingsubstrate 20 is disposed on the X1 side from the first insulatingsubstrate 10. - The first insulating
substrate 10 includesconductive layers conductive layer 19 on the Z2 side surface. Theconductive layer 19 is bonded to theheat dissipation plate 2 by abonding material 7 such as solder or the like. Multiplefirst transistors 110, for example, fourfirst transistors 110 are implemented on theconductive layer 13. The fourfirst transistors 110 are arranged in the X1-X2 direction. The fourfirst transistors 110 constitute afirst transistor group 110A. Multiplesecond diodes 220, for example, eightsecond diodes 220 are implemented on theconductive layer 12. The eightsecond diodes 220 are arranged in two rows, four each in the X1-X2 direction. The eightsecond diodes 220 constitute asecond diode group 220A. Theconductive layer 13 is an example of the first conductor, theconductive layer 12 is an example of the second conductor and a seventh conductor, and theconductive layer 14 is an example of the eighth conductor. In the present embodiment, the second conductor and the seventh conductor are formed by the integratedconductive layer 12. Here, as a modified example thereof, a conductive layer forming the second conductor and a conductive layer forming the seventh conductor may be constituted by different conductive lavers and connected to each other. That is, the present disclosure is not limited to the configuration in which the second conductor and the seventh conductor are integrated into theconductive layer 12. - The second insulating
substrate 20 includesconductive layers conductive layer 29 on the Z2 side surface. Theconductive layer 29 is bonded to theheat dissipation plate 2 by abonding material 8 such as solder or the like. Multiple second transistors 21C, for example, foursecond transistors 210 are implemented on theconductive layer 23. The foursecond transistors 210 are arranged in the X1-X2 direction. The foursecond transistors 210 constitute asecond transistor group 210A. Multiplefirst diodes 120, for example, eightfirst diodes 120 are implemented on theconductive layer 25. The eightfirst diodes 120 are arranged in two rows, four each in the X1-X2 direction. The eightfirst diodes 120 constitute afirst diode group 120A. Theconductive layer 25 is an example of the third conductor, theconductive layer 24 is an example of the fourth conductor, theconductive layer 23 is an example of the fifth conductor, and theconductive layer 22 is an example of the sixth conductor. - Here, the
first transistor 110, thefirst diode 120, thesecond transistor 210, and thesecond diode 220 will be described.FIG. 4 is a cross-sectional view illustrating the first transistor.FIG. 5 is a cross-sectional view illustrating the first diode.FIG. 6 is a cross-sectional view illustrating the second transistor.FIG. 7 is a cross-sectional view illustrating the second diode. - As illustrated in
FIG. 4 , thefirst transistor 110 includes afirst gate electrode 111, afirst source electrode 112, and afirst drain electrode 113. Thefirst gate electrode 111 and thefirst source electrode 112 are disposed on the Z1 side main surface of thefirst transistor 110, and thefirst drain electrode 113 is disposed on the Z2 side main surface of thefirst transistor 110. Thefirst drain electrode 113 is bonded to theconductive layer 13 by a bonding material (not illustrated) such as solder or the like. Thefirst drain electrode 113 is an example of the first electrode, and thefirst source electrode 112 is an example of the second electrode. - As illustrated in
FIG. 5 , thefirst diode 120 includes afirst anode electrode 121 and afirst cathode electrode 122. Thefirst anode electrode 121 is disposed on the Z1 side main surface of thefirst diode 120, and thefirst cathode electrode 122 is disposed on the Z2 side main surface of thefirst diode 120. Thefirst cathode electrode 122 is bonded to theconductive layer 25 by a bonding material (not illustrated) such as solder or the like. - As illustrated in
FIG. 6 , thesecond transistor 210 includes asecond gate electrode 211, asecond source electrode 212, and asecond drain electrode 213. Thesecond gate electrode 211 and thesecond source electrode 212 are disposed on the Z1 side main surface thesecond transistor 210, and thesecond drain electrode 213 is disposed on the Z2 side main surface of thesecond transistor 210. Thesecond drain electrode 213 is bonded to theconductive layer 23 by a bonding material (not illustrated) such as solder or the like. Thesecond drain electrode 213 is an example of the third electrode, and thesecond source electrode 212 is an example of the fourth electrode. - As illustrated in
FIG. 7 , thesecond diode 220 includes asecond anode electrode 221 and asecond cathode electrode 222. Thesecond anode electrode 221 is disposed on the Z1 side main surface of thesecond diode 220, and thesecond cathode electrode 222 is disposed on the Z2 side main surface of thesecond diode 220. Thesecond cathode electrode 222 is bonded to theconductive layer 12 by a bonding material (not illustrated) such as solder or the like. - The
semiconductor device 1 includesmultiple wires 31,multiple wires 32,multiple wires 41, andmultiple wires 42. Thewires 31 connect theconductive layer 13 provided on the first insulatingsubstrate 10 to theconductive layer 25 provided on the second insulatingsubstrate 20. Thewires 32 connect theconductive layer 12 provided on the first insulatingsubstrate 10 to theconductive layer 24 provided on the second insulatingsubstrate 20. Thewires 41 connect theconductive layer 12 provided on the first insulatingsubstrate 10 to theconductive layer 23 provided on the second insulatingsubstrate 20. Thewires 42 connect theconductive layer 14 provided on the first insulatingsubstrate 10 to theconductive layer 22 provided on the second insulatingsubstrate 20. Thewire 31 is an example of the first connection member, thewire 32 is an example of the second connection member, thewire 41 is an example of the fifth connection member, and thewire 42 is an example of the sixth connection member. - The
semiconductor device 1 includesmultiple wires 51,multiple wires 52,multiple wires 53,multiple wires 54, andmultiple wires 55. Thewire 51 connects thefirst gate electrode 111 provided in each of the fourfirst transistors 110 to theconductive layer 11 provided on the first insulatingsubstrate 10. Thewire 52 connects thefirst source electrode 112 provided in each of the fourfirst transistors 110 to theconductive layer 12 provided on the first insulatingsubstrate 10. Thewire 53 connects a first sense source electrode (not illustrated) provided in each of the fourfirst transistors 110 to theconductive layer 18 provided on the first insulatingsubstrate 10. Thewire 54 connects thesecond anode electrode 221 provided in each of the foursecond diodes 220 disposed on the Y1 side among the eightsecond diodes 220 to theconductive layer 14 provided on the first insulatingsubstrate 10. Thewire 55 connects thesecond anode electrode 221 provided in each of the foursecond diodes 220 disposed on the Y1 side among the eightsecond diodes 220 to thesecond anode electrode 221 provided in each of the foursecond diodes 220 disposed on the Y2 side. Thewire 52 is an example of the third connection member, and thewire 54 is an example of the eighth connection member. - The
semiconductor device 1 includes awire 61,multiple wires 62,multiple wires 63, awire 64, and awire 65. Thewire 61 connects theconductive layer 11 provided on the first insulatingsubstrate 10 to thefirst gate terminal 131. Thewires 62 connect theconductive layer 12 provided on the first insulatingsubstrate 10 to thefirst O terminal 5. Thewires 63 connect theconductive layer 12 provided on the first insulatingsubstrate 10 to thesecond O terminal 6. Thewire 64 connects theconductive layer 13 provided on the first insulatingsubstrate 10 to thesense drain terminal 133. Thewire 65 connects theconductive layer 18 provided on the first insulatingsubstrate 10 to the firstsense source terminal 132. - The
semiconductor device 1 includesmultiple wires 71,multiple wires 72,multiple wires 73,multiple wires 74, andmultiple wires 75. Thewire 71 connects thesecond gate electrode 211 provided in each of the foursecond transistors 210 to theconductive layer 21 provided on the second insulatingsubstrate 20. Thewire 72 connects thesecond source electrode 212 provided in each of the foursecond transistors 210 to theconductive layer 22 provided on the second insulatingsubstrate 20. Thewire 73 connects the second sense source electrode (not illustrated) provided in each of the foursecond transistors 210 to theconductive layer 28 provided on the second insulatingsubstrate 20. Thewire 74 connects thefirst anode electrode 121 provided in each of the fourfirst diodes 120 disposed on the Y2 side among the eightfirst diodes 120 to theconductive layer 24 provided on the second insulatingsubstrate 20. Thewire 75 connects thefirst anode electrode 121 provided in each of the fourfirst diodes 120 disposed on the Y2 side among the eightfirst diodes 120 to thefirst anode electrode 121 provided in the fourfirst diodes 120 disposed on the Y1 side. Thewire 74 is an example of the fourth connection member, and thewire 72 is an example of the seventh connection member. - The
semiconductor device 1 includes awire 81,multiple wires 82,multiple wires 83, awire 85, a wire 86, and a wire 87. Thewire 81 connects theconductive layer 21 provided on the second insulatingsubstrate 20 to thesecond gate terminal 231. Thewire 82 connects theconductive layer 22 provided on the second insulatingsubstrate 20 to theN terminal 4. Thewire 83 connects theconductive layer 25 provided on the second insulatingsubstrate 20 to theP terminal 3. Thewire 85 connects theconductive layer 28 provided on the second insulatingsubstrate 20 to the secondsense source terminal 232. The wire 86 connects theconductive layer 26 provided on the second insulatingsubstrate 20 to thefirst thermistor terminal 331. The wire 87 connects theconductive layer 27 provided on the second insulatingsubstrate 20 to thesecond thermistor terminal 332. Thesemiconductor device 1 includes athermistor 330 connected to theconductive layer 26 and theconductive layer 27. - Here, a circuit configuration of the
semiconductor device 1 according to the first embodiment will be described.FIG. 8 is a circuit diagram illustrating the semiconductor device according to the first embodiment. - The
first cathode electrode 122 of thefirst diode 120 is connected to theP terminal 3 via thewire 83 and theconductive layer 25. Additionally, thefirst drain electrode 113 of thefirst transistor 110 is connected to theP terminal 3 via thewire 83, theconductive layer 25, thewire 31, and theconductive layer 13. Theconductive layer 12 is connected to thefirst O terminal 5 via thewire 62 and is connected to thesecond O terminal 6 via thewire 63. Thefirst source electrode 112 of thefirst transistor 110 is connected to theconductive layer 12 via thewire 52. Additionally, thefirst anode electrode 121 of the first diode is connected to theconductive layer 12 via thewire 32, theconductive layer 24, and thewires - The
first gate electrode 111 of thefirst transistor 110 is connected to thefirst gate terminal 131 via thewire 61, theconductive layer 11, and thewire 51. The first sense source electrode of thefirst transistor 110 is connected to the firstsense source terminal 132 via thewire 65, theconductive layer 18, and thewire 53. Thefirst drain electrode 113 of thefirst transistor 110 is connected to thesense drain terminal 133 via thewire 64 and theconductive layer 13. Thefirst gate electrode 111 is an example of the first control electrode, and thefirst gate terminal 131 is an example of the first control terminal. - The
second source electrode 212 of thesecond transistor 210 is connected to theN terminal 4 via thewire 82, theconductive layer 22, and thewire 72. Additionally, thesecond anode electrode 221 of thesecond diode 220 is connected to theN terminal 4 via thewire 82, theconductive layer 22, thewire 42, and thewires second cathode electrode 222 of thesecond transistor 210 is connected to theconductive layer 12. Additionally, thesecond drain electrode 213 of thesecond transistor 210 is connected to theconductive layer 12 via thewire 41 and theconductive layer 23. - The
second gate electrode 211 of thesecond transistor 210 is connected to thesecond gate terminal 231 via thewire 81, theconductive layer 21, and thewire 71. The second sense source electrode of thesecond transistor 210 is connected to the secondsense source terminal 232 via thewire 85, theconductive layer 28, and thewire 73. One electrode of thethermistor 330 is connected to thefirst thermistor terminal 331 via the wire 86 and theconductive layer 26. The other electrode of thethermistor 330 is connected to thesecond thermistor terminal 332 via the wire 87 and theconductive layer 27. Thesecond gate electrode 211 is an example of the second control electrode, and thesecond gate terminal 231 is an example of the second control terminal. - As illustrated in
FIG. 8 , thefirst drain electrode 113 of thefirst transistor 110 and thefirst cathode electrode 122 of thefirst diode 120 are connected to theP terminal 3 in common, and thefirst source electrode 112 and thefirst anode electrode 121 are connected to thefirst O terminal 5 and thesecond O terminal 6 in common. That is, thefirst transistor 110 and thefirst diode 120 are connected in parallel between theP terminal 3; and thefirst O terminal 5 and thesecond O terminal 6. Additionally, thesecond drain electrode 213 of thesecond transistor 210 and thesecond cathode electrode 222 of thesecond diode 220 are connected to thefirst O terminal 5 and thesecond O terminal 6 in common, and thesecond source electrode 212 and thesecond anode electrode 221 are connected to theN terminal 4 in common. That is, thesecond transistor 210 and thesecond diode 220 are connected in parallel between theN terminal 4; and thefirst O terminal 5 and thesecond O terminal 6. Anupper arm 100 includes the first transistor 110 (thefirst transistor group 110A) and the first diode 120 (thefirst diode group 120A). Alower arm 200 includes the second transistor 210 (thesecond transistor group 210A) and the second diode 220 (thesecond diode group 220A). Theupper arm 100 and thelower arm 200 are connected in series between theP terminal 3 and theN terminal 4. Theupper arm 100 is an example of the first arm, and thelower arm 200 is an example of the second arm. - The multiple
first transistors 110 included in theupper arm 100 may be provided only on the first insulatingsubstrate 10, and the multiplefirst diodes 120 included in theupper arm 100 may be provided only on the second insulatingsubstrate 20. Additionally, the multiplesecond transistors 210 included in thelower arm 200 may be provided only on the second insulatingsubstrate 20, and the multiplesecond diodes 220 included in thelower arm 200 may be provided only on the first insulatingsubstrate 10. - Next, an operation of the
semiconductor device 1 according to the first embodiment will be described.FIGS. 9 to 12 are schematic views illustrating the operation of the semiconductor device according to the first embodiment. -
FIG. 9 illustrates a path of the current I1 flowing from theP terminal 3 to thefirst O terminal 5 and thesecond O terminal 6. As illustrated inFIG. 9 , the current I1 flows from theP terminal 3 to thefirst O terminal 5 and thesecond O terminal 6 via thewire 83, theconductive layer 25, thewire 31, theconductive layer 13, thefirst transistor group 110A, thewire 52, theconductive layer 12, and thewires -
FIG. 10 illustrates a path of the current I2 flowing from thefirst O terminal 5 and thesecond O terminal 6 to theP terminal 3. As illustrated inFIG. 10 , the current I2 flows from thefirst O terminal 5 and thesecond O terminal 6 to theP terminal 3 via thewires conductive layer 12, thewire 32, theconductive layer 24, thewires first diode group 120A, theconductive layer 25, and thewire 83. - As described above, the current I1 flowing from the
P terminal 3 to thefirst O terminal 5 and thesecond O terminal 6 flows through thewire 31 but does not flow through thewire 32. With respect to the above, the current I2 flowing from thefirst O terminal 5 and thesecond O terminal 6 to theP terminal 3 flows through thewire 32, but does not flow through thewire 31. -
FIG. 11 illustrates a path of the current I3 flowing from theN terminal 4 to thefirst O terminal 5 and thesecond O terminal 6. As illustrated inFIG. 11 , the current I3 flows from theN terminal 4 to thefirst O terminal 5 and thesecond O terminal 6 via thewire 82, theconductive layer 22, thewire 72, thesecond transistor group 210A, theconductive layer 23, thewire 41, theconductive layer 12, and thewires -
FIG. 12 illustrates a path of the current I4 flowing from thefirst O terminal 5 and thesecond O terminal 6 to theN terminal 4. As illustrated inFIG. 12 , the current I4 flows from thefirst O terminal 5 and thesecond O terminal 6 to theN terminal 4 via thewires conductive layer 12, thesecond diode group 220A, thewires conductive layer 14, thewire 42, theconductive layer 22, and thewire 82. - As described above, the current I3 flowing from the
N terminal 4 to thefirst O terminal 5 and thesecond O terminal 6 flows through thewire 41 but does not flow through thewire 42. With respect to the above, the current I4 flowing from thefirst C terminal 5 and thesecond O terminal 6 to theN terminal 4 flows through thewire 42 but does not flow through thewire 41. - In the
semiconductor device 1 according to the first embodiment, thefirst transistor 110 and thefirst diode 120 are included in theupper arm 100, thefirst transistor 110 is provided on the first insulatingsubstrate 10, and thefirst diode 120 is provided on the second insulatingsubstrate 20. Thus, among the current I1 flowing from theP terminal 3 to thefirst O terminal 5 and thesecond O terminal 6 and the current I2 flowing from thefirst O terminal 5 and thesecond C terminal 6 to theP terminal 3, wires through which the current I1 and the current I2 pass are different in thewires wires substrate 10 and the second insulatingsubstrate 20 pass through the same connection member. - Similarly, the
second transistor 210 and thesecond diode 220 are included in thelower arm 200, and thesecond transistor 210 is provided on the second insulatingsubstrate 20, and thesecond diode 220 is provided on the first insulatingsubstrate 10. Thus, among the current I3 flowing from theN terminal 4 to thefirst O terminal 5 and thesecond O terminal 6 and the current I4 flowing from thefirst O terminal 5 and thesecond C terminal 6 to theN terminal 4, wires through which the current I3 and the current I4 pass are different in thewires wires substrate 10 and the second insulatingsubstrate 20 passes through the same connection member. - By reducing the amount of heat generation in such a way, the possibility that the amount of heat generation of the connection member and the wire becomes excessive can be suppressed, and the possibility that the wire becomes melted and cut can be reduced.
- Because the
wires substrate 10 and the second insulatingsubstrate 20, it is easy to connect the first insulatingsubstrate 10 to the second insulatingsubstrate 20. That is, it is easy to connect theconductive layer 13 to theconductive layer 25, it is easy to connect theconductive layer 12 to theconductive layer 24, it is easy to connect theconductive layer 14 to theconductive layer 22, and it is easy to connect theconductive layer 12 to theconductive layer 23. Instead of each of thewires - Because the
wire 52 is used for the connection between thefirst source electrode 112 and theconductive layer 12, and thewire 74 is used for the connection between thefirst anode electrode 121 and theconductive layer 24, it is easy to connect thefirst source electrode 112 to theconductive layer 12 and it is easy to connect thefirst anode electrode 121 to theconductive layer 24. Additionally, because thewire 72 is used for the connection between thesecond source electrode 212 and theconductive layer 22 and thewire 54 is used for the connection between thesecond anode electrode 221 and theconductive layer 14, it is easy to connect thesecond source electrode 212 to theconductive layer 22 and it is easy to connect thesecond anode electrode 221 to theconductive layer 14. - The
first transistor 110 is disposed between thefirst gate terminal 131 and thesecond diode 220 in plan view. That is, thefirst transistor 110 of theupper arm 100 is disposed closer to thefirst gate terminal 131 than thesecond diode 220 of thelower arm 200. Thus, it is easy to reduce the inductance of the gate loop of thefirst transistor 110. Additionally, thesecond transistor 210 is disposed between thesecond gate terminal 231 and thefirst diode 120 in plan view. That is, thesecond transistor 210 of thelower arm 200 is disposed closer to thesecond gate terminal 231 than thefirst diode 120 of theupper arm 100. Thus, it is easy to reduce the inductance of the gate loop of thesecond transistor 210. - Further, the
first gate electrodes 111 of the multiplefirst transistors 110 are connected to thefirst gate terminal 131, and the multiplefirst transistors 110 are disposed between thefirst gate terminal 131 and thesecond diode 220. Thus, it is easy to reduce the difference in the inductance of the gate loop between the multiplefirst transistors 110. Additionally, thesecond gate electrodes 211 of the multiplesecond transistors 210 are connected to thesecond gate terminal 231, and the multiplesecond transistors 210 are disposed between thesecond gate terminal 231 and thefirst diode 120. Thus, it is easy to reduce the difference in the inductance of the gate loop between the multiplesecond transistors 210. - The
first transistor 110 and thesecond transistor 210 each may be a field effect transistor such as a metal-oxide-semiconductor (MOS) field effect transistor formed using silicon carbide, or the like. Thefirst diode 120 and thesecond diode 220 each may be a Schottky barrier diode formed using silicon carbide. By using silicon carbide, excellent breakdown voltage can be obtained. - Here, as illustrated in
FIG. 13 , the secondmain surface 2B of theheat dissipation plate 2 is preferably curved in a convex shape. This is because good heat transfer efficiency can be easily obtained by bringing theheat dissipation plate 2 into close contact with a cooler or the like by using TIM or the like. - Next, a second embodiment will be described.
FIG. 14 is a schematic view illustrating a configuration of a first insulating substrate and a second insulating substrate in a semiconductor device according to the second embodiment. - In the semiconductor device according to the second embodiment, as illustrated in
FIG. 14 , the first insulatingsubstrate 10 includes a thirdinsulating substrate 10A and a fourth insulatingsubstrate 10B, and the second insulatingsubstrate 20 includes a fifth insulatingsubstrate 20A and a sixth insulatingsubstrate 20B. The fourth insulatingsubstrate 10B is disposed on the X1 side from the third insulatingsubstrate 10A, and the sixth insulatingsubstrate 20B is disposed on the X2 side from the fifth insulatingsubstrate 20A. - The third
insulating substrate 10A includesconductive layers heat dissipation plate 2 by thebonding material 7 such as solder or the like, similarly as theconductive layer 19. Multiplefirst transistors 110, for example, twofirst transistors 110 are implemented on theconductive layer 13A. The twofirst transistors 110 are arranged in the X1-X2 direction. Multiplesecond diodes 220, for example, foursecond diodes 220 are implemented on theconductive layer 12A. The foursecond diodes 220 are arranged in two rows, two each in the X1-X2 direction. - The fourth insulating
substrate 10B includesconductive layers heat dissipation plate 2 by thebonding material 7 such as solder or the like, similarly as theconductive layer 19. Multiplefirst transistors 110, for example, twofirst transistors 110 are implemented on the conductive layer 13B. The twofirst transistors 110 are arranged in the X1-X2 direction. Multiplesecond diodes 220, for example, foursecond diodes 220 are implemented on theconductive layer 12C. The foursecond diodes 220 are arranged in two rows, two each in the X1-X2 direction. - Wire 411,
wire 412,wire 413,wire 414,wire 415, and wire 418 are provided. The wire 411 connects theconductive layer 11A to the conductive layer 11B. Thewire 412 connects theconductive layer 12A to theconductive layer 12B. Thewire 413 connects theconductive layer 13A to the conductive layer 13B. Thewire 414 connects theconductive layer 14A to theconductive layer 14B. Thewire 415 connects theconductive layer 12A to theconductive layer 12C. The wire 418 connects theconductive layer 18A to theconductive layer 18B. - The
conductive layers 11A and 11B are part of theconductive layer 11. Theconductive layers conductive layer 12. Theconductive layers 13A and 13B are part of theconductive layer 13. Theconductive layers conductive layer 14. Theconductive layers conductive layer 18. - The fifth insulating
substrate 20A includesconductive layers heat dissipation plate 2 by thebonding material 8 such as solder or the like, similarly as theconductive layer 29. Multiplesecond transistors 210, for example, twosecond transistors 210 are implemented on theconductive layer 23A. The twosecond transistors 210 are arranged in the X1-X2 direction. Multiplefirst diodes 120, for example, fourfirst diodes 120 are implemented on theconductive layer 25A. The fourfirst diodes 120 are arranged in two rows, two each in the X1-X2 direction. - The sixth
insulating substrate 20B includesconductive layers heat dissipation plate 2 by thebonding material 8 such as solder or the like, similarly as theconductive layer 29. Multiplesecond transistors 210, for example, twosecond transistors 210 are implemented on theconductive layer 23B. The twosecond transistors 210 are arranged in the X1-X2 direction. Multiplefirst diodes 120, for example, fourfirst diodes 120 are implemented on theconductive layer 25B. The fourfirst diodes 120 are arranged in two rows, two each in the X1-X2 direction. -
Wire 421,wire 422,wire 423,wire 424,wire 425, andwire 428 are provided. Thewire 421 connects theconductive layer 21A to theconductive layer 21B. Thewire 422 connects theconductive layer 22A to theconductive layer 22B. Thewire 423 connects theconductive layer 23A to theconductive layer 23B. Thewire 424 connects theconductive layer 24A to theconductive layer 24B. Thewire 425 connects theconductive layer 25A to theconductive layer 25B. Thewire 428 connects theconductive layer 28A to theconductive layer 28B. - The
conductive layers conductive layer 21. Theconductive layers conductive layer 22. Theconductive layers conductive layer 23. Theconductive layers conductive layer 24. Theconductive layers conductive layer 25. Theconductive layers conductive layer 18. - The other configurations are substantially the same as those of the first embodiment.
- According to the second embodiment, substantially the same effect as that of the first embodiment can also be obtained. Additionally, in the second embodiment, because the first insulating
substrate 10 includes the third insulatingsubstrate 10A and the fourth insulatingsubstrate 10B, it is easy to bring the third insulatingsubstrate 10A and the fourth insulatingsubstrate 10B into closer contact with the firstmain surface 2A of theheat dissipation plate 2. Similarly, because the second insulatingsubstrate 20 includes the fifth insulatingsubstrate 20A and the sixth insulatingsubstrate 20B, it is easy to bring the fifth insulatingsubstrate 20A and the sixth insulatingsubstrate 20B into closer contact with the firstmain surface 2A of theheat dissipation plate 2. - Although the embodiments have been described in detail above, the embodiments are not limited to the specific embodiments, and various modifications and changes can be made within the scope described in the claims.
-
-
- 1: semiconductor device
- 2: heat dissipation plate
- 2A: first main surface
- 2B: second main surface
- 3: P terminal
- 4: N terminal
- 5: first O terminal
- 6: second O terminal
- 7, 8: bonding material
- 9: case
- 10: first insulating substrate
- 10A: third insulating substrate
- 10B: fourth insulating substrate
- 11, 11A, 11B, 12A, 12B, 12C, 13A, 13B, 14A, 14B, 18, 18A, 18B, 19: conductive layer
- 12: second conductor, seventh conductor (conductive layer)
- 13: first conductor (conductive layer)
- 14: eighth conductor (conductive layer)
- 20: second insulating substrate
- 20A: fifth insulating substrate
- 20B: sixth insulating substrate
- 21, 21A, 21B, 22A, 22B, 23A, 23B, 24A, 24B, 25A, 25B, 26, 27, 28, 28A, 28B, 29: conductive layer
- 22: sixth conductor (conductive layer)
- 23: fifth conductor (conductive layer)
- 24: fourth conductor (conductive layer)
- 25: third conductor (conductive layer)
- 31: first connection member (wire)
- 32: second connection member (wire)
- 41: fifth connection member (wire)
- 42: sixth connection member (wire)
- 51, 53, 55: wire
- 52: third connection member (wire)
- 54: eighth connection member (wire)
- 61, 62, 63, 64, 65: wire
- 71, 73, 75: wire
- 72: seventh connection member (wire)
- 74: fourth connection member (wire)
- 81, 82, 83, 85, 86, 87: wire
- 91, 92: side wall
- 93, 94: end wall
- 95, 96: terminal block
- 100: upper arm
- 110: first transistor
- 110A: first transistor group
- 111: first gate electrode
- 112: first source electrode
- 113: first drain electrode
- 120: first diode
- 120A: first diode group
- 121: first anode electrode
- 122: first cathode electrode
- 131: first gate terminal
- 132: first sense source terminal
- 133: sense drain terminal
- 200: lower arm
- 210: second transistor
- 210A: second transistor group
- 211: second gate electrode
- 212: second source electrode
- 213: second drain electrode
- 220: second diode
- 220A: second diode group
- 221: second anode electrode
- 222: second cathode electrode
- 231: second gate terminal
- 232: second sense source terminal
- 330: thermistor
- 331: first thermistor terminal
- 332: second thermistor terminal
- 411, 412, 413, 414, 415, 418: wire
- 421, 422, 423, 424, 425, 428: wire
- I1, I2, I3, I4: current
Claims (19)
1. A semiconductor device comprising:
a first insulating substrate;
a second insulating substrate;
a first transistor provided on the first insulating substrate; and
a first diode provided on the second insulating substrate, the first diode being connected in parallel to the first transistor.
2. The semiconductor device as claimed in claim 1 , comprising a first arm including the first transistor and the first diode.
3. The semiconductor device as claimed in claim 1 , comprising:
a first conductor provided on the first insulating substrate, the first conductor being connected to a first electrode of the first transistor;
a second conductor provided on the first insulating substrate, the second conductor being connected to a second electrode of the first transistor;
a third conductor provided on the second insulating substrate, the third conductor being connected to a first cathode electrode of the first diode;
a fourth conductor provided on the second insulating substrate, the fourth conductor being connected to a first anode electrode of the first diode;
a first connection member connecting the first conductor to the third conductor; and
a second connection member connecting the second conductor to the fourth conductor.
4. The semiconductor device as claimed in claim 3 , wherein the first connection member and the second connection member are wires.
5. The semiconductor device as claimed in claim 3 , wherein the first connection member and the second connection member are metal plates.
6. The semiconductor device as claimed in claim 3 , comprising:
a third connection member connecting the second electrode to the second conductor; and
a fourth connection member connecting the first anode electrode to the fourth conductor.
7. The semiconductor device as claimed in claim 1 , comprising:
a second transistor provided on the second insulating substrate; and
a second diode provided on the first insulating substrate, the second diode being connected in parallel to the second transistor;
wherein the second transistor and the second diode are connected in series to the first transistor and the first diode.
8. The semiconductor device as claimed in claim 7 , comprising a second arm including the second transistor and the second diode.
9. The semiconductor device as claimed in claim 7 , comprising:
a fifth conductor provided on the second insulating substrate, the fifth conductor being connected to a third electrode of the second transistor;
a sixth conductor provided on the second insulating substrate, the sixth conductor being connected to a fourth electrode of the second transistor;
a seventh conductor provided on the first insulating substrate, the seventh conductor being connected to a second cathode electrode of the second diode;
an eighth conductor provided on the first insulating substrate, the eighth conductor being connected to a second anode electrode of the second diode;
a fifth connection member connecting the fifth conductor to the seventh conductor; and
a sixth connection member connecting the sixth conductor to the eighth conductor.
10. The semiconductor device as claimed in claim 9 , wherein the fifth connection member and the sixth connection member are wires.
11. The semiconductor device as claimed in claim 9 , wherein the fifth connection member and the sixth connection member are metal plates.
12. The semiconductor device as claimed in claim 9 , comprising:
a seventh connection member connecting the fourth electrode to the sixth conductor; and
an eighth connection member connecting the second anode electrode to the eighth conductor.
13. The semiconductor device as claimed in claim 7 , comprising:
a first control terminal connected to a first control electrode of the first transistor; and
a second control terminal connected to a second control electrode of the second transistor,
wherein, in plan view, the first transistor is disposed between the first control terminal and the second diode, and the second transistor is disposed between the second control terminal and the first diode.
14. The semiconductor device as claimed in claim 13 , comprising:
a plurality of said first transistors, said first control electrodes of the plurality of the first transistors being connected to the first control terminal; and
a plurality of said second transistors, said second control electrodes of the plurality of second transistors being connected to the second control terminal,
wherein the plurality of first transistors are disposed between the first control terminal and the second diode, and
wherein the plurality of second transistors are disposed between the second control terminal and the first diode.
15. The semiconductor device as claimed in claim 14 , comprising a plurality of said second diodes, wherein the first insulating substrate includes
a third insulating substrate in which one part of the plurality of first transistors and one part of the plurality of second diodes are disposed, and
a fourth insulating substrate in which another part of the plurality of first transistors and another part of the plurality of second diodes are disposed.
16. The semiconductor device as claimed in claim 14 , comprising a plurality of said first diodes, wherein the second insulating substrate includes
a fifth insulating substrate in which one part of the plurality of second transistors and one part of the plurality of first diodes are disposed, and
a sixth insulating substrate in which another part of the plurality of second transistors and another part of the plurality of first diodes are disposed.
17. The semiconductor device as claimed in claim 1 ,
wherein the second transistor is a field effect transistor formed using silicon carbide, and
wherein the second diode is a Schottky barrier diode formed using silicon carbide.
18. The semiconductor device as claimed in claim 1 ,
wherein the first transistor is a field effect transistor formed using silicon carbide, and
wherein the first diode is a Schottky barrier diode formed using silicon carbide.
19. The semiconductor device as claimed in claim 1 , comprising a heat dissipation plate having a first main surface and a second main surface opposite to the first main surface,
wherein the first insulating substrate and the second insulating substrate are mounted on the first main surface, and
wherein the second main surface is curved in a convex shape.
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PCT/JP2021/021824 WO2022059272A1 (en) | 2020-09-18 | 2021-06-09 | Semiconductor device |
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WO2013002249A1 (en) * | 2011-06-27 | 2013-01-03 | ローム株式会社 | Semiconductor module |
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US9520344B2 (en) * | 2012-05-16 | 2016-12-13 | Panasonic Intellectual Property Management Co., Ltd. | Semiconductor module for electric power |
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US9443792B1 (en) * | 2015-10-31 | 2016-09-13 | Ixys Corporation | Bridging DMB structure for wire bonding in a power semiconductor device module |
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US20240021585A1 (en) | 2024-01-18 |
CN116097430A (en) | 2023-05-09 |
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WO2022059251A1 (en) | 2022-03-24 |
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