US20220167500A1 - Circuit board with at least one embedded electronic component and method for manufacturing the same - Google Patents
Circuit board with at least one embedded electronic component and method for manufacturing the same Download PDFInfo
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- US20220167500A1 US20220167500A1 US17/106,363 US202017106363A US2022167500A1 US 20220167500 A1 US20220167500 A1 US 20220167500A1 US 202017106363 A US202017106363 A US 202017106363A US 2022167500 A1 US2022167500 A1 US 2022167500A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/184—Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4697—Manufacturing multilayer circuits having cavities, e.g. for mounting components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Structure Of Printed Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
- The subject matter herein generally relates to a circuit board, especially relates to a circuit board with at least one embedded electronic component and a method for manufacturing the circuit board with the embedded electronic component.
- Existing embedded circuit boards usually use SMT (Surface Mount Technology) solder paste to solder electronic components on the surface of a substrate. Since the solder paste occupies a certain thickness, it is not conducive to the thinning of the circuit board, However, other existing processes for fixing the electronic component inside the circuit board from the side surface are often more complicated.
- Therefore, there is room for improvement within the art.
- Implementations of the present disclosure will now be described, by way of embodiments, with reference to the attached figures.
-
FIG. 1 is a flowchart of an embodiment of a method for manufacturing a circuit board. -
FIG. 2 is a cross-sectional view of an embodiment of a wiring board. -
FIG. 3A is a cross-sectional view showing a mask with at least one first opening and at least two spaced second openings on the wiring board ofFIG. 2 . -
FIG. 3B is a top view of the mask on the wiring board ofFIG. 3A . -
FIG. 4A is a cross-sectional view showing a groove on the wiring board ofFIG. 3A -
FIG. 4B is a top view of the wiring board with the groove ofFIG. 4A . -
FIG. 5 is a cross-sectional view showing an electronic component in the groove ofFIG. 4A . -
FIG. 6A is a cross-sectional view showing electrical connecting portions electrically connect the electronic component and the wiring board ofFIG. 5 . -
FIG. 6B is a top view of the wiring board with the electrical connecting portions ofFIG. 6A . -
FIG. 7 is a cross-sectional view showing the mask peeled off from the wiring board ofFIG. 6A . -
FIG. 8 is a cross-sectional view showing outer wiring structures on the wiring board ofFIG. 7 . -
FIG. 9 is a cross-sectional view showing solder masks on the wiring board ofFIG. 8 . -
FIG. 10 is a flowchart of an embodiment of a method for manufacturing a wiring board. -
FIG. 11 is a cross-sectional view of an embodiment of a double-sided copper clad laminate including a first copper foil, a first insulating layer and a second copper foil. -
FIG. 12 is a cross-sectional view showing a third wiring layer a plurality of spaced first conductive portions on the first insulating layer ofFIG. 11 . -
FIG. 13 is a cross-sectional view showing a first single-side copper clad laminate including a second insulating layer and a third copper foil on the first insulating layer ofFIG. 12 . -
FIG. 14 is a cross-sectional view showing a second wiring layer on the second insulating layer ofFIG. 13 . -
FIG. 15 is a cross-sectional view showing a second single-side copper clad laminate including a third insulating layer and a fourth copper foil on the first insulating layer ofFIG. 14 . -
FIG. 16 is a cross-sectional view showing connecting holes on the second single-side copper clad laminate ofFIG. 15 . -
FIG. 17 is a cross-sectional view showing two electronic components in the groove ofFIG. 4A . -
FIG. 18 a top view of the wiring board with the two electronic components ofFIG. 17 . -
FIG. 19 is a cross-sectional view of an embodiment of a circuit board. -
FIG. 20 is a cross-sectional view of another embodiment of a circuit board. - It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale, and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
- The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.
-
FIG. 1 illustrates a flowchart of a method in accordance with an embodiment. The embodiment method for manufacturing a circuit board with at least one embedded electronic component is provided by way of embodiments, as there are a variety of ways to carry out the method. Each block shown inFIG. 1 represents one or more processes, methods, or subroutines carried out in the method. Furthermore, the illustrated order of blocks can be changed. Additional blocks may be added or fewer blocks may be utilized, without departing from this disclosure. The method can begin atblock 201. - At
block 201, referring toFIG. 2 , awiring board 10 is provided. Thewiring board 10 includes adielectric layer 11, afirst wiring layer 13, asecond wiring layer 14, and a plurality of spacedconductive pillars 15. Thefirst wiring layer 13 and thesecond wiring layer 14 are formed on opposite sides of thedielectric layer 11. Each of the plurality of spacedconductive pillars 15 penetrates thedielectric layer 11 and electrically connects thefirst wiring layer 13 and thesecond wiring layer 14. - The
wiring board 10 may be a double-layer wiring board or a multilayer wiring board. - In at least one embodiment, the
wiring board 10 is multilayer wiring board. Specifically, thewiring board 10 further includes athird wiring layer 12 a embedded in thedielectric layer 11 and located between thefirst wiring layer 13 and thesecond wiring layer 14. Each of the plurality of spacedconductive pillars 15 may include a secondconductive portion 153, a firstconductive portion 151, and a thirdconductive portion 156 connected in that sequence. The secondconductive portion 153 and the firstconductive portion 151 are connected between thefirst wiring layer 13 and thethird wiring layer 12 a. The thirdconductive portion 156 is connected between thesecond wiring layer 14 and an end of the firstconductive portion 151 facing away from thefirst wiring layer 13. - At
block 202, referring toFIGS. 3A and 3B , amask 30 is attached to a side of thewiring board 10, and at least onefirst opening 31 exposing a part of thedielectric layer 11 and at least two spacedsecond openings 33 are formed on themask 30. Eachsecond opening 33 is recessed from a sidewall of thefirst opening 31 toward a direction away from a center axis of thefirst opening 31, and arranged corresponding to one of the plurality of spacedconductive pillars 15 to expose at least a part of an end surface of the correspondingconductive pillar 15. - In at least one embodiment, the
mask 30 is attached to a side of thewiring board 10 facing away from thesecond wiring layer 14. - In at least one embodiment, a shape of each
first opening 31 and a shape of eachsecond opening 33 are both rectangular. A distance that thesecond opening 33 is recessed from the sidewall of thefirst opening 31 is defined as a width of thesecond opening 33, and a size of thesecond opening 33 in a direction perpendicular to the width is defined as a length of thesecond opening 33. In another embodiment, the shape of eachfirst opening 31 and the shape of eachsecond opening 33 may be both varied as needed, for example, may be regular shapes such as ellipse, circle, sector, polygon, or may be irregular shapes. - At
block 203, referring toFIGS. 4A and 4B , a part of thedielectric layer 11 exposed from each of the at least onefirst opening 31 and thesecond openings 33 communicating with thefirst opening 31 is removed to form agroove 40, and thegroove 40 does not penetrate thedielectric layer 11. Eachgroove 40 includes a first recessedportion 41 and at least two spaced second recessedportions 43. The first recessedportion 41 corresponds to thefirst opening 31. Each second recessedportion 43 is recessed from a sidewall of the first recessedportion 41 toward a direction away from a center axis of the first recessedportion 41. Each second recessedportion 43 corresponds to one of thesecond openings 33 to expose a part of a side wall of the correspondingconductive pillar 15 close to the first recessedportion 41. - In at least one embodiment, a shape of each first recessed
portion 41 and a shape of each second recessedportion 43 are both rectangular. In another embodiment, the shape of each first recessedportion 41 and the shape of each second recessedportion 43 may be both varied as needed, for example, may be regular shapes such as ellipse, circle, sector, polygon, or may be irregular shapes. - At
block 204, referring toFIG. 5 , at least oneelectronic component 50 is placed in the at least one first recessedportion 41. Each of the at least oneelectronic component 50 includes at least two spaced connectingpads 51. Each of the at least two spaced connectingpads 51 corresponds to one of the plurality of spacedconductive pillars 15 in thegroove 40 exposing the connectingpads 51. - At
block 205, referring toFIGS. 6A and 6B , each of the at least two spaced second recessedportions 43 of eachgroove 40 is filled with a conductive material to form an electrical connectingportion 55 to electrically connect one of the plurality of spacedconductive pillars 15 corresponding to the recessedportion 43 and the corresponding connectingpad 51. - The conductive material may be soldering flux such as tin paste, which is melted and solidified to form the electrical connecting
portion 55 to connect the correspondingconductive pillar 15 and the corresponding connectingpad 51. The conductive material may be conductive glue. The conductive glue fills in the second recessedportion 43 and is cured to form the electrical connectingportion 55. - At
block 206, referring toFIG. 7 , themask 30 is peeled off from thewiring board 10 with the electrical connectingportions 55 and the at least oneelectronic component 50. - In at least one embodiment, the method for manufacturing a circuit board with at least one embedded electronic component may further includes the following
blocks - At
block 207, referring toFIG. 8 , anouter wiring structure 60 is formed on the side of thewiring board 10 where thegroove 40 is provided to encapsulate the at least oneelectronic component 50 in the at least onegroove 40. - In at least one embodiment, two
outer wiring structures 60 are formed on two opposite sides of thewiring board 10. Each of theouter wiring structures 60 is single-layer wiring board. In another embodiment, each of theouter wiring structures 60 may be double layer wiring board or multilayer wiring board. - When forming the
outer wiring structure 60, gaps between the at least onegroove 40 and the at least oneelectronic component 50 is filled with dielectric materials of thedielectric layer 11 and theouter wiring structure 60 during a pressing process. - At
block 208, referring toFIG. 9 , twosolder masks 70 are respectively formed on the opposite sides of thewiring board 10, a side of theouter wiring structure 60 facing away from thewiring board 10 is covered by one of the solder masks 70. - In at least, one embodiment, each of the
outer wiring structures 60 on the opposite sides of thewiring board 10 is covered by one of the solder masks 70. -
FIG. 10 illustrates a flowchart of an embodiment of a method for manufacturing the wiring board 10 (shown inFIG. 1 ). The method can begin atblock 801. - At
block 801, referring toFIG. 11 , a double-sided copper cladlaminate 10 a is provided. The double-sided copper cladlaminate 10 a includes afirst copper foil 121, a first insulatinglayer 11 a and asecond copper foil 122 stacked in that sequence along a first direction. - In at least one embodiment, the first insulating
layer 11 a is made of a developing material, such as a developable photoresist or a developing ink. In another embodiment, the first insulatinglayer 11 a may be made of other dielectric materials commonly used in the art, such as phenolic resin, epoxy resin (EP), polyimide resin (PI), polyester resin (PET), polyphenylene oxide resin (PPO), polytetrafluoroethylene resin (PTFE), or bismaleimide triazine resin (BT). - At
block 802, referring toFIG. 12 , athird wiring layer 12 a is formed by performing a circuit fabrication process on thefirst copper foil 121, and a plurality of spaced firstconductive portions 151 is formed. Each of the plurality of spaced firstconductive portions 151 penetrates the first insulatinglayer 11 a and connects thesecond wiring layer 12 a and thesecond copper foil 122. - In at least one embodiment, a width of a cross section along the first direction of each of the plurality of spaced first
conductive portions 151 may gradually decrease from thethird wiring layer 12 a to thesecond copper foil 122. Therefore, it is convenient to subsequently fill conductive materials to form the electrical connectingportions 55. In at least one embodiment, the cross-section along the first direction of each of the plurality of spaced firstconductive portions 151 may be trapezoidal. In at least one embodiment, each of the plurality of spaced firstconductive portions 151 may be a circular truncated cone. - At
block 803, referring toFIG. 13 , a first single-side copper cladlaminate 10 b is pressed on a side of the first insulatinglayer 11 a facing away from thesecond copper foil 122. The first single-side copper clad laminate 10 h includes a second insulatinglayer 11 b combined with thethird wiring layer 12 a and athird copper foil 123 formed on the second insulatinglayer 11 b facing away from thethird wiring layer 12 a. - In at least one embodiment, the second insulating
layer 11 b may be made of phenolic resin, epoxy resin, polyimide resin, polyester resin, polyphenylene oxide resin, polytetrafluoroethylene resin, or bismaleimide triazine resin. - At
block 804, referring toFIG. 14 , asecond wiring layer 14 is formed by performing a circuit fabrication process on thethird copper foil 123, and thesecond copper foil 122 is removed. - In at least one embodiment, a third
conductive portion 156 is formed to connect an end of one of the plurality of spaced firstconductive portions 151 facing thesecond wiring layer 14 and thesecond wiring layer 14. - At
block 805, referring toFIG. 15 , a second single-side copper cladlaminate 10 c is pressed on a side of the first insulatinglayer 11 a facing away from thesecond wiring layer 14. The second single-side copper cladlaminate 10 c includes a third insulatinglayer 11 c combined with the first insulatinglayer 11 a and afourth copper foil 124 formed on a side of the third insulating 11 c facing away from the first insulatinglayer 11 a. - In at least one embodiment, the third insulating
layer 11 c may be made of is made of a developing material, such as a developable photoresist or a developing ink. In another embodiment, the third insulatinglayer 11 c may be made of other dielectric materials commonly used in the art, such as phenolic resin, epoxy resin (EP), polyimide resin (PI), polyester resin (PET), polyphenylene oxide resin (PPO), polytetrafluoroethylene resin (PTFE), or bismaleimide triazine resin (BT). - Preferably, the third insulating
layer 11 c and the first insulatinglayer 11 a are both made of the same materials. - At
block 806, referring toFIG. 16 , a connectinghole 101 c corresponding to each of the plurality of spaced firstconductive portions 151 is formed on the second single-side copper cladlaminate 10 c to expose an end of each of the plurality of spaced firstconductive portions 151 facing away from thesecond wiring layer 14. - In at least one embodiment, in a cross section along the first direction, a maximum width R1 of each connecting
hole 101 c is less than or equal to a width R2 of the end of the correspondingconductive portion 151 facing away from thesecond wiring layer 14, In at least one embodiment, R1 is equal to R2, and each connectinghole 101 c is cylindrical. In another embodiment, the shape of each connectinghole 101 c may be varied as needed. - The connecting
hole 101 c may be formed by laser cutting or mechanical drilling. - At
block 807, referring toFIG. 2 , afirst wiring layer 13 is formed by performing a circuit fabrication process on thefourth copper foil 124, and a secondconductive portion 153 corresponding to each connectinghole 101 c is formed to fill the connectinghole 101 c and connect the corresponding firstconductive portion 151, thereby obtaining thewiring board 10. Each firstconductive portion 151 connects the corresponding secondconductive portion 153 and the corresponding thirdconductive portion 156 to form aconductive pillar 15. The first insulatinglayer 11 a, the second insulatinglayer 11 b, and the third insulatinglayer 11 c are formed adielectric layer 11. - A maximum width R1 of the second
conductive portion 153 is less than or equal to the width R2 of the end of the correspondingconductive portion 151 facing away from thesecond wiring layer 14. - When the first insulating
layer 11 a and the third insulatinglayer 11 c are both made of developing materials, the part of thedielectric layer 11 exposed from each of the at least onefirst opening 31 and thesecond openings 33 is removed by exposure and development to form thegroove 40. In at least one embodiment, at least a part of each firstconductive portion 151 corresponding to thesecond openings 33 is exposed from the corresponding second recessedportion 43. - An area of the third insulating
layer 11 c exposed from the at least onefirst opening 31 and the at least two spacedsecond openings 33 and an area of the first insulatinglayer 11 a corresponding to the at least onefirst opening 31 and the at least two spacedsecond openings 33, are removed by exposure and development. A thickness of the first insulatinglayer 11 a and a thickness of the third insulating layer 11 e may be adjusted as needed, so as to facilitate a subsequent adjustment of a depth of thegroove 40 to accommodate the embedding of electronic components of different thicknesses. - A width of an end of the
conductive portion 151 facing thesecond wiring layer 14 is defined as R3. Preferably, the length of thesecond opening 33 is greater than or equal to R3. The width of thesecond opening 33 is less than or equal to R3+(R3−R2)/2, and also greater than or equal to (R3−R2)/2. In at least one embodiment, the length of thesecond opening 33 is R3, and width of thesecond opening 33 is R3+(R3−R2)/2. - In at least one embodiment, referring to
FIGS. 6A and 6B , each of the at least, onegroove 40 receives oneelectronic component 50. In another embodiment, referring toFIGS. 17 to 19 , each of the at least onegroove 40 receives at least twoelectronic components 50. Referring toFIGS. 6B and 18 , when each of the at least onegroove 40 corresponds to a plurality ofconductive pillars 15 and receives at least twoelectronic components 50, an arrangement of the at least twoelectronic components 50 may be adjusted based on an arrangement of the plurality ofconductive pillars 15 and the actual need. - Depending on the embodiment, certain of the steps of methods described may be removed, others may be added, and the sequence of steps may be altered. It is also to be understood that the description and the claims drawn to a method may include some indication in reference to certain steps. However, the indication used is only to be viewed for identification purposes and not as a suggestion as to an order for the steps.
-
FIG. 20 illustrates an embodiment of acircuit board 100 a with at least one embedded electronic component. The circuit board 100 includes awiring board 10 and at least oneelectronic component 50. Thewiring board 10 includes adielectric layer 11, a plurality of spacedconductive pillars 15, afirst wiring layer 13, and asecond wiring layer 14. Thefirst wiring layer 13 and thesecond wiring layer 14 are stacked along a first direction, and formed on opposite sides of thedielectric layer 11. Each of the plurality of spacedconductive pillars 15 electrically connects thefirst wiring layer 13 and thesecond wiring layer 14. - At least one
groove 40 is recessed from a side of thedielectric layer 11 facing away from thesecond wiring layer 14 toward thesecond wiring layer 14. Each of the at least onegroove 40 includes a first recessedportion 41 and at least two spaced second recessedportions 43. Each of the at least two spaced second recessedportions 43 is recessed from a sidewall of the first recessedportion 41 toward a direction away from the first recessedportion 41. At least a part of an end surface of each of the plurality of spacedconductive pillars 15 facing away from thesecond wiring layer 14 is exposed from the at least two spaced second recessedportions 43, a part of a sidewall of each of the plurality of spacedconductive pillars 15 close to the first recessedportion 41 is exposed from the at least two spaced second recessedportions 43. The at least oneelectronic component 50 is received in the first recessedportion 41, and is electrically connected to the plurality of spacedconductive pillars 15 through electrical connectingportions 55 received in the at least two spaced second recessedportions 43. - Each of the plurality of spaced
conductive pillars 15 includes a firstconductive portion 151. A width of a cross section along the first direction of theconductive portion 151 may gradually decrease from an end of theconductive portion 151 facing thewiring layer 14 to an end of theconductive portion 151 facing away from thewiring layer 14. Therefore, it is convenient to form the electrical connectingportions 55. - The
dielectric layer 11 includes afirst layer 111 and asecond layer 112 stacked along the first direction. Thefirst layer 111 may be made of a developing material, such as a developable photoresist or a developing ink. - In at least one embodiment, each of the at least one
groove 40 penetrates thefirst layer 111. - The
wiring board 10 may be a double-layer wiring board or a multilayer wiring board. In at least one embodiment, thewiring board 10 is a three-layer wiring board. - In at least one embodiment, each of the at least one
groove 40 receives oneelectronic component 50. In another embodiment, each of the at least onegroove 40 receives at least twoelectronic components 50, and an arrangement of the at least twoelectronic components 50 may be varied as needed. - In the above method of for manufacturing a circuit board, the electronic component is embedded into an area of the circuit board around the plurality of the conductive pillars and electrically connects the plurality of the conductive pillars. Compared with the prior art, the above method may omit a process of forming conductive areas on sidewalls to connect the electronic component and the wiring layer. The number and distribution of the embedded electronic components may be adjusted according to the circuit design, which is beneficial to improve a flexibility of embedding the electronic components. In addition, the above method of for manufacturing the circuit board is simple in process and easy to produce, and is beneficial to the lightness and thinness of the embedded circuit board.
- It is to be understood, even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only; changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the plain meaning of the terms in which the appended claims are expressed.
Claims (16)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US17/711,255 US20220232697A1 (en) | 2020-11-20 | 2022-04-01 | Circuit board with at least one embedded electronic component and method for manufacturing the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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CN202011311188.3 | 2020-11-20 | ||
CN202011311188.3A CN114521055A (en) | 2020-11-20 | 2020-11-20 | Embedded circuit board and manufacturing method thereof |
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US17/711,255 Division US20220232697A1 (en) | 2020-11-20 | 2022-04-01 | Circuit board with at least one embedded electronic component and method for manufacturing the same |
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US11324115B1 US11324115B1 (en) | 2022-05-03 |
US20220167500A1 true US20220167500A1 (en) | 2022-05-26 |
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US17/106,363 Active US11324115B1 (en) | 2020-11-20 | 2020-11-30 | Circuit board with at least one embedded electronic component and method for manufacturing the same |
US17/711,255 Pending US20220232697A1 (en) | 2020-11-20 | 2022-04-01 | Circuit board with at least one embedded electronic component and method for manufacturing the same |
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KR101046077B1 (en) * | 2002-10-08 | 2011-07-01 | 다이니폰 인사츠 가부시키가이샤 | Manufacturing method of parts-embedded wiring board, manufacturing method of parts-embedded wiring board |
KR100598275B1 (en) * | 2004-09-15 | 2006-07-10 | 삼성전기주식회사 | Embedded passive-device printed circuit board and method for manufacturing the same |
KR100780961B1 (en) * | 2006-10-02 | 2007-12-03 | 삼성전자주식회사 | Reworkable passive element embedded printed circuit board and method for fabricating the same and semiconductor module with the same |
JP2009206154A (en) * | 2008-02-26 | 2009-09-10 | Nec Electronics Corp | Wiring board, and manufacturing method thereof |
JP5715009B2 (en) * | 2011-08-31 | 2015-05-07 | 日本特殊陶業株式会社 | Component built-in wiring board and manufacturing method thereof |
US8908387B2 (en) * | 2011-10-31 | 2014-12-09 | Ibiden Co., Ltd. | Wiring board and method for manufacturing the same |
CN104219883B (en) * | 2013-05-29 | 2017-08-11 | 碁鼎科技秦皇岛有限公司 | Circuit board with embedded element and preparation method thereof |
US9078373B1 (en) * | 2014-01-03 | 2015-07-07 | International Business Machines Corporation | Integrated circuit structures having off-axis in-hole capacitor and methods of forming |
JP2016127148A (en) * | 2014-12-27 | 2016-07-11 | 京セラ株式会社 | Wiring board manufacturing method |
KR102380304B1 (en) * | 2015-01-23 | 2022-03-30 | 삼성전기주식회사 | A printed circuit board comprising embeded electronic component within and a method for manufacturing |
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US20220232697A1 (en) | 2022-07-21 |
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