US20210385939A1 - High-frequency circuit board and method for manufacturing the same - Google Patents

High-frequency circuit board and method for manufacturing the same Download PDF

Info

Publication number
US20210385939A1
US20210385939A1 US17/029,355 US202017029355A US2021385939A1 US 20210385939 A1 US20210385939 A1 US 20210385939A1 US 202017029355 A US202017029355 A US 202017029355A US 2021385939 A1 US2021385939 A1 US 2021385939A1
Authority
US
United States
Prior art keywords
circuit board
substrate layer
signal line
holes
width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US17/029,355
Other versions
US11197368B1 (en
Inventor
Fu-Yun Shen
Xian-Qin Hu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Avary Holding Shenzhen Co Ltd
Qing Ding Precision Electronics Huaian Co Ltd
Original Assignee
Avary Holding Shenzhen Co Ltd
Qing Ding Precision Electronics Huaian Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Avary Holding Shenzhen Co Ltd, Qing Ding Precision Electronics Huaian Co Ltd filed Critical Avary Holding Shenzhen Co Ltd
Assigned to AVARY HOLDING (SHENZHEN) CO., LIMITED., QING DING PRECISION ELECTRONICS (HUAIAN) CO.,LTD reassignment AVARY HOLDING (SHENZHEN) CO., LIMITED. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HU, Xian-qin, SHEN, FU-YUN
Priority to US17/512,901 priority Critical patent/US11700685B2/en
Application granted granted Critical
Publication of US11197368B1 publication Critical patent/US11197368B1/en
Publication of US20210385939A1 publication Critical patent/US20210385939A1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/024Dielectric details, e.g. changing the dielectric material around a transmission line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H05K3/4655Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/07Electric details
    • H05K2201/0707Shielding
    • H05K2201/0723Shielding provided by an inner layer of PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09063Holes or slots in insulating substrate not used for electrical connections

Abstract

A circuit board with reduced dielectric losses enabling the movement of high frequency signals includes an inner circuit board and two outer circuit boards. The inner circuit board includes a first conductor layer and a first substrate layer. The first conductor layer includes a signal line and two ground lines on both sides of the signal line. The first substrate layer covers a side of the first conductor layer and defines first through holes which expose the signal line. Each outer circuit board includes a second substrate layer and a second conductor layer. The second substrate layer abuts the inner circuit board and defines second through holes which are not aligned with the first through holes, partially surrounding the signal line with air which has a very low dielectric constant. A method for manufacturing the high-frequency circuit board is also disclosed.

Description

    FIELD
  • The subject matter herein generally relates to printed circuit boards, in particular to a high-frequency circuit board and a method for manufacturing the same.
  • BACKGROUND
  • In high-frequency electronic signal transmissions, attenuation of the transmission signal is mainly a result of dielectric losses. Dielectric loss is positively correlated with dielectric loss factor and dielectric constant. In order to reduce the transmission loss, a liquid crystal polymer with a low dielectric constant can be used as the substrate layer covering the signal line. However, such material still has a relatively high dielectric loss.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • Implementations of the present technology will now be described, by way of embodiment, with reference to the attached figures.
  • FIG. 1 is a cross-sectional view of an embodiment of a high-frequency circuit board.
  • FIG. 2A is a top view of a first conductor layer of the high-frequency circuit board of FIG. 1.
  • FIG. 2B is a top view of a first substrate layer of the high-frequency circuit board of FIG. 1.
  • FIG. 2C is a top view of a second substrate layer of the high-frequency circuit board of FIG. 1.
  • FIG. 3 is a cross-sectional view of an inner circuit board in one embodiment.
  • FIG. 4 is a cross-sectional view showing two copper clad laminates provided on two sides of the inner circuit board of FIG. 3.
  • FIG. 5 is a cross-sectional view showing the copper clad laminates and the inner circuit board of FIG. 3 pressed together.
  • FIG. 6 is a cross-sectional view showing a plurality of vias formed on the structure of FIG. 5.
  • FIG. 7 is a cross-sectional view showing a plurality of conductive pillars formed on the structure of FIG. 6.
  • DETAILED DESCRIPTION
  • Implementations of the disclosure will now be described, by way of embodiments only, with reference to the drawings. The disclosure is illustrative only, and changes may be made in the detail within the principles of the present disclosure. It will, therefore, be appreciated that the embodiments may be modified within the scope of the claims.
  • Unless otherwise defined, all technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. The technical terms used herein are to provide a thorough understanding of the embodiments described herein, but are not to be considered as limiting the scope of the embodiments.
  • FIG. 1 illustrates a high-frequency circuit board 100 according to one embodiment. The high-frequency circuit board 100 includes an inner circuit board 10, and two outer circuit boards 30 disposed on opposite two surfaces of the inner circuit board 10.
  • The inner circuit board 10 is a single-sided circuit board, and includes a first substrate layer 11 and a first conductor layer 13 disposed on a surface of the first substrate layer 11.
  • As shown in FIG. 2A, the first conductor layer 13 is made of copper, and includes a signal line 131 and two ground lines 132. The two ground lines 132 are arranged at intervals on both sides of the signal line 131. The first conductor layer 13 defines a plurality of slots 134 passing through the first conductor layer 13. Each slot 134 isolates one ground line 132 from the signal line 131.
  • As shown in FIG. 2B, the substrate layer 11 includes a first opening region 111 and a first non-opening region 113 connected to each other. The first opening region 111 corresponds in position to the signal line 131. In a width direction W of the high-frequency circuit board 100, a width of the first opening region 111 is not greater than a width of the signal line 131. The first opening region 111 defines a plurality of first through holes 114, and the signal line 131 is exposed in the first through holes 114. Each of the first through holes 114 penetrates a surface of the first substrate layer 11 abutting the first conductor layer 13 and a surface of the first substrate layer 11 away from the first conductor layer 13. A cross-section of each of the first through holes 114 may be round or slot-like, or the like. The first through holes 114 are arranged at intervals along a length direction of the signal line 131.
  • The first substrate layer 11 may be a rigid resin layer, such as a prepreg (PP) layer including glass fiber and epoxy resin, or may be a flexible resin layer, such as a polyethylene naphthalate (PEN) layer, a polyimide (PI) layer, a polyethylene terephthalate (PET) layer, a polytetrafluoroethylene (Teflon) layer, a polythiamine (PA) layer, a poly methyl methacrylate (PMMA) layer, a polycarbonate (PC) layer, or a polyimide-polyethylene-terephthalate copolymer layer. In one embodiment, the first substrate layer 11 is made of a material having a dielectric constant of less than 3.5, such as polyethylene naphthalate.
  • The two outer circuit boards 30 are arranged at outer sides of the first substrate layer 11 and the first conductor layer 13. Each of the two outer circuit boards 30 includes a second substrate layer 31 and a second conductor layer 33. The second substrate layer 31 is in contact with the inner circuit board 10, and the second conductor layer 33 covers a surface of the second substrate layer 31 away from the inner circuit board 10.
  • As shown in FIG. 2C, the second substrate layer 31 includes a second opening region 311 and a second non-opening region 313 connected to each other. The second opening region 311 corresponds in position to the signal line 131. In the width direction W of the high-frequency circuit board 100, a width of the second opening region 311 is not less than the width of the signal line 131. The second opening region 311 defines a plurality of second through holes 314, and the signal line 131 is exposed in the second through holes 314. Each of the second through holes 314 penetrates a surface of the second substrate layer 31 abutting the inner circuit board 10 and a surface of the second substrate layer 31 away from the inner circuit board 10. A cross-section of each of the second through holes 314 may be round, or slot-like, or the like. The second through holes 314 are arranged at intervals along a length direction of the signal line 131.
  • The second through holes 314 are not aligned with the first through holes 114, preventing copper foils of a copper laminate from collapsing during the pressing of the copper laminate on the inner circuit board 10. In one embodiment, in a thickness direction of the high-frequency circuit board 100, projections of the second through holes 314 and projections of the first through holes 114 alternate with each other.
  • The second substrate layer 31 may be a rigid resin layer or a flexible resin layer. The second substrate layer 31 and the first substrate layer 11 may be made of the same or different materials. In one embodiment, the second substrate layer 31 is made of a material having a dielectric constant of less than 3.5.
  • In an alternative embodiment, the high-frequency circuit board 100 further includes two adhesive layers 40. The two adhesive layers 40 attach the two outer circuit boards 30 to the inner circuit board 10. One adhesive layer 40 is sandwiched between the first substrate layer 11 and the second substrate layer 31 of one outer circuit board 30, and the other adhesive layer 40 is sandwiched between the first conductor layer 13 and the second substrate layer 31 of the other outer circuit board 30. Each of the adhesive layers 40 defines an opening 41. In the width direction of the high-frequency circuit board 100, a width of the opening 41 is greater than the width of the signal line 131 and is less than a straight-line distance between the two ground lines 132. The signal line 131 is in the opening 41 of one adhesive layer 40, and the adhesive layer 40 partially infills the slots 134.
  • The second conductor layers 33 function as shielding layers of the signal line 131. The high-frequency circuit board 100 further includes a plurality of conductive pillars 60 on both sides of signal line 131. The conductive pillars 60 are electrically connected to the second conductor layers 33 and the ground lines 132. The conductive pillars 60, the second conductor layers 33, and the ground lines 132 surround the signal line 131 and together act as a shield preventing electromagnetic interference from the environment in the signal line 131. Some conductive pillars 60 located on one side of the signal line 131 are arranged at equal or non-equal distances along the length direction of the signal line 131. In one embodiment, each of the conductive pillars 60 penetrates the first substrate layer 11, two adhesive layers, and two second substrate layers 31, and is electrically connected to one ground line 132 and two second conductor layers 33.
  • The high-frequency circuit board 100 further includes two protective layers 70. The two protective layers 70 are arranged on two outer sides of the two outer circuit boards 30, and protect the second conductor layers 33. In one embodiment, the protective layers 70 are covering layers. In other embodiment, the protective layers 70 may be solder resisting layers. The two protective layers 70 may be attached to the outer sides of the two outer circuit boards 30 by adhesive layers 40.
  • One embodiment of a method for manufacturing a high-frequency circuit board includes the steps of:
  • S1, providing an inner circuit board including a first substrate layer and a first conductor layer on a surface of the first substrate layer, the first conductor layer including a signal line and two ground lines arranged at intervals on both sides of the signal line, and the first substrate layer having a plurality of first through holes corresponding to the signal line;
  • S2, providing two copper clad laminates, each of the two copper clad laminates including a second substrate layer and a copper foil on a surface of the second substrate layer, the second substrate layer having a plurality of second through holes;
  • S3, pressing together the two copper clad laminates on two sides of the inner circuit board, the second substrate layer abutting the inner circuit board, and the second through holes non-aligned with the first through holes;
  • S4, forming a second conductor layer on the copper foil to obtain the high-frequency circuit board.
  • As shown in FIG. 3, in step S1, an inner circuit board 10 is provided. The inner circuit board 10 includes a first substrate layer 11 and a first conductor layer 13 disposed on a surface of the first substrate layer 11. The first conductor layer 13 includes a signal line 131 and two ground lines 132. The two ground lines 132 are arranged at intervals on both sides of the signal line 131. The first substrate layer 11 defines a plurality of first through holes 114, and the signal line 131 is exposed in the first through holes 114.
  • The first conductor layer 13 is made of copper, and includes a signal line 131 and two ground lines 132. The first conductor layer 13 defines slots 134 passing through the first conductor layer 13. Each slot 134 isolates one ground line 132 from the signal line 131. The first substrate layer 11 covers one side of the first conductor layer 13.
  • The substrate layer 11 includes a first opening region 111 and a first non-opening region 113 connected to each other. The first opening region 111 corresponds in position to the signal line 131. In a width direction W of the high-frequency circuit board 100, a width of the first opening region 111 is not greater than a width of the signal line 131. The first opening region 111 defines first through holes 114, and the signal line 131 is exposed in the first through holes 114. Each of the first through holes 114 penetrates a surface of the first substrate layer 11 abutting the first conductor layer 13 and a surface of the first substrate layer 11 away from the first conductor layer 13. A cross-section of each of the first through holes 114 may be round, slot-like, or the like. The first through holes 114 are arranged at intervals along a length direction of the signal line 131. The first through holes 114 may be formed by laser cutting or punching.
  • The first substrate layer 11 may be a rigid resin layer, such as a prepreg (PP) layer including glass fiber and epoxy resin, or may be a flexible resin layer, such as a polyethylene naphthalate (PEN) layer, a polyimide (PI) layer, a polyethylene terephthalate (PET) layer, a polytetrafluoroethylene (Teflon) layer, a polythiamine (PA) layer, a poly methyl methacrylate (PMMA) layer, a polycarbonate (PC) layer, or a polyimide-polyethylene-terephthalate copolymer layer. In one embodiment, the first substrate layer 11 is made of a material having a dielectric constant of less than 3.5, such as polyethylene naphthalate.
  • As shown in FIG. 4, in step S2, two copper clad laminates 80 are provided. Each of the two copper clad laminates 80 includes a second substrate layer 31 and a copper foil 81 on a side of the second substrate layer 31. The second substrate layer 31 has second through holes 314.
  • The second substrate layer 31 includes a second opening region 311 and a second non-opening region 313 connected to each other. The second opening region 311 corresponds in position to the signal line 131. In the width direction W of the high-frequency circuit board 100, a width of the second opening region 311 is not less than the width of the signal line 131. The second opening region 311 defines second through holes 314. The second through holes 314 may be formed by laser cutting or punching.
  • The second substrate layer 31 may be a rigid resin layer or a flexible resin layer. The second substrate layer 31 and the first substrate layer 11 may be made of the same or different materials. In one embodiment, the second substrate layer 31 is made of a material having a dielectric constant of less than 3.5.
  • As shown in FIG. 5, the two copper clad laminates 80 are pressed onto opposite two sides of the inner circuit board 10, the second substrate layer 31 abuts the inner circuit board 10, and the second through holes 314 are not aligned with the first through holes 114. In one embodiment, in a thickness direction of the high-frequency circuit board 100, projections of the second through holes 314 and projections of the first through holes 114 alternate with each other.
  • In an alternative embodiment, the two copper clad laminates 80 are adhered to two sides of the inner circuit board 10 by adhesive layers 40. One adhesive layer 40 is sandwiched between the first substrate layer 11 and the second substrate layer 31 of one outer circuit board 30, and the other adhesive layer 40 is sandwiched between the first conductor layer 13 and the second substrate layer 31 of the other outer circuit board 30. The adhesive layers 40 may be prepregs. Each of the adhesive layers 40 defines an opening 41. In the width direction of the high-frequency circuit board 100, a width of the opening 41 is greater than the width of the signal line 131 but less than a straight-line distance between the two ground lines 132. After being pressed together, the signal line 131 is in the opening 41 of one adhesive layer 40, and the adhesive layer 40 partially infills the slots 134.
  • As shown in FIGS. 6 and 7, after step S3, the method further includes a step of forming conductive pillars 60. The conductive pillars 60 are located on both sides of signal line 131, and are electrically connected to the ground lines 132 and the copper foils 81 of the copper clad laminates 80.
  • Specifically, each of the conductive pillars 60 is formed by forming a via 61 on the first substrate 11, the two adhesive layers 40, and the two substrate layers 31, the ground line 132 being exposed in the via 61. The via 61 is infilled or electroplated with conductive materials to form the conductive pillar 60.
  • As shown in FIG. 1 and FIG. 7, in step S4, two conductor layers 33 are formed on the two copper foils 81 to obtain the high-frequency circuit board 100. The copper foils 81 undergoes a photolithography process to form the second conductor layers 33. One second conductor layer 33 and one second substrate layer 31 constitute one outer circuit board 30.
  • After forming the second conductor layers 33, the method further includes the step of forming two protective layers 70 on two outer sides of the two outer circuit boards 30. The protective layers 70 protect the second conductor layers 33. In one embodiment, the protective layers 70 are covering layers. In other embodiment, the protective layers 70 may be solder resisting layers. The two protective layers 70 may be attached to the outer sides of the two outer circuit boards 30 by two adhesive layers 40.
  • In the high-frequency circuit board 100, the first substrate layer 11 of the inner circuit board 10 and the second substrate layers 31 of the outer circuit boards 30 all define through holes corresponding to the signal line 131. The signal line 131 is at least in part surrounded by air, air having a very low dielectric constant, attenuation of the signal line 131 during transmission is thereby reduced. The second through holes 314 are non-aligned with the first through holes 114, so as to prevent the copper foils 81 of the copper laminates 80 from collapsing during the pressing together of the copper laminates 80 on the inner circuit board 10.
  • While the present disclosure has been described with reference to particular embodiments, the description is illustrative of the disclosure and is not to be construed as limiting the disclosure. Therefore, those of ordinary skill in the art can make various modifications to the embodiments without departing from the scope of the disclosure as defined by the appended claims.

Claims (12)

1. A high-frequency circuit board comprising:
an inner circuit board comprising a first conductor layer and a first substrate layer, the first conductor layer comprising a signal line and two ground lines arranged at intervals on both sides of the signal line, the first substrate layer covering a side of the first conductor layer and having a plurality of first through holes exposing the signal line; and
two outer circuit boards respectively disposed on two outer sides of the first conductor layer and the first substrate layer, each of the two outer circuit boards comprising a second substrate layer and a second conductor layer covering the second substrate layer, the second substrate layer abutting the inner circuit board and having a plurality of second through holes non-aligned with the plurality of first through holes.
2. The high-frequency circuit board of claim 1, further comprising two adhesive layers sandwiched between the two outer circuit boards and the inner circuit board, wherein each of the two adhesive layers defines an opening exposing the signal line.
3. The high-frequency circuit board of claim 2, wherein in a width direction of the high-frequency circuit board, a width of the opening is greater than a width of the signal line and is less than a straight-line distance between the two ground lines.
4. The high-frequency circuit board of claim 1, wherein the first substrate layer comprises a first opening region, the plurality of first through holes are located in the first opening region; the second substrate layer comprises a second opening region, the plurality of second through holes are located in the second opening region; in the width direction of the high-frequency circuit board, a width of the first opening region is not greater than the width of the signal line, and a width of the second opening region is not less than the width of the signal line.
5. The high-frequency circuit board of claim 1, further comprising a plurality of conductive pillars, wherein each of the plurality of conductive pillars electrically connects one of the two ground lines and the two second conductor layer of one of the two outer circuit boards.
6. The high-frequency circuit board of claim 1, further comprising two protective layers on two outer sides of the two outer circuit boards.
7. A method for manufacturing a high-frequency circuit board comprising:
providing an inner circuit board including a first substrate layer and a first conductor layer on a surface of the first substrate layer, the first conductor layer including a signal line and two ground lines arranged at intervals on both sides of the signal line, the first substrate layer having a plurality of first through holes corresponding to the signal line;
providing two copper clad laminates, each of the two copper clad laminates including a second substrate layer and a copper foil on a surface of the second substrate layer, the second substrate layer having a plurality of second through holes;
pressing the two copper clad laminates on two sides of the inner circuit board, the second substrate layer abutting the inner circuit board, and the second through holes non-aligned with the first through holes; and
forming a second conductor layer on the copper foil to obtain the high-frequency circuit board.
8. The method of claim 7, wherein the two copper clad laminates are adhered on the two sides of the inner circuit board by two adhesive layers, each of the two adhesive layers defines an opening exposing the signal line.
9. The method of claim 8, wherein in a width direction of the high-frequency circuit board, a width of the opening is greater than a width of the signal line and is less than a straight-line distance between the two ground lines.
10. The method of claim 7, wherein the first substrate layer comprises a first opening region, the plurality of first through holes are located in the first opening region; the second substrate layer comprises a second opening region, the plurality of second through holes are located in the second opening region; in the width direction of the high-frequency circuit board, a width of the first opening region is not greater than the width of the signal line, and a width of the second opening region is not less than the width of the signal line.
11. The method of claim 7, further comprising forming a plurality of conductive pillars after pressing the two copper clad laminates, wherein the plurality of conductive pillars are located on both sides of the signal line, and each of the plurality of conductive pillars electrically connects one of the two ground lines and the two second conductor layer of one of the two outer circuit boards.
12. The method of claim 7, further comprising forming two protective layers on two outer side of the two outer circuit boards.
US17/029,355 2020-06-03 2020-09-23 High-frequency circuit board and method for manufacturing the same Active US11197368B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US17/512,901 US11700685B2 (en) 2020-06-03 2021-10-28 Method for manufacturing the same

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN202010494280.1A CN113766725B (en) 2020-06-03 2020-06-03 High-frequency circuit board and manufacturing method thereof
CN202010494280.1 2020-06-03

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US17/512,901 Division US11700685B2 (en) 2020-06-03 2021-10-28 Method for manufacturing the same

Publications (2)

Publication Number Publication Date
US11197368B1 US11197368B1 (en) 2021-12-07
US20210385939A1 true US20210385939A1 (en) 2021-12-09

Family

ID=78783123

Family Applications (2)

Application Number Title Priority Date Filing Date
US17/029,355 Active US11197368B1 (en) 2020-06-03 2020-09-23 High-frequency circuit board and method for manufacturing the same
US17/512,901 Active 2040-11-26 US11700685B2 (en) 2020-06-03 2021-10-28 Method for manufacturing the same

Family Applications After (1)

Application Number Title Priority Date Filing Date
US17/512,901 Active 2040-11-26 US11700685B2 (en) 2020-06-03 2021-10-28 Method for manufacturing the same

Country Status (3)

Country Link
US (2) US11197368B1 (en)
CN (1) CN113766725B (en)
TW (1) TWI749744B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114554691A (en) * 2020-11-25 2022-05-27 鹏鼎控股(深圳)股份有限公司 Ultra-long circuit board and preparation method thereof

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6696906B1 (en) * 2001-05-30 2004-02-24 Hewlett-Packard Development Company, L.P. Low dielectric loss signal line having a conductive trace supported by filaments
JP4063533B2 (en) * 2001-12-10 2008-03-19 日本碍子株式会社 Flexible wiring board
US6747340B2 (en) * 2002-03-15 2004-06-08 Memx, Inc. Multi-level shielded multi-conductor interconnect bus for MEMS
JP4024563B2 (en) * 2002-03-15 2007-12-19 株式会社日立製作所 Semiconductor device
TWI238513B (en) * 2003-03-04 2005-08-21 Rohm & Haas Elect Mat Coaxial waveguide microstructures and methods of formation thereof
KR100999529B1 (en) * 2008-09-04 2010-12-08 삼성전기주식회사 Printed circuit board having micro strip line, printed circuit board having strip line and method of manufacturing thereof
CN102083282B (en) * 2009-11-27 2012-11-21 富葵精密组件(深圳)有限公司 Method for manufacturing printed circuit board (PCB)
CN103179785B (en) * 2011-12-21 2016-01-13 深南电路有限公司 A kind of wiring board and preparation method thereof
CN106332434B (en) * 2015-06-24 2019-01-04 鹏鼎控股(深圳)股份有限公司 Flexible circuit board and preparation method thereof
CN106470523B (en) * 2015-08-19 2019-04-26 鹏鼎控股(深圳)股份有限公司 Flexible circuit board and preparation method thereof
CN106488642A (en) * 2015-08-27 2017-03-08 富葵精密组件(深圳)有限公司 Flexible circuit board and preparation method thereof
CN106922072A (en) * 2015-12-28 2017-07-04 富葵精密组件(深圳)有限公司 Flexible PCB and preparation method thereof
CN106973483B (en) * 2016-01-13 2019-03-08 宏启胜精密电子(秦皇岛)有限公司 Flexible circuit board and preparation method thereof
CN108289368B (en) * 2017-01-09 2020-07-24 鹏鼎控股(深圳)股份有限公司 High-frequency signal transmission structure and manufacturing method thereof
KR102350739B1 (en) * 2017-03-06 2022-01-13 삼성전자주식회사 Substrate including a plurality of signal lines and electronic device having the same
TWI750428B (en) * 2018-11-22 2021-12-21 易鼎股份有限公司 Conductive circuit structure including conductive resin layer
JP7363103B2 (en) * 2019-05-30 2023-10-18 東洋インキScホールディングス株式会社 Electromagnetic shielding sheets and printed wiring boards
US11721632B2 (en) * 2019-10-28 2023-08-08 Intel Corporation Hybrid core substrate architecture for high speed signaling and FLI/SLI reliability and its making
KR20210073802A (en) * 2019-12-11 2021-06-21 삼성전기주식회사 Substrate with electronic component embedded therein

Also Published As

Publication number Publication date
TWI749744B (en) 2021-12-11
US11700685B2 (en) 2023-07-11
CN113766725B (en) 2023-06-20
US11197368B1 (en) 2021-12-07
TW202147939A (en) 2021-12-16
CN113766725A (en) 2021-12-07
US20220053629A1 (en) 2022-02-17

Similar Documents

Publication Publication Date Title
US9136576B2 (en) Connecting structure for a waveguide converter having a first waveguide substrate and a second converter substrate that are fixed to each other
US11252818B2 (en) Printed circuit board and method for manufacturing the same
US8648668B2 (en) Electrical impedance precision control of signal transmission line for circuit board
CN110662342B (en) Rigid-flex board and manufacturing method thereof
US20180020538A1 (en) Multilayer flexible printed circuit board
US11700685B2 (en) Method for manufacturing the same
CN107835561B (en) Circuit board containing electromagnetic wave shielding film and manufacturing method thereof
EP2031944B1 (en) Printed wiring board
KR101055542B1 (en) Rigid-flexible printed circuit boards and manufacturing method thereof
US11582859B2 (en) Method for manufacturing flexible circuit board
JP2011023547A (en) Circuit board
US10863620B1 (en) Bendable circuit board and method for manufacturing the same
JP2006059962A (en) Rigid flex circuit board and manufacturing method thereof
US6515236B2 (en) Printed wiring board and manufacturing method of the printed wiring board
JP5617374B2 (en) Printed wiring board
CN111132443B (en) Circuit board with shielding structure and manufacturing method thereof
JP2005236153A (en) Multilayer circuit board, and manufacturing method thereof
JP2008288516A (en) Flexible substrate
TWI823523B (en) Circuit board and method for manufacturing the same
JP2020088197A (en) Resin multilayer substrate and electronic apparatus
US20210399397A1 (en) High-frequency signal transmission structureand method for manufacturing the same
CN114762460B (en) Circuit board and manufacturing method thereof
TW202410761A (en) Circuit board and method for manufacturing the same
CN117641698A (en) Circuit board and manufacturing method thereof
CN115580982A (en) Semi-flexible circuit board and manufacturing method thereof

Legal Events

Date Code Title Description
AS Assignment

Owner name: QING DING PRECISION ELECTRONICS (HUAIAN) CO.,LTD, CHINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SHEN, FU-YUN;HU, XIAN-QIN;REEL/FRAME:053858/0182

Effective date: 20200918

Owner name: AVARY HOLDING (SHENZHEN) CO., LIMITED., CHINA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:SHEN, FU-YUN;HU, XIAN-QIN;REEL/FRAME:053858/0182

Effective date: 20200918

FEPP Fee payment procedure

Free format text: ENTITY STATUS SET TO UNDISCOUNTED (ORIGINAL EVENT CODE: BIG.); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

STCF Information on status: patent grant

Free format text: PATENTED CASE