US20210088860A1 - Pixel array substrate - Google Patents
Pixel array substrate Download PDFInfo
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- US20210088860A1 US20210088860A1 US16/721,839 US201916721839A US2021088860A1 US 20210088860 A1 US20210088860 A1 US 20210088860A1 US 201916721839 A US201916721839 A US 201916721839A US 2021088860 A1 US2021088860 A1 US 2021088860A1
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- array substrate
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133345—Insulating layers
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/56—Substrates having a particular shape, e.g. non-rectangular
Definitions
- the disclosure relates to a pixel array substrate.
- Display panels are more and more widely applied in various fields, such as home audio-visual entertainments, public information display billboards, e-sports displays, and portable electronic products.
- display panels are gradually further applied in the field of vehicles and wearable electronic products for example, rear-view mirrors for vehicles, instrument panels for vehicles, multi-function electronic watches/bracelets.
- Most of the displays on these electronic apparatus are free-form display panels with oval, circular, or other non-rectangular appearances.
- a sealant needs to be coated along an edge of the free-form substrate.
- the sealant at a bending segment of the edge of the free form substrate is prone to deviation.
- An embodiment of the disclosure provides a pixel array substrate, so as to help monitor a deviation degree of a sealant and/or help coat a sealant accurately.
- a pixel array substrate of the disclosure includes a substrate, a plurality of pixel structures, a peripheral trace and a plurality of first patterns.
- the substrate has an active area and a peripheral area outside the active area.
- the plurality of pixel structures is disposed in the active area of the substrate.
- Each of the pixel structures includes a signal line, an active device electrically connected to the signal line and a pixel electrode electrically connected to the active device.
- the peripheral trace is disposed in the peripheral area of the substrate.
- the plurality of first patterns is disposed in the peripheral area of the substrate.
- Each of the first patterns includes a first trunk portion and at least one first branch portion crossed with the first trunk portion. The first trunk portion is electrically connected to the peripheral trace or the signal line of the pixel structure.
- a pixel array substrate of the disclosure includes a substrate, a plurality of pixel structures, a peripheral trace and a plurality of first patterns.
- the substrate has an active area, a peripheral area outside the active area, and an edge, where the edge of the substrate has a curve segment.
- the plurality of pixel structures is disposed in the active area of the substrate.
- Each of the pixel structures includes a signal line, an active device electrically connected to the signal line and a pixel electrode electrically connected to the active device.
- the peripheral trace is disposed in the peripheral area of the substrate, and has a curve segment, where the curve segment of the peripheral trace is disposed corresponding to the curve segment of the substrate.
- the plurality of first patterns is disposed in the peripheral area of the substrate, and arranged along the curve segment of the peripheral trace.
- Each of the first patterns includes a first trunk portion and at least one first branch portion crossed with the first trunk portion. The first trunk portion is electrically connected to the peripheral trace or the signal line of the pixel structure.
- FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the disclosure.
- FIG. 2 is a partial enlarged view of a pixel array substrate 100 according to an embodiment of the disclosure.
- FIG. 3 shows an edge 100 c of a substrate 110 and a plurality of second patterns 150 according to an embodiment of the disclosure.
- FIG. 4 shows an edge 100 c of a substrate 110 and a plurality of second patterns 150 according to an embodiment of the disclosure.
- FIG. 5 is a partial enlarged view of a pixel array substrate 100 A according to another embodiment of the disclosure.
- FIG. 6 is a partial enlarged view of a pixel array substrate 100 B according to still another embodiment of the disclosure.
- FIG. 7 is a partial enlarged view of a pixel array substrate 100 C according to yet another embodiment of the disclosure.
- FIG. 8 is a partial enlarged view of a pixel array substrate 100 D according to an embodiment of the disclosure.
- FIG. 9 is a partial enlarged view of a pixel array substrate 100 E according to another embodiment of the disclosure.
- FIG. 10 is a partial enlarged view of a pixel array substrate 100 F according to still another embodiment of the disclosure.
- FIG. 11 is a partial enlarged view of a pixel array substrate 100 G according to yet embodiment of the disclosure.
- FIG. 12 is a partial enlarged view of a pixel array substrate 100 H according to an embodiment of the disclosure.
- a component of a layer, a film, an area, a substrate, or the like are referred to as being “on” another component or “connected to” another component, the component may be directly on the another component or connected to the another component, or an intermediate component may alternatively exist. On the contrary, when the component is referred to as being “directly on another component” or “directly connected to” another component, there is no intermediate component.
- a “connection” may refer to a physical connection or an electrical connection.
- an “electrical connection” or a “coupling” may mean that other components exist between two components.
- FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the disclosure.
- FIG. 2 is a partial enlarged view of a pixel array substrate 100 according to an embodiment of the disclosure.
- FIG. 2 corresponds to a part R of FIG. 1 .
- FIG. 1 shows a substrate 110 and a peripheral trace 130 of the pixel array substrate 100 , and omits other components of the pixel array substrate 100 .
- the omitted other components of the pixel array substrate in FIG. 1 are show in FIG. 2 .
- the pixel array substrate 100 includes a substrate 110 .
- the substrate 110 has an active area 110 a and a peripheral area 110 b outside the active area 110 a .
- the substrate 110 may be a free-form substrate, and an edge 110 c of the substrate 100 may include a curve segment 110 d .
- the disclosure is not limited thereto.
- the substrate 110 may be a rectangular substrate according to other embodiments.
- materials of the substrate 110 may be glass, quartz, an organic polymer, or an opaque/reflective material (for example, a wafer, a ceramic, or other applicable materials), or other applicable materials.
- the pixel array substrate 100 includes a plurality of pixel structures 120 , disposed in the active area 110 a of the substrate 110 .
- Each of the pixel structures 120 includes a signal line DL, an active device T electrically connected to the signal line DL and a pixel electrode 122 electrically connected to the active device T.
- the active device T may include: a thin film transistor, having a source S, a drain D, and a gate G.
- the pixel electrode 122 is electrically connected to the drain D of the thin film transistor.
- the signal line DL is electrically connected to the source S of the thin film transistor, and the signal line DL may be referred to as a data line.
- Each of the pixel structures 120 further includes a signal line GL crossed with the signal line DL, where the signal line GL is electrically connected to the gate G of the thin film transistor, and the signal line GL may be referred to as a gate line.
- the pixel array substrate 100 includes a peripheral trace 130 , disposed in the peripheral area 110 b of the substrate 110 .
- a main portion 132 of the peripheral trace 130 extends along the edge 110 c of the substrate 110
- the main portion 132 of the peripheral trace 130 has a curve segment 132 a , where the curve segment 132 a of the peripheral trace 130 is disposed corresponding to the curve segment 110 d of the edge 110 c of the substrate 110 .
- Each of the pixel structures may further include a shared electrode 124 .
- the peripheral trace 130 located in the peripheral area 110 b may be electrically connected to the shared electrode 124 located in the active area 110 a .
- the disclosure is not limited thereto.
- the peripheral trace 130 and the shared electrode 124 located in the active area 110 a may be electrically insulated from each other, and have different signals.
- the pixel array substrate 100 includes a plurality of first patterns 140 , disposed in the peripheral area 110 b of the substrate 110 .
- Each of the first patterns 140 includes a first trunk portion 142 and at least one first branch portion 144 .
- the at least one first branch portion 144 is crossed with the first trunk portion 142 .
- the first trunk portion 142 extends in a direction of being crossed with the edge 100 c of the substrate 100
- the first pattern 140 includes a plurality of first branch portions 144 crossed with and insulated from the first trunk portion 142 .
- the first pattern 140 overlaps a sealant 160 .
- the sealant 160 , the pixel array substrate 100 , and the opposite substrate jointly surround a display medium (for example, but not limited to a liquid crystal).
- the plurality of first branch portions 144 of the first pattern 140 may define a plurality of distances between the edge 160 c of the sealant 160 and the edge 110 c of the substrate 110 . Functions of the plurality of first branch portions 144 of the first pattern 140 are similar to a scale, and an offset degree of the sealant 160 can be directly discriminated and read by using the plurality of first branch portions 144 of the first pattern 140 .
- the first trunk portion 142 of the first pattern 140 may be electrically connected to the peripheral trace 130 .
- the disclosure is not limited thereto.
- the first trunk portion 142 of the first pattern 140 may alternatively be electrically connected to the signal line DL of the pixel structure 120 . This is to be described below in the following paragraphs in combination with other figures.
- the signal line DL of each of pixel structures 120 has an extension portion DLa extending to the peripheral area 110 b , and each of the first patterns 140 is disposed between a plurality of extension portions DLa of two adjacent signal lines DL of the plurality of pixel structures 120 . Because the first patterns 140 is disposed between the plurality of extension portions DLa of the two adjacent signal lines DL, in addition to serving as a tool to evaluate the offset degree of the sealant 160 , the first patterns 140 may further serve as a bucking electrode between the two adjacent signal lines DL, to further improve electrical properties of the pixel array substrate 100 .
- the pixel array substrate 100 may optionally include a plurality of second patterns 150 .
- the second pattern 150 is disposed in the peripheral area 110 b of the substrate 110 , where graphs of the second patterns 150 are different from graphs of the first patterns.
- Each of the second patterns 150 includes a second trunk portion 152 and a second branch portion 154 , where the second branch portion 154 is crossed with the second trunk portion 152 .
- the second trunk portion 152 of the second pattern 150 may be a long line segment, and the second branch portion 154 may be a block pattern overlapping the long line segment.
- the disclosure is not limited thereto.
- the second pattern 150 may alternatively be designed as other patterns.
- the second pattern 150 is used as an alignment mark for coating the sealant 160 .
- a machine can coat the sealant 160 more accurately through disposition of the second pattern 150 .
- the second trunk portion 152 of the second pattern 150 may be electrically connected to the peripheral trace 130 .
- the disclosure is not limited thereto.
- the second trunk portion 152 of the second pattern 150 may alternatively be electrically connected to the signal line DL of the pixel structure 120 . This is to be described below in the following paragraphs in combination with other figures.
- the signal line DL of each of pixel structures 120 has an extension portion DLa extending to the peripheral area 110 b , and each of the second patterns 150 is disposed between a plurality of extension portions DLa of two adjacent signal lines DL of the plurality of pixel structures 120 . Because the second pattern 150 is disposed between the plurality of extension portions DLa of the two adjacent signal lines DL, in addition to serving as the alignment mark for coating the sealant 160 , the second patterns 150 may further serve as a bucking electrode between the two adjacent signal lines DL, to further improve electrical properties of the pixel array substrate 100 .
- FIG. 3 shows an edge 100 c of a substrate 110 and a plurality of second patterns 150 according to an embodiment of the disclosure.
- the edge 110 c of the substrate 110 has a first segment 110 c - 1 and a second segment 110 c - 2 , where a curvature radius of the first segment 110 c - 1 is less than a curvature radius of the second segment 110 c - 2 , and a disposition density of the plurality of second patterns 150 beside the first segment 110 c - 1 is greater than a disposition density of the plurality of second patterns 150 beside the second segment 110 c - 2 .
- a relatively large quantity of second patterns 150 may be disposed in a position in which the curvature radius of the edge 110 c of the substrate 110 changes greatly, to help a machine coat the sealant 160 accurately in the position in which the curvature radius changes greatly based on a plurality of second patterns 150 that are relatively dense.
- FIG. 4 shows an edge 100 c of a substrate 110 and a plurality of second patterns 150 according to an embodiment of the disclosure.
- the edge 110 c of the substrate 110 has a first segment 110 c - 1 and a second segment 110 c - 2 , where a curvature radius of the first segment 110 c - 1 is less than a curvature radius of the second segment 110 c - 2 , and a disposition density of the plurality of first patterns 140 beside the first segment 110 c - 1 is greater than a disposition density of the plurality of first patterns 140 beside the second segment 110 c - 2 .
- a relatively large quantity of first patterns 140 may be disposed in a position in which the curvature radius of the edge 110 c of the substrate 110 changes greatly, so as to monitor an offset degree of the sealant 160 .
- the first trunk portion 142 of each of the first patterns 140 and the peripheral trace 130 optionally belong to a same film layer, and are directly connected.
- the first trunk portion 142 of each of the first patterns 140 and the first branch portion 144 optionally belong to a same film layer.
- the second trunk portion 142 of each of the second patterns 150 and the peripheral trace 130 optionally belong to a same film layer, and are directly connected.
- the second trunk portion 152 of each of the second patterns 150 and the second branch portion 154 optionally belong to a same film layer.
- the disclosure is not limited thereto.
- FIG. 5 is a partial enlarged view of a pixel array substrate 100 A according to another embodiment of the disclosure.
- the pixel array substrate 100 A in FIG. 5 is similar to the pixel array substrate 100 in FIG. 5 .
- a difference between the pixel array substrate 100 A and the pixel array substrate 100 lies in that: in the embodiment of FIG. 5 , the first trunk portion 142 of each of the first patterns 140 and the first branch portion 144 belong to different film layers. To be specific, an insulation layer (not shown) may be sandwiched between the first trunk portion 142 and the first branch portion 144 .
- the second trunk portion 152 of each of the second patterns and the second branch portion 154 belong to different film layers. To be specific, an insulation layer (not shown) may be sandwiched between the second trunk portion 152 and the second branch portion 154 .
- FIG. 6 is a partial enlarged view of a pixel array substrate 100 B according to still another embodiment of the disclosure.
- the pixel array substrate 100 B in FIG. 6 is similar to the pixel array substrate 100 in FIG. 2 .
- a difference between the pixel array substrate 100 B and the pixel array substrate 100 lies in that: in the embodiment of FIG. 6 , the substrate 110 has an edge 110 c , distances between a plurality of first branch portions 144 of the first pattern 140 and the edge 110 c are different, and graphs of the plurality of first branch portions 144 are different.
- a line width W of the first branch portion 144 may vary (for example, but not limited to, increasing) as the first branch portion 144 is away from the edge 110 c of the substrate 110 .
- the plurality of first branch portions 144 of the first pattern 140 with different graphs help quickly discriminated and read an offset degree of the sealant 160 .
- FIG. 7 is a partial enlarged view of a pixel array substrate 100 C according to yet another embodiment of the disclosure.
- the pixel array substrate 100 C in FIG. 7 is similar to the pixel array substrate 100 in FIG. 2 .
- a difference between the pixel array substrate 100 C and the pixel array substrate 100 lies in that: in the embodiment of FIG. 7 , the substrate 110 has an edge 110 c , distances between a plurality of first branch portions 144 of the first pattern 140 and the edge 110 c are different, and graphs of the plurality of first branch portions 144 are different.
- each of the first branch portions 144 of the first pattern 140 includes at least one thin line 144 a , and a quantity of the thin lines 144 a included in the first branch portion 144 may increase as the first branch portion 144 is away from the edge 110 c of the substrate 110 .
- the disclosure is not limited thereto.
- FIG. 8 is a partial enlarged view of a pixel array substrate 100 D according to an embodiment of the disclosure.
- FIG. 9 is a partial enlarged view of a pixel array substrate 100 E according to another embodiment of the disclosure.
- FIG. 10 is a partial enlarged view of a pixel array substrate 100 F according to still another embodiment of the disclosure.
- FIG. 11 is a partial enlarged view of a pixel array substrate 100 G according to yet embodiment of the disclosure.
- the pixel array substrate 100 D in FIG. 8 , the pixel array substrate 100 E in FIG. 9 , the pixel array substrate 100 F in FIG. 10 , and the pixel array substrate 100 G in FIG. 11 are similar to the pixel array substrate 100 in FIG. 2 , the pixel array substrate 100 A in FIG. 5 , the pixel array substrate 100 B in FIG. 6 , and the pixel array substrate 100 C in FIG. 7 respectively.
- a difference between two similar pixel array substrates lies in that: in the embodiments of FIG. 8 , FIG. 9 , FIG. 10 , and FIG. 11 , each of first trunk portions 142 of the first pattern 140 is electrically connected to the signal line DL of the pixel structure 120 .
- each of first trunk portions 142 of the first pattern 140 is electrically connected to the signal line DL of the pixel structure 120 .
- the peripheral trace 130 further includes a plurality of branch portions 134 extending from the main portion 132 to the pixel structure 120 .
- Each of the first patterns 140 electrically connected to the data line DL is located between two adjacent branch portions 134
- each of the second patterns 150 electrically connected to the data line DL is located between the two adjacent branch portions 134 .
- a plurality of first patterns 140 and a plurality of second patterns 150 may be considered as a plurality of data lines DL and a plurality of extension portions DLa, and the branch portion 134 of the peripheral trace 130 may serve as a bucking electrode between two adjacent signal lines DL, to further improve electrical properties of the pixel array substrates 100 D, 100 E, 100 F, and 100 G.
- FIG. 12 is a partial enlarged view of a pixel array substrate 100 H according to an embodiment of the disclosure.
- the pixel array substrate 100 H in FIG. 12 is similar to the pixel array substrate 100 in FIG. 2 .
- a difference between the pixel array substrate 100 H and the pixel array substrate 100 lies in that: in the embodiment of FIG. 12 , the peripheral trace 130 located in the peripheral area 110 b and the shared electrode 124 located in the active area 110 a may be electrically insulated from each other, and have different signals.
- the foregoing pixel array substrates 100 , 100 A to 100 H all include both the first pattern 140 and the second pattern 150 .
- the disclosure is not limited thereto.
- the second pattern 150 may alternatively be omitted, and a function of an alignment mark of the second pattern 150 may be achieved by using the first pattern 140 .
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Abstract
Description
- This application claims the priority benefit of Taiwan application serial no. 108134558, filed on Sep. 25, 2019. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
- The disclosure relates to a pixel array substrate.
- Display panels are more and more widely applied in various fields, such as home audio-visual entertainments, public information display billboards, e-sports displays, and portable electronic products. In recent years, display panels are gradually further applied in the field of vehicles and wearable electronic products for example, rear-view mirrors for vehicles, instrument panels for vehicles, multi-function electronic watches/bracelets. Most of the displays on these electronic apparatus are free-form display panels with oval, circular, or other non-rectangular appearances. In a process of manufacturing a free-form display panel, a sealant needs to be coated along an edge of the free-form substrate. However, the sealant at a bending segment of the edge of the free form substrate is prone to deviation.
- An embodiment of the disclosure provides a pixel array substrate, so as to help monitor a deviation degree of a sealant and/or help coat a sealant accurately.
- A pixel array substrate of the disclosure includes a substrate, a plurality of pixel structures, a peripheral trace and a plurality of first patterns. The substrate has an active area and a peripheral area outside the active area. The plurality of pixel structures is disposed in the active area of the substrate. Each of the pixel structures includes a signal line, an active device electrically connected to the signal line and a pixel electrode electrically connected to the active device. The peripheral trace is disposed in the peripheral area of the substrate. The plurality of first patterns is disposed in the peripheral area of the substrate. Each of the first patterns includes a first trunk portion and at least one first branch portion crossed with the first trunk portion. The first trunk portion is electrically connected to the peripheral trace or the signal line of the pixel structure.
- A pixel array substrate of the disclosure includes a substrate, a plurality of pixel structures, a peripheral trace and a plurality of first patterns. The substrate has an active area, a peripheral area outside the active area, and an edge, where the edge of the substrate has a curve segment. The plurality of pixel structures is disposed in the active area of the substrate. Each of the pixel structures includes a signal line, an active device electrically connected to the signal line and a pixel electrode electrically connected to the active device. The peripheral trace is disposed in the peripheral area of the substrate, and has a curve segment, where the curve segment of the peripheral trace is disposed corresponding to the curve segment of the substrate. The plurality of first patterns is disposed in the peripheral area of the substrate, and arranged along the curve segment of the peripheral trace. Each of the first patterns includes a first trunk portion and at least one first branch portion crossed with the first trunk portion. The first trunk portion is electrically connected to the peripheral trace or the signal line of the pixel structure.
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FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the disclosure. -
FIG. 2 is a partial enlarged view of apixel array substrate 100 according to an embodiment of the disclosure. -
FIG. 3 shows an edge 100 c of asubstrate 110 and a plurality ofsecond patterns 150 according to an embodiment of the disclosure. -
FIG. 4 shows an edge 100 c of asubstrate 110 and a plurality ofsecond patterns 150 according to an embodiment of the disclosure. -
FIG. 5 is a partial enlarged view of apixel array substrate 100A according to another embodiment of the disclosure. -
FIG. 6 is a partial enlarged view of apixel array substrate 100B according to still another embodiment of the disclosure. -
FIG. 7 is a partial enlarged view of apixel array substrate 100C according to yet another embodiment of the disclosure. -
FIG. 8 is a partial enlarged view of apixel array substrate 100D according to an embodiment of the disclosure. -
FIG. 9 is a partial enlarged view of apixel array substrate 100E according to another embodiment of the disclosure. -
FIG. 10 is a partial enlarged view of apixel array substrate 100F according to still another embodiment of the disclosure. -
FIG. 11 is a partial enlarged view of apixel array substrate 100G according to yet embodiment of the disclosure. -
FIG. 12 is a partial enlarged view of apixel array substrate 100H according to an embodiment of the disclosure. - Reference is now made to exemplary embodiments of the disclosure in detail, and examples of the exemplary embodiments are illustrated in the accompany drawings. Whenever possible, same component symbols in figures and descriptions are used to represent same or similar parts.
- It should be understood that, when a component of a layer, a film, an area, a substrate, or the like are referred to as being “on” another component or “connected to” another component, the component may be directly on the another component or connected to the another component, or an intermediate component may alternatively exist. On the contrary, when the component is referred to as being “directly on another component” or “directly connected to” another component, there is no intermediate component. As used in this specification, a “connection” may refer to a physical connection or an electrical connection. Moreover, an “electrical connection” or a “coupling” may mean that other components exist between two components.
- Terms “about”, “approximately”, or “essentially” used in this specification include an average value within an acceptable deviation range of a specific value determined by a person of ordinary skill in the art and a value, considering a discussed measurement and a specific quantity (namely, a constrain of a measurement system) of deviations related to the measurement. For example, “about” may represent a deviation within one or more standard deviations of the value or within ±30%, ±20%, ±10%, or ±5%. Moreover, the terms “about”, “approximately”, or “essentially” used in this specification may be selected from a relatively acceptable deviation range or standard deviation based on an optical property, an etching property or other properties, and a standard deviation may not be applied to all properties.
- Unless defined otherwise, all terms (including technical and scientific terms) used in this specification have the same meanings as a person of ordinary skill in the art of the disclosure generally understands. It needs to be further understood that, terms such as those defined in a commonly used dictionary should be interpreted as having meanings consistent with the meanings of the terms in the related art and in the context of the disclosure, and should not be interpreted as having ideal or excessively formal meanings, unless as specifically defined in this specification.
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FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the disclosure. -
FIG. 2 is a partial enlarged view of apixel array substrate 100 according to an embodiment of the disclosure.FIG. 2 corresponds to a part R ofFIG. 1 . -
FIG. 1 shows asubstrate 110 and aperipheral trace 130 of thepixel array substrate 100, and omits other components of thepixel array substrate 100. The omitted other components of the pixel array substrate inFIG. 1 are show inFIG. 2 . - Referring to
FIG. 1 andFIG. 2 , thepixel array substrate 100 includes asubstrate 110. Thesubstrate 110 has anactive area 110 a and aperipheral area 110 b outside theactive area 110 a. For example, in the present embodiment, thesubstrate 110 may be a free-form substrate, and anedge 110 c of thesubstrate 100 may include acurve segment 110 d. However, the disclosure is not limited thereto. Thesubstrate 110 may be a rectangular substrate according to other embodiments. In the present embodiment, materials of thesubstrate 110 may be glass, quartz, an organic polymer, or an opaque/reflective material (for example, a wafer, a ceramic, or other applicable materials), or other applicable materials. - The
pixel array substrate 100 includes a plurality ofpixel structures 120, disposed in theactive area 110 a of thesubstrate 110. Each of thepixel structures 120 includes a signal line DL, an active device T electrically connected to the signal line DL and apixel electrode 122 electrically connected to the active device T. For example, in the present embodiment, the active device T may include: a thin film transistor, having a source S, a drain D, and a gate G. Thepixel electrode 122 is electrically connected to the drain D of the thin film transistor. The signal line DL is electrically connected to the source S of the thin film transistor, and the signal line DL may be referred to as a data line. Each of thepixel structures 120 further includes a signal line GL crossed with the signal line DL, where the signal line GL is electrically connected to the gate G of the thin film transistor, and the signal line GL may be referred to as a gate line. - The
pixel array substrate 100 includes aperipheral trace 130, disposed in theperipheral area 110 b of thesubstrate 110. For example, in the present embodiment, amain portion 132 of theperipheral trace 130 extends along theedge 110 c of thesubstrate 110, and themain portion 132 of theperipheral trace 130 has acurve segment 132 a, where thecurve segment 132 a of theperipheral trace 130 is disposed corresponding to thecurve segment 110 d of theedge 110 c of thesubstrate 110. - Each of the pixel structures may further include a shared
electrode 124. In the present embodiment, theperipheral trace 130 located in theperipheral area 110 b may be electrically connected to the sharedelectrode 124 located in theactive area 110 a. However, the disclosure is not limited thereto. In other embodiments, theperipheral trace 130 and the sharedelectrode 124 located in theactive area 110 a may be electrically insulated from each other, and have different signals. - The
pixel array substrate 100 includes a plurality offirst patterns 140, disposed in theperipheral area 110 b of thesubstrate 110. Each of thefirst patterns 140 includes afirst trunk portion 142 and at least onefirst branch portion 144. The at least onefirst branch portion 144 is crossed with thefirst trunk portion 142. In the present embodiment, thefirst trunk portion 142 extends in a direction of being crossed with the edge 100 c of thesubstrate 100, and thefirst pattern 140 includes a plurality offirst branch portions 144 crossed with and insulated from thefirst trunk portion 142. - In the present embodiment, the
first pattern 140 overlaps asealant 160. When thepixel array substrate 100 and an opposite substrate (not shown) are combined to form a display panel (not shown), thesealant 160, thepixel array substrate 100, and the opposite substrate jointly surround a display medium (for example, but not limited to a liquid crystal). In the present embodiment, the plurality offirst branch portions 144 of thefirst pattern 140 may define a plurality of distances between theedge 160 c of thesealant 160 and theedge 110 c of thesubstrate 110. Functions of the plurality offirst branch portions 144 of thefirst pattern 140 are similar to a scale, and an offset degree of thesealant 160 can be directly discriminated and read by using the plurality offirst branch portions 144 of thefirst pattern 140. - In addition, in the present embodiment, the
first trunk portion 142 of thefirst pattern 140 may be electrically connected to theperipheral trace 130. However, the disclosure is not limited thereto. In other embodiments, thefirst trunk portion 142 of thefirst pattern 140 may alternatively be electrically connected to the signal line DL of thepixel structure 120. This is to be described below in the following paragraphs in combination with other figures. - In the present embodiment, the signal line DL of each of
pixel structures 120 has an extension portion DLa extending to theperipheral area 110 b, and each of thefirst patterns 140 is disposed between a plurality of extension portions DLa of two adjacent signal lines DL of the plurality ofpixel structures 120. Because thefirst patterns 140 is disposed between the plurality of extension portions DLa of the two adjacent signal lines DL, in addition to serving as a tool to evaluate the offset degree of thesealant 160, thefirst patterns 140 may further serve as a bucking electrode between the two adjacent signal lines DL, to further improve electrical properties of thepixel array substrate 100. - In the present embodiment, the
pixel array substrate 100 may optionally include a plurality ofsecond patterns 150. Thesecond pattern 150 is disposed in theperipheral area 110 b of thesubstrate 110, where graphs of thesecond patterns 150 are different from graphs of the first patterns. Each of thesecond patterns 150 includes asecond trunk portion 152 and asecond branch portion 154, where thesecond branch portion 154 is crossed with thesecond trunk portion 152. For example, in the present embodiment, thesecond trunk portion 152 of thesecond pattern 150 may be a long line segment, and thesecond branch portion 154 may be a block pattern overlapping the long line segment. However, the disclosure is not limited thereto. In other embodiments, thesecond pattern 150 may alternatively be designed as other patterns. - In the present embodiment, the
second pattern 150 is used as an alignment mark for coating thesealant 160. A machine can coat thesealant 160 more accurately through disposition of thesecond pattern 150. In addition, in the present embodiment, thesecond trunk portion 152 of thesecond pattern 150 may be electrically connected to theperipheral trace 130. However, the disclosure is not limited thereto. In other embodiments, thesecond trunk portion 152 of thesecond pattern 150 may alternatively be electrically connected to the signal line DL of thepixel structure 120. This is to be described below in the following paragraphs in combination with other figures. - In the present embodiment, the signal line DL of each of
pixel structures 120 has an extension portion DLa extending to theperipheral area 110 b, and each of thesecond patterns 150 is disposed between a plurality of extension portions DLa of two adjacent signal lines DL of the plurality ofpixel structures 120. Because thesecond pattern 150 is disposed between the plurality of extension portions DLa of the two adjacent signal lines DL, in addition to serving as the alignment mark for coating thesealant 160, thesecond patterns 150 may further serve as a bucking electrode between the two adjacent signal lines DL, to further improve electrical properties of thepixel array substrate 100. -
FIG. 3 shows an edge 100 c of asubstrate 110 and a plurality ofsecond patterns 150 according to an embodiment of the disclosure. Referring toFIG. 1 andFIG. 3 , in the present embodiment, theedge 110 c of thesubstrate 110 has afirst segment 110 c-1 and asecond segment 110 c-2, where a curvature radius of thefirst segment 110 c-1 is less than a curvature radius of thesecond segment 110 c-2, and a disposition density of the plurality ofsecond patterns 150 beside thefirst segment 110 c-1 is greater than a disposition density of the plurality ofsecond patterns 150 beside thesecond segment 110 c-2. In other words, a relatively large quantity ofsecond patterns 150 may be disposed in a position in which the curvature radius of theedge 110 c of thesubstrate 110 changes greatly, to help a machine coat thesealant 160 accurately in the position in which the curvature radius changes greatly based on a plurality ofsecond patterns 150 that are relatively dense. -
FIG. 4 shows an edge 100 c of asubstrate 110 and a plurality ofsecond patterns 150 according to an embodiment of the disclosure. Referring toFIG. 1 andFIG. 4 , in the present embodiment, theedge 110 c of thesubstrate 110 has afirst segment 110 c-1 and asecond segment 110 c-2, where a curvature radius of thefirst segment 110 c-1 is less than a curvature radius of thesecond segment 110 c-2, and a disposition density of the plurality offirst patterns 140 beside thefirst segment 110 c-1 is greater than a disposition density of the plurality offirst patterns 140 beside thesecond segment 110 c-2. In other words, a relatively large quantity offirst patterns 140 may be disposed in a position in which the curvature radius of theedge 110 c of thesubstrate 110 changes greatly, so as to monitor an offset degree of thesealant 160. - Referring to
FIG. 2 , in the present embodiment, thefirst trunk portion 142 of each of thefirst patterns 140 and theperipheral trace 130 optionally belong to a same film layer, and are directly connected. Thefirst trunk portion 142 of each of thefirst patterns 140 and thefirst branch portion 144 optionally belong to a same film layer. Thesecond trunk portion 142 of each of thesecond patterns 150 and theperipheral trace 130 optionally belong to a same film layer, and are directly connected. Thesecond trunk portion 152 of each of thesecond patterns 150 and thesecond branch portion 154 optionally belong to a same film layer. However, the disclosure is not limited thereto. - It should be noted that, the following embodiments follow the component labels and partial content of the foregoing embodiments, where a same label is used to represent a same or similar component, and descriptions of the same technical content are omitted. For descriptions of the omitted part, refer to the foregoing embodiments, and the descriptions thereof are no longer repeated in the following embodiments.
-
FIG. 5 is a partial enlarged view of apixel array substrate 100A according to another embodiment of the disclosure. - The
pixel array substrate 100A inFIG. 5 is similar to thepixel array substrate 100 inFIG. 5 . A difference between thepixel array substrate 100A and thepixel array substrate 100 lies in that: in the embodiment ofFIG. 5 , thefirst trunk portion 142 of each of thefirst patterns 140 and thefirst branch portion 144 belong to different film layers. To be specific, an insulation layer (not shown) may be sandwiched between thefirst trunk portion 142 and thefirst branch portion 144. Thesecond trunk portion 152 of each of the second patterns and thesecond branch portion 154 belong to different film layers. To be specific, an insulation layer (not shown) may be sandwiched between thesecond trunk portion 152 and thesecond branch portion 154. -
FIG. 6 is a partial enlarged view of apixel array substrate 100B according to still another embodiment of the disclosure. - The
pixel array substrate 100B inFIG. 6 is similar to thepixel array substrate 100 inFIG. 2 . A difference between thepixel array substrate 100B and thepixel array substrate 100 lies in that: in the embodiment ofFIG. 6 , thesubstrate 110 has anedge 110 c, distances between a plurality offirst branch portions 144 of thefirst pattern 140 and theedge 110 c are different, and graphs of the plurality offirst branch portions 144 are different. For example, in the present embodiment, a line width W of thefirst branch portion 144 may vary (for example, but not limited to, increasing) as thefirst branch portion 144 is away from theedge 110 c of thesubstrate 110. The plurality offirst branch portions 144 of thefirst pattern 140 with different graphs help quickly discriminated and read an offset degree of thesealant 160. -
FIG. 7 is a partial enlarged view of apixel array substrate 100C according to yet another embodiment of the disclosure. - The
pixel array substrate 100C inFIG. 7 is similar to thepixel array substrate 100 inFIG. 2 . A difference between thepixel array substrate 100C and thepixel array substrate 100 lies in that: in the embodiment ofFIG. 7 , thesubstrate 110 has anedge 110 c, distances between a plurality offirst branch portions 144 of thefirst pattern 140 and theedge 110 c are different, and graphs of the plurality offirst branch portions 144 are different. For example, in the present embodiment, each of thefirst branch portions 144 of thefirst pattern 140 includes at least onethin line 144 a, and a quantity of thethin lines 144 a included in thefirst branch portion 144 may increase as thefirst branch portion 144 is away from theedge 110 c of thesubstrate 110. However, the disclosure is not limited thereto. -
FIG. 8 is a partial enlarged view of apixel array substrate 100D according to an embodiment of the disclosure. -
FIG. 9 is a partial enlarged view of apixel array substrate 100E according to another embodiment of the disclosure. -
FIG. 10 is a partial enlarged view of apixel array substrate 100F according to still another embodiment of the disclosure. -
FIG. 11 is a partial enlarged view of apixel array substrate 100G according to yet embodiment of the disclosure. - The
pixel array substrate 100D inFIG. 8 , thepixel array substrate 100E inFIG. 9 , thepixel array substrate 100F inFIG. 10 , and thepixel array substrate 100G inFIG. 11 are similar to thepixel array substrate 100 inFIG. 2 , thepixel array substrate 100A inFIG. 5 , thepixel array substrate 100B inFIG. 6 , and thepixel array substrate 100C inFIG. 7 respectively. A difference between two similar pixel array substrates (namely, thepixel array substrate 100D and thepixel array substrate 100, thepixel array substrate 100E and thepixel array substrate 100A, thepixel array substrate 100F and thepixel array substrate 100B, or thepixel array substrate 100G and thepixel array substrate 100C) lies in that: in the embodiments ofFIG. 8 ,FIG. 9 ,FIG. 10 , andFIG. 11 , each offirst trunk portions 142 of thefirst pattern 140 is electrically connected to the signal line DL of thepixel structure 120. In addition, in the embodiments ofFIG. 8 ,FIG. 9 ,FIG. 10 , andFIG. 11 , in addition to including themain portion 132 extending along theedge 110 c of thesubstrate 110, theperipheral trace 130 further includes a plurality ofbranch portions 134 extending from themain portion 132 to thepixel structure 120. Each of thefirst patterns 140 electrically connected to the data line DL is located between twoadjacent branch portions 134, and each of thesecond patterns 150 electrically connected to the data line DL is located between the twoadjacent branch portions 134. - In other words, in the embodiments of
FIG. 8 ,FIG. 9 ,FIG. 10 , andFIG. 11 , a plurality offirst patterns 140 and a plurality ofsecond patterns 150 may be considered as a plurality of data lines DL and a plurality of extension portions DLa, and thebranch portion 134 of theperipheral trace 130 may serve as a bucking electrode between two adjacent signal lines DL, to further improve electrical properties of thepixel array substrates -
FIG. 12 is a partial enlarged view of apixel array substrate 100H according to an embodiment of the disclosure. - The
pixel array substrate 100H inFIG. 12 is similar to thepixel array substrate 100 inFIG. 2 . A difference between thepixel array substrate 100H and thepixel array substrate 100 lies in that: in the embodiment ofFIG. 12 , theperipheral trace 130 located in theperipheral area 110 b and the sharedelectrode 124 located in theactive area 110 a may be electrically insulated from each other, and have different signals. - In addition, it should be noted that the foregoing
pixel array substrates first pattern 140 and thesecond pattern 150. However, the disclosure is not limited thereto. According to other embodiments, for the foregoingpixel array substrates second pattern 150 may alternatively be omitted, and a function of an alignment mark of thesecond pattern 150 may be achieved by using thefirst pattern 140.
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CN104252074B (en) * | 2013-06-28 | 2017-04-26 | 群创光电股份有限公司 | pixel array substrate and liquid crystal display device |
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