US20200185880A1 - Semiconductor laser mounting with intact diffusion barrier layer - Google Patents

Semiconductor laser mounting with intact diffusion barrier layer Download PDF

Info

Publication number
US20200185880A1
US20200185880A1 US16/259,172 US201916259172A US2020185880A1 US 20200185880 A1 US20200185880 A1 US 20200185880A1 US 201916259172 A US201916259172 A US 201916259172A US 2020185880 A1 US2020185880 A1 US 2020185880A1
Authority
US
United States
Prior art keywords
barrier layer
contact surface
diffusion barrier
approximately
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US16/259,172
Inventor
Alfred Feitisch
Gabi Neubauer
Mathias Schrempel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SpectraSensors Inc
Original Assignee
SpectraSensors Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SpectraSensors Inc filed Critical SpectraSensors Inc
Priority to US16/259,172 priority Critical patent/US20200185880A1/en
Publication of US20200185880A1 publication Critical patent/US20200185880A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H01S5/02272
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/0235Method for mounting laser chips
    • H01S5/02355Fixing laser chips on mounts
    • H01S5/0237Fixing laser chips on mounts by soldering
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/17Systems in which incident light is modified in accordance with the properties of the material investigated
    • G01N21/25Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands
    • G01N21/31Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry
    • G01N21/39Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using tunable lasers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/0233Mounting configuration of laser chips
    • H01S5/02345Wire-bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/06Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
    • H01S5/068Stabilisation of laser output parameters
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/17Systems in which incident light is modified in accordance with the properties of the material investigated
    • G01N21/25Colour; Spectral properties, i.e. comparison of effect of material on the light at two or more different wavelengths or wavelength bands
    • G01N21/31Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry
    • G01N21/39Investigating relative effect of material at wavelengths characteristic of specific elements or molecules, e.g. atomic absorption spectrometry using tunable lasers
    • G01N2021/396Type of laser source
    • G01N2021/399Diode laser
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/03Manufacturing methods
    • H01L2224/038Post-treatment of the bonding area
    • H01L2224/0383Reworking, e.g. shaping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05664Palladium [Pd] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05666Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05669Platinum [Pt] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/0567Zirconium [Zr] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/0568Molybdenum [Mo] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05681Tantalum [Ta] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05684Tungsten [W] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/05686Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109Indium [In] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29139Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2924/15738Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
    • H01L2924/15747Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/02Structural details or components not essential to laser action
    • H01S5/022Mountings; Housings
    • H01S5/02208Mountings; Housings characterised by the shape of the housings
    • H01S5/02212Can-type, e.g. TO-CAN housings with emission along or parallel to symmetry axis

Definitions

  • the present disclosure relates to an amperometric sensor for determining measurement values of a measurand representing a chlorine dioxide content of a measuring fluid.
  • the subject matter described herein relates to frequency stabilization of semiconductor lasers, in particular to mounting techniques for such lasers.
  • a tunable laser-based trace gas analyzer such as for example a tunable diode laser absorption spectrometer (TDLAS) can employ a narrow line width (e.g. approximately single frequency) laser light source that is tuned across a trace gas absorption frequency range of a target analyte for each measurement of a sample volume of gas.
  • the laser light source in such an analyzer exhibits no material change in the starting and ending frequency of successive laser scans under a constant laser injection current and operating temperature.
  • long term stability of the frequency tuning rate of the laser as a function of the laser injection current, over the scan range, and over repetitive scans over a prolonged period of service can also be desirable.
  • tunable laser sources e.g. diode lasers and semiconductor lasers
  • a typical trace gas absorption band line width can in some instances be on the order of a fraction of a nanometer to microns.
  • drift or other variations in the output intensity of the laser light source can, over time, introduce critical errors in identification and quantification of trace gas analytes, particularly in gas having one or more background compounds whose absorption spectra might interfere with absorption features of a target analyte.
  • a method for frequency stabilization of semiconductor lasers comprises forming a first contact surface of a semiconductor single-frequency laser chip for a tunable laser-based trace gas analyzer to a target surface roughness, applying a metallization layer comprising 600 ⁇ 10-10 m of titanium to the first contact surface, and applying a metallic diffusion barrier layer to the first contact surface over the metallization layer, the metallic diffusion barrier layer including multiple layers of differing materials.
  • the method further comprises applying a solder preparation layer to the first contact surface subsequent to applying the metallic diffusion barrier layer and prior to soldering, wherein the solder preparation layer includes an approximately 2000 to 5000 ⁇ 10-10 m thickness of gold, and soldering the laser chip along the first contact surface to a carrier mounting using a solder composition, wherein the soldering includes melting the solder composition by heating the solder composition to less than a threshold temperature at which dissolution of the metallic diffusion barrier layer into the solder composition occurs, wherein subsequent to the soldering, the metallic diffusion barrier layer remains contiguous and intact such that no direct contact occurs between semiconductor materials of the laser chip and the solder composition, such that no direct path exists by which constituents of any of the laser chip, the solder composition and the carrier mounting can diffuse across the metallic diffusion barrier layer.
  • the solder composition subsequent to the soldering, has substantially temporally stable electrical and thermal conductivities.
  • applying the metallic diffusion barrier layer includes applying a first metallic diffusion barrier layer, the first metallic diffusion barrier layer comprising platinum, and applying a second metallic diffusion barrier layer underlaying the first metallic diffusion barrier layer, the second metallic diffusion barrier layer includes palladium, nickel, tungsten, molybdenum, titanium, tantalum, zirconium, cerium, gadolinium, chromium, manganese, aluminum, beryllium, or yttrium.
  • the method further comprises providing the solder composition as at least one of a solder preform that is substantially non-oxidized and a deposited layer that is substantially non-oxidized.
  • the soldering comprises melting the solder composition under at least one of a reducing atmosphere and a non-oxidizing atmosphere.
  • the solder composition is selected from a group consisting of gold germanium, gold silicon, gold tin, silver tin, silver tin copper, silver tine lead, silver tin lead indium, silver tin antimony, tin lead, lead, silver, silicon, germanium, tin, antimony, bismuth, indium, and copper.
  • the forming of the first contact surface includes polishing the first contact surface to achieve the target surface roughness prior to applying the metallic diffusion barrier layer.
  • the target surface roughness is less than approximately 100 ⁇ 10 ⁇ 10 m RMS, and/or the target surface roughness is less than approximately 40 ⁇ 10 ⁇ 10 m RMS.
  • the threshold temperature is less than approximately 400° C. In yet another embodiment, the threshold temperature is less than approximately 370° C. In still another embodiment, the threshold temperature is less than approximately 340° C.
  • the method further comprises applying another barrier layer to a second contact surface of the carrier mounting, and soldering the laser chip to the carrier mounting along the second contact surface.
  • the method further comprises applying a solder facilitation layer between the first contact surface and a second contact surface on the carrier mounting prior to the soldering, the solder facilitation layer including a metal that is not a component of the solder preparation layer on either the first contact surface or the second contact surface.
  • applying the solder facilitation layer includes at least one of placing a sheet of the metal between the first contact surface and the second contact surface prior to the soldering, and depositing a layer of the metal that is not a component of the solder composition onto one or both of the first contact surface and the second contact surface prior to the soldering.
  • the method further comprises matching a first thermal expansion characteristic of the carrier mounting to a second thermal expansion characteristic of the semiconductor laser chip.
  • a tunable laser-based trace gas analyzer comprising a semiconductor single-frequency laser chip including a first contact surface having a target surface roughness, a metallization layer of 600 ⁇ 10 ⁇ 10 m of titanium applied to the first contact surface, a metallic diffusion barrier layer applied to the metallization layer, wherein the metallic diffusion barrier layer includes multiple layers of differing materials, and a solder preparation layer applied to the metallic diffusion barrier layer, wherein the solder preparation layer includes an approximately 2000 to 5000 ⁇ 10 ⁇ 10 m thickness of gold, and a carrier mounting to which the laser chip is soldered along the first contact surface of the laser chip using a solder composition, wherein the solder composition is heated to less than a threshold temperature at which dissolution of the metallic diffusion barrier layer into the solder composition occurs, and wherein the metallic diffusion barrier layer is contiguous such that the solder composition does not directly contact semiconductor materials of the laser chip, such that there is no direct path by which constituents of any of the laser chip, the solder composition and the carrier mounting can diffuse across
  • the tunable laser-based trace gas analyzer is a tunable diode laser absorption spectrometer.
  • the metallic diffusion barrier layer includes a first metallic diffusion barrier layer including platinum and a second metallic diffusion barrier layer underlaying the first metallic diffusion barrier layer, the second metallic diffusion barrier layer including palladium, nickel, tungsten, molybdenum, titanium, tantalum, zirconium, cerium, gadolinium, chromium, manganese, aluminum, beryllium, or yttrium.
  • the target surface roughness is less than approximately 100 ⁇ 10 ⁇ 10 m RMS, and/or the target surface roughness is less than approximately 40 ⁇ 10 ⁇ 10 m RMS.
  • the tunable laser-based trace gas analyzer further comprises a solder facilitation layer between the first contact surface and a second contact surface on the carrier mounting, the solder facilitation layer including a metal that is not a component of the solder preparation layer on either the first contact surface or the second contact surface.
  • the tunable laser-based trace gas analyzer further comprises another barrier layer applied to a second contact surface of the carrier mounting, wherein the laser chip is soldered to the carrier mounting along the second contact surface.
  • FIG. 1 is a graph illustrating effects of laser drift on performance of a laser absorption spectrometer
  • FIG. 2 is a second graph illustrating additional effects of laser drift on performance of a laser absorption spectrometer
  • FIG. 3 is a schematic diagram illustrating a semiconductor laser chip secured to a carrier mount
  • FIG. 4 is a process flow diagram illustrating aspects of a method having one or more features consistent with implementations of the current subject matter
  • FIG. 5 is a diagram showing an end elevation view of a conventional TO-can mount such as are typically used for mounting semiconductor laser chips;
  • FIG. 6 is a diagram showing a magnified view of a carrier mount and a semiconductor laser chip affixed thereto;
  • FIG. 7 is a scanning electron micrograph showing a solder joint between a semiconductor laser chip and a carrier mount
  • FIG. 8 is a chart showing a phosphorous concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7 ;
  • FIG. 9 is a chart showing a nickel concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7 ;
  • FIG. 10 is a chart showing an indium concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7 ;
  • FIG. 11 is a chart showing a tin concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7 ;
  • FIG. 12 is a chart showing a lead concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7 ;
  • FIG. 13 is a chart showing a tungsten concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7 ;
  • FIG. 14 is a chart showing a gold concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7 .
  • ppm parts per million
  • H 2 S hydrogen sulfide
  • a harmonic (e.g. 2f) wavelength modulation spectral subtraction approach can unacceptably deviate from its calibration state due to a shift in laser output of as small as 20 picometers (pm) at constant injection current and constant temperature (e.g. as controlled by a thermoelectric cooler).
  • a laser frequency shift that can be acceptable for maintaining an analyzer calibration within its accuracy specification drops with smaller target analyte concentrations and also with increasing spectral interferences from other components of a sample mixture at the location of the target analyte absorption.
  • larger laser frequency shifts can be tolerated while maintaining the analyzer calibration state.
  • the graphs 100 and 200 shown in FIG. 1 and FIG. 2 show experimental data illustrating potential negative impacts of laser output variations that may be caused by changes in characteristics (e.g. physical, chemical, and the like) of a semiconductor laser source over time.
  • the reference curve 102 shown in the graph 100 of FIG. 1 was obtained with a tunable diode laser spectrometer for a reference gas mixture containing approximately 25% ethane and 75% ethylene.
  • the test curve 104 was obtained using the same spectrometer after some time had passed for a test gas mixture containing 1 ppm acetylene in a background of approximately 25% ethane and 75% ethylene.
  • Acetylene has a spectral absorption feature in the range of about 300 to 400 on the wavelength axis of the chart 100 in FIG. 1 . If the spectrometer were not adjusted in some manner to compensate for the drift observed in the test curve 104 relative to the reference curve 102 , the measured concentration of acetylene from the spectrometer would be, for example, ⁇ 0.29 ppm instead of the correct value of 1 ppm.
  • the chart 200 shows a reference curve 202 obtained with a tunable diode laser spectrometer for a reference gas mixture containing approximately 25% ethane and 75% ethylene.
  • the test curve 204 was obtained for a test gas mixture containing 1 ppm acetylene in a background of approximately 25% ethane and 75% ethylene.
  • the line shape of the test curve 204 is distorted relative to the line shape of the reference curve 202 due to drift or other factors affecting performance of the laser absorption spectrometer over time.
  • the measured concentration of acetylene in the test gas mixture determined by the spectrometer would be, for example, 1.81 ppm instead of the true concentration of 1 ppm.
  • a current-driven semiconductor laser chip will generate waste heat that increases approximately as the square of the injection current driving the laser. While the resistance, R, of the semiconductor diode laser assembly is not typically linear or constant with changes in temperature, an approximately quadratic increase in waste heat with increases in current is generally representative of real-world performance.
  • Thermal roll-over in which the power output of a laser is reduced at excessive temperatures, can typically occur because the lasing efficiency of a typical band-gap type direct semiconductor laser diode decreases with increasing p-n junction operating temperature. This is especially true for infrared lasers, such as for example lasers based on indium phosphide (InP) or gallium antimonide (GaSb) material systems.
  • Single frequency operation of an infrared semiconductor laser can be achieved by employing DFB (distributed feedback) schemes, which typically use optical gratings, either incorporated in the laser ridge of the semiconductor laser crystal in the form of semiconductor crystal index of refraction periodicities or placed laterally to the laser ridge as metal bars.
  • DFB distributed feedback
  • the effective optical periods of the approaches of the various gratings determining the laser emission wavelength can typically depend upon the physical spacing of the metal bars of the grating or upon the physical dimension of the ridge-regrown semiconductor material zones with different index of refraction and the index of refraction of the respective semiconductor materials.
  • the emission wavelength of a semiconductor laser diode can depend primarily upon the laser p-n junction and on the laser crystal operating temperature and secondarily on the carrier density inside the laser.
  • the laser crystal temperature can change the grating period as a function of the temperature dependent thermal expansion of the laser crystal along its long optical cavity axis and as a function of the temperature dependent index of refraction.
  • Typical injection current-related and temperature-related wavelength tuning rates of infrared lasers useable for tunable diode laser trace gas analyzers can be on the order of approximately 0.1 nanometers per ° C. and approximately 0.1 nanometers per milli-ampere. As such, it can be desirable to maintain semiconductor laser diodes for precision TDLAS devices at a constant operating temperature within a few thousandths of a ° C. and at injection currents that are controlled to within a few nano-amperes.
  • Lasers that may behave as described can include, but are not limited to, lasers limited to single frequency operation by gratings etched into the laser ridge (e.g. conventional telecommunications grade lasers), Bragg gratings (e.g. vertical cavity surface emitting lasers or VCSELs), multiple layer narrow band dielectric mirrors, laterally coupled gratings, and the like.
  • Frequency drift behavior has been observed with semiconductor diode lasers; VCSELs; horizontal cavity surface emitting lasers HCSEL's (HCSELs); quantum cascade lasers built on semiconductor materials including but not limited to indium phosphide (InP), gallium arsenide (GaAs), gallium antimonide (GaSb), gallium nitride (GaN), indium gallium arsenic phosphide (InGaAsP), indium gallium phosphide (InGaP), indium gallium nitride (InGaN), indium gallium arsenide (InGaAs), indium gallium aluminum phosphide (InGaAlP), indium aluminum gallium arsenide (InAlGaAs), indium gallium arsenide (InGaAs), and other single and multiple quantum well structures.
  • InP indium phosphide
  • GaAs gallium arsenide
  • GaSb gallium anti
  • a reference absorption line shape collected during a calibrated state of an analyzer can be compared to a test absorption line shape collected subsequently.
  • One or more operating parameters of the analyzer can be adjusted to cause the test absorption line shape to more closely resemble the reference absorption line shape.
  • Reduction of the underlying causes of frequency instability in semiconductor-based tunable lasers can also be desirable, at least because compensation of laser shift and outputted line shapes to maintain analyzer calibration by adjusting the semiconductor diode laser operating temperature or the median drive current may only be possible over limited wavelength shifts due to a typically non-linear correlation between injection current and frequency shift in semiconductor laser diodes (e.g. because of thermal roll-over as discussed above).
  • the nonlinearity of the frequency shift as a function of injection current may change as a function of laser operating temperature set by a temperature control device (e.g. a thermoelectric cooler or TEC) and the median injection current. At higher control temperatures, thermal roll-over may occur at lower injection currents while at lower control temperatures, the roll-over may occur at higher injection currents. Because the control temperature and injection current combined determine the laser emission wavelength, not all combinations of control temperature and median injection current used to adjust the laser wavelength to the required target analyte absorption line will provide the same frequency scan and absorption spectra.
  • one or more implementations of the current subject matter relate to methods, systems, articles or manufacture, and the like that can, among other possible advantages, provide semiconductor-based lasers that have substantially improved wavelength stability characteristics due to a more temporally stable chemical composition of materials used in affixing a semiconductor laser chip to a mounting device.
  • Some implementations of the current subject matter can provide or include a substantially contiguous and intact diffusion barrier layer that includes at least one non-metallic layer and alternatively at least one non-metallic and at least one metallic barrier layer at or near a contact surface between a semiconductor laser chip and a mounting surface.
  • Drift of single frequency lasers can be reduced or even minimized, according to one or more implementations, by employing semiconductor laser designs, laser processing, electrical connections, and heat sinking features that reduce changes in heat conductivity, in stress and strain on the active laser, and in electrical resistivity of the injection current path over time.
  • FIG. 3 illustrates an example of an apparatus 300 including a semiconductor laser chip 302 affixed to a mounting device 304 by a layer of solder 306 interposed between a contact surface 310 of the semiconductor laser chip 302 and the mounting device 304 .
  • the mounting device can function as a heat sink and can provide one or more electrical connections to the semiconductor laser chip 302 .
  • One or more other electrical connections 312 can be provided to connect a p or n junction of the semiconductor laser chip 302 to a first polarity and the other junction to a second polarity, for example via conduction through the solder layer 306 into the carrier mount 304 .
  • FIG. 4 shows a process flow chart illustrating a method including features that can be present in one or more implementations of the current subject matter.
  • a first contact surface of a semiconductor laser chip is formed to a target surface roughness.
  • the target surface roughness is selected to have a maximum peak to valley height that is substantially smaller than a barrier layer thickness of a barrier layer to be applied to the first contact surface.
  • that barrier layer is applied to the first contact surface with the barrier layer thickness.
  • the barrier layer includes the at least one non-metallic, electrically-conducting compound, examples of which include but are not limited to titanium nitride (TiNX), titanium oxy-nitride (TiNXOY), cerium gadolinium oxy-nitride (CeGdOyNX) cerium oxide (CeO2), and tungsten nitride (WNx).
  • TiNX titanium nitride
  • TiNXOY titanium oxy-nitride
  • CeGdOyNX cerium gadolinium oxy-nitride
  • CeO2 cerium oxide
  • WNx tungsten nitride
  • a contact surface 310 of a laser semiconductor chip 302 can be polished or otherwise prepared to have a target surface roughness of less than approximately 100 ⁇ RMS (root mean square), or alternatively of less than approximately 40 ⁇ RMS.
  • Conventional approaches have typically not focused on the surface roughness of the contact surface 310 and have consequently had surface roughness values of greater than approximately 1 ⁇ m RMS.
  • the contact surface 310 can be treated to form one or more barrier layers.
  • a barrier layer that can survive the soldering process can be aided by polishing of the first contact surface 310 to a low surface roughness.
  • a total thickness of a metallic barrier layer for example one made of platinum, may only be deposited at a limited thickness due to very high stresses that can lead to a separation of thicker layers from the semiconductor material of the semiconductor laser chip 302 .
  • the barrier layer can include multiple layers of differing materials.
  • At least one of the barrier layers can include a non-metallic, electrically conducting compound, such as for example titanium nitride (TiNX), titanium oxy-nitride (TiNXOY), cerium gadolinium oxy-nitride (CeGdyONX), cerium oxide (CeO2), and tungsten nitride (WNx).
  • TiNX titanium nitride
  • TiNXOY titanium oxy-nitride
  • CeGdyONX cerium gadolinium oxy-nitride
  • CeO2 cerium oxide
  • WNx tungsten nitride
  • One or more additional barrier layers overlaying or underlaying the first barrier layer can include a metal including but not limited to platinum (Pt), palladium (Pd), nickel (Ni), tungsten (W), molybdenum (Mo) titanium (Ti), tantalum (Ta), zirconium (Zr), cerium (Ce), gadolinium (Gd), chromium (Cr), manganese (Mn), aluminum (Al), beryllium (Be), and Yttrium (Y).
  • a metal including but not limited to platinum (Pt), palladium (Pd), nickel (Ni), tungsten (W), molybdenum (Mo) titanium (Ti), tantalum (Ta), zirconium (Zr), cerium (Ce), gadolinium (Gd), chromium (Cr), manganese (Mn), aluminum (Al), beryllium (Be), and Yttrium (Y).
  • a solder composition can in some implementations be selected from a composition having a liquidus temperature, i.e. the maximum temperature at which solid crystals of an alloy can co-exist with the melt in thermodynamic equilibrium, of less than approximately 400° C., or optionally of less than approximately 370° C., or optionally of less than approximately 340° C.
  • a liquidus temperature i.e. the maximum temperature at which solid crystals of an alloy can co-exist with the melt in thermodynamic equilibrium
  • solder compositions consistent with one or more implementations of the current subject matter can include, but are not limited to gold germanium (AuGe), gold silicon (AuSi), gold tin (AuSn), silver tin (AgSn), silver tin copper (AgSnCu), silver tin lead (AgSnPb), silver tin lead indium (AgSnPbIn), silver tin antimony (AgSnSb), tin lead (SnPb), and lead (Pb).
  • solder compositions that are consistent with one or more implementations of the current subject matter include, but are not limited to the following: approximately 48% Sn and approximately 52% In; approximately 3% Ag and approximately 97% In; approximately 58% Sn and approximately 42% In; approximately 5% Ag, approximately 15% Pb, and approximately 80% In; approximately 100% In; approximately 30% Pb and approximately 70% In; approximately 2% Ag, approximately 36% Pb, and approximately 62% Sn; approximately 37.5% Pb, approximately 37.5% Sn, and approximately 25% In; approximately 37% Pb and approximately 63% Sn; approximately 40% Pb and approximately 60% In; approximately 30% Pb and approximately 70% Sn; approximately 2.8% Ag, approximately 77.2% Sn, and approximately 20% In; approximately 40% Pb and approximately 60% Sn; approximately 20% Pb and approximately 80% Sn; approximately 45% Pb and approximately 55% Sn; approximately 15% Pb and approximately 85% Sn; approximately 50% Pb and approximately 50% In; approximately 10% Pb and approximately 90% Sn; approximately 10% Au and approximately 90% Sn; approximately 3.5% Ag and
  • FIG. 5 shows an end elevation view of a conventional transistor outline can (TO-can) mount 500 such as is typically used in mounting of semiconductor laser chips for use in telecommunications applications.
  • TO-cans are widely used electronics and optics packaging platforms used for mechanically mounting, electrically connecting, and heat sinking semiconductor chips such as lasers and transistors and are available in a variety of different sizes and configurations.
  • An outer body 502 encloses a post or heat sink member 504 which can be made of metal, such as for example a copper tungsten sintered metal, copper-diamond sintered metal, or iron-nickel alloys including Kovar, alloy 42 , and alloy 52 .
  • Two insulated electrical pass-throughs 506 can be included to provide electrical contacts for connection to the p and n junctions on a semiconductor laser chip 302 .
  • the semiconductor laser chip 302 can be mounted to a carrier sub-mount, which can in some examples be formed of silicon.
  • the semiconductor laser chip 302 can be joined to the carrier mount 304 (also referred to as a carrier mounting) by a layer of solder 306 , which is not shown in FIG. 5 due to scale constraints.
  • FIG. 6 shows a magnified view 600 of the post or heat sink member 504 , the carrier mount 304 , the semiconductor laser chip 302 , and the solder 306 joining the semiconductor laser chip 302 to the carrier mount.
  • the carrier mount 304 can in turn be soldered to the post or heat sink member 504 by a second solder layer 602 .
  • mono-component layers (or surfaces) of a material dissimilar from the solder preparation layer can serve similarly as solder alloys, enabling low temperature joining of two gold surfaces for instance.
  • this is commonly referred to as liquidus or liquid diffusion bonding since it apparently creates a very thin liquid interface layer between certain dissimilar metals which are brought in physical contact under elevated temperature.
  • the temperature necessary to cause this effect to occur is typically significantly lower than the component melting temperatures.
  • thermal separation can typically require quite high temperatures, approaching or reaching the component melting temperatures.
  • contact between a silver surface and a gold surface can result in a hermetic joint at a temperature of approximately 150° C.
  • copper oxide can serve as a bonding promotion layer which can reduce a joining temperature between two metal surfaces significantly below the metal melting points.
  • solder compositions including lead (Pb), silver (Ag), silicon (Si), germanium (Ge), tin (Sn), antimony (Sb), bismuth (Bi), indium (In), and copper (Cu) as well as those discussed elsewhere herein can be used in association with deposition of one or more solder-facilitating mono-component material layers or thin sheets (e.g. preforms) on the first contact surface 310 and/or second contact surface 314 prior to the soldering process.
  • the one or more solder-facilitating mono-component material layers or thin sheets can be dissimilar from other barrier and/or metallization layers on the first contact surface 310 and/or second contact surface 314 .
  • One example of a method for applying solder-facilitating mono-component material layers or thin sheets can include depositing a thin layer of a metal differing from those metals present in the solder preparation layer on top of the barrier and/or metallization layers on the first contact surface 310 and/or second contact surface 314 .
  • a thin layer can be evaporated or otherwise deposited onto one or both of the first contact surface 310 and the second contact surface 314 shortly before the heat assisted joining process takes place, in order to prevent or minimize oxidation.
  • a thin sheet of a metal dissimilar from the solder preparation layer can be placed between the semiconductor laser chip 302 and the mounting device 304 . The soldering process can then proceed as discussed above.
  • FIG. 7 shows an electron micrograph 700 showing a highly magnified solder layer 306 interposed between a semiconductor laser chip 302 and a carrier mount 304 .
  • a second barrier layer 702 of nickel is also provided on the second contact surface 704 of the carrier mount 304 .
  • a vertical axis 706 is displayed atop the electron micrograph to delineate distance from an arbitrarily chosen origin coordinate (marked as “0” on the axis 706 ) to a linear distance of 50 microns away (marked as “50” on the axis 706 ).
  • the semiconductor laser chip 302 shown in FIG. 7 was not prepared with a smooth first contact surface 310 as described herein consistent according various implementations of the current subject matter.
  • FIG. 8 through FIG. 14 show a series of charts 800 , 900 , 1000 , 1100 , 1200 , 1300 , and 1400 showing relative concentrations of phosphorous, nickel, indium, tin, lead, tungsten, and gold, respectively, as a function of distance along the axis 706 in FIG. 7 .
  • the relative concentrations were determined by an X-ray diffraction technique.
  • a large phosphorous concentration is observed in the semiconductor laser chip 302 (distance greater than about 36 ⁇ m) due to the semiconductor laser chip 302 being a crystal of indium phosphide (InP). Additional high relative concentrations of phosphorous are observed in the nickel barrier layer 702 , which is actually formed of a first layer 710 of nickel deposited by an electroless process that incorporates some phosphorous into the deposited nickel and a second layer of nickel deposited by an electrolytic process that incorporates less or no phosphorous into the deposited nickel.
  • a non-zero concentration of phosphorous occurs both in the solder (which is composed of a tin-lead alloy and does not contain any phosphorus in its original state) and in the electrolytic second layer 712 of nickel. These non-zero concentrations are respectively due to diffusion of phosphorous from the crystal structure of the semiconductor laser chip 302 and from the electroless first layer 710 of nickel.
  • FIG. 9 illustrates that some nickel also diffuses into the solder 306 from the nickel layer 702 and further into the crystal structure of the semiconductor laser chip 302 .
  • indium diffuses into the solder 306 and from there into the carrier mount across the nickel barrier layer 702 as shown in the chart 1000 of FIG. 10 .
  • Tin which is a primary component of the solder 306 , does not remain in the solder 306 , but also diffuses into the crystal structure of the semiconductor laser chip 302 as shown in the chat 1100 of FIG. 11 .
  • Lead also diffuses out of the solder layer 306 as shown in the chart 1200 of FIG. 12 , but to a lesser degree than does the tin from the solder 306 .
  • features of the current subject matter that allow the maintenance of a contiguous, intact barrier layer at least at the first contact surface 310 of the semiconductor laser chip 302 , and also desirably at the second contact surface 704 of the carrier mount 304 can be advantageous in minimizing diffusion of elements from the carrier mount and/or semiconductor laser chip across the barrier layer and can thereby aid in maintaining a more temporally consistent composition of both the solder layer 306 and the crystal structure of the semiconductor laser chip 302 .
  • solder layer 306 The presence of phosphorous and/or other reactive compounds or elements, such as for example oxygen, antimony, silicon, iron and the like in the solder layer 306 can increase a tendency of the solder alloy components to react and thereby change in chemical composition, in crystal structure, hermeticity and, more importantly, in electrical and/or thermal conductivity. Such changes can lead to alteration in the laser emission characteristics of a semiconductor laser chip 302 in contact with the solder layer 306 .
  • solder components such as for example lead; silver; tin; and the like; and/or carrier mount components such as tungsten, nickel, iron, copper and the like, into the crystal structure of the semiconductor laser chip 302 can also cause changes in the laser emission characteristics over time.
  • Implementations of the current subject matter can provide one or more advantages, including but not limited to maintaining a contiguous diffusion barrier layer between a laser crystal or other semiconductor chip and its physical mounting, preventing inter-diffusion of solder compounds into the laser crystal and vice versa, and preventing contamination of the solder. Inter-diffusion and/or electro-migration have been found to cause changes in the electrical resistivity, and to a lesser extent the heat conduction properties, of the contact. Very small changes in resistive heating of even one of the electrical contacts providing a driving current to a semiconductor laser chip can lead to frequency changes in the light produced by the semiconductor laser chip.
  • Implementations of the current subject matter can therefore include one or more techniques for improving barrier layers at one or more of the first contact surface 310 between the solder layer 306 and the semiconductor laser chip 302 and the second contact layer 702 between the solder layer 306 and the carrier mount 304 .
  • an improved barrier layer at the second contact surface 702 can include an electroless plated nickel underlayer 710 , for example to preserve edge definition of a copper tungsten submount or the like, covered by a minimum thickness of an electrolytic nickel layer 712 as the final layer before deposition of a gold solder preparation layer.
  • a single layer of a sputtered barrier material including but not limited to at least one of nickel, platinum, palladium, and electrically conducting non-metallic barrier layers, can be used as a single barrier layer at the first contact surface 310 .
  • a sputtered barrier material including but not limited to at least one of nickel, platinum, palladium, and electrically conducting non-metallic barrier layers, can be used as a single barrier layer at the first contact surface 310 .
  • the soldering process can be performed under a non-oxidizing atmosphere or under a reducing atmosphere including but not limited to vacuum, pure nitrogen pure hydrogen gas (H 2 ), forming gas (approximately 5% hydrogen in 95% nitrogen), and formic acid in nitrogen carrier gas to remove or at least reduce the presence of oxidized compounds in the solder composition on the metalized semiconductor contact surface and the carrier mounting surface.
  • a non-oxidizing atmosphere or under a reducing atmosphere including but not limited to vacuum, pure nitrogen pure hydrogen gas (H 2 ), forming gas (approximately 5% hydrogen in 95% nitrogen), and formic acid in nitrogen carrier gas to remove or at least reduce the presence of oxidized compounds in the solder composition on the metalized semiconductor contact surface and the carrier mounting surface.
  • a reducing atmosphere including but not limited to vacuum, pure nitrogen pure hydrogen gas (H 2 ), forming gas (approximately 5% hydrogen in 95% nitrogen), and formic acid in nitrogen carrier gas to remove or at least reduce the presence of oxidized compounds in the solder composition on the
  • Suitable barrier layers to be deposited on the first contact surface 310 and/or the second contact surface 702 can include, but are not limited to, platinum (Pt), palladium (Pd), nickel (Ni), titanium nitride (TiN X ), titanium oxy-nitride (TiN X O Y ), tungsten nitride (WN x ), cerium oxide (CeO 2 ), and cerium gadolinium oxy-nitride (CEGDO Y N X ).
  • the second barrier layer 702 applied to the second contact surface 704 can in some implementations include a sintered diamond-copper layer.
  • a process for creation of a non-metallic, electrically-conducting barrier layer 702 can include first depositing titanium via a thin film deposition process, including but not limited to sputtering, electron beam evaporation, chemical vapor deposition, atomic layer deposition, and the like, and then adding nitrogen to react with the deposited titanium.
  • a first metallization layer can be deposited by a thin film deposition process, and nitrogen ions can be used for sputtering titanium, for example in a nitrogen gas background, to create the non-metallic barrier layer.
  • Chemical vapor deposition can also or alternatively be used to create non-metallic barrier layers.
  • gas phase reactions of the components elements or compounds forming the non-metallic electrically conductive compound can be used to create multi-component non-metallic barrier layers.
  • the heat conductivity of a carrier mount 304 can advantageously exceed 50 Watts per meter-Kelvin or, optionally 100 Watts per meter-Kelvin or, optionally 150 Watts per meter-Kelvin.
  • Suitable carrier mount materials can include, but are not limited to copper tungsten, tungsten, copper-diamond, aluminum nitride, silicon, silicon nitride, silicon carbide, beryllium oxide, alumina (Al2O3), Kovar, Alloy 42, Alloy 52, and the like.
  • a heat spreader or carrier mount 304 that is thermally expansion matched to the semiconductor laser chip 302 can be used in some implementations.
  • an approximately 15% copper, approximately 85% tungsten sintered metal heat spreader, a beryllium oxide heat spreader, an alumina heat spreader, a sapphire heat spreader, a copper-diamond heat spreader, or the like can provide a good thermal expansion match to a gallium antimonide (GaSb) semiconductor laser chip 302 at around approximately 7 ppm° C.-1.
  • GaSb gallium antimonide
  • a pure tungsten heat spreader, a silicon heat spreader, a silicon nitride heat spreader, a silicon carbide heat spreader, a sapphire heat spreader, a copper diamond heat spreader, or an aluminum nitride (AlN) heat spreader can be used as a carrier mount 304 to provide a good thermal expansion match to an indium phosphide (InP) semiconductor laser chip 302 at around 4.5 ppm° C.-1.
  • InP indium phosphide
  • a silicon, silicon carbide, silicon nitride, aluminum nitride, tungsten, copper diamond heat spreader, or the like can also be used as the carrier sub-mount 304 , for example for an indium phosphide (InP) semiconductor laser chip 302 .
  • InP indium phosphide
  • carrier mounts consistent with implementations of the current subject matter include, but are not limited to shaped copper tungsten heat spreaders, including but not limited to semiconductor laser industry standard c-mounts and CT-mounts, TO-cans, pattern metallized ceramics, pattern metallized silicon, pattern metallized silicon carbide, pattern metallized silicon nitride, pattern metallized beryllium oxide, pattern metallized alumina, pattern metallized aluminum nitride, copper-diamond, pure copper with one or more sections of expansion-matched submounts to match to one or more semiconductor laser chip compositions, tungsten submounts brazed into a copper or copper tungsten c-mount, or the like.
  • Semiconductor laser chips 302 can be formed, without limitation of indium phosphide crystals, gallium arsenide crystals, gallium antimonide crystals, gallium nitride crystals, and the like.

Abstract

A first contact surface of a semiconductor laser chip can be formed to a target surface roughness selected to have a maximum peak to valley height that is substantially smaller than a barrier layer thickness. A barrier layer that includes a non-metallic, electrically-conducting compound and that has the barrier layer thickness can be applied to the first contact surface, and the semiconductor laser chip can be soldered to a carrier mounting along the first contact surface using a solder composition by heating the soldering composition to less than a threshold temperature at which dissolution of the barrier layer into the soldering composition occurs. Related systems, methods, articles of manufacture, and the like are also described.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • The present application is a continuation of and claims the priority benefit of U.S. patent application Ser. No. 15/652,177, filed Jul. 17, 2017, which is a continuation of U.S. Ser. No. 14/873,080, filed Oct. 1, 2015, which is a divisional of U.S. Ser. No. 13/212,085, filed Aug. 17, 2011. The present application is also related to co-owned U.S. patent application Ser. No. 13/026,921, filed on Feb. 14, 2011, and to co-owned U.S. patent application Ser. No. 13/027,000, filed on Feb. 14, 2011. The disclosure of each application identified in this paragraph is incorporated by reference herein in its entirety.
  • TECHNICAL FIELD
  • The present disclosure relates to an amperometric sensor for determining measurement values of a measurand representing a chlorine dioxide content of a measuring fluid.
  • The subject matter described herein relates to frequency stabilization of semiconductor lasers, in particular to mounting techniques for such lasers.
  • BACKGROUND
  • A tunable laser-based trace gas analyzer, such as for example a tunable diode laser absorption spectrometer (TDLAS) can employ a narrow line width (e.g. approximately single frequency) laser light source that is tuned across a trace gas absorption frequency range of a target analyte for each measurement of a sample volume of gas. Ideally, the laser light source in such an analyzer exhibits no material change in the starting and ending frequency of successive laser scans under a constant laser injection current and operating temperature. Additionally, long term stability of the frequency tuning rate of the laser as a function of the laser injection current, over the scan range, and over repetitive scans over a prolonged period of service can also be desirable.
  • Depending on the operational wavelength, however, currently available tunable laser sources (e.g. diode lasers and semiconductor lasers) can typically exhibit a wavelength drift on the order of a few picometers (on the order of gigahertz) per day to fractions of picometers per day. A typical trace gas absorption band line width can in some instances be on the order of a fraction of a nanometer to microns. Thus, drift or other variations in the output intensity of the laser light source can, over time, introduce critical errors in identification and quantification of trace gas analytes, particularly in gas having one or more background compounds whose absorption spectra might interfere with absorption features of a target analyte.
  • SUMMARY
  • In one aspect of the present disclosure, a method for frequency stabilization of semiconductor lasers comprises forming a first contact surface of a semiconductor single-frequency laser chip for a tunable laser-based trace gas analyzer to a target surface roughness, applying a metallization layer comprising 600·10-10 m of titanium to the first contact surface, and applying a metallic diffusion barrier layer to the first contact surface over the metallization layer, the metallic diffusion barrier layer including multiple layers of differing materials. The method further comprises applying a solder preparation layer to the first contact surface subsequent to applying the metallic diffusion barrier layer and prior to soldering, wherein the solder preparation layer includes an approximately 2000 to 5000·10-10 m thickness of gold, and soldering the laser chip along the first contact surface to a carrier mounting using a solder composition, wherein the soldering includes melting the solder composition by heating the solder composition to less than a threshold temperature at which dissolution of the metallic diffusion barrier layer into the solder composition occurs, wherein subsequent to the soldering, the metallic diffusion barrier layer remains contiguous and intact such that no direct contact occurs between semiconductor materials of the laser chip and the solder composition, such that no direct path exists by which constituents of any of the laser chip, the solder composition and the carrier mounting can diffuse across the metallic diffusion barrier layer. In an embodiment, subsequent to the soldering, the solder composition has substantially temporally stable electrical and thermal conductivities.
  • In at least one embodiment, applying the metallic diffusion barrier layer includes applying a first metallic diffusion barrier layer, the first metallic diffusion barrier layer comprising platinum, and applying a second metallic diffusion barrier layer underlaying the first metallic diffusion barrier layer, the second metallic diffusion barrier layer includes palladium, nickel, tungsten, molybdenum, titanium, tantalum, zirconium, cerium, gadolinium, chromium, manganese, aluminum, beryllium, or yttrium. In at least one embodiment, the method further comprises providing the solder composition as at least one of a solder preform that is substantially non-oxidized and a deposited layer that is substantially non-oxidized. In an embodiment, the soldering comprises melting the solder composition under at least one of a reducing atmosphere and a non-oxidizing atmosphere. In a further embodiment, the solder composition is selected from a group consisting of gold germanium, gold silicon, gold tin, silver tin, silver tin copper, silver tine lead, silver tin lead indium, silver tin antimony, tin lead, lead, silver, silicon, germanium, tin, antimony, bismuth, indium, and copper.
  • In another embodiment, the forming of the first contact surface includes polishing the first contact surface to achieve the target surface roughness prior to applying the metallic diffusion barrier layer. In an embodiment, the target surface roughness is less than approximately 100·10−10 m RMS, and/or the target surface roughness is less than approximately 40·10−10 m RMS. In a further embodiment, the threshold temperature is less than approximately 400° C. In yet another embodiment, the threshold temperature is less than approximately 370° C. In still another embodiment, the threshold temperature is less than approximately 340° C.
  • In at least one embodiment, the method further comprises applying another barrier layer to a second contact surface of the carrier mounting, and soldering the laser chip to the carrier mounting along the second contact surface. In a further embodiment, the method further comprises applying a solder facilitation layer between the first contact surface and a second contact surface on the carrier mounting prior to the soldering, the solder facilitation layer including a metal that is not a component of the solder preparation layer on either the first contact surface or the second contact surface. In such an embodiment, applying the solder facilitation layer includes at least one of placing a sheet of the metal between the first contact surface and the second contact surface prior to the soldering, and depositing a layer of the metal that is not a component of the solder composition onto one or both of the first contact surface and the second contact surface prior to the soldering. In another embodiment, the method further comprises matching a first thermal expansion characteristic of the carrier mounting to a second thermal expansion characteristic of the semiconductor laser chip.
  • Another aspect of the present disclosure includes a tunable laser-based trace gas analyzer comprising a semiconductor single-frequency laser chip including a first contact surface having a target surface roughness, a metallization layer of 600·10−10 m of titanium applied to the first contact surface, a metallic diffusion barrier layer applied to the metallization layer, wherein the metallic diffusion barrier layer includes multiple layers of differing materials, and a solder preparation layer applied to the metallic diffusion barrier layer, wherein the solder preparation layer includes an approximately 2000 to 5000·10−10 m thickness of gold, and a carrier mounting to which the laser chip is soldered along the first contact surface of the laser chip using a solder composition, wherein the solder composition is heated to less than a threshold temperature at which dissolution of the metallic diffusion barrier layer into the solder composition occurs, and wherein the metallic diffusion barrier layer is contiguous such that the solder composition does not directly contact semiconductor materials of the laser chip, such that there is no direct path by which constituents of any of the laser chip, the solder composition and the carrier mounting can diffuse across the metallic diffusion barrier layer.
  • In at one least one embodiment, the tunable laser-based trace gas analyzer is a tunable diode laser absorption spectrometer. In an embodiment, the metallic diffusion barrier layer includes a first metallic diffusion barrier layer including platinum and a second metallic diffusion barrier layer underlaying the first metallic diffusion barrier layer, the second metallic diffusion barrier layer including palladium, nickel, tungsten, molybdenum, titanium, tantalum, zirconium, cerium, gadolinium, chromium, manganese, aluminum, beryllium, or yttrium. In a further embodiment, the target surface roughness is less than approximately 100·10−10 m RMS, and/or the target surface roughness is less than approximately 40·10−10 m RMS.
  • In at least one embodiment, the tunable laser-based trace gas analyzer further comprises a solder facilitation layer between the first contact surface and a second contact surface on the carrier mounting, the solder facilitation layer including a metal that is not a component of the solder preparation layer on either the first contact surface or the second contact surface. In another embodiment, the tunable laser-based trace gas analyzer further comprises another barrier layer applied to a second contact surface of the carrier mounting, wherein the laser chip is soldered to the carrier mounting along the second contact surface.
  • The details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The accompanying drawings, which are incorporated in and constitute a part of this specification, show certain aspects of the subject matter disclosed herein and, together with the description, help explain one or more features or the principles associated with the disclosed implementations. In the drawings:
  • FIG. 1 is a graph illustrating effects of laser drift on performance of a laser absorption spectrometer;
  • FIG. 2 is a second graph illustrating additional effects of laser drift on performance of a laser absorption spectrometer;
  • FIG. 3 is a schematic diagram illustrating a semiconductor laser chip secured to a carrier mount;
  • FIG. 4 is a process flow diagram illustrating aspects of a method having one or more features consistent with implementations of the current subject matter;
  • FIG. 5 is a diagram showing an end elevation view of a conventional TO-can mount such as are typically used for mounting semiconductor laser chips;
  • FIG. 6 is a diagram showing a magnified view of a carrier mount and a semiconductor laser chip affixed thereto;
  • FIG. 7 is a scanning electron micrograph showing a solder joint between a semiconductor laser chip and a carrier mount;
  • FIG. 8 is a chart showing a phosphorous concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7;
  • FIG. 9 is a chart showing a nickel concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7;
  • FIG. 10 is a chart showing an indium concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7;
  • FIG. 11 is a chart showing a tin concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7;
  • FIG. 12 is a chart showing a lead concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7;
  • FIG. 13 is a chart showing a tungsten concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7; and
  • FIG. 14 is a chart showing a gold concentration measured by X-ray diffraction as a function of depth in the apparatus shown in FIG. 7.
  • When practical, similar reference numbers denote similar structures, features, or elements.
  • DETAILED DESCRIPTION
  • Experimental data have revealed that laser emission wavelength changes as small as 1 picometer (pm) or less between spectral scans in a laser absorption spectrometer using a scannable or tunable laser source can materially alter a trace gas concentration determination with respect to a measurements obtainable with a spectral analyzer in its original calibration state. An example of spectral laser spectroscopy using a differential spectroscopy approach is described in co-owned U.S. Pat. No. 7,704,301, the disclosure of which is incorporated herein in its entirety. Other experimental data have indicated that a tunable diode laser-based analyzer designed for low analyte concentration detection and quantification (e.g. on the order of parts per million (ppm) of hydrogen sulfide (H2S) in natural gas) and employing a harmonic (e.g. 2f) wavelength modulation spectral subtraction approach can unacceptably deviate from its calibration state due to a shift in laser output of as small as 20 picometers (pm) at constant injection current and constant temperature (e.g. as controlled by a thermoelectric cooler).
  • In general terms, a laser frequency shift that can be acceptable for maintaining an analyzer calibration within its accuracy specification drops with smaller target analyte concentrations and also with increasing spectral interferences from other components of a sample mixture at the location of the target analyte absorption. For measurements of higher levels of a target analyte in a substantially non-absorbing background, larger laser frequency shifts can be tolerated while maintaining the analyzer calibration state.
  • The graphs 100 and 200 shown in FIG. 1 and FIG. 2, respectively, show experimental data illustrating potential negative impacts of laser output variations that may be caused by changes in characteristics (e.g. physical, chemical, and the like) of a semiconductor laser source over time. The reference curve 102 shown in the graph 100 of FIG. 1 was obtained with a tunable diode laser spectrometer for a reference gas mixture containing approximately 25% ethane and 75% ethylene. The test curve 104 was obtained using the same spectrometer after some time had passed for a test gas mixture containing 1 ppm acetylene in a background of approximately 25% ethane and 75% ethylene. Acetylene has a spectral absorption feature in the range of about 300 to 400 on the wavelength axis of the chart 100 in FIG. 1. If the spectrometer were not adjusted in some manner to compensate for the drift observed in the test curve 104 relative to the reference curve 102, the measured concentration of acetylene from the spectrometer would be, for example, −0.29 ppm instead of the correct value of 1 ppm.
  • Similarly, in FIG. 2, the chart 200 shows a reference curve 202 obtained with a tunable diode laser spectrometer for a reference gas mixture containing approximately 25% ethane and 75% ethylene. The test curve 204 was obtained for a test gas mixture containing 1 ppm acetylene in a background of approximately 25% ethane and 75% ethylene. As shown in FIG. 2, the line shape of the test curve 204 is distorted relative to the line shape of the reference curve 202 due to drift or other factors affecting performance of the laser absorption spectrometer over time. If the test curve 204 were not corrected to compensate for the distortion observed in the test curve 204 relative to the reference curve 202, the measured concentration of acetylene in the test gas mixture determined by the spectrometer would be, for example, 1.81 ppm instead of the true concentration of 1 ppm.
  • Based on Ohm's Law (i.e. P=I2R where P is the power, I is the current, and R is the resistance), a current-driven semiconductor laser chip will generate waste heat that increases approximately as the square of the injection current driving the laser. While the resistance, R, of the semiconductor diode laser assembly is not typically linear or constant with changes in temperature, an approximately quadratic increase in waste heat with increases in current is generally representative of real-world performance. Thermal roll-over, in which the power output of a laser is reduced at excessive temperatures, can typically occur because the lasing efficiency of a typical band-gap type direct semiconductor laser diode decreases with increasing p-n junction operating temperature. This is especially true for infrared lasers, such as for example lasers based on indium phosphide (InP) or gallium antimonide (GaSb) material systems.
  • Single frequency operation of an infrared semiconductor laser can be achieved by employing DFB (distributed feedback) schemes, which typically use optical gratings, either incorporated in the laser ridge of the semiconductor laser crystal in the form of semiconductor crystal index of refraction periodicities or placed laterally to the laser ridge as metal bars. The effective optical periods of the approaches of the various gratings determining the laser emission wavelength can typically depend upon the physical spacing of the metal bars of the grating or upon the physical dimension of the ridge-regrown semiconductor material zones with different index of refraction and the index of refraction of the respective semiconductor materials. In other words, the emission wavelength of a semiconductor laser diode, such as are typically used for tunable diode laser spectroscopy, can depend primarily upon the laser p-n junction and on the laser crystal operating temperature and secondarily on the carrier density inside the laser. The laser crystal temperature can change the grating period as a function of the temperature dependent thermal expansion of the laser crystal along its long optical cavity axis and as a function of the temperature dependent index of refraction.
  • Typical injection current-related and temperature-related wavelength tuning rates of infrared lasers useable for tunable diode laser trace gas analyzers can be on the order of approximately 0.1 nanometers per ° C. and approximately 0.1 nanometers per milli-ampere. As such, it can be desirable to maintain semiconductor laser diodes for precision TDLAS devices at a constant operating temperature within a few thousandths of a ° C. and at injection currents that are controlled to within a few nano-amperes.
  • Long term maintenance and regeneration of a TDLAS calibration state and the related long term measurement fidelity with respect to the original instrument calibration can require the ability to substantially replicate the correct laser operating parameters in the wavelength space for any given measurement. This can be desirable for spectroscopy techniques employing subtraction of spectral traces (e.g. differential spectroscopy), such as is described in co-owned U.S. Pat. No. 7,704,301; pending U.S. patent applications Ser. Nos. 13/027,000 and 13/026,091 and 12/814,315; and U.S. Provisional Application No. 61/405,589, the disclosures of which are incorporated by reference herein.
  • Commercially available single frequency semiconductor lasers that are suitable for trace gas spectroscopy in the 700 nm to 3000 nm spectral range have been found to generally exhibit a drift of their center frequency over time. Drift rates of several picometers (pm) to fractions of a pm per day have been confirmed by performing actual molecular trace gas spectroscopy over periods of 10 days to more than 100 days. Lasers that may behave as described can include, but are not limited to, lasers limited to single frequency operation by gratings etched into the laser ridge (e.g. conventional telecommunications grade lasers), Bragg gratings (e.g. vertical cavity surface emitting lasers or VCSELs), multiple layer narrow band dielectric mirrors, laterally coupled gratings, and the like. Frequency drift behavior has been observed with semiconductor diode lasers; VCSELs; horizontal cavity surface emitting lasers HCSEL's (HCSELs); quantum cascade lasers built on semiconductor materials including but not limited to indium phosphide (InP), gallium arsenide (GaAs), gallium antimonide (GaSb), gallium nitride (GaN), indium gallium arsenic phosphide (InGaAsP), indium gallium phosphide (InGaP), indium gallium nitride (InGaN), indium gallium arsenide (InGaAs), indium gallium aluminum phosphide (InGaAlP), indium aluminum gallium arsenide (InAlGaAs), indium gallium arsenide (InGaAs), and other single and multiple quantum well structures.
  • Approaches have been previously described to re-validate the performance of a tunable laser. For example, as described in U.S. patent application Ser. Nos. 13/026,921 and 13/027,000 referenced above, a reference absorption line shape collected during a calibrated state of an analyzer can be compared to a test absorption line shape collected subsequently. One or more operating parameters of the analyzer can be adjusted to cause the test absorption line shape to more closely resemble the reference absorption line shape.
  • Reduction of the underlying causes of frequency instability in semiconductor-based tunable lasers can also be desirable, at least because compensation of laser shift and outputted line shapes to maintain analyzer calibration by adjusting the semiconductor diode laser operating temperature or the median drive current may only be possible over limited wavelength shifts due to a typically non-linear correlation between injection current and frequency shift in semiconductor laser diodes (e.g. because of thermal roll-over as discussed above). The nonlinearity of the frequency shift as a function of injection current may change as a function of laser operating temperature set by a temperature control device (e.g. a thermoelectric cooler or TEC) and the median injection current. At higher control temperatures, thermal roll-over may occur at lower injection currents while at lower control temperatures, the roll-over may occur at higher injection currents. Because the control temperature and injection current combined determine the laser emission wavelength, not all combinations of control temperature and median injection current used to adjust the laser wavelength to the required target analyte absorption line will provide the same frequency scan and absorption spectra.
  • Accordingly, one or more implementations of the current subject matter relate to methods, systems, articles or manufacture, and the like that can, among other possible advantages, provide semiconductor-based lasers that have substantially improved wavelength stability characteristics due to a more temporally stable chemical composition of materials used in affixing a semiconductor laser chip to a mounting device. Some implementations of the current subject matter can provide or include a substantially contiguous and intact diffusion barrier layer that includes at least one non-metallic layer and alternatively at least one non-metallic and at least one metallic barrier layer at or near a contact surface between a semiconductor laser chip and a mounting surface. Drift of single frequency lasers can be reduced or even minimized, according to one or more implementations, by employing semiconductor laser designs, laser processing, electrical connections, and heat sinking features that reduce changes in heat conductivity, in stress and strain on the active laser, and in electrical resistivity of the injection current path over time.
  • FIG. 3 illustrates an example of an apparatus 300 including a semiconductor laser chip 302 affixed to a mounting device 304 by a layer of solder 306 interposed between a contact surface 310 of the semiconductor laser chip 302 and the mounting device 304. The mounting device can function as a heat sink and can provide one or more electrical connections to the semiconductor laser chip 302. One or more other electrical connections 312 can be provided to connect a p or n junction of the semiconductor laser chip 302 to a first polarity and the other junction to a second polarity, for example via conduction through the solder layer 306 into the carrier mount 304.
  • FIG. 4 shows a process flow chart illustrating a method including features that can be present in one or more implementations of the current subject matter. At 402, a first contact surface of a semiconductor laser chip is formed to a target surface roughness. The target surface roughness is selected to have a maximum peak to valley height that is substantially smaller than a barrier layer thickness of a barrier layer to be applied to the first contact surface. At 404, that barrier layer is applied to the first contact surface with the barrier layer thickness. The barrier layer includes the at least one non-metallic, electrically-conducting compound, examples of which include but are not limited to titanium nitride (TiNX), titanium oxy-nitride (TiNXOY), cerium gadolinium oxy-nitride (CeGdOyNX) cerium oxide (CeO2), and tungsten nitride (WNx). At 406, the semiconductor laser chip is soldered to a carrier mounting along the first contact surface using a solder composition. The soldering includes melting the soldering composition by heating the soldering composition to less than a threshold temperature at which dissolution of the barrier layer into the soldering composition occurs.
  • In some implementations, a contact surface 310 of a laser semiconductor chip 302 can be polished or otherwise prepared to have a target surface roughness of less than approximately 100 Å RMS (root mean square), or alternatively of less than approximately 40 Å RMS. Conventional approaches have typically not focused on the surface roughness of the contact surface 310 and have consequently had surface roughness values of greater than approximately 1 μm RMS. Subsequent to preparing a sufficiently smooth contact surface 310, the contact surface 310 can be treated to form one or more barrier layers.
  • Creation of a barrier layer that can survive the soldering process can be aided by polishing of the first contact surface 310 to a low surface roughness. In general, a total thickness of a metallic barrier layer, for example one made of platinum, may only be deposited at a limited thickness due to very high stresses that can lead to a separation of thicker layers from the semiconductor material of the semiconductor laser chip 302. The barrier layer can include multiple layers of differing materials. In an implementation, at least one of the barrier layers can include a non-metallic, electrically conducting compound, such as for example titanium nitride (TiNX), titanium oxy-nitride (TiNXOY), cerium gadolinium oxy-nitride (CeGdyONX), cerium oxide (CeO2), and tungsten nitride (WNx). One or more additional barrier layers overlaying or underlaying the first barrier layer can include a metal including but not limited to platinum (Pt), palladium (Pd), nickel (Ni), tungsten (W), molybdenum (Mo) titanium (Ti), tantalum (Ta), zirconium (Zr), cerium (Ce), gadolinium (Gd), chromium (Cr), manganese (Mn), aluminum (Al), beryllium (Be), and Yttrium (Y).
  • A solder composition can in some implementations be selected from a composition having a liquidus temperature, i.e. the maximum temperature at which solid crystals of an alloy can co-exist with the melt in thermodynamic equilibrium, of less than approximately 400° C., or optionally of less than approximately 370° C., or optionally of less than approximately 340° C. Examples of solder compositions consistent with one or more implementations of the current subject matter can include, but are not limited to gold germanium (AuGe), gold silicon (AuSi), gold tin (AuSn), silver tin (AgSn), silver tin copper (AgSnCu), silver tin lead (AgSnPb), silver tin lead indium (AgSnPbIn), silver tin antimony (AgSnSb), tin lead (SnPb), and lead (Pb). Examples of specific solder compositions that are consistent with one or more implementations of the current subject matter include, but are not limited to the following: approximately 48% Sn and approximately 52% In; approximately 3% Ag and approximately 97% In; approximately 58% Sn and approximately 42% In; approximately 5% Ag, approximately 15% Pb, and approximately 80% In; approximately 100% In; approximately 30% Pb and approximately 70% In; approximately 2% Ag, approximately 36% Pb, and approximately 62% Sn; approximately 37.5% Pb, approximately 37.5% Sn, and approximately 25% In; approximately 37% Pb and approximately 63% Sn; approximately 40% Pb and approximately 60% In; approximately 30% Pb and approximately 70% Sn; approximately 2.8% Ag, approximately 77.2% Sn, and approximately 20% In; approximately 40% Pb and approximately 60% Sn; approximately 20% Pb and approximately 80% Sn; approximately 45% Pb and approximately 55% Sn; approximately 15% Pb and approximately 85% Sn; approximately 50% Pb and approximately 50% In; approximately 10% Pb and approximately 90% Sn; approximately 10% Au and approximately 90% Sn; approximately 3.5% Ag and approximately 96.5% Sn; approximately 60% Pb and approximately 40% In; approximately 3.5% Ag, approximately 95% Sn, and approximately 1.5% Sb; approximately 2.5% Ag and approximately 97.5% Sn; approximately 100% Sn; approximately 99% Sn and approximately 1% Sb; approximately 60% Pb and approximately 40% Sn; approximately 97% Sn and approximately 3% Sb; approximately 95% Sn and approximately 5% Sb; approximately 63.2% Pb, approximately 35% Sn, and approximately 1.8% In; approximately 70% Pb and approximately 30% Sn; approximately 75% Pb and approximately 25% In; approximately 80% Pb approximately 20% Sn; approximately 81% Pb and approximately 19% In; approximately 80% Au and approximately 20% Sn; approximately 86% Pb, approximately 8% Bi, approximately 4% Sn, and approximately 1% In, approximately 1% Ag; approximately 85% Pb and approximately 15% Sn; approximately 2% Ag, approximately 88% Pb, and approximately 10% Sn; approximately 5% Ag, approximately 90% Pb, and approximately 5% Sn; approximately 95% Pb and approximately 5% Sb; approximately 2.5% Ag, approximately 92.5% Pb, and approximately 5% Sn; approximately 2.5% Ag, approximately 92.5% Pb, and approximately 5% In; approximately 90% Pb and approximately 10% Sn; approximately 2.5% Ag and approximately 97.5% Pb; approximately 2.5% Ag; approximately 95.5% Pb, and approximately 2% Sn; approximately 78% Au and approximately 22% Sn; approximately 1.5% Ag, approximately 97.5% Pb, and approximately 1% Sn; approximately 5% Ag, approximately 90% Pb, and approximately 5% In; approximately 95% Pb and approximately 5% In; and approximately 95% Pb and approximately 5% Sn.
  • FIG. 5 shows an end elevation view of a conventional transistor outline can (TO-can) mount 500 such as is typically used in mounting of semiconductor laser chips for use in telecommunications applications. TO-cans are widely used electronics and optics packaging platforms used for mechanically mounting, electrically connecting, and heat sinking semiconductor chips such as lasers and transistors and are available in a variety of different sizes and configurations. An outer body 502 encloses a post or heat sink member 504 which can be made of metal, such as for example a copper tungsten sintered metal, copper-diamond sintered metal, or iron-nickel alloys including Kovar, alloy 42, and alloy 52. Two insulated electrical pass-throughs 506 can be included to provide electrical contacts for connection to the p and n junctions on a semiconductor laser chip 302. The semiconductor laser chip 302 can be mounted to a carrier sub-mount, which can in some examples be formed of silicon. As noted above, the semiconductor laser chip 302 can be joined to the carrier mount 304 (also referred to as a carrier mounting) by a layer of solder 306, which is not shown in FIG. 5 due to scale constraints. FIG. 6 shows a magnified view 600 of the post or heat sink member 504, the carrier mount 304, the semiconductor laser chip 302, and the solder 306 joining the semiconductor laser chip 302 to the carrier mount. The carrier mount 304 can in turn be soldered to the post or heat sink member 504 by a second solder layer 602.
  • According to one or more implementations of the current subject matter, mono-component layers (or surfaces) of a material dissimilar from the solder preparation layer, which includes but is not limited to gold, can serve similarly as solder alloys, enabling low temperature joining of two gold surfaces for instance. In joining metal components, this is commonly referred to as liquidus or liquid diffusion bonding since it apparently creates a very thin liquid interface layer between certain dissimilar metals which are brought in physical contact under elevated temperature. The temperature necessary to cause this effect to occur is typically significantly lower than the component melting temperatures. Once the initial joining has taken place, thermal separation can typically require quite high temperatures, approaching or reaching the component melting temperatures. In one example, contact between a silver surface and a gold surface can result in a hermetic joint at a temperature of approximately 150° C. to approximately 400° C., which is significantly lower than the separate melting temperatures of silver (950° C.) and gold (1064° C.). In another example, copper oxide can serve as a bonding promotion layer which can reduce a joining temperature between two metal surfaces significantly below the metal melting points.
  • Thus, in some implementations, solder compositions including lead (Pb), silver (Ag), silicon (Si), germanium (Ge), tin (Sn), antimony (Sb), bismuth (Bi), indium (In), and copper (Cu) as well as those discussed elsewhere herein can be used in association with deposition of one or more solder-facilitating mono-component material layers or thin sheets (e.g. preforms) on the first contact surface 310 and/or second contact surface 314 prior to the soldering process. The one or more solder-facilitating mono-component material layers or thin sheets can be dissimilar from other barrier and/or metallization layers on the first contact surface 310 and/or second contact surface 314. One example of a method for applying solder-facilitating mono-component material layers or thin sheets can include depositing a thin layer of a metal differing from those metals present in the solder preparation layer on top of the barrier and/or metallization layers on the first contact surface 310 and/or second contact surface 314. Such a thin layer can be evaporated or otherwise deposited onto one or both of the first contact surface 310 and the second contact surface 314 shortly before the heat assisted joining process takes place, in order to prevent or minimize oxidation. Alternately, a thin sheet of a metal dissimilar from the solder preparation layer can be placed between the semiconductor laser chip 302 and the mounting device 304. The soldering process can then proceed as discussed above.
  • FIG. 7 shows an electron micrograph 700 showing a highly magnified solder layer 306 interposed between a semiconductor laser chip 302 and a carrier mount 304. A second barrier layer 702 of nickel is also provided on the second contact surface 704 of the carrier mount 304. A vertical axis 706 is displayed atop the electron micrograph to delineate distance from an arbitrarily chosen origin coordinate (marked as “0” on the axis 706) to a linear distance of 50 microns away (marked as “50” on the axis 706). The semiconductor laser chip 302 shown in FIG. 7 was not prepared with a smooth first contact surface 310 as described herein consistent according various implementations of the current subject matter. As a result, the first contact surface 310 exhibits substantial surface roughness, and no contiguous barrier layer remains to separate the material of the semiconductor laser chip 302 from the solder after the soldering process. FIG. 8 through FIG. 14 show a series of charts 800, 900, 1000, 1100, 1200, 1300, and 1400 showing relative concentrations of phosphorous, nickel, indium, tin, lead, tungsten, and gold, respectively, as a function of distance along the axis 706 in FIG. 7. The relative concentrations were determined by an X-ray diffraction technique.
  • As shown in the chart 800 of FIG. 8, a large phosphorous concentration is observed in the semiconductor laser chip 302 (distance greater than about 36 μm) due to the semiconductor laser chip 302 being a crystal of indium phosphide (InP). Additional high relative concentrations of phosphorous are observed in the nickel barrier layer 702, which is actually formed of a first layer 710 of nickel deposited by an electroless process that incorporates some phosphorous into the deposited nickel and a second layer of nickel deposited by an electrolytic process that incorporates less or no phosphorous into the deposited nickel. A non-zero concentration of phosphorous occurs both in the solder (which is composed of a tin-lead alloy and does not contain any phosphorus in its original state) and in the electrolytic second layer 712 of nickel. These non-zero concentrations are respectively due to diffusion of phosphorous from the crystal structure of the semiconductor laser chip 302 and from the electroless first layer 710 of nickel.
  • FIG. 9 illustrates that some nickel also diffuses into the solder 306 from the nickel layer 702 and further into the crystal structure of the semiconductor laser chip 302. Similarly, indium diffuses into the solder 306 and from there into the carrier mount across the nickel barrier layer 702 as shown in the chart 1000 of FIG. 10. Tin, which is a primary component of the solder 306, does not remain in the solder 306, but also diffuses into the crystal structure of the semiconductor laser chip 302 as shown in the chat 1100 of FIG. 11. Lead also diffuses out of the solder layer 306 as shown in the chart 1200 of FIG. 12, but to a lesser degree than does the tin from the solder 306. Tungsten from the tungsten-copper carrier mount 304 and gold from solder preparation layers deposited on both of the first contact surface 310 and the second contact surface 702 diffuse into the solder and to a small extent into the semiconductor laser chip 302 as shown in the charts 1300 and 1400 of FIG. 13 and FIG. 14.
  • Accordingly, features of the current subject matter that allow the maintenance of a contiguous, intact barrier layer at least at the first contact surface 310 of the semiconductor laser chip 302, and also desirably at the second contact surface 704 of the carrier mount 304 can be advantageous in minimizing diffusion of elements from the carrier mount and/or semiconductor laser chip across the barrier layer and can thereby aid in maintaining a more temporally consistent composition of both the solder layer 306 and the crystal structure of the semiconductor laser chip 302. The presence of phosphorous and/or other reactive compounds or elements, such as for example oxygen, antimony, silicon, iron and the like in the solder layer 306 can increase a tendency of the solder alloy components to react and thereby change in chemical composition, in crystal structure, hermeticity and, more importantly, in electrical and/or thermal conductivity. Such changes can lead to alteration in the laser emission characteristics of a semiconductor laser chip 302 in contact with the solder layer 306.
  • Furthermore, diffusion of solder components, such as for example lead; silver; tin; and the like; and/or carrier mount components such as tungsten, nickel, iron, copper and the like, into the crystal structure of the semiconductor laser chip 302 can also cause changes in the laser emission characteristics over time.
  • Implementations of the current subject matter can provide one or more advantages, including but not limited to maintaining a contiguous diffusion barrier layer between a laser crystal or other semiconductor chip and its physical mounting, preventing inter-diffusion of solder compounds into the laser crystal and vice versa, and preventing contamination of the solder. Inter-diffusion and/or electro-migration have been found to cause changes in the electrical resistivity, and to a lesser extent the heat conduction properties, of the contact. Very small changes in resistive heating of even one of the electrical contacts providing a driving current to a semiconductor laser chip can lead to frequency changes in the light produced by the semiconductor laser chip.
  • In some observed examples using conventional semiconductor laser chip mounting approaches, induced shifts in the laser output can be greater than a picometer per day. Implementations of the current subject matter can therefore include one or more techniques for improving barrier layers at one or more of the first contact surface 310 between the solder layer 306 and the semiconductor laser chip 302 and the second contact layer 702 between the solder layer 306 and the carrier mount 304. In one example, an improved barrier layer at the second contact surface 702 can include an electroless plated nickel underlayer 710, for example to preserve edge definition of a copper tungsten submount or the like, covered by a minimum thickness of an electrolytic nickel layer 712 as the final layer before deposition of a gold solder preparation layer. In another example, a single layer of a sputtered barrier material, including but not limited to at least one of nickel, platinum, palladium, and electrically conducting non-metallic barrier layers, can be used as a single barrier layer at the first contact surface 310. As oxidation of the solder material prior to soldering of the semiconductor laser chip 302 to the carrier mount 304 can introduce oxygen and other potentially reactive contaminants, it can be advantageous to use solder forms that have not been allowed to substantially oxidize prior to use. Alternatively, the soldering process can be performed under a non-oxidizing atmosphere or under a reducing atmosphere including but not limited to vacuum, pure nitrogen pure hydrogen gas (H2), forming gas (approximately 5% hydrogen in 95% nitrogen), and formic acid in nitrogen carrier gas to remove or at least reduce the presence of oxidized compounds in the solder composition on the metalized semiconductor contact surface and the carrier mounting surface.
  • Suitable barrier layers to be deposited on the first contact surface 310 and/or the second contact surface 702 can include, but are not limited to, platinum (Pt), palladium (Pd), nickel (Ni), titanium nitride (TiNX), titanium oxy-nitride (TiNXOY), tungsten nitride (WNx), cerium oxide (CeO2), and cerium gadolinium oxy-nitride (CEGDOYNX). These compounds, as well as other comparable compounds that can be deposited by sputtering or vapor deposition onto the first and/or second contact surfaces, can provide a barrier layer that has a sufficiently high temperature resistance during the soldering process as to not dissolve in the solder or otherwise degrade sufficiently to cause breakdown of the barrier qualities necessary to prevent cross-barrier diffusion of semiconductor laser materials into the solder or solder components into the semiconductor laser crystal. The second barrier layer 702 applied to the second contact surface 704 can in some implementations include a sintered diamond-copper layer. A process for creation of a non-metallic, electrically-conducting barrier layer 702 can include first depositing titanium via a thin film deposition process, including but not limited to sputtering, electron beam evaporation, chemical vapor deposition, atomic layer deposition, and the like, and then adding nitrogen to react with the deposited titanium. In another implementation, a first metallization layer can be deposited by a thin film deposition process, and nitrogen ions can be used for sputtering titanium, for example in a nitrogen gas background, to create the non-metallic barrier layer. Chemical vapor deposition can also or alternatively be used to create non-metallic barrier layers. In another implementation, gas phase reactions of the components elements or compounds forming the non-metallic electrically conductive compound can be used to create multi-component non-metallic barrier layers.
  • In some implementations, the heat conductivity of a carrier mount 304 can advantageously exceed 50 Watts per meter-Kelvin or, optionally 100 Watts per meter-Kelvin or, optionally 150 Watts per meter-Kelvin. Suitable carrier mount materials can include, but are not limited to copper tungsten, tungsten, copper-diamond, aluminum nitride, silicon, silicon nitride, silicon carbide, beryllium oxide, alumina (Al2O3), Kovar, Alloy 42, Alloy 52, and the like. A heat spreader or carrier mount 304 that is thermally expansion matched to the semiconductor laser chip 302 can be used in some implementations. In one example consistent with an implementation of the current subject matter, an approximately 15% copper, approximately 85% tungsten sintered metal heat spreader, a beryllium oxide heat spreader, an alumina heat spreader, a sapphire heat spreader, a copper-diamond heat spreader, or the like can provide a good thermal expansion match to a gallium antimonide (GaSb) semiconductor laser chip 302 at around approximately 7 ppm° C.-1. In another example consistent with an implementation of the current subject matter, a pure tungsten heat spreader, a silicon heat spreader, a silicon nitride heat spreader, a silicon carbide heat spreader, a sapphire heat spreader, a copper diamond heat spreader, or an aluminum nitride (AlN) heat spreader can be used as a carrier mount 304 to provide a good thermal expansion match to an indium phosphide (InP) semiconductor laser chip 302 at around 4.5 ppm° C.-1. A silicon, silicon carbide, silicon nitride, aluminum nitride, tungsten, copper diamond heat spreader, or the like can also be used as the carrier sub-mount 304, for example for an indium phosphide (InP) semiconductor laser chip 302.
  • Other carrier mounts consistent with implementations of the current subject matter include, but are not limited to shaped copper tungsten heat spreaders, including but not limited to semiconductor laser industry standard c-mounts and CT-mounts, TO-cans, pattern metallized ceramics, pattern metallized silicon, pattern metallized silicon carbide, pattern metallized silicon nitride, pattern metallized beryllium oxide, pattern metallized alumina, pattern metallized aluminum nitride, copper-diamond, pure copper with one or more sections of expansion-matched submounts to match to one or more semiconductor laser chip compositions, tungsten submounts brazed into a copper or copper tungsten c-mount, or the like. Semiconductor laser chips 302 can be formed, without limitation of indium phosphide crystals, gallium arsenide crystals, gallium antimonide crystals, gallium nitride crystals, and the like.
  • The subject matter described herein can be embodied in systems, apparatus, methods, and/or articles depending on the desired configuration. The implementations set forth in the foregoing description do not represent all implementations consistent with the subject matter described herein. Instead, they are merely some examples consistent with aspects related to the described subject matter. Although a few variations have been described in detail above, other modifications or additions are possible. In particular, further features and/or variations can be provided in addition to those set forth herein. For example, the implementations described above can be directed to various combinations and subcombinations of the disclosed features and/or combinations and subcombinations of several further features disclosed above. In addition, the logic flows depicted in the accompanying figures and/or described herein do not necessarily require the particular order shown, or sequential order, to achieve desirable results. Other implementations may be within the scope of the following claims.

Claims (20)

Claimed is:
1. A method for frequency stabilization of semiconductor lasers comprising:
forming a first contact surface of a semiconductor single-frequency laser chip for a tunable laser-based trace gas analyzer to a target surface roughness;
applying a metallization layer comprising 600·10−10 m of titanium to the first contact surface;
applying a metallic diffusion barrier layer to the first contact surface over the metallization layer, the metallic diffusion barrier layer including multiple layers of differing materials, wherein applying the metallic diffusion barrier layer includes:
applying a first metallic diffusion barrier layer, the first metallic diffusion barrier layer comprising platinum; and
applying a second metallic diffusion barrier layer underlaying the first metallic diffusion barrier layer, the second metallic diffusion barrier layer includes palladium, nickel, tungsten, molybdenum, titanium, tantalum, zirconium, cerium, gadolinium, chromium, manganese, aluminum, beryllium, or yttrium;
applying a solder preparation layer to the first contact surface subsequent to applying the metallic diffusion barrier layer and prior to soldering, wherein the solder preparation layer includes an approximately 2000 to 5000·10−10 m thickness of gold; and
soldering the laser chip along the first contact surface to a carrier mounting using a solder composition, wherein the soldering includes melting the solder composition by heating the solder composition to less than a threshold temperature at which dissolution of the metallic diffusion barrier layer into the solder composition occurs,
wherein subsequent to the soldering, the metallic diffusion barrier layer remains contiguous and intact such that no direct contact occurs between semiconductor materials of the laser chip and the solder composition, such that no direct path exists by which constituents of any of the laser chip, the solder composition and the carrier mounting can diffuse across the metallic diffusion barrier layer.
2. The method of claim 1, wherein, subsequent to the soldering, the solder composition has substantially temporally stable electrical and thermal conductivities.
3. The method of claim 1, further comprising providing the solder composition as at least one of a solder preform that is substantially non-oxidized and a deposited layer that is substantially non-oxidized.
4. The method of claim 1, wherein the soldering includes melting the solder composition under at least one of a reducing atmosphere and a non-oxidizing atmosphere.
5. The method of claim 1, wherein the solder composition is selected from a group consisting of gold germanium, gold silicon, gold tin, silver tin, silver tin copper, silver tine lead, silver tin lead indium, silver tin antimony, tin lead, lead, silver, silicon, germanium, tin, antimony, bismuth, indium, and copper.
6. The method of claim 1, wherein the forming of the first contact surface includes polishing the first contact surface to achieve the target surface roughness prior to applying the metallic diffusion barrier layer.
7. The method of claim 6, wherein the target surface roughness is less than approximately 100·10−10 m RMS, and/or wherein the target surface roughness is less than approximately 40·10−10 m RMS.
8. The method of claim 1, wherein the threshold temperature is less than approximately 400° C.
9. The method of claim 8, wherein the threshold temperature is less than approximately 370° C.
10. The method of claim 9, wherein the threshold temperature is less than approximately 340° C.
11. The method of claim 1, further comprising applying another barrier layer to a second contact surface of the carrier mounting, and soldering the laser chip to the carrier mounting along the second contact surface.
12. The method of claim 1, further comprising applying a solder facilitation layer between the first contact surface and a second contact surface on the carrier mounting prior to the soldering, the solder facilitation layer including a metal that is not a component of the solder preparation layer on either the first contact surface or the second contact surface.
13. The method of claim 12, wherein applying the solder facilitation layer includes at least one of placing a sheet of the metal between the first contact surface and the second contact surface prior to the soldering, and depositing a layer of the metal that is not a component of the solder composition onto one or both of the first contact surface and the second contact surface prior to the soldering.
14. The method of claim 1, further comprising matching a first thermal expansion characteristic of the carrier mounting to a second thermal expansion characteristic of the semiconductor laser chip.
15. A tunable laser-based trace gas analyzer, comprising:
a semiconductor single-frequency laser chip including:
a first contact surface having a target surface roughness;
a metallization layer of 600·10−10 m of titanium applied to the first contact surface;
a metallic diffusion barrier layer applied to the metallization layer, wherein the metallic diffusion barrier layer includes multiple layers of differing materials; and
a solder preparation layer applied to the metallic diffusion barrier layer, wherein the solder preparation layer includes an approximately 2000 to 5000·10−10 m thickness of gold; and
a carrier mounting to which the laser chip is soldered along the first contact surface of the laser chip using a solder composition, wherein the solder composition is heated to less than a threshold temperature at which dissolution of the metallic diffusion barrier layer into the solder composition occurs, and
wherein the metallic diffusion barrier layer is contiguous such that the solder composition does not directly contact semiconductor materials of the laser chip, such that there is no direct path by which constituents of any of the laser chip, the solder composition and the carrier mounting can diffuse across the metallic diffusion barrier layer.
16. The tunable laser-based trace gas analyzer of claim 15, wherein the tunable laser-based trace gas analyzer is a tunable diode laser absorption spectrometer.
17. The tunable laser-based trace gas analyzer of claim 15, wherein the metallic diffusion barrier layer includes a first metallic diffusion barrier layer including platinum and a second metallic diffusion barrier layer underlaying the first metallic diffusion barrier layer, the second metallic diffusion barrier layer including palladium, nickel, tungsten, molybdenum, titanium, tantalum, zirconium, cerium, gadolinium, chromium, manganese, aluminum, beryllium, or yttrium.
18. The tunable laser-based trace gas analyzer of claim 15, wherein the target surface roughness is less than approximately 100·10−10 m RMS, and/or wherein the target surface roughness is less than approximately 40·10−10 m RMS.
19. The tunable laser-based trace gas analyzer of claim 15, further comprising a solder facilitation layer between the first contact surface and a second contact surface on the carrier mounting, the solder facilitation layer including a metal that is not a component of the solder preparation layer on either the first contact surface or the second contact surface.
20. The tunable laser-based trace gas analyzer of claim 15, further comprising another barrier layer applied to a second contact surface of the carrier mounting, wherein the laser chip is soldered to the carrier mounting along the second contact surface.
US16/259,172 2011-08-17 2019-01-28 Semiconductor laser mounting with intact diffusion barrier layer Abandoned US20200185880A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US16/259,172 US20200185880A1 (en) 2011-08-17 2019-01-28 Semiconductor laser mounting with intact diffusion barrier layer

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US13/212,085 US9166364B2 (en) 2011-02-14 2011-08-17 Semiconductor laser mounting with intact diffusion barrier layer
US14/873,080 US9711937B2 (en) 2011-02-14 2015-10-01 Semiconductor laser mounting with intact diffusion barrier layer
US15/652,177 US10224693B2 (en) 2011-08-17 2017-07-17 Semiconductor laser mounting with intact diffusion barrier layer
US16/259,172 US20200185880A1 (en) 2011-08-17 2019-01-28 Semiconductor laser mounting with intact diffusion barrier layer

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
US15/652,177 Continuation US10224693B2 (en) 2011-08-17 2017-07-17 Semiconductor laser mounting with intact diffusion barrier layer

Publications (1)

Publication Number Publication Date
US20200185880A1 true US20200185880A1 (en) 2020-06-11

Family

ID=46727630

Family Applications (4)

Application Number Title Priority Date Filing Date
US13/212,085 Active 2032-09-03 US9166364B2 (en) 2011-02-14 2011-08-17 Semiconductor laser mounting with intact diffusion barrier layer
US14/873,080 Active US9711937B2 (en) 2011-02-14 2015-10-01 Semiconductor laser mounting with intact diffusion barrier layer
US15/652,177 Active US10224693B2 (en) 2011-08-17 2017-07-17 Semiconductor laser mounting with intact diffusion barrier layer
US16/259,172 Abandoned US20200185880A1 (en) 2011-08-17 2019-01-28 Semiconductor laser mounting with intact diffusion barrier layer

Family Applications Before (3)

Application Number Title Priority Date Filing Date
US13/212,085 Active 2032-09-03 US9166364B2 (en) 2011-02-14 2011-08-17 Semiconductor laser mounting with intact diffusion barrier layer
US14/873,080 Active US9711937B2 (en) 2011-02-14 2015-10-01 Semiconductor laser mounting with intact diffusion barrier layer
US15/652,177 Active US10224693B2 (en) 2011-08-17 2017-07-17 Semiconductor laser mounting with intact diffusion barrier layer

Country Status (8)

Country Link
US (4) US9166364B2 (en)
EP (2) EP3522312A3 (en)
JP (1) JP2014522132A (en)
CN (1) CN103782459B (en)
AU (1) AU2012296657B2 (en)
CA (1) CA2844789C (en)
TW (1) TW201316633A (en)
WO (1) WO2013025728A1 (en)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9166130B2 (en) 2012-10-24 2015-10-20 Spectrasensors, Inc. Solderless mounting for semiconductor lasers
US9368934B2 (en) 2011-02-14 2016-06-14 Spectrasensors, Inc. Semiconductor laser mounting for improved frequency stability
US9166364B2 (en) * 2011-02-14 2015-10-20 Spectrasensors, Inc. Semiconductor laser mounting with intact diffusion barrier layer
US8975117B2 (en) * 2012-02-08 2015-03-10 Infineon Technologies Ag Semiconductor device using diffusion soldering
US8803302B2 (en) * 2012-05-31 2014-08-12 Freescale Semiconductor, Inc. System, method and apparatus for leadless surface mounted semiconductor package
JP6046010B2 (en) * 2013-09-09 2016-12-14 株式会社東芝 Semiconductor device and manufacturing method thereof
US9246305B1 (en) * 2014-03-20 2016-01-26 The United States Of America, As Represented By The Secretary Of The Navy Light-emitting devices with integrated diamond
EP3098677B1 (en) * 2015-05-27 2019-05-08 Ansaldo Energia IP UK Limited Method for machining a component on a multi-axis machine tool driven by an nc-controller and apparatus for conducting said method
US20180016678A1 (en) 2016-07-15 2018-01-18 Applied Materials, Inc. Multi-layer coating with diffusion barrier layer and erosion resistant layer
TWI617081B (en) 2017-03-23 2018-03-01 國立中山大學 Method for fabricating waveguide construction
US11340161B2 (en) * 2017-04-28 2022-05-24 Gasporox Ab Compact multi-wavelength TDLAS system
US10605785B2 (en) * 2017-06-07 2020-03-31 General Electric Company Sensor system and method
US11079359B2 (en) 2017-06-07 2021-08-03 General Electric Company Sensor system and method
DE102017119346A1 (en) * 2017-08-24 2019-02-28 Osram Opto Semiconductors Gmbh Component with buffer layer and method for producing a component
DE102017119344A1 (en) * 2017-08-24 2019-02-28 Osram Opto Semiconductors Gmbh Carrier and component with buffer layer and method for producing a component
US10833480B2 (en) 2018-07-03 2020-11-10 Skorpios Technologies, Inc. Diffusion blocking layer for a compound semiconductor structure
US10739257B2 (en) * 2018-10-02 2020-08-11 Axetris Ag Method and system for the relative referencing of a target gas in an optical measuring system for laser spectroscopy
CN112152078B (en) * 2020-09-29 2021-08-03 武汉敏芯半导体股份有限公司 Narrow linewidth laser and manufacturing method thereof

Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5234153A (en) * 1992-08-28 1993-08-10 At&T Bell Laboratories Permanent metallic bonding method
US5320274A (en) * 1991-10-03 1994-06-14 The Boc Group Plc Non-oxidizing soldering chamber with shaped curtain and method of soldering
US5559817A (en) * 1994-11-23 1996-09-24 Lucent Technologies Inc. Complaint layer metallization
US20020015427A1 (en) * 2000-07-26 2002-02-07 Pilgrim Jeffrey S. Wavelength agile external cavity diode laser
US20040201029A1 (en) * 2003-04-11 2004-10-14 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for producing the same
US20050167679A1 (en) * 2002-04-30 2005-08-04 Takashi Ishii Submount and semiconductor device
US20050194690A1 (en) * 2002-08-09 2005-09-08 Sumitomo Electric Industries, Ltd. Submount and semiconductor device
US20050212140A1 (en) * 2004-03-29 2005-09-29 Takeru Fujinaga Semiconductor chip mounting substrate, a method of producing the same, and a method of mounting a semiconductor chip
US20060222031A1 (en) * 2005-03-29 2006-10-05 Opnext Japan, Ltd. Opto-semiconductor devices
US20070051968A1 (en) * 2003-06-30 2007-03-08 Shuichiro Yamamoto Nitride-based semiconductor light-emitting device and method of manufacturing the same
US20080246051A1 (en) * 2007-04-06 2008-10-09 Kabushiki Kaisha Toshiba Light emitting apparatus and method for manufacturing same
US7459794B2 (en) * 2003-08-26 2008-12-02 Tokuyama Corporation Substrate for device bonding, device bonded substrate, and method for producing same
US20090095964A1 (en) * 2005-06-30 2009-04-16 Shigetoshi Ito Nitride Semiconductor Laser Device and Nitride Semiconductor Laser Apparatus
US7626264B2 (en) * 2004-03-24 2009-12-01 Tokuyama Corporation Substrate for device bonding and method for manufacturing same
US20090294797A1 (en) * 2006-07-31 2009-12-03 Naomi Anzue Semiconductor light emitting element and method for manufacturing same
US7628309B1 (en) * 2005-05-03 2009-12-08 Rosemount Aerospace Inc. Transient liquid phase eutectic bonding
US20100219419A1 (en) * 2006-08-11 2010-09-02 Sanyo Electric Co., Ltd. Semiconductor element and method for manufacturing the same
US20120236893A1 (en) * 2011-02-14 2012-09-20 Gabi Neubauer Semiconductor Laser Mounting for Improved Frequency Stability
US20130044322A1 (en) * 2011-02-14 2013-02-21 Alfred Feitisch Semiconductor laser mounting with intact diffusion barrier layer

Family Cites Families (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1083200A (en) 1966-08-17 1967-09-13 Standard Telephones Cables Ltd Improvements in or relating to semiconductor devices
US5265115A (en) 1991-08-30 1993-11-23 Hoya Corporation Solid-state laser device having a feedback loop
JP3271475B2 (en) 1994-08-01 2002-04-02 株式会社デンソー Electrical element joining material and joining method
US5561322A (en) * 1994-11-09 1996-10-01 International Business Machines Corporation Semiconductor chip package with enhanced thermal conductivity
US5909458A (en) 1996-11-27 1999-06-01 The Regents Of The University Of California Low-cost laser diode array
US6204560B1 (en) 1998-04-20 2001-03-20 Uniphase Laser Enterprise Ag Titanium nitride diffusion barrier for use in non-silicon technologies and method
DE19954319C1 (en) * 1999-11-11 2001-05-03 Vishay Semiconductor Gmbh Production of multilayered contact electrodes used in diodes comprises applying a first metallizing layer, heat treating and applying a second metallizing layer over the first layer
JP4897133B2 (en) 1999-12-09 2012-03-14 ソニー株式会社 Semiconductor light emitting device, method for manufacturing the same, and mounting substrate
US6448642B1 (en) 2000-01-27 2002-09-10 William W. Bewley Pressure-bonded heat-sink system
JP2002134822A (en) 2000-10-24 2002-05-10 Sharp Corp Semiconductor light emitting device and method of manufacturing the same
US6340846B1 (en) 2000-12-06 2002-01-22 Amkor Technology, Inc. Making semiconductor packages with stacked dies and reinforced wire bonds
JP2004071808A (en) * 2002-08-06 2004-03-04 Mitsubishi Electric Corp Semiconductor laser equipment
TWI303909B (en) 2002-11-25 2008-12-01 Nichia Corp Ridge waveguide semiconductor laser diode
JP2004359481A (en) 2003-06-03 2004-12-24 Minolta Co Ltd Method for manufacturing replica pattern for lens molding
JP4196853B2 (en) 2004-02-23 2008-12-17 日本電気株式会社 ACCESS RIGHT CONTROL METHOD BY NAME, INFORMATION PROCESSING DEVICE AND PROGRAM USING THE METHOD
US9166130B2 (en) 2012-10-24 2015-10-20 Spectrasensors, Inc. Solderless mounting for semiconductor lasers
JP2006261569A (en) 2005-03-18 2006-09-28 Dowa Mining Co Ltd Sub-mount and its manufacturing method
JP4548262B2 (en) * 2005-07-29 2010-09-22 Tdk株式会社 Lower electrode structure
JP4352337B2 (en) 2005-09-16 2009-10-28 ソニー株式会社 Semiconductor laser and semiconductor laser device
EP1770836B1 (en) * 2005-09-29 2015-04-22 OSRAM Opto Semiconductors GmbH Laserdiode device, package with at least one laserdiode device and optically pumped laser
JP2007273844A (en) 2006-03-31 2007-10-18 Matsushita Electric Ind Co Ltd Semiconductor device
DE102006057718A1 (en) 2006-12-01 2008-06-05 Forschungsverbund Berlin E.V. Semiconductor component e.g. semiconductor laser diode, has relaxation layer arranged between functional layer and solder and/or between solder and carrier substrate, where relaxation layer has thickness of micrometers, and is made of gold
KR100899421B1 (en) 2007-02-28 2009-05-27 삼성테크윈 주식회사 Chip Bonding Tool, Bonding Apparatus with the Same and Method thereof
PL2140246T3 (en) 2007-04-11 2017-01-31 Spectrasensors, Inc. Reactive gas detection in complex backgrounds
US8243766B2 (en) * 2007-09-21 2012-08-14 Michael Huff Means for improved implementation of laser diodes and laser diode arrays
DE102008015253B4 (en) * 2008-02-26 2014-07-24 Osram Opto Semiconductors Gmbh Method for producing a laser component and laser component
JP4834690B2 (en) 2008-04-24 2011-12-14 アンリツ株式会社 Wavelength tunable semiconductor laser for gas detector and gas detector
JP2009283831A (en) * 2008-05-26 2009-12-03 Sharp Corp Semiconductor laser element
JP4298784B1 (en) 2008-09-11 2009-07-22 日本車輌製造株式会社 Method for manufacturing railway vehicle structure by friction stir welding
CA2765280A1 (en) * 2009-06-12 2010-12-16 Spectrasensors, Inc. Optical absorbance measurements with self-calibration and extended dynamic range
JP5368957B2 (en) 2009-12-04 2013-12-18 シャープ株式会社 Manufacturing method of semiconductor laser chip
US8953165B2 (en) 2010-10-21 2015-02-10 Spectrasensors, Inc. Validation and correction of spectrometer performance using a validation cell

Patent Citations (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5320274A (en) * 1991-10-03 1994-06-14 The Boc Group Plc Non-oxidizing soldering chamber with shaped curtain and method of soldering
US5234153A (en) * 1992-08-28 1993-08-10 At&T Bell Laboratories Permanent metallic bonding method
US5559817A (en) * 1994-11-23 1996-09-24 Lucent Technologies Inc. Complaint layer metallization
US20020015427A1 (en) * 2000-07-26 2002-02-07 Pilgrim Jeffrey S. Wavelength agile external cavity diode laser
US20050167679A1 (en) * 2002-04-30 2005-08-04 Takashi Ishii Submount and semiconductor device
US20050194690A1 (en) * 2002-08-09 2005-09-08 Sumitomo Electric Industries, Ltd. Submount and semiconductor device
US20040201029A1 (en) * 2003-04-11 2004-10-14 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method for producing the same
US20070051968A1 (en) * 2003-06-30 2007-03-08 Shuichiro Yamamoto Nitride-based semiconductor light-emitting device and method of manufacturing the same
US7459794B2 (en) * 2003-08-26 2008-12-02 Tokuyama Corporation Substrate for device bonding, device bonded substrate, and method for producing same
US7626264B2 (en) * 2004-03-24 2009-12-01 Tokuyama Corporation Substrate for device bonding and method for manufacturing same
US20050212140A1 (en) * 2004-03-29 2005-09-29 Takeru Fujinaga Semiconductor chip mounting substrate, a method of producing the same, and a method of mounting a semiconductor chip
US20060222031A1 (en) * 2005-03-29 2006-10-05 Opnext Japan, Ltd. Opto-semiconductor devices
US7628309B1 (en) * 2005-05-03 2009-12-08 Rosemount Aerospace Inc. Transient liquid phase eutectic bonding
US20090095964A1 (en) * 2005-06-30 2009-04-16 Shigetoshi Ito Nitride Semiconductor Laser Device and Nitride Semiconductor Laser Apparatus
US20090294797A1 (en) * 2006-07-31 2009-12-03 Naomi Anzue Semiconductor light emitting element and method for manufacturing same
US20100219419A1 (en) * 2006-08-11 2010-09-02 Sanyo Electric Co., Ltd. Semiconductor element and method for manufacturing the same
US20080246051A1 (en) * 2007-04-06 2008-10-09 Kabushiki Kaisha Toshiba Light emitting apparatus and method for manufacturing same
US20120236893A1 (en) * 2011-02-14 2012-09-20 Gabi Neubauer Semiconductor Laser Mounting for Improved Frequency Stability
US20130044322A1 (en) * 2011-02-14 2013-02-21 Alfred Feitisch Semiconductor laser mounting with intact diffusion barrier layer
US9166364B2 (en) * 2011-02-14 2015-10-20 Spectrasensors, Inc. Semiconductor laser mounting with intact diffusion barrier layer
US20160028211A1 (en) * 2011-02-14 2016-01-28 Spectrasensors, Inc. Semiconductor Laser Mounting With Intact Diffusion Barrier Layer
US9368934B2 (en) * 2011-02-14 2016-06-14 Spectrasensors, Inc. Semiconductor laser mounting for improved frequency stability
US9711937B2 (en) * 2011-02-14 2017-07-18 Spectrasensors, Inc. Semiconductor laser mounting with intact diffusion barrier layer
US20170317468A1 (en) * 2011-08-17 2017-11-02 Spectrasensors, Inc. Semiconductor laser mounting with intact diffusion barrier layer
US10224693B2 (en) * 2011-08-17 2019-03-05 Spectrasensors, Inc. Semiconductor laser mounting with intact diffusion barrier layer

Also Published As

Publication number Publication date
EP2745361B1 (en) 2019-03-20
WO2013025728A1 (en) 2013-02-21
US20170317468A1 (en) 2017-11-02
JP2014522132A (en) 2014-08-28
US9166364B2 (en) 2015-10-20
TW201316633A (en) 2013-04-16
CN103782459B (en) 2017-07-25
AU2012296657A1 (en) 2014-02-27
US20160028211A1 (en) 2016-01-28
EP3522312A3 (en) 2019-09-11
EP3522312A2 (en) 2019-08-07
CA2844789C (en) 2016-09-20
US20130044322A1 (en) 2013-02-21
CN103782459A (en) 2014-05-07
AU2012296657B2 (en) 2015-05-21
US10224693B2 (en) 2019-03-05
EP2745361A1 (en) 2014-06-25
US9711937B2 (en) 2017-07-18
CA2844789A1 (en) 2013-02-21

Similar Documents

Publication Publication Date Title
US20200185880A1 (en) Semiconductor laser mounting with intact diffusion barrier layer
US9646949B2 (en) Solderless mounting for semiconductor lasers
CA2829946C (en) Semiconductor laser mounting for improved frequency stability
US6474531B2 (en) Semiconductor light-emitting device and method of manufacturing the same and mounting plate
JP2000252593A (en) Two-wavelength semiconductor laser element and its manufacture
AU2015202533B2 (en) Semiconductor laser mounting for improved frequency stability
JP2013232523A (en) Method of manufacturing optical module and optical module

Legal Events

Date Code Title Description
STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION