US20180203973A1 - System and simulator for the disengageable simulation of installations or machines within programmable logic controllers - Google Patents

System and simulator for the disengageable simulation of installations or machines within programmable logic controllers Download PDF

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Publication number
US20180203973A1
US20180203973A1 US15/869,171 US201815869171A US2018203973A1 US 20180203973 A1 US20180203973 A1 US 20180203973A1 US 201815869171 A US201815869171 A US 201815869171A US 2018203973 A1 US2018203973 A1 US 2018203973A1
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United States
Prior art keywords
simulation
program
programmable logic
simulator
code
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Abandoned
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US15/869,171
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English (en)
Inventor
Rene Ermler
Cornelia Krebs
Jörg Neidig
Gustavo Quiros Araya
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Siemens AG
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Siemens AG
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Assigned to SIEMENS AKTIENGESELLSCHAFT reassignment SIEMENS AKTIENGESELLSCHAFT ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: ARAYA, GUSTAVO QUIROS, ERMLER, RENE, KREBS, Cornelia, NEIDIG, Jörg
Publication of US20180203973A1 publication Critical patent/US20180203973A1/en
Abandoned legal-status Critical Current

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    • G06F17/5086—
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/10—Geometric CAD
    • G06F30/17—Mechanical parametric or variational design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/054—Input/output
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/25—Testing of logic operation, e.g. by logic analysers
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/13—Plc programming
    • G05B2219/13185—Software function module for simulation
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/10—Plc systems
    • G05B2219/13—Plc programming
    • G05B2219/13186—Simulation, also of test inputs

Definitions

  • the following relates to a system and a simulator for the disengageable simulation of installations or machines within programmable logic controllers (PLCs) having an installation interface for a productive mode, which installation interface is present to output installation control data to the installation and to receive installation data from the installation, and having a further interface, separate from the installation interface, for a simulation mode.
  • PLCs programmable logic controllers
  • test logic requires the control code to be changed, which is an additional source of error and makes the control code less clear, i.e. it is no longer the original code that is tested, but rather an adapted code.
  • the test logic is not needed at all in productive mode, or it can be inadvertently activated or deactivation can be forgotten after initiation, which is a source of error, and in test mode the additional test logic corrupts the timing, since the additional code also needs to be executed, of course.
  • the programmable logic controller is usually embedded as hardware in the loop or software in the loop technology.
  • special hardware is used that links the signals of the simulation product
  • the software PLC has a simulation API provided therefor, that is to say an appropriate programming interface.
  • Modification of modules that is to say of programming objects in the programmable logic controller, by virtue of combination with a simulation condition, wherein the modules are altered such that a flag is taken as a basis for skipping to alternative code sections.
  • the European patent application EP 2 980 661 A1 Siemens AG, Rene Ermler, Andreas Matis, Gustavo Quiros Araya, discloses an electronic controller having a control device for the sequence of a control program for controlling installation and having an installation interface for outputting installation control data to the installation and for receiving installation data from the installation, wherein the controller is set up and configured for operation in an emulation mode that can be switched on and off for control of an installation simulation by the control program, and wherein in the emulation mode there is an emulation interface, separate from the installation interface, for outputting the installation control data and for receiving data from the installation simulation.
  • WO 2015/124170 A1 discloses a method for emulating a programmable logic controller by providing a computation device having an operating system that is inadequate for a realtime demand made on the programmable logic controller.
  • a real period of time is mapped onto a virtual period of time on the basis of a predetermined function, wherein there is provision for predetermination of a limit value for the virtual period of time required for emulating at least one program cycle of a program of the programmable logic controller, and the at least one program cycle is emulated using the computation device and the circumstance of a cycle time having been exceeded by the emulating program cycle is checked on the basis of the limit value.
  • EP 2 687 928 A1 discloses a support program for a controller that prompts an arithmetic unit to perform the recording of a total execution time by virtue of a total execution time being recorded and output.
  • the total execution time is an elapsed time that has accumulated up to effected execution of a control program in an execution cycle, since the execution cycle is started when a controller executes the control program according to an execution priority and the execution cycle.
  • the total execution time is a time that is measured in the controller or a time that is estimated in a control support apparatus.
  • WO 2012/031859 A1 relates to a control apparatus for controlling devices of a factory installation, comprising a control unit and a simulation device, wherein the control unit can be used to control devices of the factory installation according to a predetermined control routine in a control cycle, and the simulation device of the control apparatus is used to provide simulation, effected in sync with the time frame of the control cycle, of operation of the devices.
  • An aspect relates to a system for the disengageable simulation of installations or machines within the programmable logic controllers in which the aforementioned disadvantages are avoided as far as possible.
  • the following essentially relates to a system for the disengageable simulation of installations or machines within programmable logic controllers, in which control program and simulation program are strictly separate within the same processing environment, wherein the direction of access for the input/output memory area during normal operation and the consistent reversal thereof in the simulation part are ensured, and which involves the simulation program being executed between the program cycles, with a virtual clock being stopped during the simulation.
  • the test on an unaltered user program in the PLC avoids errors in the startup or test phase through code changes, and a timing response as in the genuine installation, particularly in the event of tests on timers and under race conditions, achieves a higher level of program quality through better test results.
  • Use of multiple processor cores is likewise possible. Since the simulator runs in the same controller as the actual control code, no additional test hardware is required and fast test mode/productive mode changeover furthermore achieves a time saving. If the simulator remains on the controller, test scenarios are available quickly in the event of a fault.
  • FIG. 1 shows an overview depiction to explain embodiments of the invention in terms of engineering system and programmable logic controller
  • FIG. 2 shows a basic depiction to explain embodiments of the invention in terms of separation of productive code and simulation code and also the interchange of information with the data memory, and
  • FIG. 3 shows a flowchart to explain embodiments of the invention in terms of the timings in the productive part, in the simulation part and in the virtual clock.
  • FIG. 1 shows an overview depiction to explain embodiments of the invention in terms of an engineering system ES and programmable logic controller PLC, wherein an application program AP that is present in the engineering system leads to a productive code PC in the programmable logic controller PLC and, separately therefrom, generates a code from a simulation program S in the engineering system ES and, as simulation code SC, is separately likewise loaded into the programmable logic controller PLC.
  • an application program AP that is present in the engineering system leads to a productive code PC in the programmable logic controller PLC and, separately therefrom, generates a code from a simulation program S in the engineering system ES and, as simulation code SC, is separately likewise loaded into the programmable logic controller PLC.
  • the simulation code SC is programmed using a PLC language and is executed by an IO simulator that is advantageously integrated in a programmable logic controller PLC.
  • the IO simulator is part of the controller, runs within the same context and can access the internal data memories within the control system.
  • the PLC manages a simulation code exclusively through the IO simulator.
  • the direct or inadvertent execution of simulation code by the PLC is technically prevented. Only the IO simulator is still provided with the special rights cited below such as e.g. modifying input signals.
  • FIG. 2 shows a basic depiction to explain embodiments of the invention. To better clarify the differences, the top part of FIG. 2 depicts a programmable logic controller PLC old with a previous productive code PCold that also includes the previous simulation code SCold.
  • FIG. 2 depicts a programmable logic controller PLC according to embodiments of the invention with a productive code PC and the separate simulation code SC, wherein the productive code PC reads PL input information from a memory SP and writes PS output information to the memory SP and wherein simulation code SC conversely reads SL at least one portion of the output information from the memory SP and writes SS new input information to the memory SP.
  • the productive code PC reads PL input information from a memory SP and writes PS output information to the memory SP
  • simulation code SC conversely reads SL at least one portion of the output information from the memory SP and writes SS new input information to the memory SP.
  • FIG. 3 shows a flowchart to explain the timings in the productive part PT, in the simulation part ST and in the virtual clock VC in an inventive system.
  • input information is read PL from the memory SP, at least one portion of this input information is processed PV during a respective program sequence and is then written PS to the memory SP as output information.
  • the unchanged user program computes the new outputs on the basis of the inputs.
  • the virtual clock VC continues to run normally TON, i.e. the timing of the program sequence is unchanged. In a productive mode, no simulation is computed.
  • the control code is executed in real time.
  • output information is read SL from the memory SP, at least one portion of this output information is processed SV and is then written SS to the memory SP as input information.
  • the simulation modules of the IO simulator access the IO memory areas.
  • the simulation is computed between the program cycles and therefore does not corrupt the normal operating response.
  • the PLC code is executed on the basis of the virtual clock VC, which functions as a stopwatch and does not progress during the simulation TOFF. Therefore, the timing of the actual program does not change either as a result of the execution of the simulation code.
  • the execution of the simulation modules is deactivatable depending on the scenario (developments/test/production).
  • the virtual clock VC stops and the simulation procedure begins.
  • the simulation computes the new inputs on the basis of the outputs.
  • the cycle begins again with the sequence of the user program and continuation of the normal timing.
  • the simulation is computed practically “between” the cycles, which means that the simulation accuracy is improved, since the timing (cycle times, jitter, etc.) is therefore not corrupted.
  • the execution times of the simulation are not relevant to the consideration of program execution time.
  • user program and simulator can also be executed on separate processor cores of the PLC.
  • a corresponding simulator can be sold as a separate product, e.g. with separate licenses for engineering and execution time.
  • the IO simulator can be deactivated by a simple mechanism at one point.
  • the system is designed so that when the IO simulator is deactivated, there is the certainty that no further simulation code is executed.
  • the execution of the simulation code is separate from the execution of the productive code, which means that there is no possibility of confusion.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Automation & Control Theory (AREA)
  • Geometry (AREA)
  • Quality & Reliability (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Evolutionary Computation (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Programmable Controllers (AREA)
  • Debugging And Monitoring (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
US15/869,171 2017-01-16 2018-01-12 System and simulator for the disengageable simulation of installations or machines within programmable logic controllers Abandoned US20180203973A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP17151591.9A EP3349082B1 (de) 2017-01-16 2017-01-16 System zur abschaltbaren simulation von anlagen oder maschinen innerhalb von speicherprogrammierbaren steuerungen
EP17151591.9 2017-01-16

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190236224A1 (en) * 2018-02-01 2019-08-01 Siemens Aktiengesellschaft Device and method for simulating a controlled machine or installation
WO2023073883A1 (ja) * 2021-10-28 2023-05-04 ファナック株式会社 補助ファイルを生成するシミュレーション装置および制御システム
US12032876B2 (en) * 2018-02-01 2024-07-09 Siemens Aktiengesellschaft Device and method for simulating a controlled machine or installation

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3620877A1 (de) * 2018-09-06 2020-03-11 Siemens Aktiengesellschaft Verfahren zur simulation einer technischen anlage, gerät, system, computerprogramm und computerprogrammprodukt
CN114285599B (zh) * 2021-11-23 2023-08-01 中国人民解放军战略支援部队信息工程大学 基于控制器深度内存仿真的工控蜜罐构建方法及工控蜜罐

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080091394A1 (en) * 2006-09-15 2008-04-17 Deckel Maho Pfronten Gmbh Device and method for simulating a sequence for machining a workpiece on a machine tool
US20140088734A1 (en) * 2011-03-15 2014-03-27 Omron Corporation Controller support device, controller support program to be executed in said device, and recording medium storing said program
WO2015124170A1 (de) * 2014-02-18 2015-08-27 Siemens Aktiengesellschaft Verfahren und vorrichtung zum emulieren einer speicherprogrammierbaren steuerung

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3901417B2 (ja) * 2000-01-25 2007-04-04 オムロン株式会社 Ｐｌｃシミュレータ
JP2001282327A (ja) * 2000-03-31 2001-10-12 Omron Corp シミュレーションシステム及びシミュレータ並びに管理サーバ及び記録媒体
US8473269B1 (en) * 2007-02-27 2013-06-25 Xilinx, Inc. System-level hardware and software development and co-simulation system
CN101620548B (zh) * 2008-07-04 2013-03-27 菲尼克斯电气公司 用于计算机模拟设备或者机器的方法和计算机系统
EP2583145A1 (de) * 2010-09-06 2013-04-24 Siemens Aktiengesellschaft Steuervorrichtung für eine fabrikanlage sowie steuer- und überwachungsverfahren für eine solche fabrikanlage
EP2980661A1 (de) 2014-07-30 2016-02-03 Siemens Aktiengesellschaft Elektronisches Steuerungsgerät

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080091394A1 (en) * 2006-09-15 2008-04-17 Deckel Maho Pfronten Gmbh Device and method for simulating a sequence for machining a workpiece on a machine tool
US20140088734A1 (en) * 2011-03-15 2014-03-27 Omron Corporation Controller support device, controller support program to be executed in said device, and recording medium storing said program
WO2015124170A1 (de) * 2014-02-18 2015-08-27 Siemens Aktiengesellschaft Verfahren und vorrichtung zum emulieren einer speicherprogrammierbaren steuerung

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20190236224A1 (en) * 2018-02-01 2019-08-01 Siemens Aktiengesellschaft Device and method for simulating a controlled machine or installation
US12032876B2 (en) * 2018-02-01 2024-07-09 Siemens Aktiengesellschaft Device and method for simulating a controlled machine or installation
WO2023073883A1 (ja) * 2021-10-28 2023-05-04 ファナック株式会社 補助ファイルを生成するシミュレーション装置および制御システム

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EP3349082B1 (de) 2019-07-31
EP3349082A1 (de) 2018-07-18
CN108319533A (zh) 2018-07-24
CN108319533B (zh) 2021-07-06

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