US20170290147A1

US20170290147A1 - Circuit-and-heat-dissipation assembly and method of making the same

Info

Publication number: US20170290147A1
Application number: US15/623,202
Authority: US
Inventors: Pen-Yi Liao; Hung-San PAN; Yu-Cheng Chen; Hui-Ching Chuang; Wen-Chia TSAI
Original assignee: Taiwan Green Point Enterprise Co Ltd
Current assignee: Taiwan Green Point Enterprise Co Ltd
Priority date: 2014-06-23
Filing date: 2017-06-14
Publication date: 2017-10-05
Also published as: TW201601601A; TWI538574B; US20150373832A1; US9713263B2

Abstract

Disclosed herein is a circuit-and-heat-dissipation assembly which includes: a heat sink including a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface, the heat dissipating element protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment; an insulator layer formed on the circuit-forming surface; and a patterned circuit formed on the insulator layer and having an electroless plating layer which has a patterned catalyst seed layer comprising an active metal and formed on the insulator layer, and a reduced metal layer formed on the catalyst seed layer. Also disclosed herein is a method of making the circuit-and-heat-dissipation assembly.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

This application is a divisional application of U.S. patent application Ser. No. 14/744,496, filed on Jun. 19, 2015, which claims priority of Taiwanese Patent Application No. 103121575, filed on Jun. 23, 2014. This application claims the benefits and priority of all these prior applications and incorporates by reference the contents of these prior applications in their entirety.

FIELD OF INVENTION

Embodiments of the invention generally relate to a circuit-and-heat-dissipation assembly and a method of making the same, more particularly to a circuit-and-heat-dissipation assembly including a heat sink and a patterned circuit formed on the heat sink.

BACKGROUND

FIGS. 1A to 1F illustrate consecutive steps of a method of making an electronic assembly, such as a headlight electronic module. The method includes: enclosing an aluminum substrate 11 with an insulator layer 12 (see FIG. 1A); forming a copper layer 13 on the insulator layer 12 so as to form a circuit preform 10 (see FIG. 1B); attaching the circuit preform 10 to a planar plate 151 of a heat sink 15 through a thermal grease 14 (see FIG. 1C); patterning the copper layer 13 to form a circuit pattern 131 on the insulator layer 12 using semiconductor processing techniques (see FIG. 1D), the circuit pattern 131 having enlarged soldering ends 132 (serving as bonding pads 132); forming a solder mask layer 134 on the circuit pattern 131 (see FIG. 1E); and mounting a plurality of electronic components 17, such as LED chips, on the circuit pattern 131 using surface mounting techniques, such that the electronic components 17 are bonded to the bonding pads 132, respectively (see FIG. 1F with reference to FIG. 1E).
There may be a need for providing a method of making an electronic assembly that is simple and cost effective.

SUMMARY

In certain embodiments of the disclosure, a circuit-and-heat-dissipation assembly may be provided. Such a circuit-and-heat-dissipation assembly may include: a heat sink including a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface opposite to the circuit-forming surface, the heat dissipating element being connected to and protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment; an insulator layer formed on the circuit-forming surface; and a patterned circuit formed on the insulator layer.
In certain embodiments of the disclosure, a method of making a circuit-and-heat-dissipation assembly may be provided. Such a method may include: preparing a heat sink that includes a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface, the heat dissipating element protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment; forming an insulator layer on the circuit-forming surface; and forming a patterned circuit on the insulator layer.
In certain embodiments of the disclosure, a circuit-and-heat-dissipation assembly may be provided. Such a circuit-and-heat-dissipation assembly may include: a heat sink including a circuit-forming surface; an insulator layer formed on the circuit-forming surface; a patterned circuit formed on the insulator layer, the patterned circuit including at least one pair of spaced apart conductive lines; and a heat-dissipating block formed on the circuit-forming surface and extending therefrom through the insulator layer toward the conductive lines.

BRIEF DESCRIPTION OF THE DRAWINGS

Other features and advantages of the disclosure will become apparent in the following detailed description of the exemplary embodiments with reference to the accompanying drawings, of which:

FIGS. 1A to 1F are perspective views illustrating consecutive steps of a method of making an electronic assembly;

FIGS. 2A to 2E are perspective views illustrating consecutive steps of a method of making a circuit-and-heat-dissipation assembly in certain embodiments according to the disclosure;

FIG. 3 is a perspective view illustrating a step of forming an electroplating layer that may be included in the method of making the circuit-and-heat-dissipation assembly in certain embodiments according to the disclosure;

FIGS. 4A to 4C are perspective views illustrating consecutive steps of forming a patterned catalyst seed layer that may be included in the method of making the circuit-and-heat-dissipation assembly in certain embodiments according to the disclosure;

FIGS. 5A and 5B are perspective views illustrating steps of patterning a flexible sheet to form a patterned mask and attaching the patterned mask onto a heat sink that may be included in the method of making the circuit-and-heat-dissipation assembly in certain embodiments according to the disclosure;

FIG. 6 is a perspective view illustrating a step of patterning a flexible sheet to form a patterned mask that may be included in the method of making the circuit-and-heat-dissipation assembly in certain embodiments according to the disclosure; and

FIG. 7 is a schematic view illustrating a step of forming a heat dissipating block that may be included in the method of making the circuit-and-heat-dissipation assembly in certain embodiments according to the disclosure.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

It may be noted that like elements are denoted by the same reference numerals throughout the disclosure.
FIGS. 2A to 2E illustrate consecutive steps of certain embodiments of a method of making a circuit-and-heat-dissipation assembly, such as a headlight electronic module. The method may include the following consecutive steps (see FIGS. 2A to 2E). A heat sink 2 is prepared (see FIG. 2A), and includes a heat absorbing base 21 having a circuit-forming surface 211 and an element-forming surface 212 opposite to the circuit-forming surface 211, and a heat dissipating element 22 connected to and protruding from the heat absorbing base 21 for dissipating heat conducted from the heat absorbing base 21 into an ambient environment. An insulator layer 3 is then formed on the circuit-forming surface 211 (see FIG. 2B). After that, a patterned catalyst seed layer 41 comprising an active metal is formed on the insulator layer 3 (see FIG. 2C). A reduced metal layer 42 is then formed on the patterned catalyst seed layer 41 (see FIG. 2D) by reducing metal ions in an electroless plating bath (not shown) through the catalyst seed layer 41. The reduced metal layer 42 cooperates with the patterned catalyst seed layer 41 to define a patterned electroless plating layer 51. Thereafter, a plurality of electronic components 6, such as LED chips, are mounted on the patterned electroless plating layer 51 (see FIG. 2E).
In these embodiments, the patterned electroless plating layer 51 alone serves as a patterned circuit 5 for direct mounting of the electronic components 6 thereon. Particularly, the patterned circuit 5 includes pairs of spaced apart conductive lines 50, each of which has an enlarged soldering end 501. Each of the electronic components 6 may be bonded or soldered to the enlarged soldering ends 501 of a corresponding pair of the conductive lines 50 using techniques, such as surface mount technology. The conductive lines 50 may have a thickness ranging from 18 μm to 20 μm and a line width ranging from 3 mm to 10 mm.
In certain embodiments, the active metal may be selected from the group consisting of palladium, rhodium, platinum, iridium, osmium, gold, nickel, iron, and combinations thereof. The reduced metal layer 42 formed from the electroless plating may contain a metallic material having a heat conductivity (K) greater than 95 W/m·K and a resistance (ρ) less than 75 nΩ·m. One Example of the metallic material may be copper (K=400 W/m·K, ρ=16.78 nΩ·m).
In certain embodiments, the heat dissipating element 22 may be in the form of a structure selected from the group consisting of fins, a heat pipe, and combinations thereof. In certain embodiments, the heat dissipating element 22 may be in the form of fins.
In certain embodiments, the heat sink 2 is a single piece. In certain embodiments, the heat sink 2 may be made from aluminum extrudate.
In certain embodiments, the insulator layer 3 may be formed on the circuit-forming surface 211 using electrophoretic deposition techniques, and may be made from a resin material, such as epoxy. The insulator layer 3 may extend continuously from the circuit-forming surface 211 to the element-forming surface 212. In certain embodiments, the insulator layer 3 may enclose an entire outer surface of the heat sink 2.
In certain embodiments, referring to FIG. 3, in combination with FIG. 2E, the method may further include forming a patterned electroplating layer 52 on the electroless plating layer 51 using electroplating techniques. In these embodiments, the patterned electroplating layer 52 and the electroless plating layer 51 cooperatively define the patterned circuit 5 for mounting of the electronic components 6 thereon.
In certain embodiments, the patterned electroplating layer 52 may be made from nickel (K=99.9 W/m·K, ρ=69.3 nΩ·m).
In certain embodiments, referring to FIGS. 4A to 4C, the heat absorbing base 21 is curved in shape and the patterned catalyst seed layer 41 may be formed on the insulator layer 3 by: covering the insulator layer 3 with a patterned mask 8 (see FIG. 4A), the patterned mask 8 being formed with a pattern of through-holes 81 that corresponds to a pattern of the patterned catalyst seed layer 41; applying a curable ink 40 containing the active metal onto the patterned mask 8 to fill the through-holes 81 with the curable ink 40 using a sprayer 91 (see FIG. 4B); removing the patterned mask 8 from the insulator layer 3 (see FIG. 4C); and curing the curable ink 40 to form the patterned catalyst seed layer 41 (see FIG. 4C). Alternatively, the patterned catalyst seed layer 41 may be formed by applying a powder coating material containing the active metal onto the patterned mask 8 or by immersing the assembly of the patterned mask 8, the insulator layer 3 and the heat sink 2 in a solution containing the active metal.
In certain embodiments, referring to FIGS. 5A and 5B, the patterned mask 8 may be formed by placing a flexible sheet 82 against a planar surface of a substrate 92, followed by patterning the flexible sheet 82 using a laser beam 93 through laser ablation or laser burnout techniques (see FIG. 5A). In certain embodiments, the circuit-forming surface 211 of the heat absorbing base 21 may be curved in shape (see FIG. 5B), so that a covering surface 301 of the insulator layer 3 that covers the circuit-forming surface 211 may also be curved in shape. Since the patterned mask 8 thus formed is flexible, the same can conform to a curved profile of the covering surface 301 or the circuit-forming surface 211 when covering the insulator layer 3. Alternatively, the flexible sheet 82 may be directly placed against the covering surface 301 of the insulator layer 3 (which has a curved profile) during laser ablation (see FIG. 6).
In certain embodiments, the patterned mask 8 may be made from a material selected from the group consisting of polyethylene terephthalate and rubber.
In certain embodiments, referring to FIG. 7, the method may further include the steps of: forming a plurality of holes 31 in the insulator layer 3, such that the holes 31 expose a plurality of contact regions 2112 of the circuit-forming surface 211, each of the holes 31 being aligned with a gap 502 defined by two enlarged soldering ends 501 of a corresponding pair of the conductive lines 50 of the patterned circuit 5; and forming a plurality of heat dissipating blocks 72 on the contact regions 2112, respectively, such that each of the heat dissipating blocks 72 extends toward a corresponding pair of the conductive lines 50 from the corresponding contact region 2112 through the corresponding hole 31 in the insulator layer 3 and into the corresponding gap 502 to contact a heat sink or heat dissipating substrate (not shown) of a corresponding one of the electronic components 6.
In certain embodiments, the heat dissipating blocks 72 may be made from a thermal grease, and may be formed by coating techniques.
In certain embodiments, the holes 31 in the insulator layer 3 may be formed after formation of the patterned circuit 5 using laser ablation techniques. Alternatively, the holes 31 in the insulator layer 3 may be formed before formation of the patterned circuit 5. For instance, the method may include: forming a non-patterned catalyst seed layer (not shown) on the insulator layer 3; forming a non-patterned reduced metal layer (not shown) on the non-patterned catalyst seed layer 41; and patterning the non-patterned reduced metal layer and the non-patterned catalyst seed layer 41 and forming the holes 31 in the insulator layer 3 using laser ablation techniques.
In certain embodiments, the heat generated from the electronic components 6 may be conducted through the patterned circuit 5, the insulator layer 3 and the heat sink 2 into the atmosphere, which renders the circuit-and-heat-dissipation assembly of the certain embodiments more efficient in heat dissipation as compared to the aforesaid electronic assembly.
While the disclosure has been described in connection with what are considered the exemplary embodiments, it is understood that this disclosure is not limited to the disclosed embodiments but is intended to cover various arrangements included within the spirit and scope of the broadest interpretation so as to encompass all such modifications and equivalent arrangements.

Claims

What is claimed is:

1. A method of making a circuit-and-heat-dissipation assembly, comprising:

preparing a heat sink that includes a heat absorbing base and a heat dissipating element, the heat absorbing base having a circuit-forming surface and an element-forming surface, the heat dissipating element protruding from the element-forming surface for dissipating heat conducted from the heat absorbing base into an ambient environment;

forming an insulator layer on the circuit-forming surface; and

forming a patterned circuit on the insulator layer,

wherein the patterned circuit is formed on the insulator layer by forming a patterned electroless plating layer on the insulator layer using electroless plating techniques, and

wherein the patterned electroless plating layer is formed on the insulator layer by: forming a catalyst seed layer comprising an active metal on the insulator layer; and forming a reduced metal layer on the catalyst seed layer by reducing metal ions through the catalyst seed layer.

2. The method as claimed in claim 1, wherein the catalyst seed layer is a patterned catalyst seed layer.

3. The method as claimed in claim 1, wherein the catalyst seed layer is a non-patterned catalyst seed layer and is subjected to patterning.

4. The method as claimed in claim 1, wherein a patterned electroplating layer is formed on the electroless plating layer using electroplating techniques.

5. The method as claimed in claim 2, wherein the patterned catalyst seed layer is formed on the insulator layer by:

covering the insulator layer with a patterned mask, the patterned mask being formed with a pattern of through-holes that corresponds to a pattern of the patterned catalyst seed layer; and

applying an ink containing the active metal onto the patterned mask to fill the through-holes with the ink.

6. The method as claimed in claim 5, wherein the pattern of the patterned mask is formed by laser ablation techniques.

7. The method as claimed in claim 5, wherein the circuit-forming surface of the heat absorbing base is curved in shape, the patterned mask being flexible and conforming to the circuit-forming surface when covering the insulator layer.

8. The method as claimed in claim 1, further comprising:

forming at least one hole in the insulator layer, such that the hole exposes a contact region of the circuit-forming surface and that the hole is aligned with a gap defined by two soldering ends of a pair of conductive lines of the patterned circuit; and

forming a heat dissipating block on the contact region, such that the heat dissipating block extends from the contact region through the hole in the insulator layer and into the gap.

9. The method as claimed in claim 1, wherein the heat dissipating element is in the form of fins.

10. The method as claimed in claim 1, wherein the reduced metal layer is formed on the catalyst seed layer by reducing the metal ions in an electroless plating bath through the catalyst seed layer.