US20150358500A1 - Graphical indicator - Google Patents

Graphical indicator Download PDF

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Publication number
US20150358500A1
US20150358500A1 US14/731,417 US201514731417A US2015358500A1 US 20150358500 A1 US20150358500 A1 US 20150358500A1 US 201514731417 A US201514731417 A US 201514731417A US 2015358500 A1 US2015358500 A1 US 2015358500A1
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US
United States
Prior art keywords
graphical
header
blocks
virtual
micro
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
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US14/731,417
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English (en)
Inventor
Cheng-Ta Lee
Jang-Jer Tsai
Tzu-Fong Huang
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Sonix Technology Co Ltd
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Sonix Technology Co Ltd
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Application filed by Sonix Technology Co Ltd filed Critical Sonix Technology Co Ltd
Assigned to SONIX TECHNOLOGY CO., LTD. reassignment SONIX TECHNOLOGY CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HUANG, TZU-FONG, LEE, CHENG-TA, TSAI, JANG-JER
Publication of US20150358500A1 publication Critical patent/US20150358500A1/en
Priority to US15/903,037 priority Critical patent/US10686962B2/en
Priority to US16/902,185 priority patent/US11283962B2/en
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32—Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/32101—Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title
    • H04N1/32144—Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title embedded in the image data, i.e. enclosed or integrated in the image, e.g. watermark, super-imposed logo or stamp
    • H04N1/32149—Methods relating to embedding, encoding, decoding, detection or retrieval operations
    • H04N1/32203—Spatial or amplitude domain methods
    • H04N1/32251—Spatial or amplitude domain methods in multilevel data, e.g. greyscale or continuous tone data
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/06009—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code with optically detectable marking
    • G06K19/06037—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code with optically detectable marking multi-dimensional coding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/06009—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code with optically detectable marking
    • G06K19/06046—Constructional details
    • G06K19/06131—Constructional details the marking comprising a target pattern, e.g. for indicating the center of the bar code or for helping a bar code reader to properly orient the scanner or to retrieve the bar code inside of an image
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/06009—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code with optically detectable marking
    • G06K19/06046—Constructional details
    • G06K19/06178—Constructional details the marking having a feature size being smaller than can be seen by the unaided human eye
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F15/00—Boards, hoardings, pillars, or like structures for notices, placards, posters, or the like
    • G09F15/0006—Boards, hoardings, pillars, or like structures for notices, placards, posters, or the like planar structures comprising one or more panels
    • G09F15/0025—Boards, hoardings, pillars, or like structures for notices, placards, posters, or the like planar structures comprising one or more panels display surface tensioning means
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/32—Circuits or arrangements for control or supervision between transmitter and receiver or between image input and image output device, e.g. between a still-image camera and its memory or between a still-image camera and a printer device
    • H04N1/32101—Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title
    • H04N1/32144—Display, printing, storage or transmission of additional information, e.g. ID code, date and time or title embedded in the image data, i.e. enclosed or integrated in the image, e.g. watermark, super-imposed logo or stamp
    • H04N1/32149—Methods relating to embedding, encoding, decoding, detection or retrieval operations
    • H04N1/32203—Spatial or amplitude domain methods
    • H04N1/32219—Spatial or amplitude domain methods involving changing the position of selected pixels, e.g. word shifting, or involving modulating the size of image components, e.g. of characters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S362/00—Illumination
    • Y10S362/80—Light emitting diode

Definitions

  • the invention relates to a graphical indicator that can be read by using pattern/image recognition, and the graphical indicator corresponds to indicator data.
  • FIG. 1A is a diagram illustrating the coexistence of graphical indicators and main information according to conventional art.
  • a plurality of graphical indicators 102 each comprise a group of graphical micro-units, and the graphical micro-units are formed on an object surface 100 .
  • the graphical micro-units are so small that they are visually negligible or are seen only as a halftone gray background.
  • the graphical indicators 102 and the main information 104 (such as the text “APPLE” shown in FIG. 1A ) are formed on the object surface 100 (e.g., the surface of a paper sheet) by printing or other suitable techniques.
  • the graphical indicators 102 correspond to indicator data and do not impact the viewer's ability to recognize the main information 104 .
  • FIG. 1B is a diagram illustrating an electronic system 110 according to conventional art.
  • An electronic system 110 includes an optical device 112 , a processing device 114 and an output device 116 designed to perform a pattern/image recognition process for reading the graphical indicator 102 .
  • the optical device 112 , the processing device 114 and the output device 116 are connected to one another in wired or wireless manners.
  • the optical device 112 scans (or photographs) the object surface to obtain an enlarged image.
  • the processing device 114 identifies a graphical indicator 102 from the enlarged image, converts the image of the graphical indicator 102 into digital data, and obtains additional information related to the digital data.
  • the output device 116 receives the additional information, and outputs the additional information by a predetermined method. Therefore, based on the design of the graphical indicator 102 , additional information may be encoded and carried on a common object surface such as a page of a book.
  • FIG. 1C is a schematic diagram illustrating a graphical indicator according to conventional art.
  • one graphical indicator 102 (an area surrounded by dash lines) is formed by a header area 212 and a content data area 214 arranged in accordance with a predetermined rule.
  • the header area 212 of each graphical indicator 102 facilitates in distinguishing the graphical indicators 102
  • the content data area 214 carries indicator data by using the graphical micro-units 216 .
  • the header information contained in the header area 212 provides a reference for determining the orientation and determining the position and boundaries of the graphical indicator 102 by the electronic system 110 .
  • the electronic system 110 is capable of orienting and positioning the graphical indicator 102 for recognition more accurately.
  • the header area 212 is expanded, the capacity of the graphical indicator 102 to carry indicator data is reduced.
  • the recognition rate may be lowered for the graphical indicator 102 .
  • the invention is directed to a graphical indicator capable of an increased recognition rate for the graphical indicator during image recognition process.
  • the invention provides a graphical indicator, that comprises a plurality of first header blocks, a plurality of second header blocks and a plurality of data blocks for forming a graphical indicator matrix.
  • Each of the first header blocks and the second header blocks has a header graphical micro-unit.
  • Each of the data blocks has a data graphical micro-unit.
  • An array area is formed by the second header blocks and the data blocks.
  • a first virtual line is formed by virtual centers of the first header blocks, a second virtual line is formed by the virtual centers of the second header blocks, and an included angle between the first virtual line and the second virtual line is less than 90 degrees.
  • the invention provides a graphical indicator, which comprises both a linear area and an array area.
  • the linear area comprises a plurality of header blocks, and each of the blocks has a header graphical micro-unit.
  • a graphical indicator matrix is formed by the array area and the linear area.
  • the dimension of the graphical indicator matrix is M ⁇ N, and M and N are positive integers, respectively greater than 2.
  • the array area is comprised of a plurality of linear sub-array areas that are positioned so that they are parallel to the linear area.
  • Each of the linear sub-array areas has a plurality of blocks and comprises at least one header graphical micro-unit and a plurality of data graphical micro-units respectively disposed in the blocks according to an arrangement sequence.
  • the arrangement sequences of all the linear sub-array areas in the graphical indicator matrix are not completely identical.
  • Each of the data graphical micro-units is selectively and respectively disposed in one of a plurality of virtual areas of the block.
  • the header graphical micro-units represent header information
  • the data graphical micro-units represent indicator data.
  • the graphical indicators are merged into a graphical indicator structure.
  • the number of the data graphical micro-units that can be consecutively arranged in each column of the graphical indicator structure and the number of the data graphical micro-units that can be consecutively arranged in each row of the graphical indicator structure are not over M ⁇ 1 and N ⁇ 1.
  • One of the header graphical micro-units of each of the array areas is selectively disposed at a virtual center of the corresponding block or deviated from the virtual center of the corresponding block, and the rest of the header graphical micro-units are located at the virtual centers of the corresponding blocks.
  • the graphical indicator is a matrix comprising header graphical micro-units and the data graphical micro-units.
  • the graphical indicator may provide a more efficient recognition rate during the image recognition process while maximizing the data payload for the graphical indicators.
  • FIG. 1A is a diagram illustrating a coexistence of a graphical indicator and main information according to conventional art.
  • FIG. 1B is a diagram illustrating an electronic system according to conventional art.
  • FIG. 1C is a diagram illustrating a graphical indicator according to conventional art.
  • FIG. 2A is a diagram illustrating a graphical indicator according to an embodiment of the invention.
  • FIG. 2B is a diagram illustrating a data block according to an embodiment of the invention.
  • FIG. 2C is a diagram illustrating a graphical indicator structure according to an embodiment of the invention.
  • FIG. 3A is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 3B is a diagram illustrating a graphical indicator structure according to another embodiment of the invention.
  • FIG. 4A is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 4B and FIG. 4C are diagrams illustrating a graphical indicator structure according to another embodiment of the invention.
  • FIG. 5A is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 5B is a schematic diagram illustrating a data block according to another embodiment of the invention.
  • FIG. 6A is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 6B is a diagram illustrating a data block according to another embodiment of the invention.
  • FIG. 6C is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 7 is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 2A is a diagram illustrating a graphical indicator according to an embodiment of the invention.
  • a graphical indicator 20 comprises a linear area 220 and an array area 240 .
  • the linear area 220 comprises a plurality of header blocks 260 A, and each of the header blocks 260 A has a header graphical micro-unit A.
  • the array area 240 comprises a plurality of linear sub-array areas 242 , each of which comprises a plurality of data blocks 260 B and one or more header blocks 260 A.
  • the graphical indicator matrix 280 is formed by the header blocks 260 A and the data blocks 260 B that comprise the array area 240 and the linear area 220 .
  • the dimension of the graphical indicator matrix 280 is M ⁇ N blocks, and M and N are positive integers respectively greater than 2. In the present embodiment, M is 5 and N is 4 for example, but the invention is not limited thereto.
  • the array area 240 is comprised of a plurality of linear sub-array areas 242 parallel to the linear area 220 .
  • Each of the linear sub-array areas 242 has a plurality of data blocks 260 B, at least one header block 260 A, and comprises at least one of the header graphical micro-units A and a plurality of data graphical micro-units B respectively disposed in the data blocks 260 B according to an arrangement sequence.
  • Each of the data graphical micro-units B is selectively and respectively disposed in one of a plurality of virtual areas 262 of the data block 260 B.
  • the header graphical micro-units A present header information
  • the data graphical micro-units B present indicator data. It should be noted that, the arrangement sequences of all the linear sub-array areas 242 in the graphical indicator matrix 280 are not completely identical.
  • Each of the header blocks 260 A and data blocks 260 B comprises one graphical micro-unit A or B.
  • the data graphical micro-units B illustrated in data blocks 260 B merely indicate possible placements of the data graphical micro-unit B within the data block 260 B, they are not intended to indicate that there are a plurality of data graphical micro-units B contained in one single data block 260 B.
  • the data blocks 260 B present a corresponding set of bit values based on the placement of the data graphical micro-units B therein, and the header blocks 260 A present the header information by the header graphical micro-units A.
  • the header information can assist the electronic system 110 of FIG. 1B in orienting and positioning.
  • One header graphical micro-unit A′ may be selectively disposed at a virtual center P of the corresponding header block 260 A, or deviated from the virtual center P of the header block 260 A as shown in the two alternative positions above and below virtual center P as shown in FIGS. 2A and 2C , or in alternative positions left and right of virtual center P, so as to further assist the electronic system 110 for orienting and positioning. Note that only one header graphical micro-unit A or A′ would be used in each header block 260 A, two are shown only to illustrate to potential positions offset from virtual center P.
  • FIG. 2B is a diagram illustrating a data block 260 B according to an embodiment of the invention.
  • each of the data blocks 260 B is further divided into a first virtual area 262 A, a second virtual area 262 B, a third virtual area 262 C and a fourth virtual area 262 D, but the number of the virtual areas in each of the blocks is not limited thereto.
  • each of the data blocks 260 B may be further divided into, for example, 6, 8, 10, 16 or 32 virtual areas.
  • the data graphical micro-unit B is selectively disposed in the first virtual area 262 A, the second virtual area 262 B, the third virtual area 262 C or a fourth virtual area 262 D, such that the block 260 B may be corresponding to one of the bit values 00, 01, 10 or 11. More specifically, the embodiment of FIG. 2B illustrates that the data blocks 260 B represent different bit values according to a position of the data graphical micro-unit B relative to the virtual center P within the block. As such, the indicator data of the graphical indicator 20 may be obtained by combining the bit values represented by all the data blocks 260 B in the graphical indicator 20 .
  • the graphical indicator matrix 280 is comprised of the linear area 220 and the array area 240 , and the array area 240 is comprised of the linear sub-array areas 242 parallel to the linear area 220 .
  • the linear area 220 has four header blocks 260 A, and each of the linear sub-array areas 242 comprises one header block 260 A and three data blocks 260 B.
  • the header graphical micro-units A and the data graphical micro-units B are respectively disposed in the header blocks 260 A and data blocks 260 B of the linear sub-array area 242 according to an arrangement sequence.
  • the arrangement sequences of all the linear sub-array areas 242 in the graphical indicator 20 are not identical.
  • the header blocks 260 A to which the header graphical micro-units A belong are located on an oblique line through the array area 240 , and each of the data blocks 260 B outside the oblique line has the data graphical micro-unit B.
  • the oblique line is a diagonal line across the array area 240 , but the invention is not limited to this arrangement.
  • the graphical indicator 20 comprises at least M+N ⁇ 1 number (i.e., 8) of the header graphical micro-units A.
  • FIG. 2C is a diagram illustrating a graphical indicator structure according to an embodiment of the invention.
  • a graphical indicator structure I is formed by merging a plurality of graphical indicators 20 .
  • the graphical indicators 20 are merged into the graphical indicator structure I.
  • the electronic system is capable of easily orienting and positioning the header graphical micro-units A in the graphical indicator structure I after the enlarged image is obtained, so as to substantially increase the recognition rate for the graphical indicator structure I.
  • the header blocks 260 A in the linear area 220 are regarded as first header blocks and the header blocks 260 A disposed with the header graphical micro-units (A, A′) in the array area 240 are regarded as second header blocks
  • the first header blocks are disposed at one side of the array area 240 and horizontally arranged in the linear area 220 of the graphical indicator matrix 280
  • the second header blocks are obliquely arranged in the array area 240 of the graphical indicator matrix 280 .
  • a first virtual line formed by the virtual centers P of the first header blocks and a second virtual line formed by the virtual centers P of the second header blocks forms an included angle, and the included angle is less than 90 degrees (referring to FIG. 2C ).
  • the header blocks 260 A to which the header graphical indicators A belong are all arranged into a plurality of Z-shapes. In other words, the arrangement of the header blocks 260 A to which the header graphical micro-units A belong remains unchanged even if the graphical indicator structure I is inverted.
  • the electronic system performs the recognition and intends to read the indicator data when the graphical indicator structure I is inverted, a recognition error may occur because the header graphical micro-units A cannot be used for orienting correctly and positioning correctly.
  • header graphical micro-unit A′ in each of the array areas 240 can be deviated from the virtual center P of the corresponding header block 260 A.
  • the header graphical micro-units A′ illustrated in header block 260 A merely indicate possible placements of the header graphical micro-units A′ instead of marking that there are a plurality of the header graphical micro-units A′ contained in one single header block 260 A.
  • the electronic system may determine a relation between the relative positions of the header graphical micro-unit A′ and the header graphical micro-units A in the neighboring linear areas 220 for further positioning the graphical indicator structure I.
  • distances from the header blocks 260 A, to which the header graphical micro-units A′ deviated from the virtual center P belong, to neighboring two of the linear areas 220 (or the header blocks 260 A of the neighboring linear area 220 ) are not equidistant. It should be noted that, if the arrangement of the header blocks 260 A to which the header graphical micro-units (A, A′) belong correspondingly changes when the graphical indicator structure I is inverted, one header graphical micro-unit A′ in the array area 240 may be selectively disposed at the virtual center P of the corresponding header block 260 A or deviated from the virtual center P of the corresponding header block 260 A.
  • the block 260 A when the header block 260 A has the header graphical micro-unit A′ deviated from the virtual center P, the block 260 A may also correspond to one bit value. More specifically, when the image recognition is performed on the image of graphical indicator 20 , the electronic system may further calculate for the bit value (or bit values) represented by the header block 260 A according to the relation between the relative position of the header graphical micro-unit A′ to the virtual center P of the header block 260 A. In other words, by using the header graphical micro-unit A′ in the header block 260 A, the amount of the indicator data carried in the graphical indicator 20 may be increased.
  • the header graphical micro-unit A′ can still be used in this way to increase the amount of the indicator data carried in the graphical indicator 20 .
  • FIG. 3A is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 3B is a diagram illustrating alternative graphical indicator structure according to another embodiment of the invention.
  • the graphical indicator matrix 280 of the graphical indicator 20 A is comprised of a linear area 220 and the array area 240
  • the array area 240 is comprised of the linear sub-array areas 242 parallel to the linear area 220 .
  • the linear area 220 has four header graphical micro-units A, and each of the linear sub-array areas 242 has one header graphical micro-unit A and three data graphical micro-units B which are disposed in the header blocks 260 A and data blocks 260 B according to an arrangement sequence.
  • the arrangement sequences of all the linear sub-array areas 242 in the graphical indicator 20 A are not identical. More specifically, in the array area 240 , the header blocks 260 A to which the header graphical micro-units A belong are located on an oblique line through the array area 240 , and each of the data blocks 260 B outside the oblique line has a data graphical micro-unit B. One of the header blocks 260 A on the oblique line is adjacent to the linear area 220 .
  • the graphical indicator 20 A at least comprises a M+N ⁇ 1 number (i.e., 7) of the header graphical micro-units A.
  • the header blocks 260 A in the linear area 220 of the graphical indicator 20 A are regarded as first header blocks and the header blocks 260 A disposed with the header graphical micro-units (A, A′) in the array area 240 are regarded as second header blocks
  • the first header blocks are horizontally arranged in the linear area 220 of the graphical indicator matrix 280
  • the second header blocks are obliquely arranged in the array area 240 of the graphical indicator matrix 280 .
  • a first virtual line formed by the virtual centers P of the first header blocks and a second virtual line formed by the virtual centers P of the second header blocks forms an included angle, and the included angle is less than 90 degrees (referring to FIG. 3B ).
  • the second header blocks of the graphical indicator 20 A are not arranged on the diagonal line of the array area 240 extending from corner to corner of the array area 240 .
  • the header blocks 260 A to which the header graphical micro-units A belong shows the same arrangement.
  • the electronic system can determine a relation between relative positions of the header block 260 A and the neighboring linear areas 220 when the recognition is performed to thereby further positioning the graphical indicator structure IA.
  • FIG. 4A is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • FIG. 4B and FIG. 4C are diagrams illustrating a graphical indicator structure according to another embodiment of the invention. As compared to the graphical indicator 20 in FIG. 2A , a graphical indicator 20 B in FIG.
  • 4A comprises three linear sub-array areas 242 , in which two of the linear sub-array areas 242 have the same arrangement sequence for the header graphical micro-unit A and the data graphical micro-unit B while one of the linear sub-array area 242 has a different arrangement sequence for the header graphical micro-unit A and the data graphical micro-unit B.
  • the positions of the header blocks 260 A to which the header graphical micro-units A belong cannot be crossed by one oblique line across the array area 240 .
  • the arrangement of the header blocks 260 A when the graphical indicator structure IB is not inverted ( FIG. 4B ) and when the graphical indicator structure IB is inverted ( FIG. 4C ) are different. Under such circumstance, it is not necessary to deviate the header graphical micro-units A in the array area 240 , and the electronic system is capable of positioning and orienting directly through the header graphical micro-units A of the graphical indicator 20 B. In this design, the amount of indicator data carried in the graphical indicator 20 B may also be effectively increased by deviating the position of the header graphical micro-unit A′ from the virtual center of the header block 260 A.
  • FIG. 5A is a diagram illustrating a graphical indicator 30 according to another embodiment of the invention.
  • FIG. 5B is a diagram illustrating a data block according to another embodiment of the invention.
  • a graphical indicator 30 comprises the header graphical micro-units A and the data graphical micro-units B, which are disposed in header blocks 360 A and data blocks 360 B respectively.
  • the data graphical micro-units B are selectively and respectively disposed in one of a plurality of virtual areas 362 of the data block 360 B.
  • each of the blocks 360 B is further divided into a first virtual area 362 A, a second virtual area 362 B, a third virtual area 362 C, a fourth virtual area 362 D, a fifth virtual area 362 E, a sixth virtual area 362 F, a seventh virtual area 362 G and an eighth virtual area 362 H.
  • possible positions for disposing the data graphical micro-units B surrounds the virtual center P in an encircling manner for example.
  • the data graphical micro-unit B is selectively disposed in one of the first virtual area to the eighth virtual area ( 362 A to 362 H), so that the data block 360 B corresponds to one of bit values 000, 001, 010, 011, 100, 101, 110 and 111.
  • the representation of multiple data graphical micro-units B in one data block 360 B is only to show the various positions available for the data graphical micro-unit and does not indicate the presence of multiple data graphical micro-units in one data block 360 B.
  • the design for the data block 360 B still uses the position of the data graphical micro-unit B relative to the virtual center P of the data block 360 B for indicating the bit value represented by the block 360 B.
  • the valid number of bits in the bit value is increased by one bit as compared to the bit value in the embodiment of FIG. 2B .
  • the amount of the indicator data carried by the graphical indicator 30 may be effectively increased without increasing the density of the data blocks 360 B in the graphical indicator 30 .
  • FIG. 6A is a diagram illustrating a graphical indicator 40 according to another embodiment of the invention.
  • FIG. 6B is a diagram illustrating a data block according to another embodiment of the invention.
  • each of data blocks 460 B and 460 B′ of graphical indicator 40 is divided into a first virtual area 462 A, a second virtual area 462 B, a third virtual area 462 C and a fourth virtual area 462 D.
  • the data block 460 B′ corresponds to a bit value or several bit values based on the position of the data graphical micro-unit B within the virtual area ( 462 A to 462 D) where the data graphical micro-unit B is located.
  • the position of the data graphical micro-unit B within the first virtual area 462 A can still enable the data block 460 B′ to represent bit data 000 or 001.
  • the data graphical micro-units B in the data block 460 B′ may be disposed on a position closer to the edge of the data block 460 B′.
  • the data blocks 460 B and the data blocks 460 B′ may be disposed in an alternating manner.
  • FIG. 6C is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • graphical indicator 40 ′ comprises the data blocks 460 B and the 460 B′ on each row of data blocks disposed in an alternating manner It will be noted that the graphical indicator 40 ′ and the graphical indicator 40 use differing positioning methods for the header graphical micro-units.
  • FIG. 7 is a diagram illustrating a graphical indicator according to another embodiment of the invention.
  • Other detailed settings regarding the graphical indicator 70 may refer to related descriptions for aforesaid graphical indicators 20 , 20 A to 20 B, 30 , 40 , 40 ′, which are not repeated hereinafter.
  • a graphical indicator is a graphical indicator matrix, which comprises header graphical micro-units and data graphical micro-units.
  • the graphical indicator may provide a better recognition rate during the image recognition process.

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  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression Of Band Width Or Redundancy In Fax (AREA)
  • Editing Of Facsimile Originals (AREA)
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US11283962B2 (en) 2022-03-22
JP5899291B2 (ja) 2016-04-06
EP2953059A1 (de) 2015-12-09
US20180183972A1 (en) 2018-06-28
US10686962B2 (en) 2020-06-16
CN104156924B (zh) 2017-05-17
US20200314284A1 (en) 2020-10-01
TW201546723A (zh) 2015-12-16
KR20150140239A (ko) 2015-12-15
EP2953059B1 (de) 2017-12-27
EP3937082B1 (de) 2024-01-10
EP3312772B1 (de) 2021-10-27
EP3312772A1 (de) 2018-04-25
KR20170012885A (ko) 2017-02-03
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CN107092947B (zh) 2020-07-17
CN104156924A (zh) 2014-11-19

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