US20150187703A1 - Box-in-box overlay mark - Google Patents
Box-in-box overlay mark Download PDFInfo
- Publication number
- US20150187703A1 US20150187703A1 US14/142,925 US201314142925A US2015187703A1 US 20150187703 A1 US20150187703 A1 US 20150187703A1 US 201314142925 A US201314142925 A US 201314142925A US 2015187703 A1 US2015187703 A1 US 2015187703A1
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- United States
- Prior art keywords
- box
- patterns
- box region
- region
- linear
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- each of the trenches 222 x and 222 y in the inner box region 22 i has a width Wi within the range of 100 to 1000 nm
- each of the trenches 212 x and 212 y in the outer box region 22 o has a width Wo within the range of 100 to 1000 nm.
- the x- and y-directional linear photoresist patterns in the above embodiment are trenches ( 222 x and 222 y ) defined in the photoresist layer ( 220 ) defining the current layer, they may alternatively be broad solid line patterns formed from the photoresist layer defining the current layer, with a proviso that the photoresist layer covers the outer box patterns.
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Measurement Of Radiation (AREA)
Abstract
Description
- 1. Field of the Invention
- The invention relates to an integrated circuit process, and particularly relates to a box-in-box (BiB) overlay mark used for overlay measurement in IC processes.
- 2. Description of Related Art
- There are many different designs for the overlay marks for overlay measurement. A representative design is the box-in-box design, which typically includes an inner box including x- and y-directional linear patterns of the photoresist layer for defining the current layer, and an outer box including x- and y-directional linear patterns of the previous layer. The previous layer may have been defined to form trenches/openings therein or defined into line/block patterns. The photoresist layer may have been defined to form trench/opening patterns therein or defined into line/block patterns.
- After the linear patterns are transferred to the substrate, followed by a metal process, defectivity concern may be raised. Hence, a design rule has been established to limit the size of largest trench that can be allowed prior to some metal process.
- However, for certain processes, the design rule may become an issue. One example is how to register a chop mask to a pitch reduction layer for a DRAM word-line process. The outer box is defined by oxide spacer, but not transferred to the substrate yet. The chop layer can have photoresist on the outer box, so the outer box will never be transferred into the substrate and there is no concern for the outer box. The problem comes from the current layer (chop layer, photoresist), in which trenches have to be formed as the inner box for the overlay measurement. Limited by the lithography tool and metrology tool resolution limit, the dimension of the trenches may have to exceed the limit defined by the design rule. A solution is to add dense parallel narrow trenches in the previous layer under the inner-box photoresist patterns.
- An example of such a BiB overlay mark is illustrated in
FIGS. 1A to 1C , whereinFIG. 1B andFIG. 1C illustrate cross-sectional views along the line B-B′ and along the line C-C′ inFIG. 1A , respectively. - The
overlay mark 10 includes dense parallel narrow line/trench patterns 110 in the previous layer that include alternately arrangedline patterns 110 a andtrench patterns 110 b orientated in the x- or y-direction in the entire region (inner and outer box regions), x-directional and y-directionalbroad trenches 112 constituting the outer box in the previous layer, and x-directional and y-directionalbroad trenches 122 constituting the inner box that are defined in thephotoresist layer 120 defining the current layer. - However, in such a design, the two sidewalls of each inner-
box trench 122 parallel with the line/trench patterns 110 a/110 b will possibly see different optical impacts from theline patterns 110 a due to imperfect alignment, and/or snap to thenearest line patterns 110 a, so that the position determination accuracy thereof is adversely affected and the overlay measurement accuracy is lowered. - Accordingly, this invention provides a box-in-box (BiB) overlay mark that has a modified dense line/trench arrangement to simultaneously address the aforementioned design rule issue and improve the overlay measurement accuracy.
- The BiB overlay mark of the invention includes an inner box region and an outer box region surrounding the same, dense narrow trenches in the previous layer in the inner box region and the outer box region, a plurality of x- and y-directional linear photoresist patterns defining a rectangle over the narrow trenches in the inner box region, and a plurality of x- and y-directional linear patterns defining another rectangle in the outer box region. At least the dense narrow trenches in the inner box region are orientated in a direction different from the x-direction and the y-direction. The linear photoresist patterns are defined in or from a photoresist layer defining a current layer, each of which is wider than each narrow trench. The linear patterns are defined in or from the previously layer, each of which is wider than each narrow trench.
- In an embodiment, the direction in which the narrow trenches in the inner box region are orientated deviates from the x- or y-direction by an angle of 20° at least. The narrow trenches in the inner box region may be orientated in a direction of about 45° relative to the x-direction or the y-direction.
- Since the dense narrow line/trench patterns of the previous layer are orientated in a direction different from the x-direction and the y-direction in the inner box region, each x- or y-directional photoresist pattern is not parallel to the dense narrow line/trench patterns in the inner box region. Therefore, the position determination of the linear photoresist patterns as the inner box is not adversely affected by the dense narrow line patterns in the inner box region, so the overlay measurement accuracy can be improved.
- In order to make the aforementioned and other objects, features and advantages of this invention comprehensible, a preferred embodiment accompanied with figures is described in detail below.
-
FIG. 1A illustrates the top view of a conventional BiB overlay mark. -
FIG. 1B andFIG. 1C illustrate cross-sectional views of the conventional BiB overlay mark inFIG. 1A along the line B-B′ and along the line C-C′, respectively. -
FIG. 2A illustrates a BiB overlay mark according to an embodiment of the invention. -
FIG. 2B andFIG. 2C illustrate cross-sectional views of the BiB overlay mark inFIG. 2A along the line B-B′ and along the line C-C′, respectively. - This invention will be further explained with an embodiment, which is however not intended to restrict the scope of this invention. For example, though there is only one linear photoresist pattern at each edge of the inner box of the BiB overlay mark in the embodiment, there may alternatively be two or more linear photoresist patterns at each edge of the inner box if required.
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FIG. 2A illustrates a BiB overlay mark according to an embodiment of the invention.FIG. 2B andFIG. 2C illustrate cross-sectional views of the BiB overlay mark inFIG. 2A along the line B-B′ and along the line C-C′, respectively. - Referring to
FIGS. 2A-2C , theBiB overlay mark 20 includes aninner box region 22 i and an outer box region 22 o surrounding theinner box region 22 i, dense narrow line/trench patterns 210 of the previous layer in theinner box region 22 i and the outer box region 22 o, two x-directionaltrenches 222 x and two y-directional trenches 222 y defining a rectangle over the dense narrow line/trench patterns 210 i in theinner box region 22 i, and two x-directionaltrenches 212 x and two y-directional trenches 212 y defining another rectangle in the outer box region 22 o. At least the dense narrow line/trench patterns 210 i in theinner box region 22 i are orientated in a direction different from the x-direction and the y-direction. The angle between the orientation direction of 210 i and the x-direction is referred to as “θ” in the figure. Thetrenches photoresist layer 220 defining the current layer, each of which is wider than each of the dense narrow line/trench patterns 210 i. Thetrenches 212 x and 212 y are defined in the previously layer, each of which is wider than each of the dense narrow line/trench patterns 210 o. - The dense narrow line/
trench patterns 210 i in theinner box region 22 i includenarrow line patterns 210 a andnarrow trench patterns 210 b that are arranged alternately. The dense narrow line/trench patterns 210 o in the outer box region 22 o includenarrow line patterns 210 c andnarrow trench patterns 210 d that are arranged alternately. The dimension of the dense narrow line/trench patterns 210 i in theinner box region 22 i is only limited by the previous layer process, and it does not have to match the dimension of 210 o. Especially with the orientation difference, most likely the x- or y-directional dimension of 210 i is different from that of 210 o. - In a preferred embodiment, the orientation direction of the dense narrow line/
trench patterns 210 i in theinner box region 22 i deviates from the x- or y-direction by an angle of 20° at least. The orientation direction may be about 45° (θ=45°) relative to the x- or y-direction, as shown inFIG. 2A . - The dense narrow line/trench patterns 210 o in the outer box region 22 o may be orientated in any direction, but usually in the x- or y-direction to match the real features in the device areas.
- In an exemplary embodiment, each of the dense narrow line/
trench patterns 210 a/210 b and 210 c/210 d has a width within the range of 30 to 100 nm. Accordingly, the densenarrow line patterns narrow trenches trenches inner box region 22 i has a width Wi within the range of 100 to 1000 nm, and each of thetrenches 212 x and 212 y in the outer box region 22 o has a width Wo within the range of 100 to 1000 nm. - In addition, though the x- and y-directional linear photoresist patterns in the above embodiment are trenches (222 x and 222 y) defined in the photoresist layer (220) defining the current layer, they may alternatively be broad solid line patterns formed from the photoresist layer defining the current layer, with a proviso that the photoresist layer covers the outer box patterns.
- On the other hand, though the x- and y-directional linear patterns in the outer box region 22 o in the above embodiment are trench patterns formed in the previous layer, they may alternatively include solid line patterns defined from the previous layer.
- Since the dense narrow line/trench patterns of the previous layer are orientated in a direction different from the x-direction and y-direction in the inner box region, each x- or y-directional photoresist bar is not parallel with the narrow line/trench patterns in the inner box region. Therefore, the position determination of the photoresist bars as the inner box is not adversely affected by the dense narrow line patterns in the inner box region, so the overlay measurement accuracy can be improved.
- This invention has been disclosed above in the preferred embodiments, but is not limited to those. It is known to persons skilled in the art that some modifications and innovations may be made without departing from the spirit and scope of this invention. Hence, the scope of this invention should be defined by the following claims.
Claims (9)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/142,925 US9054113B1 (en) | 2013-12-30 | 2013-12-30 | Box-in-box overlay mark |
TW103103605A TWI531856B (en) | 2013-12-30 | 2014-01-29 | Box-in-box overlay mark |
CN201410087496.0A CN104752410B (en) | 2013-12-30 | 2014-03-11 | Frame center overlapping mark |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/142,925 US9054113B1 (en) | 2013-12-30 | 2013-12-30 | Box-in-box overlay mark |
Publications (2)
Publication Number | Publication Date |
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US9054113B1 US9054113B1 (en) | 2015-06-09 |
US20150187703A1 true US20150187703A1 (en) | 2015-07-02 |
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Application Number | Title | Priority Date | Filing Date |
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US14/142,925 Active 2034-01-16 US9054113B1 (en) | 2013-12-30 | 2013-12-30 | Box-in-box overlay mark |
Country Status (3)
Country | Link |
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US (1) | US9054113B1 (en) |
CN (1) | CN104752410B (en) |
TW (1) | TWI531856B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20170115579A1 (en) * | 2015-10-22 | 2017-04-27 | United Microelectronics Corp. | Overlay mask |
US9773739B2 (en) * | 2016-02-03 | 2017-09-26 | Semiconductor Manufacturing International (Shanghai) Corporation | Mark structure and fabrication method thereof |
US10236258B2 (en) * | 2015-12-23 | 2019-03-19 | Infineon Technologies Austria Ag | Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110707044B (en) * | 2018-09-27 | 2022-03-29 | 联华电子股份有限公司 | Method for forming semiconductor device layout |
US11411006B1 (en) * | 2021-04-16 | 2022-08-09 | Nanya Technology Corporation | Manufacturing method of memory structure |
Citations (6)
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US20070246843A1 (en) * | 2006-04-25 | 2007-10-25 | Macronix International Co., Ltd. | Pattern registration mark designs for use in photolithography and methods of using the same |
US20080122124A1 (en) * | 2006-09-21 | 2008-05-29 | Macronix International Co., Ltd. | Overlay mark, method for forming the same and application thereof |
US20080252867A1 (en) * | 2007-04-16 | 2008-10-16 | Macronix International Co., Ltd. | Overlay mark, and fabrication and application of the same |
US7952213B2 (en) * | 2006-03-29 | 2011-05-31 | Macronix International Co., Ltd. | Overlay mark arrangement for reducing overlay shift |
US20120038021A1 (en) * | 2010-08-11 | 2012-02-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Overlay mark enhancement feature |
US20130182255A1 (en) * | 2012-01-13 | 2013-07-18 | Nanya Technology Corporation | Overlay mark and application thereof |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7190823B2 (en) * | 2002-03-17 | 2007-03-13 | United Microelectronics Corp. | Overlay vernier pattern for measuring multi-layer overlay alignment accuracy and method for measuring the same |
US7598155B1 (en) * | 2008-04-29 | 2009-10-06 | Winbond Electronics Corp. | Method of manufacturing an overlay mark |
US20100052191A1 (en) * | 2008-08-29 | 2010-03-04 | Qimonda Ag | Metrology Mark with Elements Arranged in a Matrix, Method of Manufacturing Same and Alignment Method |
US8664077B2 (en) * | 2012-02-14 | 2014-03-04 | Nanya Technology Corp. | Method for forming self-aligned overlay mark |
-
2013
- 2013-12-30 US US14/142,925 patent/US9054113B1/en active Active
-
2014
- 2014-01-29 TW TW103103605A patent/TWI531856B/en active
- 2014-03-11 CN CN201410087496.0A patent/CN104752410B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7952213B2 (en) * | 2006-03-29 | 2011-05-31 | Macronix International Co., Ltd. | Overlay mark arrangement for reducing overlay shift |
US20070246843A1 (en) * | 2006-04-25 | 2007-10-25 | Macronix International Co., Ltd. | Pattern registration mark designs for use in photolithography and methods of using the same |
US20080122124A1 (en) * | 2006-09-21 | 2008-05-29 | Macronix International Co., Ltd. | Overlay mark, method for forming the same and application thereof |
US20080252867A1 (en) * | 2007-04-16 | 2008-10-16 | Macronix International Co., Ltd. | Overlay mark, and fabrication and application of the same |
US20120038021A1 (en) * | 2010-08-11 | 2012-02-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Overlay mark enhancement feature |
US20130182255A1 (en) * | 2012-01-13 | 2013-07-18 | Nanya Technology Corporation | Overlay mark and application thereof |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20170115579A1 (en) * | 2015-10-22 | 2017-04-27 | United Microelectronics Corp. | Overlay mask |
US9746786B2 (en) * | 2015-10-22 | 2017-08-29 | United Microelectronics Corp. | Overlay mask |
US10236258B2 (en) * | 2015-12-23 | 2019-03-19 | Infineon Technologies Austria Ag | Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark |
US10600740B2 (en) | 2015-12-23 | 2020-03-24 | Infineon Technologies Austria Ag | Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark |
US10923432B2 (en) | 2015-12-23 | 2021-02-16 | Infineon Technologies Austria Ag | Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark |
US9773739B2 (en) * | 2016-02-03 | 2017-09-26 | Semiconductor Manufacturing International (Shanghai) Corporation | Mark structure and fabrication method thereof |
Also Published As
Publication number | Publication date |
---|---|
TWI531856B (en) | 2016-05-01 |
US9054113B1 (en) | 2015-06-09 |
TW201525609A (en) | 2015-07-01 |
CN104752410B (en) | 2017-10-27 |
CN104752410A (en) | 2015-07-01 |
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