KR20080006941A - Exposure mask of semiconductor device and method for forming semiconductor device - Google Patents

Exposure mask of semiconductor device and method for forming semiconductor device Download PDF

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Publication number
KR20080006941A
KR20080006941A KR1020060066313A KR20060066313A KR20080006941A KR 20080006941 A KR20080006941 A KR 20080006941A KR 1020060066313 A KR1020060066313 A KR 1020060066313A KR 20060066313 A KR20060066313 A KR 20060066313A KR 20080006941 A KR20080006941 A KR 20080006941A
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South Korea
Prior art keywords
pattern
exposure mask
semiconductor device
light transmitting
forming
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KR1020060066313A
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Korean (ko)
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황영선
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주식회사 하이닉스반도체
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Priority to KR1020060066313A priority Critical patent/KR20080006941A/en
Publication of KR20080006941A publication Critical patent/KR20080006941A/en

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/54—Absorbers, e.g. of opaque materials
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70216—Mask projection systems
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing

Abstract

An exposure mask of a semiconductor device and a method for forming the semiconductor device are provided to perform a process for forming the semiconductor device easily by preventing a lifting phenomenon in forming a DFT(Die Fit Target) on a semiconductor substrate with forming a light shielding pattern. An exposure mask of a semiconductor device includes a square-shaped light transmitting pattern(41), a cross-shaped light transmitting pattern, a light shielding pattern(43), and at least one line pattern(45). The square-shaped light transmitting pattern has a predetermined line width. The cross-shaped light transmitting pattern is installed on a center of the light transmitting pattern and spaced apart from the square-shaped light transmitting pattern at a predetermined distance. The light shielding pattern is installed between the square-shaped light transmitting pattern and the cross-shaped light transmitting pattern and outside the square-shaped light transmitting pattern. The at least one line pattern as a light shielding pattern is installed in a direction vertical to a long axis of the light transmitting pattern.

Description

반도체 소자의 노광마스크 및 반도체소자의 형성방법{EXPOSURE MASK OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SEMICONDUCTOR DEVICE}EXPOSURE MASK OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING SEMICONDUCTOR DEVICE

도 1a 내지 도 1c 는 종래기술에 따른 반도체 소자의 노광마스크를 도시한 평면도.1A to 1C are plan views illustrating an exposure mask of a semiconductor device according to the prior art.

도 2a 내지 도 2f는 상기 도 1a 및 도 1b 의 노광마스크를 이용한 DFT ( Die Fit Target ) 형성공정을 도시한 단면도.2A to 2F are cross-sectional views illustrating a process of forming a die fit target (DFT) using the exposure masks of FIGS. 1A and 1B.

도 3 은 종래기술에 따라 형성된 DFT ( Die Fit Target ) 의 평면 사진.3 is a plan view of a DFT (die fit target) formed according to the prior art.

도 4 는 본 발명에 따른 노광마스크의 DFT ( Die Fit Target ) 부분을 도시한 사진.4 is a photograph showing a DFT (Die Fit Target) portion of the exposure mask according to the present invention.

도 5a 내지 도 5c 는 본 발명에 따라 형성되는 노광마스크 상의 DFT ( Die Fit Target ) 를 도시한 평면도.5A-5C are plan views illustrating DFTs (Die Fit Targets) on an exposure mask formed in accordance with the present invention.

도 6 은 본 발명에 따라 반도체기판 상에 형성된 DFT 를 도시한 평면도.6 is a plan view showing a DFT formed on a semiconductor substrate according to the present invention;

본 발명은 반도체 소자의 노광마스크 및 반도체소자의 형성방법에 관한 것으로, 특히 DFT ( Die Fit Target ) 오픈 영역이 설계된 노광마스크로 잡파일 ( job file ) 의 생성을 용이하게 실시하고 그를 이용하여 반도체소자를 용이하게 형성할 수 있도록 하는 기술에 관한 것이다. BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exposure mask of a semiconductor device and a method of forming a semiconductor device. In particular, an exposure mask in which a DFT (die fit target) open area is designed can be easily generated and used to create a job file. It relates to a technique that can be easily formed.

반도체 리소그래피 공정에서 정렬 정도를 측정하기 위하여, 중첩 잡파일 ( overlay job file ) 작성시 DFT 를 생성하지 않은 마스크에서 DFT 없이 그로벌 정렬을 하는데 잡파일 생성을 어렵게 하고, CD SEM 에서 잡파일 작성시나 CD SEM 측정시 DFT 의 위치가 없으므로 나타나는 원점으로부터의 거리 변화와 정렬의 문제점을 발생시켜, 연구소 내의 TAT 를 늦춰 결국 제품 생산까지의 시간을 늦추게 만든다. In order to measure the degree of alignment in the semiconductor lithography process, when creating an overlay job file, it is difficult to generate a job file in the mask that does not generate the DFT, but without the DFT. In the SEM measurement, there is no position of the DFT, which causes problems such as distance change from the origin and alignment problems, which slows down the TAT in the lab and finally the time to production.

여기서, DFT 는 한 개의 필드와 한 개의 필드를 구별하기 위한 하나의 인디케이터 및 필드위에 있는 모든 패턴을 좌표로 나타내기 위한 좌표 상의 원점의 역할을 하며, 레티클 상의 레지스트레이션 마크와 함께 레티클이 잘 제작되었는지를 확인할 수 있는 마크이다. Here, the DFT serves as an indicator for distinguishing one field from one field, and an origin point in coordinates for representing all patterns on the field as coordinates, and whether the reticle is well manufactured with a registration mark on the reticle. This mark can be checked.

도 1a 내지 도 1c 는 종래기술에 따른 반도체소자의 노광마스크를 도시한 평면도이다. 1A to 1C are plan views illustrating an exposure mask of a semiconductor device according to the prior art.

도 1a 는 게이트 형성용 노광마스크의 DFT ( Die Fit Target ) 부분을 도시한 평면도로서, 5 ㎛ 의 선폭을 갖는 사각형 중앙부에 5 ㎛ 의 선폭을 갖는 십자형으로 차광패턴(11)이 형성된 것이다. 이때, 사각형과 십자형의 차광패턴(11) 사이는 투광패턴(13)으로 형성된다. FIG. 1A is a plan view illustrating a DFT (die fit target) portion of an exposure mask for forming a gate, in which a light shielding pattern 11 is formed in a cross shape having a line width of 5 μm at a central portion having a line width of 5 μm. At this time, between the square and the cross-shaped light shielding pattern 11 is formed as a light transmitting pattern (13).

도 1b 는 PSD ( P-type Source Drain ) 및 NSD ( N-type Source Drain ) 형성용 노광마스크의 DFT 부분을 도시한 평면도로서, 4 ㎛ 의 선폭을 갖는 사각형 중 앙부에 4 ㎛ 의 선폭을 갖는 십자형으로 투광패턴(17)이 형성된 것이다. 이때, 사각형과 십자형의 투광패턴(17) 사이 그리고 사각형의 투광패턴 외측은 차광패턴(15)이 형성된다. FIG. 1B is a plan view showing a DFT portion of an exposure mask for forming a P-type Source Drain (PSD) and an N-type Source Drain (NSD). As a result, the light transmission pattern 17 is formed. At this time, the light shielding pattern 15 is formed between the square and the cross-shaped light transmission pattern 17 and outside the rectangular light transmission pattern.

따라서, 도 1a 및 도 1b 의 노광마스크를 이용하여 피식각층을 식각하는 경우는 반도체기판 상에 도 1c 와 같은 형태로 DFT 가 형성된다. 이때, DFT 는 1 ㎛ 이하의 선폭 크기로 형성된다. Therefore, when the etching target layer is etched using the exposure masks of FIGS. 1A and 1B, a DFT is formed on the semiconductor substrate as in FIG. 1C. At this time, the DFT is formed with a line width of 1 μm or less.

도 2a 내지 도 2f 는 도 1a 및 도 1b 의 노광마스크를 이용하여 DFT 형성방법을 도시한 단면도로서, 도 1a 또는 도 1b 의 ⓐ-ⓐ, ⓑ-ⓑ 절단면을 따라 도시한 것이다. 여기서, 도 2c 내지 도 2f의 단면도는 도 1c 의 ⓒ-ⓒ 절단면을 따라 도시한 것이다. 2A to 2F are cross-sectional views illustrating a DFT forming method using the exposure masks of FIGS. 1A and 1B, and are shown along cut lines ⓐ-ⓐ and ⓑ-ⓑ of FIG. 1A or 1B. Here, cross-sectional views of FIGS. 2C to 2F are taken along the line ⓒ-ⓒ of FIG. 1C.

도 2a를 참조하면, 반도체기판(21) 상에 피식각층(23)을 형성하고 도 1a의 노광마스크(이하, "제1노광마스크"라 함)를 이용한 사진식각공정으로 피식각층(23) 패턴을 형성한다.Referring to FIG. 2A, the etching target layer 23 is formed by a photolithography process using the exposure mask (hereinafter, referred to as a “first exposure mask”) of FIG. 1A and forming the etching target layer 23 on the semiconductor substrate 21. To form.

도 2b를 참조하면, 상기 구조물 상부에 감광막(25)을 도포하고 도 1b 의 노광마스크(이하, "제2노광마스크"라 함)를 이용한 노광 및 현상 공정으로 감광막(25)패턴을 형성한다. Referring to FIG. 2B, the photosensitive film 25 is coated on the structure, and the photosensitive film 25 pattern is formed by an exposure and development process using the exposure mask of FIG. 1B (hereinafter, referred to as a “second exposure mask”).

도 2c를 참조하면, 감광막(25)패턴을 마스크로 하여 상기 피식각층(23)을 식각함으로써 피식각층(23)으로 형성된 DFT (27)를 형성한다.Referring to FIG. 2C, the etching target layer 23 is etched using the photosensitive film 25 pattern as a mask to form a DFT 27 formed of the etching target layer 23.

도 2d를 참조하면, 상기 구조물 상부에 감광막(29)을 도포하고 제2노광마스크를 이용한 노광 및 현상 공정으로 감광막(29)패턴을 형성한다. Referring to FIG. 2D, the photoresist layer 29 is coated on the structure, and the photoresist layer 29 pattern is formed by an exposure and development process using a second exposure mask.

도 2e를 참조하면, 감광막(29)패턴을 마스크로 하는 상기 식각공정으로 DFT (31)를 형성한다. Referring to FIG. 2E, a DFT 31 is formed by the etching process using the photoresist layer 29 as a mask.

여기서, DFT (31)은 제2노광마스크를 이용한 사진식각공정을 2회 실시한 것으로, DFT (27)과 선폭의 차이가 다소 발생할 수 있다.Here, the DFT 31 is a photolithography process using the second exposure mask twice, and a difference between the DFT 27 and the line width may occur.

도 2f를 참조하면, 후속 공정으로 실시하는 CMP 공정을 실시한다. Referring to FIG. 2F, a CMP process performed in a subsequent process is performed.

도 3 은 도 2f 의 CMP 공정후 발생되는 리프팅 현상을 도시한 평면 사진으로서, CMP 공정시 도 1c 의 십자가 중앙부에 위치하는 부분과, 사각형의 변 부분에서 리프팅 현상이 발생됨을 알 수 있다. FIG. 3 is a plan view showing a lifting phenomenon generated after the CMP process of FIG. 2F, and it can be seen that the lifting phenomenon occurs at a portion located at the center of the cross of FIG. 1C and a side of the quadrangle during the CMP process.

참고로, CMP 공정은 패터닝 밀도가 낮은 부분에서 디싱 ( dishing ) 현상이 유발되는 현상을 일반적인 현상으로서, 리프팅의 원인이 될 수 있다. For reference, the CMP process is a phenomenon in which a dishing phenomenon is caused at a low patterning density, which is a general phenomenon, and may cause lifting.

상기한 바와 같이 종래기술에 따른 반도체소자의 노광마스크 및 반도체소자의 형성방법은, DFT 형성공정후 실시되는 CMP 공정시 리프팅되는 현상이 발생되어 후속 공정을 어렵게 하는 문제점이 있다. As described above, the exposure mask of the semiconductor device and the method of forming the semiconductor device according to the related art have a problem in that a lifting phenomenon occurs during the CMP process performed after the DFT forming process, which makes the subsequent process difficult.

본 발명은 상기와 같은 문제점을 해결하기 위하여 창출된 것으로, 패턴 밀도가 낮은 부분에 패턴 밀도를 높여줄 수 있도록 디자인된 노광마스크를 제공하고 이를 이용하여 반도체소자의 형성할 수 있도록 하는 반도체소자의 노광마스크 및 반도체소자의 형성방법을 제공하는데 그 목적이 있다. SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides an exposure mask designed to increase the pattern density in a portion having a low pattern density and exposes the semiconductor device to form a semiconductor device using the same. It is an object of the present invention to provide a method of forming a mask and a semiconductor device.

상기한 목적을 달성하기 위한 본 발명의 반도체 소자의 노광마스크는, The exposure mask of the semiconductor device of the present invention for achieving the above object,

PSD 및 NSD 형성용 노광마스크의 DFT 에 있어서, In the DFT of the exposure mask for forming PSD and NSD,

소정 선폭을 갖는 사각형의 투광패턴과,A rectangular light transmission pattern having a predetermined line width,

상기 투광패턴의 중앙부에 구비되되, 상기 사각형의 투광패턴과 소정거리 이격된 십자형 투광패턴과,A cross-shaped light transmission pattern provided at a central portion of the light transmission pattern and spaced apart from the rectangular light transmission pattern by a predetermined distance;

상기 사각형의 투광패턴과 십자형 투광패턴 사이 그리고 상기 사각형 투광패턴의 외측에 구비되는 차광패턴과,A light shielding pattern provided between the rectangular light transmitting pattern and the cross type light transmitting pattern and outside the rectangular light transmitting pattern;

상기 투광패턴의 장축방향에 수직한 방향으로 적어도 하나 이상이 구비되는 차광패턴인 라인패턴을 포함하는 것과,It includes a line pattern which is a light shielding pattern is provided with at least one in a direction perpendicular to the long axis direction of the light transmission pattern,

상기 라인패턴은 상기 투광패턴의 단축방향으로 양끝단에 차광패턴과 접속된 것과,The line pattern is connected to the light shielding pattern at both ends in the minor direction of the light transmission pattern,

상기 라인패턴은 십자형 투광패턴의 돌출부에 형성되되, 상기 돌출부와 수직한 방향으로 형성된 것과,Wherein the line pattern is formed in the protrusion of the cross-shaped light transmission pattern, and formed in a direction perpendicular to the protrusion,

상기 라인패턴은 사각형 투광패턴의 변에 형성되되, 변과 수직하게 형성된 것을 특징으로 한다. The line pattern is formed on the side of the rectangular light-transmitting pattern, it characterized in that it is formed perpendicular to the side.

또한, 이상의 목적을 달성하기 위해 본 발명에 따른 반도체소자의 형성방법은, In addition, the method of forming a semiconductor device according to the present invention to achieve the above object,

반도체기판 상에 피식각층을 형성하는 단계와,Forming an etching target layer on the semiconductor substrate;

게이트 형성용 노광마스크를 이용한 사진식각공정으로 피식각층을 패터닝하는 공정과,Patterning the etching target layer by a photolithography process using an exposure mask for forming a gate;

'청구항 1'에 정의된 노광마스크를 이용하여 상기 피식각층을 식각하여 DFT 를 형성하는 것을 특징으로 한다.The etching target layer is etched using the exposure mask defined in claim 1 to form a DFT.

이하, 첨부한 도면을 참조하여 본 발명의 실시예에 대해 상세히 설명하고자 한다. Hereinafter, with reference to the accompanying drawings will be described in detail an embodiment of the present invention.

도 4 는 본 발명에 실시예에 따른 반도체소자의 노광마스크를 도시한 평면도이다. 4 is a plan view showing an exposure mask of a semiconductor device according to an embodiment of the present invention.

도 4 는 PSD ( P-type Source Drain ) 및 NSD ( N-type Source Drain ) 형성용 노광마스크(이하, "제3노광마스크"라 함)의 DFT 부분을 도시한 것으로서, 4 ㎛ 의 선폭을 갖는 사각형 중앙부에 4 ㎛ 의 선폭을 갖는 십자형으로 투광패턴(41)이 형성된 것이다. 이때, 사각형과 십자형의 투광패턴(41) 사이 그리고 사각형의 투광패턴(41) 외측은 차광패턴(43)이 형성된다. 4 illustrates a DFT portion of an exposure mask for forming P-type Source Drain (PSD) and N-type Source Drain (NSD) (hereinafter referred to as “third exposure mask”), and having a line width of 4 μm. A transmissive pattern 41 is formed in a cross shape having a line width of 4 μm at the center of the quadrangle. In this case, a light shielding pattern 43 is formed between the quadrangular and cross-shaped transmissive patterns 41 and outside the rectangular transmissive pattern 41.

그리고, 투광패턴(41)의 장축방향에 대하여 수직한 방향으로 소정 선폭을 갖는 적어도 하나 이상의 라인패턴(45)을 형성한다. At least one line pattern 45 having a predetermined line width is formed in a direction perpendicular to the long axis direction of the light transmitting pattern 41.

이때, 라인패턴(45)은 0.1 - 30 ㎛ 의 선폭으로 이웃하는 라인패턴(45)과 일정간격 이격시켜 형성한 것이다. At this time, the line pattern 45 is formed to be spaced apart from the adjacent line pattern 45 by a predetermined line width of 0.1-30 ㎛.

도 5a 내지 도 5f 는 본 발명의 실시예에 따른 반도체소자의 형성방법을 도시한 단면도로서, 제1노광마스크 및 도 3 노광마스크를 이용하여 형성한 것이다. 도 5b 내지 도 5f 는 제3노광마스크의 ⓧ-ⓧ 절단면을 따라 도시한 것이다. 그리고, 도 6 은 상기 도 5f의 공정으로 반도체기판 상에 형성되는 DFT 를 도시한 평면도이다. 5A through 5F are cross-sectional views illustrating a method of forming a semiconductor device in accordance with an embodiment of the present invention, and are formed by using a first exposure mask and a third exposure mask. 5B to 5F are views taken along the line VIII-VIII of the third exposure mask. 6 is a plan view illustrating a DFT formed on a semiconductor substrate by the process of FIG. 5F.

도 5a를 참조하면, 반도체기판(51) 상에 피식각층(53)을 형성하고 제1노광마 스크를 이용한 사진식각공정으로 피식각층(53) 패턴을 형성한다. Referring to FIG. 5A, the etching target layer 53 is formed on the semiconductor substrate 51, and the etching target layer 53 pattern is formed by a photolithography process using a first exposure mask.

도 5b를 참조하면, 상기 구조물 상부에 감광막(55)을 도포하고 도 4 의 노광마스크(이하, "제3노광마스크"라 함)를 이용한 노광 및 현상 공정으로 감광막(55)패턴을 형성한다. Referring to FIG. 5B, the photoresist film 55 is coated on the structure, and the photoresist 55 pattern is formed by an exposure and development process using an exposure mask of FIG. 4 (hereinafter referred to as a “third exposure mask”).

도 5c를 참조하면, 감광막(55)패턴을 마스크로 하여 피식각층(53)을 식각하여 피식각층(53)으로 형성된 DFT (57)를 형성한다.Referring to FIG. 5C, the etched layer 53 is etched using the photoresist 55 pattern as a mask to form a DFT 57 formed of the etched layer 53.

도 5d를 참조하면, 상기 구조물 상부에 감광막(59)을 도포하고 제3노광마스크를 이용한 노광 및 현상 공정으로 감광막(59)패턴을 형성한다. Referring to FIG. 5D, the photoresist layer 59 is coated on the structure, and the photoresist layer 59 pattern is formed by an exposure and development process using a third exposure mask.

도 5e를 참조하면, 감광막(59)패턴을 마스크로 하는 식각공정으로 DFT (61)를 형성한다. Referring to FIG. 5E, the DFT 61 is formed by an etching process using the photoresist 59 pattern as a mask.

여기서, DFT (61)은 제3노광마스크를 이용한 사진식각공정을 2회 실시한 것으로, DFT (57)과 선폭의 차이가 다소 발생할 수 있습니다. Here, the DFT (61) has been subjected to the photolithography process twice using the third exposure mask, and there may be a slight difference in the line width from the DFT (57).

도 5f를 참조하면, 후속 공정으로 실시하는 CMP 공정을 실시한다. Referring to FIG. 5F, a CMP process performed in a subsequent process is performed.

도 6 은 상기 도 5e의 공정후 반도체기판 상에 형성된 DFT (61)를 도시한 평면도로서, 제3노광마스크의 라인패턴(45)이 반도체기판(51) 상에 전사되어 CMP 공정시 유발될 수 있는 리프팅을 방지할 수 있도록 형성된 것을 알 수 있다. FIG. 6 is a plan view illustrating the DFT 61 formed on the semiconductor substrate after the process of FIG. 5E. The line pattern 45 of the third exposure mask may be transferred onto the semiconductor substrate 51 to be induced during the CMP process. It can be seen that it is formed to prevent the lifting.

이상에서 살펴본 바와 같이, 본 발명에 따른 반도체 소자의 노광마스크 및 반도체소자의 형성방법은, 투광영역의 장축방향과 수직하는 방향으로 적어도 하나 이상의 라인패턴, 즉 차광패턴을 형성하여 반도체기판 상의 DFT 형성공정시 리프팅 현상을 방지할 수 있도록 하고 그에 따른 반도체소자의 형성공정을 용이하게 실시할 수 있도록 하는 효과를 제공한다. . As described above, in the method of forming an exposure mask and a semiconductor device of the semiconductor device according to the present invention, at least one line pattern, that is, a light shielding pattern, is formed in a direction perpendicular to the long axis direction of the light-transmitting region to form a DFT on the semiconductor substrate. It provides an effect to prevent the lifting phenomenon during the process and to facilitate the process of forming the semiconductor device accordingly. .

아울러 본 발명의 바람직한 실시예는 예시의 목적을 위한 것으로, 당업자라면 첨부된 특허청구범위의 기술적 사상과 범위를 통해 다양한 수정, 변경, 대체 및 부가가 가능할 것이며, 이러한 수정 변경 등은 이하의 특허청구범위에 속하는 것으로 보아야 할 것이다. In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (5)

PSD 및 NSD 형성용 노광마스크에 있어서, In the exposure mask for PSD and NSD formation, 소정 선폭을 갖는 사각형의 투광패턴과,A rectangular light transmission pattern having a predetermined line width, 상기 투광패턴의 중앙부에 구비되되, 상기 사각형의 투광패턴과 소정거리 이격된 십자형 투광패턴과,A cross-shaped light transmission pattern provided at a central portion of the light transmission pattern and spaced apart from the rectangular light transmission pattern by a predetermined distance; 상기 사각형의 투광패턴과 십자형 투광패턴 사이 그리고 상기 사각형 투광패턴의 외측에 구비되는 차광패턴과,A light shielding pattern provided between the rectangular light transmitting pattern and the cross type light transmitting pattern and outside the rectangular light transmitting pattern; 상기 투광패턴의 장축방향에 수직한 방향으로 적어도 하나 이상이 구비되는 차광패턴인 라인패턴을 포함하는 것을 특징으로 하는 반도체소자의 노광마스크.And a line pattern which is a light blocking pattern provided with at least one of the light transmission patterns in a direction perpendicular to the long axis direction of the light transmission pattern. 제 1 항에 있어서, The method of claim 1, 상기 라인패턴은 상기 투광패턴의 단축방향으로 양끝단에 차광패턴과 접속된 것을 특징으로 반도체소자의 노광마스크.And the line pattern is connected to light blocking patterns at both ends in a short direction of the light transmitting pattern. 제 1 항에 있어서, The method of claim 1, 상기 라인패턴은 십자형 투광패턴의 돌출부에 형성되되, 상기 돌출부와 수직한 방향으로 형성된 것을 특징으로 반도체소자의 노광마스크.The line pattern is formed on the projection of the cross-shaped light transmission pattern, the exposure mask of the semiconductor device, characterized in that formed in a direction perpendicular to the projection. 제 1 항에 있어서, The method of claim 1, 상기 라인패턴은 사각형 투광패턴의 변에 형성되되, 변과 수직하게 형성된 것을 특징으로 하는 반도체소자의 노광마스크.The line pattern is formed on the side of the rectangular light-transmission pattern, the exposure mask of the semiconductor device, characterized in that formed perpendicular to the side. 반도체기판 상에 피식각층을 형성하는 단계와,Forming an etching target layer on the semiconductor substrate; 게이트 형성용 노광마스크를 이용한 사진식각공정으로 피식각층을 패터닝하는 공정과,Patterning the etching target layer by a photolithography process using an exposure mask for forming a gate; '청구항 1'에 정의된 노광마스크를 이용하여 상기 피식각층을 식각하여 DFT 를 형성하는 것을 특징으로 하는 반도체소자의 형성방법.Forming a DFT by etching the etched layer using an exposure mask defined in claim 1;
KR1020060066313A 2006-07-14 2006-07-14 Exposure mask of semiconductor device and method for forming semiconductor device KR20080006941A (en)

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Publication number Priority date Publication date Assignee Title
KR20170049374A (en) * 2015-10-28 2017-05-10 삼성전자주식회사 Method of fabricating semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20170049374A (en) * 2015-10-28 2017-05-10 삼성전자주식회사 Method of fabricating semiconductor device

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