US20150016491A1 - Differentiator based spread spectrum modulator - Google Patents
Differentiator based spread spectrum modulator Download PDFInfo
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- US20150016491A1 US20150016491A1 US14/253,544 US201414253544A US2015016491A1 US 20150016491 A1 US20150016491 A1 US 20150016491A1 US 201414253544 A US201414253544 A US 201414253544A US 2015016491 A1 US2015016491 A1 US 2015016491A1
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- spread spectrum
- spectrum clock
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
- H04B1/7087—Carrier synchronisation aspects
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
- H04B1/7073—Synchronisation aspects
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
- H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
- H03L7/235—Nested phase locked loops
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/713—Spread spectrum techniques using frequency hopping
- H04B1/7156—Arrangements for sequence synchronisation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B15/00—Suppression or limitation of noise or interference
- H04B15/02—Reducing interference from electric apparatus by means located at or near the interfering apparatus
- H04B15/04—Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
Abstract
A spread spectrum clock generator which includes a pulse train generator circuit and a modulating circuit configured to produce a modulating signal relating to a time derivative of an output of the pulse train generator circuit. In one embodiment the modulating circuit includes a active differentiator circuit and in another embodiment the modulating circuit includes a passive differentiator circuit. A modulator is included which is configured to produce a spread spectrum clock output which is frequency modulated by the modulating signal.
Description
- 1. Field of the Invention
- The present invention relates generally to signal modulators and in particular to spread spectrum modulators for use in clock generators.
- 2. Description of Related Art
- Many electronic devices include some kind of stable clocking circuitry for producing clock signals which allow the devices to operate internally and to co-operate with other devices. The use of highly stable clocks frequently results in electromagnetic interference (EMI). As a result, regulatory agencies such as the Federal Communication Commission (FCC) have established regulations limiting EMI radiation. One approach is to provide shielding and the like, but this approach increases costs and weight. Another approach to reducing EMI emissions is to dynamically vary the clock frequency so as to spread the interference energy over a range of frequencies so as to limit the energy at any one frequency. The approach is known as spread spectrum frequency modulation.
- At this point, a brief review of some of the relevant terminology may be helpful. In a typical spread spectrum system, the average system clock frequency (frequency fc) is dithered to some degree, with the peak frequency deviation (Δf) being expressed as ±freq or ±%. The spreading rate (δ) is defined as the range of spreading frequency over the native system clock frequency (Δf/fc). The actual spreading rate δ style can be center-spreading where the frequency deviation Δf is centered around fc (δ=±Δf/2fc×100%); down-spreading where the frequency deviation Δf extends from fc to a lower frequency (δ=−Δf/fc×100%) and up-spreading where the frequency deviation Δf extends from fc to a higher frequency (δ=+Δf/fc×100%). The modulation rate (fm) is the frequency used to determine the system clock frequency spreading-cycling rate. Thus, 1/fm is the period or time during which the clock frequency varies through Δf and returns to the original native frequency. The modulation index (β) is equal to Δf/fm and, finally, the phrase modulation waveform refers to the profile of the clock frequency variation curve as a function of time, with a simple example of a modulation waveform being a saw tooth ramp. Referring to the drawings,
FIG. 1 shows the output frequency spectrum of a non-modulated clock centered at 2 MHz together with the spectrum of a modulated clock centered at near the same frequency but produced using spread spectrum frequency modulation. The modulation waveform is a linear waveform in this case. The center frequency fc for the modulated clock is 2 MHz and the modulation rate fm is 12 kHz. The peak frequency deviation Δf is ±100 kHz or ±5%. The modulation index β is Δf/fm=8.3, and the spreading rate δ is 5. In this example, the spreading style is up-spreading. - As can be seen form
FIG. 1 , the non-modulated clock produces a relatively high level output concentrated in a narrow frequency range whereas the energy of the modulated clock is spread over a relatively wide frequency band having a much lower peak output. The difference in magnitudes in this case is 11 dB which represents a very substantial reduction in EMI. In this case, the modulation waveform is a linear signal, so that during a given modulation period, the frequency is changed in a linear manner between a value equal to the center frequency plus a fixed percentage and a value equal to the center frequency minus a fixed percentage. In the ideal case, the amplitude of the spread spectrum signal is a somewhat trapezoidal shape having a relatively flat top region indicating that the spectral energy is evenly distributed. In an actual implementation, there will be peaks in the output at various frequencies which tend to reduce the effectiveness of the spread spectrum modulation in reducing EMI. -
FIG. 2 show a simplified block diagram of a prior art spread spectrum clock generator. The clock generator includesphase comparator circuit 10 which compares the phase of a reference clock input Fin and a generated clock Fd. The output of thephase comparator 10 is an Up signal and a down signal Dn, with the relative duration of the two signals relating to the phase difference between Fin and Fd. Signals Up and Dn drive acharge pump circuit 12 that sources an output current when signal Up is active and sinks an equal value output current when signal Dn is active. When signals Up and Dn are of equal duration over time, the average output current is zero thereby indicating that inputs Fin and Fd are in phase. A phase difference is indicated by a net current being sourced over time or a net current being sunk over time. The current output CPO of thecharge pump circuit 12 is fed to alow pass filter 14 that provides an output voltage Vc relating to the phase difference between Fin and Fd. Control voltage Vc is fed to aspread spectrum modulator 16 which varies the magnitude of Vc is accordance with a spread spectrum modulating profile Mod applied to an input to the modulator. - The output Vc′ of the
modulator 16 is applied to the control input of a voltage controlled oscillator (VCO) 18. The frequency of VCO is divided down by anoptional divider 20 so that the frequency of Fd matches that of Fin. The modulation waveform Mod applied to themodulator 16 causes Vc′ to vary so that the control signal Vc′ applied toVCO 18 causes Fout to be spread spectrum modulated. Although theFIG. 1 spectrum was produced using a linear modulating profile, other types of profiles can be used. By way of example,FIG. 3 shows the frequency spectrum of anun-modulated clock signal 22 and a spectrum modulatedclock signal 24 produced using a sinusoidal modulation waveform. Although there is improved performance on the order of 13 dB over the unmodulated clock, it can be seen that the improvement is limited by the presence ofspectrum peaks -
FIG. 4 is an alternative priorart modulation waveform 25 that provides substantially improved performance. It can be seen in this example that the modulating period (1/fm) is about 33 μs, which corresponds to a modulating rate of 30 kHz. In this example, the peak frequency deviation Δf is ±100 kHz, with the center spreading style being used. As described in U.S. Pat. No. 5,631,920, the contents of which are fully incorporated herein by reference,FIG. 5 illustrates a clock generator circuit which is capable of producing and utilizing theFIG. 4 profile using digital circuitry. Among other things, acounter 30 operates to provide a frequency divided output Fin of areference oscillator 28 to an up/downcounter 32.Counter 32 produces addresses used to access a read only memory (ROM) 34 where digital data are stored for producing theFIG. 4 profile. The read data is converted to analog signals byconverter 36, with the analog signal online 44 being provided to anadder circuit 38. A second input toadder circuit 38 online 46 is produced by phase locked loop circuitry associated with the input clock Fin. The sum of the two analog signals is used to control aVCO 40 which produces the spread spectrum modulated clock Fout. The center frequency of Fout is controlled by the phase locked loop output online 46, with the frequency deviation be provided by the signal online 44. -
ROM 34 of theFIG. 5 digitally based clock generator along with other circuitry allows the circuit to be programmed to provide substantial flexibility in producing and modifying theFIG. 4 modulation waveform. Although this results in enhanced performance, this performance is achieved at the expense of circuit complexity and power consumption. - There is a need for a spread spectrum clock generator that provides relatively high performance and yet can be implemented utilizing relatively simple analog circuitry while providing reduced power consumption.
-
FIG. 1 shows the frequency spectrum of an ordinary clock signal and of a spread spectrum modulated clock signal, with the modulated clock signal being produced by a prior art clock generation circuitry using a linear modulation waveform. -
FIG. 2 is a simplified block diagram of one exemplary prior art spread spectrum clock generator circuit. -
FIG. 3 is shows the frequency spectrum of an ordinary clock signal and a spread spectrum modulated clock signal using a prior art sinusoidal modulation waveform. -
FIG. 4 is another prior art modulation waveform used for producing spread spectrum clocks. -
FIG. 5 is a prior art spread spectrum clock generating circuit which is capable of producing the modulation waveform ofFIG. 4 . -
FIG. 6 is a spread spectrum clock generating circuit in accordance with one embodiment of the present invention which incorporates analog differentiating circuitry. -
FIG. 7A is modulating circuitry, using an active analog differentiator, for use theFIG. 6 embodiment of the present invention. -
FIG. 7B shows a modification of the modulating circuitry ofFIG. 7A . -
FIGS. 8A-8D are various waveforms produced by theFIG. 7A modulating circuitry, includingFIG. 8D which shows one exemplary modulation waveform. -
FIG. 9 is a simplified circuit diagram of a second embodiment of the present invention. -
FIGS. 10A-10C show examples of theFIG. 8D modulation waveform implementing three frequency spreading styles including up-spreading, center-spreading and down-spreading, respectively. - Referring again to the drawings,
FIG. 6 shows a spread spectrum clock generator in accordance with one embodiment of the present invention. An input or reference clock Fin is provided to one input of aphase detector circuit 50, with a frequency divided version Fd of the modulated clock output Fout being supplied to the other detector input.Divider 60, which can be adjusted to provide differing frequencies of Fout, can be eliminated. As in the case of theFIG. 2 clock generator, the output of thephase comparator 50 is an up signal Up and a down signal Dn, with the relative duration of the two signals relating to the phase difference between Fin and Fd. Signals Up and Dn drive acharge pump circuit 12 that sources an output current when signal Up is active and sinks an equal value output current when signal Dn is active. When signals Up and Dn are of equal duration over time, the average output current is zero thereby indicating that Fin and Fd are in phase. A phase difference is indicated by a net current being sourced over time or a net current being sunk over time. The current output CPO of thecharge pump circuit 12 is fed to alow pass filter 14 that provides an output voltage V1 relating to the phase difference between Fin and Fd. A principle component offilter 54 is a capacitor which is either charged by current sourced by thecharge pump circuit 52 or discharged by current sunk by the charge pump circuit. - A differentiator based modulating
circuit 48 provides a modulating output V2 which is combined by summingcircuit 56 with the output V1 of thelow pass filter 54 to produce a third output Vc. Vc constitutes a control signal that is applied to the control input of a voltage controlled oscillator (VCO) 58.VCO 58 provides an output having a frequency/phase determined by the magnitude of the control signal input. The output ofVCO 58 forms the output Fout of the clock generator and is also divided down bydivider 60 to provide the feedback input Fd to thephase detector 50. The relatively low frequency output V1 operates to set the center frequency ofVCO 58, with themodulator 48 output V2 being at a somewhat higher frequency which operates to modulate output V1 to produce control signal Vc. Thus, clock output Fout has a center frequency set by V1 and is frequency modulated by V2, with Fout being a spread spectrum modulated clock. - The details of one embodiment of the differentiating
modulator 48 ofFIG. 6 are shown inFIG. 7A . Apulse generator circuit 62 is included which produces a pulse train as depicted in theFIG. 8A timing diagram. Pulse shaping circuitry is provided which permits the rise and fall times of the pulses to be independently adjusted to produce the pulse train ofFIG. 8B . The pulse shaping circuitry includes afirst delay circuit 64 which is triggered by the risingedge 80A of the pulses in the pulse train. After a delay D1, acurrent source 68 is triggered to an ON state so as to charge acapacitor 72. The voltage acrosscapacitor 72 increases linearly, with the slope being determined by the magnitude of the current and the capacitance. Thus, the slope of the risingedge 82A of the shaped pulses can be set to various desired levels. The pulse shaping circuitry further includes asecond delay circuit 66 which is triggered by the fallingedge 80B of the pulses in the pulse train. After a delay D2 (which is set to zero in this example) a secondcurrent source 70 is activated which causescapacitor 72 to be discharged at a controlled rate depending upon the magnitudes of the current and capacitance. Thus, the slope of the fallingedge 82B of the shaped pulses can also be set to various desired levels. Alimiter circuit 74 is provided in the shaping circuitry for limiting the magnitude of the shaped pulses to a desired level as shown inFIG. 8C . - The shaped pulses of
FIG. 8C are provided to the input of anactive differentiator circuit 84. The differentiator circuit includes an operational amplifier A1 having a resistive feedback path connected between the output and the inverting input. The non-inverting input is connected to a voltage Vref. The resistive feedback path includes series connected resistors R1 and R2. A Ptype MOS transistor 76 is connected across resistor R1 so that resistor R1 can be reduced to a relatively small resistance whentransistor 76 is turned ON. An invertinggate driver circuit 78 operates to turntransistor 76 ON when the pulses (FIG. 8A ) out ofgenerator 62 are high. A capacitor C1 is connected between thelimiter circuit 74 and the inverting input of amplifier A1. As is well known, the amplifier A1 and associated circuitry form an op amp differentiator having the an output voltage vO(t) as follows: -
v O(t)=−R F C 1 [dv I(t)/dt] (1) - where
-
- vO(t) is the output,
- RF is the feedback resistance which changes in value depending upon the state of
transistor 76; - C1 is the input capacitance; and
- dvI(t)/dt is the time derivative of the input applied to capacitor C1.
- The output voltage vO(t) has a DC component set at Vref. The value −RFC1 is referred to as the differentiator gain or time constant.
- One exemplary output V2 of the differentiator circuit, the sum of vO(t)+Vref, is shown in
FIG. 8D . Output V2 can function, by way of example, as the modulation waveform V2 of theFIG. 6 spread spectrum clock generator. The exact shape of the V2 waveform can be adjusted by altering the characteristics of the pulse waveform 8C applied to the differentiator circuit and by altering the characteristics of the differentiator circuit itself. The wave shape characteristics of the pulse waveform can be varied by adjusting theFIG. 8A pulse train waveform, the magnitudes of delays D1/D2 and the rise/fall times set bycurrents 68/70 andcapacitance 72. The characteristics of the differentiator can be controlled by varying C1 and RF, with RF being determined by the sum of resistances R1 and R2 whentransistor 76 is OFF and only R2 whentransistor 76 is ON assuming that R2 is much larger than the ON resistance of the transistor. Thus, the differentiator gain of −RFC1 can be altered by controllingtransistor 76 in response to the state of the clock pulse train ofFIG. 8A so that the gain is one value when the pulse train is in a first state and another value when the pulse train is in the opposite state. - As can be seen, the
FIG. 7A circuitry for producing the modulation waveform ofFIG. 8D can provide four relatively independent degrees of freedom. In this manner the respective shapes of the fourwaveform sections - The input impedance of the
FIG. 7A differentiator looks like capacitor C1 connected to ground and thus can become small for high frequency signals, thereby resulting in large current flow through capacitor C1. It would be possible to modify the circuit by inserting a resistor R3 as shown inFIG. 7B betweenlimiter 74 and capacitor C1. The resultant transfer function is in the form of a differentiator multiplied by the transfer function of a low pass filter having a pole time constant at R3*C1. The resultant circuit acts as a differentiator for frequencies well below 1/(R3*C1) and also maintain the reasonably high input impedance for high frequency signals. - A second embodiment spread
spectrum clock generator 90 is depicted inFIG. 9 . This embodiment utilizes passive, rather than active, differentiation circuitry. The differentiation circuitry includes an input capacitor C2 connected to anode 94 which forms the junction between resistors RA and RB. As will be described,node 94 is connected to the control input In of a voltage controlledoscillator 96. Ignoring any loading of the differentiator circuit byVCO 96, it can be seen from an AC perspective that the current flow IC through capacitor C2 is equal to Vin/(Rp+Zc) where Vin is the input voltage pulses produced byclock generator 92, Rp is the parallel combination of RA and RB and Zc is the impedance of capacitor C2. Current IC is approximately equal to Vin/Zc if it is assumed that Rp is much smaller than Zc, that is, Rp is much smaller than 1/(ωC2) or ω1/(Rp*C2). With this assumption, substantially the entire input voltage Vin is dropped across capacitor C2 so that the current flow Ic through capacitor C2 is approximately C2(dVin/dt). Thus, the AC output voltage atnode 94, voltage Vo(t), can be expressed as follows: -
Vo(t)=I C *R P - or
-
Vo(t)≈C2(dVin/dt)*Rp (2) - assuming
- The DC voltage at
node 94, Vdc, is equal to Vref(RB)/(RB+RA) so that the composite voltage Vout based upon superposition is as follows: -
Vout≈Vdc+Vo(t) - or
-
Vout≈Vref(RB)/(RB+RA)+C2*R p(dVin/dt) (3) - As previously noted, signal Vout is applied to the control input In of a
VCO 96. In the present exemplary embodiment,VCO 96 is based upon a ring oscillator which includes an odd number of invertingstages 98A to 98B. The output ofstage 98B is connected back to the input ofstage 98A so as to provide a positive feedback path which results in oscillation. The frequency of oscillation is inversely related to the total propagation delay of each stage, with the delay being controlled by the way of the control input In. Low values of input In result in reduced current to each stage thereby increasing the propagation delay of the stages and hence producing a lower frequency of oscillation. Conversely, a higher value of input In results in a larger current to the stages thereby reducing the delay and increasing the frequency. Anoutput buffer stage 98C buffers the output of the ring oscillator to produce the output Fout. - The center frequency fc of oscillation of
VCO 96 is determined by the DC voltage component of equation (3), namely Vdc=Vref*RB/(RB+RA). The frequency deviation from the center frequency is determined by the AC component of equation (3), namely Vo(t)≈C2*Rp(dVin/dt). Thus, the output ofVCO 96, clock Fout comprises a spread spectrum modulated signal. The frequency modulating signal is Vo(t) can be modified by altering the characteristics of the passive differentiator circuit and the characteristics of the pulse train produced byclock generator 92 so as to provide a modulating signal similar to that depicted inFIG. 8D . -
FIGS. 10A , 10B and 10C show how exemplary modulation waveforms produced using the FIG. 7A/7B andFIG. 9 circuitry can be utilized in the various spectrum spreading styles.FIG. 10A shows the up-spreading approach where the frequency deviation Δf is between fc and (1+δ)fc,FIG. 10B shows center-spreading where Δf is between (1+δ)fc and (1−δ)fc andFIG. 10C shows down spreading where Δf is between fc and (1−δ)fc. - Thus, various embodiments of the present invention have been disclosed. Although these embodiments have been described in some detail, it is to be understood that various changes can be made by those skilled in the art without departing from the spirit and scope of the present invention as defined by the appended claims.
Claims (20)
1. A spread spectrum clock generator comprising:
a pulse train generator circuit;
a modulating circuit configured to produce a modulating signal relating to a time derivative of an output of the pulse train generator circuit; and
a modulator configured to produce a spread spectrum clock output which is frequency modulated by the modulating signal.
2. The spread spectrum clock generator of claim 1 wherein the modulating circuit includes an active differentiator circuit which includes an amplifier, a feedback resistance connected between an output of the amplifier and an inverting input of the amplifier and an input capacitance disposed intermediate the inverting input of the amplifier and the pulse generator circuit.
3. The spread spectrum clock generator of claim 2 further including feedback resistance control circuitry configured to control a magnitude of the feedback resistance in response to the pulse train generator circuit.
4. The spread spectrum clock generator of claim 3 wherein the feedback resistance includes at least two resistors and wherein the feedback resistance control circuitry includes a transistor switch connected across one of the at least two resistors.
5. The spread spectrum clock generator of claim 4 wherein the transistor is switchable between an ON and an OFF state in response to a level of the output of the pulse train generator circuit.
6. The spread spectrum clock generator of claim 1 wherein the modulator includes a voltage controlled oscillator.
7. The spread spectrum clock generator of claim 1 wherein the pulse train generator circuit includes control circuitry configured to control at least one of the rise and fall time durations of the output of the pulse train generator circuit.
8. The spread spectrum clock generator of claim 7 wherein the control circuitry is further configured to control both the rise and fall time durations of the output of the pulse train generator circuit.
9. The spread spectrum clock generator circuit of claim 8 wherein the control circuitry includes a first current source and a capacitor connected to be charged by the first current source and a second current source connected to discharge the capacitor.
10. The spread spectrum clock generator of claim 9 wherein the first current source operates to begin charging the capacitor in response to one of a rising and falling edge of a clock and wherein the second current source operates to begin discharging the capacitor in response to another one of the rising and falling edge of the clock.
11. The spread spectrum clock generator of claim 10 wherein the control circuitry includes delay circuitry for delaying a time at which the first current source operates to begin charging the capacitor and for delaying a time at which the second current source operates to begin discharging the capacitor.
12. A spread spectrum clock generator comprising:
a modulating circuit including an active differentiator circuit comprising an amplifier, a resistance connected between an inverting input of the amplifier and the amplifier output and an input capacitance connected between the inverting input of the amplifier and a source of sequential pulses; and
a voltage controlled oscillator having a control input responsive to an output of the amplifier, with the voltage controlled oscillator providing a spread spectrum clock output.
13. The spread spectrum clock generator of claim 12 further including a pulse train generator circuit configured to produce the sequential pulses, with the pulse train generator circuit including a limiter circuit that limits the magnitude of the sequential pulses.
14. The spread spectrum clock generator of claim 12 further including a pulse train generator circuit configured to produce the sequential pulses, with the pulse train generator circuit including rise and fall time control circuitry configure to control the rise and fall time durations of the sequential pulses.
15. The spread spectrum clock generator of claim 12 wherein the voltage control oscillator control input is further responsive to a primary frequency input which sets a primary frequency of the spread spectrum clock output, with the clock output being frequency modulated in response to the output of the amplifier.
16. The spread spectrum clock generator of claim 15 wherein a magnitude of the resistance is controllable with response to changes in a level of the sequential pulses.
17. A method of generating a spread spectrum clock comprising:
receiving a pulse train;
producing a modulating signal relating to a time differential of the pulse train; and
modulating a clock signal with the modulating signal to produce the spread spectrum clock.
18. The method of claim 17 wherein the producing the modulating signal includes providing an active differentiator circuit which includes an amplifier, a feedback resistance and an input capacitance.
19. The method of claim 18 further including providing the pulse train, with the pulses of the pulse train having controllable rise times and controllable fall times.
20. The method of claim 18 wherein the feedback resistance magnitude is controllable in response to levels of the pulse train.
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US10256826B2 (en) | 2015-09-24 | 2019-04-09 | Samsung Electronics Co., Ltd. | Non-linear spread spectrum profile generator using linear combination |
US10804907B2 (en) | 2015-09-24 | 2020-10-13 | Samsung Electronics Co., Ltd. | Non-linear spread spectrum profile generator using linear combination |
Also Published As
Publication number | Publication date |
---|---|
US9369174B2 (en) | 2016-06-14 |
US20130093478A1 (en) | 2013-04-18 |
US20160043769A1 (en) | 2016-02-11 |
US8736324B2 (en) | 2014-05-27 |
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