US20140361308A1 - Semiconductor device and method of manufacturing the same - Google Patents
Semiconductor device and method of manufacturing the same Download PDFInfo
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- US20140361308A1 US20140361308A1 US14/297,464 US201414297464A US2014361308A1 US 20140361308 A1 US20140361308 A1 US 20140361308A1 US 201414297464 A US201414297464 A US 201414297464A US 2014361308 A1 US2014361308 A1 US 2014361308A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 83
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 43
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract 3
- 239000000203 mixture Substances 0.000 claims description 37
- 230000003247 decreasing effect Effects 0.000 claims description 4
- 238000000034 method Methods 0.000 claims description 4
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 claims 1
- 239000007789 gas Substances 0.000 description 76
- 229910002601 GaN Inorganic materials 0.000 description 47
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 47
- 239000000758 substrate Substances 0.000 description 41
- 230000015572 biosynthetic process Effects 0.000 description 14
- 230000000052 comparative effect Effects 0.000 description 13
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 10
- 238000010586 diagram Methods 0.000 description 10
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 8
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 8
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 7
- 125000006850 spacer group Chemical group 0.000 description 7
- 229910052738 indium Inorganic materials 0.000 description 6
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 6
- 230000005533 two-dimensional electron gas Effects 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 239000012159 carrier gas Substances 0.000 description 4
- 230000006866 deterioration Effects 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- VOITXYVAKOUIBA-UHFFFAOYSA-N triethylaluminium Chemical compound CC[Al](CC)CC VOITXYVAKOUIBA-UHFFFAOYSA-N 0.000 description 4
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000006911 nucleation Effects 0.000 description 2
- 238000010899 nucleation Methods 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical group [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- QZQVBEXLDFYHSR-UHFFFAOYSA-N gallium(III) oxide Inorganic materials O=[Ga]O[Ga]=O QZQVBEXLDFYHSR-UHFFFAOYSA-N 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000002269 spontaneous effect Effects 0.000 description 1
- 230000008022 sublimation Effects 0.000 description 1
- 238000000859 sublimation Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
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Definitions
- the present invention relates to a semiconductor device and a method of manufacturing the same, and for example, to a semiconductor device having an InAlN layer and a method of manufacturing the same.
- a semiconductor device using a nitride semiconductor is used for, for example, power elements operating at a high frequency and high output.
- An HEMT High Electron Mobility Transistor
- a two-dimensional electron gas is formed within the electron traveling layer due to spontaneous polarization and piezoelectric polarization between the electron traveling layer and the electron supply layer.
- InAlN indium aluminum nitride
- AlGaN aluminum gallium nitride
- a self-polarization difference and conduction band energy discontinuity between the AlGaN electron supply layer and a GaN electron traveling layer increase with the increase in an Al composition of the AlGaN electron supply layer. Accordingly, a two-dimensional electron gas concentration may increase.
- the Al composition increases, lattice distortion of the AlGaN electron supply layer and the GaN (gallium nitride) electron traveling layer increases and cracks occur.
- the InAlN electron supply layer When the InAlN electron supply layer is grown at a high temperature, In is sublimated. Therefore, the InAlN electron supply layer is formed at a lower temperature than the GaN layer. Further, when the InAlN electron supply layer becomes the outermost surface of the semiconductor layers, a surface of InAlN is oxidized since InAlN contains Al. In order to suppress this, a GaN cap layer is formed on the InAlN electron supply layer.
- the GaN layer is grown, for example, in the substrate temperature of about 1000° C. Therefore, In is sublimated from the InAlN electron supply layer while the temperature of the substrate is increased for growth of the GaN layer. Thus, quality of a layer between the InAlN electron supply layer and the GaN cap layer deteriorates. Thus, quality of the InAlN layer deteriorates when the epitaxial layer is formed on the InAlN layer.
- the present invention has been made in view of the aforementioned problems, and an object of the present invention is to suppress deterioration of quality of an InAlN layer.
- a method of manufacturing a semiconductor device includes a step of forming a first layer of InAlN; a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer; and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
- a semiconductor device includes a first layer of InAlN having an upper face; a second layer of InAlGaN having an upper face and a lower face, the lower face of the second layer being in contact with the upper face of the first layer; and a third layer of GaN, InGaN or AlGaN having a lower face in contact with the upper face of the second layer.
- the present invention it is possible to suppress deterioration of the quality of the InAlN layer.
- FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment.
- FIG. 2A is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to an embodiment.
- FIG. 2B is a view continuing from FIG. 2A and is a cross-sectional view illustrating the method of manufacturing a semiconductor device according to the embodiment.
- FIG. 2C is a view continuing from FIG. 2B and is a cross-sectional view illustrating the method of manufacturing a semiconductor device according to the embodiment.
- FIG. 3 is a diagram illustrating a substrate temperature and introduction of source gases with respect to time in the method of manufacturing a semiconductor device according to the embodiment.
- FIG. 4 is a diagram illustrating a flow amount of the source gases with respect to time in the method of manufacturing a semiconductor device according to the embodiment.
- FIG. 5 is a diagram illustrating a substrate temperature and introduction of source gases with respect to time in a method of manufacturing a semiconductor device according to a comparative example.
- FIG. 6 is a cross-sectional view of a semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example.
- FIG. 7 is a schematic view illustrating a composition of each element with respect to a depth from a semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example.
- FIG. 8 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example.
- FIG. 9 is a schematic view illustrating a composition of each element with respect to a depth from the semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment.
- FIG. 10 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment.
- a method of manufacturing a semiconductor device includes a step of forming a first layer of InAlN; a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer; and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
- the growth temperature of the third layer may be equal to or greater than the growth temperature of the second layer.
- the third layer may be GaN and the growth temperature of the third layer may be greater than the growth temperature of the second layer.
- the growth temperature of the second layer may increase from a side of the first layer to a side of the third layer.
- a supply amount of a Ga source gas may be increased and a supply amount of an Al source gas may be decreased in accordance with the increase in growth temperature in the step of forming the second layer.
- a supply amount of an In source gas may be increased in accordance with the increase in growth temperature in the step of forming the second layer.
- an In composition ratio x of the first layer may be 12% or more and 36% or less in In x Al 1-x N.
- the second layer may have a composition to provide lattice matching to the first layer.
- the step of forming the second layer may be executed in a range of the growth temperature from 700° C. to 1050° C.
- the forming of the first, second and third layers may be executed by MOCVD method.
- a semiconductor device includes a first layer of InAlN having an upper face; a second layer of InAlGaN having an upper face and a lower face, the lower face of the second layer being in contact with the upper face of the first layer; and a third layer of GaN, InGaN or AlGaN having a lower face in contact with the upper face of the second layer.
- the first layer may have an In composition ratio x between 12% and 36% in In x Al 1-x N.
- the In composition ratio x of the first layer may be 18%.
- first, second and third layers may be lattice-matched to each other.
- the semiconductor device may further include a fourth layer of GaN located under the first layer.
- the semiconductor device may further include a fifth layer of AlN located between the fourth layer and the first layer.
- FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment.
- An electron supply layer 16 serving as an InAlN layer and a cap layer 20 serving as an epitaxial layer will be described as examples.
- An electron traveling layer 12 , a spacer layer 14 , the electron supply layer 16 , a buffer layer 18 and the cap layer 20 (the epitaxial layer) are sequentially formed on a substrate 10 .
- the buffer layer 18 is formed in contact with a surface of the electron supply layer 16
- the cap layer 20 is formed in contact with a surface of the buffer layer 18 , as illustrated in FIG. 1 .
- the substrate 10 is, for example, a SiC (silicon carbide) substrate, a Si (silicon) substrate, a sapphire substrate, a GaN substrate or a Ga 2 O 3 (gallium oxide) substrate.
- the electron traveling layer 12 is a nitride semiconductor layer and is, for example, a GaN layer.
- a buffer layer or a nucleation layer such as an AlN layer may be formed between the substrate 10 and the electron traveling layer 12 .
- the nucleation layer is, for example, an AlN (aluminum nitride) layer
- the buffer layer is, for example, a superlattice layer of an AlN layer and a GaN layer.
- the spacer layer 14 is, for example, an AlN layer.
- the spacer layer 14 may not be formed.
- the electron supply layer 16 is an InAlN layer, and lattice-matches to the GaN layer constituting the cap layer 20 in an a-axis direction.
- the buffer layer 18 is an InAlGaN (indium aluminum gallium nitride) layer, and lattice-matches to the GaN layer constituting the cap layer 20 in an a-axis direction.
- the cap layer 20 is the GaN layer.
- a gate electrode 24 is formed on the cap layer 20 .
- the gate electrode 24 for example, includes a Ni (nickel) film and a Au (gold) film from the substrate 10 side (i.e., is a stack including the Ni film and the Au film formed on the Ni film).
- a source electrode 22 and a drain electrode 26 are formed on the electron supply layer 16 with the gate electrode 24 interposed therebetween.
- Each of the source electrode 22 and the drain electrode 26 for example, includes a Ti (titanium) film and an Al (aluminum) film from the substrate 10 side (i.e., is a stack including the Ti film and the Al film formed on the Ti film). This Ti film may be a Ta (tantalum) film.
- the source electrode 22 and the drain electrode 26 may be buried to reach the electron supply layer 16 or may be formed on the cap layer 20 .
- FIGS. 2A to 2C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to an embodiment.
- FIG. 3 is a diagram illustrating a substrate temperature and introduction of source gases (an In-containing gas as an In source gas, an Al-containing gas as an Al source gas, a Ga-containing gas as a Ga source gas and a N-containing gas as a N source gas) with respect to time in the method of manufacturing a semiconductor device according to the embodiment.
- solid lines among the straight lines indicating the source gases indicate that the source gas is supplied, and dashed lines among the straight lines indicating the source gases indicate that the source gas is not supplied.
- MOCVD Metal Organic Chemical Vapor Deposition
- the substrate 10 has, for example, a (0001) main surface, and a stack direction of the nitride semiconductor layer is, for example, a direction.
- the substrate 10 which is a SIC substrate is introduced into a chamber in a hydrogen atmosphere of an MOCVD apparatus.
- a temperature of the substrate 10 is increased in a state in which NH 3 (ammonia) is supplied as a N-containing gas into the chamber, and In-, Al- and Ga-containing gases are not supplied.
- the Ga-containing gas and the N-containing gas are supplied into the chamber to form the electron traveling layer 12 composed of GaN on the substrate 10 .
- An example of formation conditions for the electron traveling layer 12 is as follows:
- Ga-containing gas TMG (trimethyl gallium) or TEG (triethyl gallium)
- Carrier gas hydrogen
- Substrate temperature a value ranging from 900° C. to 1100° C. (1050° C. in the example illustrated in FIG. 3 )
- the supply of the Ga-containing gas stops, and supply of the Al-containing gas starts. Accordingly, the formation of the electron traveling layer 12 stops, and the spacer layer 14 composed of AlN is formed on the electron traveling layer 12 .
- An example of formation conditions for the spacer layer 14 is as follows:
- Al-containing gas TMA (trimethyl aluminum) or TEA (triethyl aluminum)
- Carrier gas hydrogen
- Substrate temperature a value ranging from 900° C. to 1100° C. (1050° C. in the example illustrated in FIG. 3 )
- Film thickness 0.5 nm or more and 1 nm or less
- the supply of the Al-containing gas stops. Accordingly, the formation of the spacer layer 14 stops.
- the temperature of the substrate is decreased.
- the N-containing gas is supplied, and the In-containing gas, the Al-containing gas and the Ga-containing gas are not supplied. Thus, no semiconductor layer is formed.
- the In-containing gas and the Al-containing gas are supplied.
- the Ga-containing gas is not supplied. Accordingly, the electron supply layer 16 including InAlN is formed on the spacer layer 14 .
- the reason for decreasing the substrate temperature at the time of InAlN film formation is to suppress sublimation of In from an InAlN surface.
- An example of formation conditions of the electron supply layer 16 is as follows.
- TMI trimethyl indium
- Al-containing gas TMA or TEA
- Carrier gas nitrogen
- Substrate temperature a value ranging from 600° C. to 800° C. (700° C. in the example illustrated in FIG. 3 )
- Film thickness 5 nm or more and 20 nm or less
- the In-containing gas and the Al-containing gas are supplied, the Ga-containing gas is also supplied, and the temperature of the substrate 10 is increased. Accordingly, the buffer layer 18 composed of InAlGaN is formed on the electron supply layer 16 .
- An example of formation conditions for the buffer layer 18 is as follows:
- Al-containing gas TMA or TEA
- Ga-containing gas TMG or TEG
- Carrier gas nitrogen
- Substrate temperature increased from 700° C. to 1050° C. in the example illustrated in FIG. 3
- the buffer layer 18 may be grown in a step of increasing a growth temperature from a growth temperature of the electron supply layer 16 to a growth temperature of the cap layer 20 . In this case, no intentional temperature setting of the growth temperature need be performed.
- Film thickness 0.5 nm or more and 5 nm or less
- the increase in temperature of the substrate 10 ends, and then the supply of the In-containing gas and the Al-containing gas stops and the supply of the Ga-containing gas continues. Accordingly, the cap layer 20 composed of GaN is formed on the buffer layer 18 .
- An example of formation conditions for the cap layer 20 is as follows:
- Ga-containing gas TMG or TEG
- Substrate temperature a value ranging from 900° C. to 1100° C. (1050° C. in the example illustrated in FIG. 3 )
- Film thickness 0.5 nm or more and 5 nm or less
- FIG. 4 is a diagram illustrating a flow amount of the source gases with respect to time in the method of manufacturing a semiconductor device according to the embodiment. While the electron supply layer 16 is being formed, flow amounts of the In-containing gas and the Al-containing gas are constant. At time t 5 , when the temperature of the substrate is increased, the flow amount of the In-containing gas increases over time, the flow amount of the Al-containing gas decreases over time, and a flow amount of the Ga-containing gas increases from 0 over time. At time t 6 , the supply of the In-containing gas and the Al-containing gas stops, and the flow amount of the Ga-containing gas is constant.
- the source gases and their flow amounts during formation of the InAlN electron supply layer 16 are as follows:
- the source gases and their flow amounts when the temperature increase starts are as follows:
- the source gases and their flow amounts when the temperature increase ends are as follows:
- the source gases and their flow amounts during formation of the GaN cap layer 20 are as follows:
- the source gas of an n-type dopant is SiH 4 .
- FIG. 5 is a diagram illustrating a substrate temperature and introduction of source gases with respect to time in a method of manufacturing a semiconductor device according to a comparative example.
- none of an In-containing gas, an Al-containing gas and a Ga-containing gas is supplied between time t 5 at which formation of an electron supply layer 16 ends and time to at which formation of a cap layer 20 starts, as illustrated in FIG. 5 .
- Other matters are the same as those in the method of manufacturing a semiconductor device according to the embodiment illustrated in FIG. 3 and a description thereof is omitted.
- FIG. 6 is a cross-sectional view of a semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example.
- a piezoelectric charge generation layer 30 is formed between an electron supply layer 16 and a cap layer 20 , as illustrated in FIG. 6 .
- FIG. 7 is a schematic view illustrating a composition of each element with respect to a depth from a semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example.
- a temperature is increased without introducing source gases after the InAlN electron supply layer 16 is formed, as illustrated in FIG. 7 . Therefore, In is sublimated as a surface of the InAlN electron supply layer 16 is exposed to the high temperature. Accordingly, a piezoelectric charge generation layer 30 having a small composition of In is formed on the side of a surface of the InAlN electron supply layer 16 .
- the substrate temperature is increased, In in the InAlN is increasingly sublimated. Accordingly, a layer in which a composition ratio of Al is near 100% is formed near an interface with the GaN cap layer 20 within the piezoelectric charge generation layer 30 .
- FIG. 8 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example.
- the a-axis lattice constant of InN is greater and the a-axis lattice constant of AlN is smaller than that of GaN, as illustrated in FIG. 8 .
- an In composition ratio is approximately 18%
- InAlN which is a mixed crystal of InN and AlN has substantially the same a-axis lattice constant as GaN. Therefore, in In x Al 1-x N for the electron supply layer 16 , 0.12 ⁇ x ⁇ 0.36. Accordingly, it is difficult for cracks due to the lattice distortion in an a-axis direction of InAlN and GaN to occur.
- a dashed line arrow illustrated in FIG. 8 indicates a change in element composition in the piezoelectric charge generation layer 30 .
- formation of the InAlN electron supply layer 16 is performed at a low temperature from 600° C. to 800° C. Therefore, the composition of the electron supply layer 16 is substantially as has been set. This is shown in position A (InAlN with an In composition ratio of approximately 18%) of FIG. 8 .
- the temperature of the substrate is increased in a period between time t 5 and time t 6 of FIG. 5 . Accordingly, In is sublimated from the surface of the InAlN electron supply layer 16 .
- the surface of the InAlN electron supply layer 16 has a composition close to AlN at time t 6 . This is shown in position B of FIG. 8 .
- the GaN cap layer 20 is formed from time t 6 . This is shown in position C of FIG. 8 .
- piezoelectric charges are generated due to an a-axis lattice constant difference between the piezoelectric charge generation layer 30 and the GaN cap layer 20 . Further, a lattice defect is introduced into the piezoelectric charge generation layer 30 .
- a gate is formed on the GaN cap layer 20 formed in this way, it is difficult for a high frequency signal of the gate to be applied to a two-dimensional electron gas due to piezoelectric charges and the lattice defect. Thus, the performance of the semiconductor device deteriorates.
- FIG. 9 is a schematic view illustrating a composition of each element with respect to a depth from the semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment.
- the InAlGaN buffer layer 18 is formed in depths d 1 to d 2 between the InAlN electron supply layer 16 and the GaN cap layer 20 , as illustrated in FIG. 9 .
- Al and In compositions uniformly decrease, and a Ga composition uniformly increases from the InAlN electron supply layer 16 to the GaN cap layer 20 .
- the compositions of Al, In and Ga change linearly, but may change in a curve.
- FIG. 10 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment
- the InAlN electron supply layer 16 is shown in position A, as illustrated in FIG. 10 .
- the GaN cap layer 20 is shown in position C.
- the In and Al compositions uniformly decrease and the Ga composition uniformly increases from position A to position C. Accordingly, a composition of the InAlGaN buffer layer 18 changes so that the a-axis lattice constant hardly changes from position A to position C.
- the InAlGaN layer which is the buffer layer 18 is formed on the electron supply layer 16 composed of InAlN, and the GaN layer which is the cap layer 20 is formed on the InAlGaN layer, as illustrated in FIG. 1 .
- the InAlGaN buffer layer 18 is formed while the temperature of the substrate 10 is increased from the substrate temperature of the substrate 10 in the step of forming the electron supply layer 16 .
- the InAlGaN layer is formed while the growth temperature is increased from the growth temperature in the step of forming the InAlN layer.
- An epitaxial layer is formed on the InAlGaN layer at a growth temperature higher than the growth temperature in the step of forming the InAlN layer.
- the epitaxial layer is a layer whose composition does not include at least one of the elements constituting the InAlGaN layer. Accordingly, it is possible to suppress lattice distortion between the InAlN layer and the InAlGaN layer. Thus, it is possible to suppress deterioration of quality of the InAlN layer.
- the InAlGaN layer has a composition of In and Al increasing toward the electron supply layer 16 and a composition of Ga increasing toward the GaN layer. Further, for example, in the step of forming the InAlGaN layer, a supply amount of the Ga-containing gas increases and a supply amount of the Al-containing gas decreases with the increase in growth temperature, as illustrated in FIG. 4 , such that the lattice constant of the InAlGaN layer can be substantially the same as that of the GaN layer.
- the increase in supply amount of the In-containing gas in that case to be adjusted so that the lattice constant of the InAlGaN layer is lattice matched to the lattice constant of the GaN layer in an a-axis direction.
- the In composition ratio of the InAlN electron supply layer 16 it is preferable for the In composition ratio of the InAlN electron supply layer 16 to be 12% or more and 36% or less. Accordingly, it is possible to suppress cracks due to lattice distortion of the InAlN electron supply layer 16 and the GaN layer. It is more preferable for the In composition ratio of the InAlN electron supply layer 16 to be 15% or more and 20% or less. Further, it is preferable for the InAlGaN layer to have a composition to provide lattice matching to the electron supply layer 16 .
- the step of forming the InAlGaN buffer layer 18 is preferable for the step of forming the InAlGaN buffer layer 18 to be executed in a range of the growth temperature ranging from 700° C. to 1050° C.
- the growth temperatures in the step of forming the InAlGaN buffer layer 18 it is preferable for some of the growth temperatures in the step of forming the InAlGaN buffer layer 18 to be the same as those in the step of forming the cap layer 20 , as in a period between time t 5 and time t 6 illustrated in FIG. 3 .
- the growth temperature at a time point at which the growth of the buffer layer 18 ends it is preferable for the growth temperature at a time point at which the growth of the buffer layer 18 ends to be the same as that in the step of funning the cap layer 20 . Accordingly, it is possible to continuously form the cap layer 20 on the buffer layer 18 at a uniform growth temperature.
- the electron traveling layer 12 it is preferable for the electron traveling layer 12 to have a composition to provide lattice matching to the InAlN electron supply layer 16 .
- the composition of the electron supply layer 16 is In x Al 1-x N and the composition of the electron traveling layer 12 is B ⁇ Al ⁇ Ga ⁇ In 1- ⁇ - ⁇ - ⁇ N
- the electron traveling layer 12 and the electron supply layer 16 are lattice matched to each other by satisfying the following equation:
- the GaN cap layer 20 may be undoped GaN or may be n-type GaN.
- the n-type GaN cap layer 20 is preferable since its surface charges are stabilized. Further, it is possible to improve an activation rate of a dopant by forming the GaN cap layer 20 at a high temperature ranging from about 900° C. to about 1100° C. Accordingly, surface charges are more stabilized, the bandgap in the semiconductor layer is stabilized, and failure of the semiconductor device decreases.
- a composition of the epitaxial layer does not include at least one of the elements constituting the InAlGaN layer.
- the epitaxial layer includes Ga among In, Al and Ga and does not include at least one of In and Al.
- the InAlN layer and the epitaxial layer have substantially the same lattice constant, as in position A and position C in FIG. 10 .
- the buffer layer 18 is not formed, the piezoelectric charge generation layer is formed, as in the comparative example illustrated in FIG. 8 .
- it is preferable to form the InAlGaN buffer layer 18 as in the case of the above-described embodiment.
Abstract
Description
- 1. Field of the Invention
- The present invention relates to a semiconductor device and a method of manufacturing the same, and for example, to a semiconductor device having an InAlN layer and a method of manufacturing the same.
- 2. Related Background Art
- A semiconductor device using a nitride semiconductor is used for, for example, power elements operating at a high frequency and high output. An HEMT (High Electron Mobility Transistor) having an electron traveling layer and an electron supply layer is known as the semiconductor device using a nitride semiconductor. In the HEMT, a two-dimensional electron gas is formed within the electron traveling layer due to spontaneous polarization and piezoelectric polarization between the electron traveling layer and the electron supply layer. For example, use of InAlN (indium aluminum nitride) as the electron supply layer to increase a concentration of the two-dimensional electron gas is disclosed in JP 2012-256704A.
- When AlGaN (aluminum gallium nitride) is used as the electron supply layer, a self-polarization difference and conduction band energy discontinuity between the AlGaN electron supply layer and a GaN electron traveling layer increase with the increase in an Al composition of the AlGaN electron supply layer. Accordingly, a two-dimensional electron gas concentration may increase. However, if the Al composition increases, lattice distortion of the AlGaN electron supply layer and the GaN (gallium nitride) electron traveling layer increases and cracks occur.
- In the invention described in JP 2012-256704A, since InAlN is the electron supply layer, lattice distortion of the InAlN electron supply layer and the GaN electron traveling layer may be small and a self-polarization difference and conduction band energy discontinuity may increase. Thus, cracks or the like may not occur and a two-dimensional electron gas concentration may increase. The two-dimensional gas concentration of about 2×1013 cm−2 can be theoretically realized.
- When the InAlN electron supply layer is grown at a high temperature, In is sublimated. Therefore, the InAlN electron supply layer is formed at a lower temperature than the GaN layer. Further, when the InAlN electron supply layer becomes the outermost surface of the semiconductor layers, a surface of InAlN is oxidized since InAlN contains Al. In order to suppress this, a GaN cap layer is formed on the InAlN electron supply layer. The GaN layer is grown, for example, in the substrate temperature of about 1000° C. Therefore, In is sublimated from the InAlN electron supply layer while the temperature of the substrate is increased for growth of the GaN layer. Thus, quality of a layer between the InAlN electron supply layer and the GaN cap layer deteriorates. Thus, quality of the InAlN layer deteriorates when the epitaxial layer is formed on the InAlN layer.
- The present invention has been made in view of the aforementioned problems, and an object of the present invention is to suppress deterioration of quality of an InAlN layer.
- A method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a first layer of InAlN; a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer; and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
- A semiconductor device according to one aspect of the present invention includes a first layer of InAlN having an upper face; a second layer of InAlGaN having an upper face and a lower face, the lower face of the second layer being in contact with the upper face of the first layer; and a third layer of GaN, InGaN or AlGaN having a lower face in contact with the upper face of the second layer.
- According to the present invention, it is possible to suppress deterioration of the quality of the InAlN layer.
-
FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment. -
FIG. 2A is a cross-sectional view illustrating a method of manufacturing a semiconductor device according to an embodiment. -
FIG. 2B is a view continuing fromFIG. 2A and is a cross-sectional view illustrating the method of manufacturing a semiconductor device according to the embodiment. -
FIG. 2C is a view continuing fromFIG. 2B and is a cross-sectional view illustrating the method of manufacturing a semiconductor device according to the embodiment. -
FIG. 3 is a diagram illustrating a substrate temperature and introduction of source gases with respect to time in the method of manufacturing a semiconductor device according to the embodiment. -
FIG. 4 is a diagram illustrating a flow amount of the source gases with respect to time in the method of manufacturing a semiconductor device according to the embodiment. -
FIG. 5 is a diagram illustrating a substrate temperature and introduction of source gases with respect to time in a method of manufacturing a semiconductor device according to a comparative example. -
FIG. 6 is a cross-sectional view of a semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example. -
FIG. 7 is a schematic view illustrating a composition of each element with respect to a depth from a semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example. -
FIG. 8 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example. -
FIG. 9 is a schematic view illustrating a composition of each element with respect to a depth from the semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment. -
FIG. 10 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment. - (Description of an Embodiment of the Present Invention)
- First, content of an embodiment of the present invention will be listed and described. A method of manufacturing a semiconductor device according to one embodiment of the present invention includes a step of forming a first layer of InAlN; a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer; and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
- In the embodiment, the growth temperature of the third layer may be equal to or greater than the growth temperature of the second layer.
- Further, in the embodiment, the third layer may be GaN and the growth temperature of the third layer may be greater than the growth temperature of the second layer.
- Further, in the embodiment, the growth temperature of the second layer may increase from a side of the first layer to a side of the third layer.
- Further, in the embodiment, a supply amount of a Ga source gas may be increased and a supply amount of an Al source gas may be decreased in accordance with the increase in growth temperature in the step of forming the second layer.
- Further, in the embodiment, a supply amount of an In source gas may be increased in accordance with the increase in growth temperature in the step of forming the second layer.
- Further, in the embodiment, an In composition ratio x of the first layer may be 12% or more and 36% or less in InxAl1-xN.
- Further, in the embodiment, the second layer may have a composition to provide lattice matching to the first layer.
- Further, in the embodiment, the step of forming the second layer may be executed in a range of the growth temperature from 700° C. to 1050° C.
- Further, in the embodiment, the forming of the first, second and third layers may be executed by MOCVD method.
- A semiconductor device according to one embodiment of the present invention includes a first layer of InAlN having an upper face; a second layer of InAlGaN having an upper face and a lower face, the lower face of the second layer being in contact with the upper face of the first layer; and a third layer of GaN, InGaN or AlGaN having a lower face in contact with the upper face of the second layer.
- In the embodiment, the first layer may have an In composition ratio x between 12% and 36% in InxAl1-xN.
- Further, in the embodiment, the In composition ratio x of the first layer may be 18%.
- Further, in the embodiment, the first, second and third layers may be lattice-matched to each other.
- Further, in the embodiment, the semiconductor device may further include a fourth layer of GaN located under the first layer.
- Further, in the embodiment, the semiconductor device may further include a fifth layer of AlN located between the fourth layer and the first layer.
- (Details of an Embodiment of the Present Invention)
- Hereinafter, a method of manufacturing a semiconductor device and the semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
-
FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment. Anelectron supply layer 16 serving as an InAlN layer and acap layer 20 serving as an epitaxial layer will be described as examples. Anelectron traveling layer 12, aspacer layer 14, theelectron supply layer 16, abuffer layer 18 and the cap layer 20 (the epitaxial layer) are sequentially formed on asubstrate 10. For example, thebuffer layer 18 is formed in contact with a surface of theelectron supply layer 16, and thecap layer 20 is formed in contact with a surface of thebuffer layer 18, as illustrated inFIG. 1 . Thesubstrate 10 is, for example, a SiC (silicon carbide) substrate, a Si (silicon) substrate, a sapphire substrate, a GaN substrate or a Ga2O3 (gallium oxide) substrate. Theelectron traveling layer 12 is a nitride semiconductor layer and is, for example, a GaN layer. A buffer layer or a nucleation layer such as an AlN layer may be formed between thesubstrate 10 and theelectron traveling layer 12. When thesubstrate 10 is a SiC substrate, the nucleation layer is, for example, an AlN (aluminum nitride) layer, and when thesubstrate 10 is a Si substrate, the buffer layer is, for example, a superlattice layer of an AlN layer and a GaN layer. - The
spacer layer 14 is, for example, an AlN layer. Thespacer layer 14 may not be formed. Theelectron supply layer 16 is an InAlN layer, and lattice-matches to the GaN layer constituting thecap layer 20 in an a-axis direction. Thebuffer layer 18 is an InAlGaN (indium aluminum gallium nitride) layer, and lattice-matches to the GaN layer constituting thecap layer 20 in an a-axis direction. Thecap layer 20 is the GaN layer. Agate electrode 24 is formed on thecap layer 20. Thegate electrode 24, for example, includes a Ni (nickel) film and a Au (gold) film from thesubstrate 10 side (i.e., is a stack including the Ni film and the Au film formed on the Ni film). Asource electrode 22 and adrain electrode 26 are formed on theelectron supply layer 16 with thegate electrode 24 interposed therebetween. Each of thesource electrode 22 and thedrain electrode 26, for example, includes a Ti (titanium) film and an Al (aluminum) film from thesubstrate 10 side (i.e., is a stack including the Ti film and the Al film formed on the Ti film). This Ti film may be a Ta (tantalum) film. Thesource electrode 22 and thedrain electrode 26 may be buried to reach theelectron supply layer 16 or may be formed on thecap layer 20. -
FIGS. 2A to 2C are cross-sectional views illustrating a method of manufacturing a semiconductor device according to an embodiment.FIG. 3 is a diagram illustrating a substrate temperature and introduction of source gases (an In-containing gas as an In source gas, an Al-containing gas as an Al source gas, a Ga-containing gas as a Ga source gas and a N-containing gas as a N source gas) with respect to time in the method of manufacturing a semiconductor device according to the embodiment. InFIG. 3 , solid lines among the straight lines indicating the source gases indicate that the source gas is supplied, and dashed lines among the straight lines indicating the source gases indicate that the source gas is not supplied. For formation of each layer, an MOCVD (Metal Organic Chemical Vapor Deposition) method is used. Thesubstrate 10 has, for example, a (0001) main surface, and a stack direction of the nitride semiconductor layer is, for example, a direction. - First, a step performed in the method of manufacturing a semiconductor device according to the embodiment will be described with reference to
FIGS. 2A and 3 . Thesubstrate 10 which is a SIC substrate is introduced into a chamber in a hydrogen atmosphere of an MOCVD apparatus. A temperature of thesubstrate 10 is increased in a state in which NH3 (ammonia) is supplied as a N-containing gas into the chamber, and In-, Al- and Ga-containing gases are not supplied. At time t1 at which the temperature of thesubstrate 10 is stabilized, the Ga-containing gas and the N-containing gas are supplied into the chamber to form theelectron traveling layer 12 composed of GaN on thesubstrate 10. An example of formation conditions for theelectron traveling layer 12 is as follows: - Ga-containing gas: TMG (trimethyl gallium) or TEG (triethyl gallium)
- N-containing gas: NH3
- Carrier gas: hydrogen
- Substrate temperature: a value ranging from 900° C. to 1100° C. (1050° C. in the example illustrated in
FIG. 3 ) - Film thickness: about 1 μm
- At time t2, the supply of the Ga-containing gas stops, and supply of the Al-containing gas starts. Accordingly, the formation of the
electron traveling layer 12 stops, and thespacer layer 14 composed of AlN is formed on theelectron traveling layer 12. An example of formation conditions for thespacer layer 14 is as follows: - Al-containing gas: TMA (trimethyl aluminum) or TEA (triethyl aluminum)
- N-containing gas: NH3
- Carrier gas: hydrogen
- Substrate temperature: a value ranging from 900° C. to 1100° C. (1050° C. in the example illustrated in
FIG. 3 ) - Film thickness: 0.5 nm or more and 1 nm or less
- At time t3, the supply of the Al-containing gas stops. Accordingly, the formation of the
spacer layer 14 stops. The temperature of the substrate is decreased. In this step, the N-containing gas is supplied, and the In-containing gas, the Al-containing gas and the Ga-containing gas are not supplied. Thus, no semiconductor layer is formed. - At time t4 at which the temperature of the
substrate 10 is stabilized, the In-containing gas and the Al-containing gas are supplied. The Ga-containing gas is not supplied. Accordingly, theelectron supply layer 16 including InAlN is formed on thespacer layer 14. The reason for decreasing the substrate temperature at the time of InAlN film formation is to suppress sublimation of In from an InAlN surface. An example of formation conditions of theelectron supply layer 16 is as follows. - In-containing gas: TMI (trimethyl indium)
- Al-containing gas: TMA or TEA
- N-containing gas: NH3
- Carrier gas: nitrogen
- Substrate temperature: a value ranging from 600° C. to 800° C. (700° C. in the example illustrated in
FIG. 3 ) - Film thickness: 5 nm or more and 20 nm or less
- Next, a step performed in the method of manufacturing a semiconductor device according to the embodiment following the above step will be described with reference to
FIGS. 2B and 3 . At time t5, the In-containing gas and the Al-containing gas are supplied, the Ga-containing gas is also supplied, and the temperature of thesubstrate 10 is increased. Accordingly, thebuffer layer 18 composed of InAlGaN is formed on theelectron supply layer 16. An example of formation conditions for thebuffer layer 18 is as follows: - In-containing gas: TMI
- Al-containing gas: TMA or TEA
- Ga-containing gas: TMG or TEG
- N-containing gas: NH3
- Carrier gas: nitrogen
- Substrate temperature: increased from 700° C. to 1050° C. in the example illustrated in
FIG. 3 - Further, the
buffer layer 18 may be grown in a step of increasing a growth temperature from a growth temperature of theelectron supply layer 16 to a growth temperature of thecap layer 20. In this case, no intentional temperature setting of the growth temperature need be performed. - Film thickness: 0.5 nm or more and 5 nm or less
- Next, a step performed in the method of manufacturing a semiconductor device according to the embodiment following the above step will be described with reference to
FIGS. 2C and 3 . At time t6, the increase in temperature of thesubstrate 10 ends, and then the supply of the In-containing gas and the Al-containing gas stops and the supply of the Ga-containing gas continues. Accordingly, thecap layer 20 composed of GaN is formed on thebuffer layer 18. An example of formation conditions for thecap layer 20 is as follows: - Ga-containing gas: TMG or TEG
- N-containing gas: NH3
- Substrate temperature: a value ranging from 900° C. to 1100° C. (1050° C. in the example illustrated in
FIG. 3 ) - Film thickness: 0.5 nm or more and 5 nm or less
-
FIG. 4 is a diagram illustrating a flow amount of the source gases with respect to time in the method of manufacturing a semiconductor device according to the embodiment. While theelectron supply layer 16 is being formed, flow amounts of the In-containing gas and the Al-containing gas are constant. At time t5, when the temperature of the substrate is increased, the flow amount of the In-containing gas increases over time, the flow amount of the Al-containing gas decreases over time, and a flow amount of the Ga-containing gas increases from 0 over time. At time t6, the supply of the In-containing gas and the Al-containing gas stops, and the flow amount of the Ga-containing gas is constant. - For example, the source gases and their flow amounts during formation of the InAlN
electron supply layer 16 are as follows: - TMI: 35 μmol/minute
- TMA: 25 μmol/minute
- TMG: 0 μmol/minute
- The source gases and their flow amounts when the temperature increase starts (time t5) are as follows:
- TMI: 35 μmol/minute
- TMA: 25 μmol/minute
- TMG: 0 μmol/minute
- The source gases and their flow amounts when the temperature increase ends (time t6) are as follows:
- TN: 50 μmol/minute
- TMA: 2 μmol/minute
- TMG: 30 μmol/minute
- The source gases and their flow amounts during formation of the
GaN cap layer 20 are as follows: - TM: 0 μmol/minute
- TMA: 0 μmol/minute
- TMG: 30 μmol/minute
- Further, the source gas of an n-type dopant is SiH4.
- A comparative example and its problems will be described in order to describe the effects of the embodiment as described above.
FIG. 5 is a diagram illustrating a substrate temperature and introduction of source gases with respect to time in a method of manufacturing a semiconductor device according to a comparative example. In the method of manufacturing a semiconductor device according to the comparative example, none of an In-containing gas, an Al-containing gas and a Ga-containing gas is supplied between time t5 at which formation of anelectron supply layer 16 ends and time to at which formation of acap layer 20 starts, as illustrated inFIG. 5 . Other matters are the same as those in the method of manufacturing a semiconductor device according to the embodiment illustrated inFIG. 3 and a description thereof is omitted. -
FIG. 6 is a cross-sectional view of a semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example. In the semiconductor layer, a piezoelectriccharge generation layer 30 is formed between anelectron supply layer 16 and acap layer 20, as illustrated inFIG. 6 . -
FIG. 7 is a schematic view illustrating a composition of each element with respect to a depth from a semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example. In the method of manufacturing a semiconductor device according to the comparative example, a temperature is increased without introducing source gases after the InAlNelectron supply layer 16 is formed, as illustrated inFIG. 7 . Therefore, In is sublimated as a surface of the InAlNelectron supply layer 16 is exposed to the high temperature. Accordingly, a piezoelectriccharge generation layer 30 having a small composition of In is formed on the side of a surface of the InAlNelectron supply layer 16. When the substrate temperature is increased, In in the InAlN is increasingly sublimated. Accordingly, a layer in which a composition ratio of Al is near 100% is formed near an interface with theGaN cap layer 20 within the piezoelectriccharge generation layer 30. -
FIG. 8 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the comparative example. The a-axis lattice constant of InN is greater and the a-axis lattice constant of AlN is smaller than that of GaN, as illustrated inFIG. 8 . When an In composition ratio is approximately 18%, InAlN which is a mixed crystal of InN and AlN has substantially the same a-axis lattice constant as GaN. Therefore, in InxAl1-xN for theelectron supply layer 16, 0.12≦x≦0.36. Accordingly, it is difficult for cracks due to the lattice distortion in an a-axis direction of InAlN and GaN to occur. - A dashed line arrow illustrated in
FIG. 8 indicates a change in element composition in the piezoelectriccharge generation layer 30. Between time t4 and time t5 illustrated inFIG. 5 , formation of the InAlNelectron supply layer 16 is performed at a low temperature from 600° C. to 800° C. Therefore, the composition of theelectron supply layer 16 is substantially as has been set. This is shown in position A (InAlN with an In composition ratio of approximately 18%) ofFIG. 8 . The temperature of the substrate is increased in a period between time t5 and time t6 ofFIG. 5 . Accordingly, In is sublimated from the surface of the InAlNelectron supply layer 16. Accordingly, the surface of the InAlNelectron supply layer 16 has a composition close to AlN at time t6. This is shown in position B ofFIG. 8 . TheGaN cap layer 20 is formed from time t6. This is shown in position C ofFIG. 8 . - Thus, piezoelectric charges are generated due to an a-axis lattice constant difference between the piezoelectric
charge generation layer 30 and theGaN cap layer 20. Further, a lattice defect is introduced into the piezoelectriccharge generation layer 30. For example, when a gate is formed on theGaN cap layer 20 formed in this way, it is difficult for a high frequency signal of the gate to be applied to a two-dimensional electron gas due to piezoelectric charges and the lattice defect. Thus, the performance of the semiconductor device deteriorates. - Solutions to the problems of the comparative example in the embodiment as described above will be described.
FIG. 9 is a schematic view illustrating a composition of each element with respect to a depth from the semiconductor layer surface in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment. TheInAlGaN buffer layer 18 is formed in depths d1 to d2 between the InAlNelectron supply layer 16 and theGaN cap layer 20, as illustrated inFIG. 9 . Within theInAlGaN buffer layer 18, Al and In compositions uniformly decrease, and a Ga composition uniformly increases from the InAlNelectron supply layer 16 to theGaN cap layer 20. InFIG. 9 , within theInAlGaN buffer layer 18, the compositions of Al, In and Ga change linearly, but may change in a curve. -
FIG. 10 is a diagram illustrating a bandgap with respect to an a-axis lattice constant in the semiconductor layer manufactured using the method of manufacturing a semiconductor device according to the embodiment The InAlNelectron supply layer 16 is shown in position A, as illustrated inFIG. 10 . TheGaN cap layer 20 is shown in position C. In theInAlGaN buffer layer 18, the In and Al compositions uniformly decrease and the Ga composition uniformly increases from position A to position C. Accordingly, a composition of theInAlGaN buffer layer 18 changes so that the a-axis lattice constant hardly changes from position A to position C. Thus, there is substantially no lattice distortion and the piezoelectric charges and the lattice defects hardly occur between the InAlNelectron supply layer 16 and theGaN cap layer 20. For example, when the gate is formed on theGaN cap layer 20 formed in this way, a high frequency signal of the gate is easily applied to the two-dimensional electron gas, and performance deterioration of the semiconductor device can be suppressed. - In the above-described embodiment, the InAlGaN layer which is the
buffer layer 18 is formed on theelectron supply layer 16 composed of InAlN, and the GaN layer which is thecap layer 20 is formed on the InAlGaN layer, as illustrated inFIG. 1 . For example, theInAlGaN buffer layer 18 is formed while the temperature of thesubstrate 10 is increased from the substrate temperature of thesubstrate 10 in the step of forming theelectron supply layer 16. In other words, the InAlGaN layer is formed while the growth temperature is increased from the growth temperature in the step of forming the InAlN layer. An epitaxial layer is formed on the InAlGaN layer at a growth temperature higher than the growth temperature in the step of forming the InAlN layer. Here, the epitaxial layer is a layer whose composition does not include at least one of the elements constituting the InAlGaN layer. Accordingly, it is possible to suppress lattice distortion between the InAlN layer and the InAlGaN layer. Thus, it is possible to suppress deterioration of quality of the InAlN layer. - In the above-described embodiment, the InAlGaN layer has a composition of In and Al increasing toward the
electron supply layer 16 and a composition of Ga increasing toward the GaN layer. Further, for example, in the step of forming the InAlGaN layer, a supply amount of the Ga-containing gas increases and a supply amount of the Al-containing gas decreases with the increase in growth temperature, as illustrated inFIG. 4 , such that the lattice constant of the InAlGaN layer can be substantially the same as that of the GaN layer. - Further, since In is easily sublimated as the temperature increases, it is preferable to increase a supply amount of the In-containing gas with the increase in growth temperature in the step of forming the InAlGaN layer of the above-described embodiment, as illustrated in
FIG. 4 . However, it is preferable for the increase in supply amount of the In-containing gas in that case to be adjusted so that the lattice constant of the InAlGaN layer is lattice matched to the lattice constant of the GaN layer in an a-axis direction. - In the embodiment described above, it is preferable for the In composition ratio of the InAlN
electron supply layer 16 to be 12% or more and 36% or less. Accordingly, it is possible to suppress cracks due to lattice distortion of the InAlNelectron supply layer 16 and the GaN layer. It is more preferable for the In composition ratio of the InAlNelectron supply layer 16 to be 15% or more and 20% or less. Further, it is preferable for the InAlGaN layer to have a composition to provide lattice matching to theelectron supply layer 16. - In the above-described embodiment, it is preferable for the step of forming the
InAlGaN buffer layer 18 to be executed in a range of the growth temperature ranging from 700° C. to 1050° C. - In the above-described embodiment, it is preferable for some of the growth temperatures in the step of forming the
InAlGaN buffer layer 18 to be the same as those in the step of forming thecap layer 20, as in a period between time t5 and time t6 illustrated inFIG. 3 . For example, it is preferable for the growth temperature at a time point at which the growth of thebuffer layer 18 ends to be the same as that in the step of funning thecap layer 20. Accordingly, it is possible to continuously form thecap layer 20 on thebuffer layer 18 at a uniform growth temperature. - In the above-described embodiment, it is preferable for the
electron traveling layer 12 to have a composition to provide lattice matching to the InAlNelectron supply layer 16. For example, when the composition of theelectron supply layer 16 is InxAl1-xN and the composition of theelectron traveling layer 12 is BαAlβGaγIn1-α-γ-γN, theelectron traveling layer 12 and theelectron supply layer 16 are lattice matched to each other by satisfying the following equation: -
2.55α+3.11β+3.19γ+3.55(1-α-β-γ)=3.55x+3.11(1-x) - In the above-described embodiment, the
GaN cap layer 20 may be undoped GaN or may be n-type GaN. The n-typeGaN cap layer 20 is preferable since its surface charges are stabilized. Further, it is possible to improve an activation rate of a dopant by forming theGaN cap layer 20 at a high temperature ranging from about 900° C. to about 1100° C. Accordingly, surface charges are more stabilized, the bandgap in the semiconductor layer is stabilized, and failure of the semiconductor device decreases. - In the above-described embodiment, a composition of the epitaxial layer does not include at least one of the elements constituting the InAlGaN layer. For example, the epitaxial layer includes Ga among In, Al and Ga and does not include at least one of In and Al. For example, the InAlN layer and the epitaxial layer have substantially the same lattice constant, as in position A and position C in
FIG. 10 . In this case, if thebuffer layer 18 is not formed, the piezoelectric charge generation layer is formed, as in the comparative example illustrated inFIG. 8 . Thus, it is preferable to form theInAlGaN buffer layer 18, as in the case of the above-described embodiment. - While the embodiments of the present invention have been described above in detail, the present invention is not limited to such specific embodiments, and various variations and changes may be made without departing from the gist of the present invention defined in the claims.
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