US20140110805A1 - Silicon light trap devices, systems and methods - Google Patents

Silicon light trap devices, systems and methods Download PDF

Info

Publication number
US20140110805A1
US20140110805A1 US13/654,917 US201213654917A US2014110805A1 US 20140110805 A1 US20140110805 A1 US 20140110805A1 US 201213654917 A US201213654917 A US 201213654917A US 2014110805 A1 US2014110805 A1 US 2014110805A1
Authority
US
United States
Prior art keywords
light
light trap
exposed
silicon
silicon structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/654,917
Inventor
Thoralf Kautzsch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies Dresden GmbH and Co KG
Original Assignee
Infineon Technologies Dresden GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Dresden GmbH and Co KG filed Critical Infineon Technologies Dresden GmbH and Co KG
Priority to US13/654,917 priority Critical patent/US20140110805A1/en
Assigned to INFINEON TECHNOLOGIES DRESDEN GMBH reassignment INFINEON TECHNOLOGIES DRESDEN GMBH ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KAUTZSCH, THORALF
Publication of US20140110805A1 publication Critical patent/US20140110805A1/en
Priority to US15/390,178 priority patent/US10007056B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12002Three-dimensional structures
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122Basic optical elements, e.g. light-guiding paths
    • G02B6/1223Basic optical elements, e.g. light-guiding paths high refractive index type, i.e. high-contrast waveguides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/40Optical elements or arrangements
    • H10F77/413Optical elements or arrangements directly associated or integrated with the devices, e.g. back reflectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/40Optical elements or arrangements
    • H10F77/42Optical elements or arrangements directly associated or integrated with photovoltaic cells, e.g. light-reflecting means or light-concentrating means
    • H10F77/488Reflecting light-concentrating means, e.g. parabolic mirrors or concentrators using total internal reflection
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035Materials
    • G02B2006/12061Silicon
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083Constructional arrangements
    • G02B2006/121Channel; buried or the like
    • GPHYSICS
    • G02OPTICS
    • G02BOPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13Integrated optical circuits characterised by the manufacturing method
    • G02B6/136Integrated optical circuits characterised by the manufacturing method by etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/52PV systems with concentrators

Definitions

  • the invention relates generally to silicon devices and more particularly to optoelectronic silicon devices.
  • light rays are absorbed and generate charge carriers within the device.
  • charge carriers typically are desired to be generated within a particular light ray absorption region, which can be defined by a depth within the device, such that they can be collected near the surface of the device.
  • Charge carriers generated deeper than the depth of this region can be thought of us undesirable noise.
  • Conventional approaches to dealing with these charge carriers often relate to transporting them to the surface by extended electric fields or annihilating them by the targeted introduction of recombination centers.
  • the former is not suitable in all situations, such as those with regions that must remain free of electrical fields for physical reasons, and is also limited by available voltage, while the latter reduces internal quantum efficiency and can be technically difficult to realize at very high impurity atom densities.
  • Reduced quantum efficiency in turn can affect devices dimensions, and increased complexity and technological challenges can increase costs, which are undesired.
  • Embodiments relate to light trap devices, systems and methods.
  • a device comprises a silicon structure having a surface to be exposed to light rays; and a light trap structure formed within the silicon structure spaced apart from the surface and comprising a plurality of light trap elements adjacent one another and each having a surface proximate to and unparallel with the surface to be exposed to light rays.
  • a light trap structure buried within a silicon structure and comprises a plurality of light trap elements adjacent one another and each having a surface proximate to and unparallel with a surface of the silicon structure to be exposed to light rays.
  • a method comprises providing a silicon structure; and forming a plurality of light trap elements adjacent one another in the silicon structure and each having a surface proximate to and unparallel with a surface of the silicon structure to be exposed to light rays.
  • FIG. 1 is a side cross-sectional view of a light trap structure in a silicon structure according to an embodiment.
  • FIG. 2 is a side cross-sectional view of a light trap structure in a silicon structure according to an embodiment.
  • FIG. 3 is a side cross-sectional view of a light trap structure in a silicon structure according to an embodiment.
  • FIG. 4 is a side cross-sectional view of a light ray striking a silicon structure having a light trap structure according to an embodiment.
  • FIG. 5A is a side cross-sectional view of a silicon structure according to an embodiment.
  • FIG. 5B is a side cross-sectional view of a plurality of trenches formed in a silicon structure according to an embodiment.
  • FIG. 5C is a side cross-sectional view of a plurality of cavities formed from the trenches of FIG. 5B according to an embodiment.
  • FIG. 5D is a side cross-sectional view of a photodetector device comprising a light trap structure according to an embodiment.
  • FIG. 6 is a side cross-sectional view of a light trap structure in a silicon structure having a light-focusing roof structure according to an embodiment.
  • Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps.
  • Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.
  • Silicon structure 102 can comprise or consist of silicon in various embodiments, and in still other embodiments can comprise material(s) other than silicon.
  • Light trap structure 100 comprises a plurality of light trap elements 104 arranged immediately adjacent one another.
  • Light trap elements 104 can have length and/or width dimensions of about 0.5 ⁇ m to about 3 ⁇ m, height dimensions of about 1 ⁇ m to about 5 ⁇ m, and be disposed about 0.7 ⁇ m to about 50 ⁇ m from a top surface of silicon structure 102 in embodiments, though these dimensions can vary in other embodiments.
  • light trap elements 104 can be formed from trenches that extend partially, substantially or entirely along a length of silicon structure 102 .
  • light trap elements 104 comprise cavities filled with air or some other suitable gas or material.
  • Light trap structure 100 also can comprise a single light trap element 104 having the overall outline shape of structure 100 depicted in FIG. 1 but with the individual cavities being linked or joined to form a single cavity structure.
  • Light trap structure 100 can comprise a single row of light trap elements 104 or a matrix of light trap elements, for example comprising four rows having eight elements 104 each. Though depicted in FIG. 1 as extending from one side of silicon structure 102 to the other, in other embodiments light trap structure can be formed in only a portion of silicon structure 102 , such as is depicted in FIG. 2 .
  • light trap elements 104 comprise curved, rounded or arched top and bottom (with respect to the depiction of the drawing on the page) portions.
  • the top can be curved and the bottom can have some other shape or structure, for example being generally flat and therefore parallel with a top surface of silicon structure 102 .
  • light trap elements 104 can have other shapes, such as peaked or pointed as depicted in FIG. 3 . In general, however, it can be seen that the surface of each light trap element 104 adjacent or opposing the upper surface of silicon structure 102 are angled, curved or otherwise unparallel with that upper surface.
  • the particular radius of curvature ( FIGS. 1 and 2 ) or angle ( FIG. 3 ) of the surfaces of light trap elements 104 can vary in embodiments according to materials used, light wavelengths and other factors.
  • silicon has a relatively high refractive index, such as between about 3.5 and 5.5 depending upon the wavelength of light.
  • a critical angle of about 16 degrees exists: all light rays impinging from silicon structure 102 on an interface with a vacuum or air layer at an angle greater than about 16 degrees will be totally reflected.
  • light rays which enter silicon structure 102 and are reflected internally at an angle greater than 16 degrees will be subject to total reflection within silicon structure 102 .
  • silicon structure 102 can comprise some other material, such as germanium, gallium arsenide, another 3-5 group semiconductor material, or another suitable material.
  • Germanium and gallium arsenide for example, generally have high refraction indices, like silicon, such that the total reflection angle will be below about 20 degrees in these embodiments as well, though one skilled in the art will appreciate that the angle can vary according to the properties of the material(s) used.
  • a light ray 106 impinging on silicon structure 102 is reflected by light trap structure 100 back toward the surface 108 , which is a silicon-air interface. Because of the arched structure of the light trap elements 104 , ray 106 impinges on surface 108 from within silicon structure 102 at an angle ⁇ greater than about 16 degrees. This causes ray 106 to be reflected back toward light trap structure 100 , which again causes ray 106 to strike surface 108 at an angle greater than about 16 degrees and be reflected internally.
  • This internal reflection caused by altering the path of light ray 106 by light trap structure 100 can improve the efficiency of the device because a larger portion of light impinging on the device can be used by the device, such as by coupling more light to a photo surface of the device rather than be reflected externally.
  • the embodiment of FIG. 3 also can provide advantages.
  • the peaked light trap elements 104 of FIG. 3 can be more efficient by presenting a smaller portion of each element 104 which would cause the light to be reflected externally.
  • the number of light rays striking the very peak of the light elements 104 generally will be very small, such that more light rays will be reflected internally similar to as depicted in FIG. 4 .
  • FIGS. 5A-5D one example process for forming light trap structure 100 is depicted.
  • a dilemma for forming cavities in monocrystalline silicon can be used, though other processes can be used in this and other embodiments.
  • a silicon structure 102 such as a silicon wafer, is provided.
  • FIG. 5B at least one trench 110 is etched in silicon structure 102 .
  • Silicon structure 102 is then exposed to a hydrogen atmosphere and a reflow process or epitaxy step, which results in the silicon-on-nothing structure 102 depicted in FIG. 5C , in which light trap elements 104 have been formed from each of the at least one trenches 110 .
  • FIG. 5A a silicon structure 102 , such as a silicon wafer, is provided.
  • FIG. 5B at least one trench 110 is etched in silicon structure 102 .
  • Silicon structure 102 is then exposed to a hydrogen atmosphere and a reflow process or epitaxy step, which results in the silicon-on-nothing structure 102 depict
  • 5D depicts one example of a final photo-sensitive structure 112 , such as a photo diode, after formation of a photo detector 114 between light trap structure 100 and surface 108 .
  • photo-sensitive structure 112 forms only a portion of surface 108 , such as a photo-sensitive “window” of the device, though this can vary in other embodiments to include an entire surface or a plurality of photo-sensitive structures spaced apart at a surface or some other arrangement.
  • the process can vary for other embodiments, such as the peaked light trap structure 100 of FIG. 3 .
  • silicon structure 102 and trenches 110 can be treated with an alkaline solution to anisotropically etch the silicon, thereby uncovering the (111) surface of the silicon, which results in the peaks of FIG. 3 as the angle of about 54.7 degrees between (100) and (111) planes of the silicon of silicon structure 102 .
  • Other surfaces of the silicon, such as the (110) surface also can be used in embodiments to produce different angles of the peaks, which vary with the crystal orientation of the silicon, though other angles can be less efficient.
  • the angle can be between about 50 degrees and about 60 degrees, such as between about 53 and 56 degrees, for example about 54.7 degrees in embodiments.
  • a roof structure 116 can be used with light trap structure 100 to further maximize quantum efficiency.
  • a roof structure 116 can be used in photovoltaics, such as high-powered solar cells, and other applications to better channel or focus light rays to photosensitive elements below.
  • roof structure 116 comprises a plurality of inverted pyramid, funnel or other light-focusing structures and can be formed by a masked potassium hydroxide solution etch or some other suitable process step(s). Roof structure 116 need not be a separate layer as depicted but instead can be an area or portion of silicon structure 102 that is etched, patterned or otherwise altered to include one or more light-focusing structures.
  • light trap structure 100 can comprise a thermal liner oxide layer in order to electrically passivate the interface between surface 108 and/or to electrically insulate the region from the substrate below.
  • roof structure 116 and/or a thermal liner oxide layer in combination with a light trap structure can thereby provide benefits in embodiments.
  • Embodiments thereby provide improved light trap structures for silicon devices which can alter light paths.
  • Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Light Receiving Elements (AREA)
  • Photovoltaic Devices (AREA)

Abstract

Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.

Description

    TECHNICAL FIELD
  • The invention relates generally to silicon devices and more particularly to optoelectronic silicon devices.
  • BACKGROUND
  • In optoelectronic devices, light rays are absorbed and generate charge carriers within the device. These charge carriers typically are desired to be generated within a particular light ray absorption region, which can be defined by a depth within the device, such that they can be collected near the surface of the device.
  • Charge carriers generated deeper than the depth of this region can be thought of us undesirable noise. Conventional approaches to dealing with these charge carriers often relate to transporting them to the surface by extended electric fields or annihilating them by the targeted introduction of recombination centers. The former is not suitable in all situations, such as those with regions that must remain free of electrical fields for physical reasons, and is also limited by available voltage, while the latter reduces internal quantum efficiency and can be technically difficult to realize at very high impurity atom densities. Reduced quantum efficiency in turn can affect devices dimensions, and increased complexity and technological challenges can increase costs, which are undesired.
  • SUMMARY
  • Embodiments relate to light trap devices, systems and methods.
  • In an embodiment, a device comprises a silicon structure having a surface to be exposed to light rays; and a light trap structure formed within the silicon structure spaced apart from the surface and comprising a plurality of light trap elements adjacent one another and each having a surface proximate to and unparallel with the surface to be exposed to light rays.
  • In an embodiment, a light trap structure buried within a silicon structure and comprises a plurality of light trap elements adjacent one another and each having a surface proximate to and unparallel with a surface of the silicon structure to be exposed to light rays.
  • In an embodiment, a method comprises providing a silicon structure; and forming a plurality of light trap elements adjacent one another in the silicon structure and each having a surface proximate to and unparallel with a surface of the silicon structure to be exposed to light rays.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The invention may be more completely understood in consideration of the following detailed description of various embodiments of the invention in connection with the accompanying drawings, in which:
  • FIG. 1 is a side cross-sectional view of a light trap structure in a silicon structure according to an embodiment.
  • FIG. 2 is a side cross-sectional view of a light trap structure in a silicon structure according to an embodiment.
  • FIG. 3 is a side cross-sectional view of a light trap structure in a silicon structure according to an embodiment.
  • FIG. 4 is a side cross-sectional view of a light ray striking a silicon structure having a light trap structure according to an embodiment.
  • FIG. 5A is a side cross-sectional view of a silicon structure according to an embodiment.
  • FIG. 5B is a side cross-sectional view of a plurality of trenches formed in a silicon structure according to an embodiment.
  • FIG. 5C is a side cross-sectional view of a plurality of cavities formed from the trenches of FIG. 5B according to an embodiment.
  • FIG. 5D is a side cross-sectional view of a photodetector device comprising a light trap structure according to an embodiment.
  • FIG. 6 is a side cross-sectional view of a light trap structure in a silicon structure having a light-focusing roof structure according to an embodiment.
  • While the invention is amenable to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the invention to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
  • DETAILED DESCRIPTION
  • Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.
  • Referring to FIG. 1, an embodiment of a light trap structure 100 embedded in a silicon structure 102 is depicted. Silicon structure 102 can comprise or consist of silicon in various embodiments, and in still other embodiments can comprise material(s) other than silicon. Light trap structure 100 comprises a plurality of light trap elements 104 arranged immediately adjacent one another. Light trap elements 104 can have length and/or width dimensions of about 0.5 μm to about 3 μm, height dimensions of about 1 μm to about 5 μm, and be disposed about 0.7 μm to about 50 μm from a top surface of silicon structure 102 in embodiments, though these dimensions can vary in other embodiments. For example, light trap elements 104 can be formed from trenches that extend partially, substantially or entirely along a length of silicon structure 102.
  • In embodiments, light trap elements 104 comprise cavities filled with air or some other suitable gas or material. Light trap structure 100 also can comprise a single light trap element 104 having the overall outline shape of structure 100 depicted in FIG. 1 but with the individual cavities being linked or joined to form a single cavity structure. Light trap structure 100 can comprise a single row of light trap elements 104 or a matrix of light trap elements, for example comprising four rows having eight elements 104 each. Though depicted in FIG. 1 as extending from one side of silicon structure 102 to the other, in other embodiments light trap structure can be formed in only a portion of silicon structure 102, such as is depicted in FIG. 2.
  • In the embodiment of FIG. 1, light trap elements 104 comprise curved, rounded or arched top and bottom (with respect to the depiction of the drawing on the page) portions. In other embodiments, only the top can be curved and the bottom can have some other shape or structure, for example being generally flat and therefore parallel with a top surface of silicon structure 102. In still other embodiments, light trap elements 104 can have other shapes, such as peaked or pointed as depicted in FIG. 3. In general, however, it can be seen that the surface of each light trap element 104 adjacent or opposing the upper surface of silicon structure 102 are angled, curved or otherwise unparallel with that upper surface.
  • The particular radius of curvature (FIGS. 1 and 2) or angle (FIG. 3) of the surfaces of light trap elements 104 can vary in embodiments according to materials used, light wavelengths and other factors. For example, silicon has a relatively high refractive index, such as between about 3.5 and 5.5 depending upon the wavelength of light. For a light wavelength of about 850 nm, a critical angle of about 16 degrees exists: all light rays impinging from silicon structure 102 on an interface with a vacuum or air layer at an angle greater than about 16 degrees will be totally reflected. Thus, light rays which enter silicon structure 102 and are reflected internally at an angle greater than 16 degrees will be subject to total reflection within silicon structure 102. In other embodiments, silicon structure 102 can comprise some other material, such as germanium, gallium arsenide, another 3-5 group semiconductor material, or another suitable material. Germanium and gallium arsenide, for example, generally have high refraction indices, like silicon, such that the total reflection angle will be below about 20 degrees in these embodiments as well, though one skilled in the art will appreciate that the angle can vary according to the properties of the material(s) used.
  • Referring to FIG. 4, a light ray 106 impinging on silicon structure 102 is reflected by light trap structure 100 back toward the surface 108, which is a silicon-air interface. Because of the arched structure of the light trap elements 104, ray 106 impinges on surface 108 from within silicon structure 102 at an angle α greater than about 16 degrees. This causes ray 106 to be reflected back toward light trap structure 100, which again causes ray 106 to strike surface 108 at an angle greater than about 16 degrees and be reflected internally. This internal reflection caused by altering the path of light ray 106 by light trap structure 100 can improve the efficiency of the device because a larger portion of light impinging on the device can be used by the device, such as by coupling more light to a photo surface of the device rather than be reflected externally.
  • The embodiment of FIG. 3 also can provide advantages. For example, the peaked light trap elements 104 of FIG. 3 can be more efficient by presenting a smaller portion of each element 104 which would cause the light to be reflected externally. In other words, the number of light rays striking the very peak of the light elements 104 generally will be very small, such that more light rays will be reflected internally similar to as depicted in FIG. 4.
  • Referring next to FIGS. 5A-5D, one example process for forming light trap structure 100 is depicted. In one embodiment, a Venezia process for forming cavities in monocrystalline silicon can be used, though other processes can be used in this and other embodiments. In FIG. 5A, a silicon structure 102, such as a silicon wafer, is provided. In FIG. 5B, at least one trench 110 is etched in silicon structure 102. Silicon structure 102 is then exposed to a hydrogen atmosphere and a reflow process or epitaxy step, which results in the silicon-on-nothing structure 102 depicted in FIG. 5C, in which light trap elements 104 have been formed from each of the at least one trenches 110. FIG. 5D depicts one example of a final photo-sensitive structure 112, such as a photo diode, after formation of a photo detector 114 between light trap structure 100 and surface 108. As depicted in FIG. 5D, photo-sensitive structure 112 forms only a portion of surface 108, such as a photo-sensitive “window” of the device, though this can vary in other embodiments to include an entire surface or a plurality of photo-sensitive structures spaced apart at a surface or some other arrangement.
  • The process can vary for other embodiments, such as the peaked light trap structure 100 of FIG. 3. For such an embodiment, for example, silicon structure 102 and trenches 110 can be treated with an alkaline solution to anisotropically etch the silicon, thereby uncovering the (111) surface of the silicon, which results in the peaks of FIG. 3 as the angle of about 54.7 degrees between (100) and (111) planes of the silicon of silicon structure 102. Other surfaces of the silicon, such as the (110) surface, also can be used in embodiments to produce different angles of the peaks, which vary with the crystal orientation of the silicon, though other angles can be less efficient. For example, the angle can be between about 50 degrees and about 60 degrees, such as between about 53 and 56 degrees, for example about 54.7 degrees in embodiments.
  • Other features and elements can be incorporated in embodiments. For example, and referring to FIG. 6, a roof structure 116 can be used with light trap structure 100 to further maximize quantum efficiency. Such a roof structure 116 can be used in photovoltaics, such as high-powered solar cells, and other applications to better channel or focus light rays to photosensitive elements below. In embodiments, roof structure 116 comprises a plurality of inverted pyramid, funnel or other light-focusing structures and can be formed by a masked potassium hydroxide solution etch or some other suitable process step(s). Roof structure 116 need not be a separate layer as depicted but instead can be an area or portion of silicon structure 102 that is etched, patterned or otherwise altered to include one or more light-focusing structures. In another example, light trap structure 100 can comprise a thermal liner oxide layer in order to electrically passivate the interface between surface 108 and/or to electrically insulate the region from the substrate below. Using roof structure 116 and/or a thermal liner oxide layer in combination with a light trap structure can thereby provide benefits in embodiments.
  • Embodiments thereby provide improved light trap structures for silicon devices which can alter light paths. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.
  • Various embodiments of systems, devices and methods have been described herein. These embodiments are given only by way of example and are not intended to limit the scope of the invention. It should be appreciated, moreover, that the various features of the embodiments that have been described may be combined in various ways to produce numerous additional embodiments. Moreover, while various materials, dimensions, shapes, configurations and locations, etc. have been described for use with disclosed embodiments, others besides those disclosed may be utilized without exceeding the scope of the invention.
  • Persons of ordinary skill in the relevant arts will recognize that the invention may comprise fewer features than illustrated in any individual embodiment described above. The embodiments described herein are not meant to be an exhaustive presentation of the ways in which the various features of the invention may be combined. Accordingly, the embodiments are not mutually exclusive combinations of features; rather, the invention can comprise a combination of different individual features selected from different individual embodiments, as understood by persons of ordinary skill in the art. Moreover, elements described with respect to one embodiment can be implemented in other embodiments even when not described in such embodiments unless otherwise noted. Although a dependent claim may refer in the claims to a specific combination with one or more other claims, other embodiments can also include a combination of the dependent claim with the subject matter of each other dependent claim or a combination of one or more features with other dependent or independent claims. Such combinations are proposed herein unless it is stated that a specific combination is not intended. Furthermore, it is intended also to include features of a claim in any other independent claim even if this claim is not directly made dependent to the independent claim.
  • Any incorporation by reference of documents above is limited such that no subject matter is incorporated that is contrary to the explicit disclosure herein. Any incorporation by reference of documents above is further limited such that no claims included in the documents are incorporated by reference herein. Any incorporation by reference of documents above is yet further limited such that any definitions provided in the documents are not incorporated by reference herein unless expressly included herein.
  • For purposes of interpreting the claims for the present invention, it is expressly intended that the provisions of Section 112, sixth paragraph of 35 U.S.C. are not to be invoked unless the specific terms “means for” or “step for” are recited in a claim.

Claims (25)

1. A device comprising:
a silicon structure having a surface to be exposed to light rays; and
a light trap structure formed within the silicon structure spaced apart from the surface and comprising a plurality of light trap elements adjacent one another and each having a surface proximate to and unparallel with the surface to be exposed to light rays.
2. The device of claim 1, wherein the surface proximate to and unparallel with the surface to be exposed to light rays has a radius.
3. The device of claim 1, wherein the surface proximate to and unparallel with the surface to be exposed to light rays comprises a peak.
4. The device of claim 3, wherein am angle of the peak is between about 50 degrees and about 60 degrees.
5. The device of claim 4, wherein the angle of the peak is about 54.7 degrees.
6. The device of claim 1, wherein the plurality of light trap elements each comprise a cavity within the silicon structure.
7. The device of claim 6, wherein each cavity is formed from a trench etched in the silicon structure.
8. The device of claim 1, wherein each surface proximate to and unparallel with the surface to be exposed to light rays is configured to reflect light toward the surface to be exposed to light rays at an angle greater than about 16 degrees.
9. The device of claim 1, wherein the device comprises a photodetector device.
10. The device of claim 1, wherein each light trap element is about 0.5 micrometers (μm) to about 3 μm wide and about 1 μm to about 5 μm high.
11. The device of claim 1, wherein each light trap element is spaced apart from the surface to be exposed to light rays by at least about 0.7 μm and not more than about 50 μm.
12. The device of claim 1, further comprising a structure formed on the surface to be exposed to light and comprising a plurality of light-focusing structures.
13. A light trap structure buried within a silicon structure and comprising:
a plurality of light trap elements adjacent one another and each having a surface proximate to and unparallel with a surface of the silicon structure to be exposed to light rays.
14. The light trap structure of claim 13, wherein the plurality of light trap elements comprise a plurality of cavities.
15. The light trap structure of claim 13, wherein the surface proximate to and unparallel with the surface to be exposed to light rays has a radius.
16. The device of claim 13, wherein the surface proximate to and unparallel With the surface to be exposed to light rays comprises a peak.
17. The device of claim 16, wherein an angle of the peak is between about 53 degrees and about 56 degrees.
18. The device of claim 13, wherein the plurality of light trap elements each comprise a cavity within the silicon structure.
19. The device of claim 18, wherein each cavity is formed from a trench etched in the silicon structure.
20. The device of claim 13, wherein each surface proximate to and unparallel with the surface to be exposed to light rays is configured to reflect light toward the surface to be exposed to light rays at an angle greater than about 16 degrees.
21. The device of claim 13, wherein each light trap element is about 0.5 micrometers (μm) to about 3 μm wide and about 1 μm to about 5 μm deep.
22. The device of claim 13, wherein each light trap element is spaced apart from the surface to be exposed to light rays by at least about 0.7 μm and not more than about 50 μm.
23. A method comprising:
providing a silicon structure; and
forming a plurality of light trap elements adjacent one another in the silicon structure and each having a surface proximate to and unparallel with a surface of the silicon structure to be exposed to light rays.
24. The method of claim 23, wherein forming a plurality of light trap elements further comprises:
forming a plurality of trenches in the silicon structure; and
producing a cavity from each of the plurality of trenches.
25. The method of claim 24, further comprising forming a light-focusing structure on the silicon structure.
US13/654,917 2012-10-18 2012-10-18 Silicon light trap devices, systems and methods Abandoned US20140110805A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US13/654,917 US20140110805A1 (en) 2012-10-18 2012-10-18 Silicon light trap devices, systems and methods
US15/390,178 US10007056B2 (en) 2012-10-18 2016-12-23 Silicon light trap devices, systems and methods

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/654,917 US20140110805A1 (en) 2012-10-18 2012-10-18 Silicon light trap devices, systems and methods

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US15/390,178 Continuation US10007056B2 (en) 2012-10-18 2016-12-23 Silicon light trap devices, systems and methods

Publications (1)

Publication Number Publication Date
US20140110805A1 true US20140110805A1 (en) 2014-04-24

Family

ID=50484599

Family Applications (2)

Application Number Title Priority Date Filing Date
US13/654,917 Abandoned US20140110805A1 (en) 2012-10-18 2012-10-18 Silicon light trap devices, systems and methods
US15/390,178 Active US10007056B2 (en) 2012-10-18 2016-12-23 Silicon light trap devices, systems and methods

Family Applications After (1)

Application Number Title Priority Date Filing Date
US15/390,178 Active US10007056B2 (en) 2012-10-18 2016-12-23 Silicon light trap devices, systems and methods

Country Status (1)

Country Link
US (2) US20140110805A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8957490B2 (en) 2013-06-28 2015-02-17 Infineon Technologies Dresden Gmbh Silicon light trap devices
US10007056B2 (en) 2012-10-18 2018-06-26 Infineon Technologies Dresden Gmbh Silicon light trap devices, systems and methods
US10784147B2 (en) 2017-07-20 2020-09-22 Infineon Technologies Ag Method for producing a buried cavity structure
US11476289B2 (en) * 2020-04-07 2022-10-18 Globalfoundries U.S. Inc. Photodetector with buried airgap reflectors

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5100478A (en) * 1989-12-01 1992-03-31 Mitsubishi Denki Kabushiki Kaisha Solar cell
US20050104163A1 (en) * 2001-11-29 2005-05-19 Weber Klaus J. Semiconductor texturing process
US20070200492A1 (en) * 2006-02-24 2007-08-30 Eastman Kodak Company Top-emitter OLED device structure and method
US20100148940A1 (en) * 1999-10-06 2010-06-17 Gelvin David C Apparatus for internetworked wireless integrated network sensors (wins)
US20100202206A1 (en) * 2009-02-10 2010-08-12 Samsung Electronics Co., Ltd. Non-volatile memory devices including vertical nand channels and methods of forming the same
US20100239983A1 (en) * 2009-03-23 2010-09-23 Scott Sills Methods Of Forming Patterns On Substrates
US20110030779A1 (en) * 2008-02-04 2011-02-10 The University Of Tokyo Silicon solar cell
US20110092061A1 (en) * 2009-10-20 2011-04-21 Yunjun Ho Methods of Forming Silicon Oxides and Methods of Forming Interlevel Dielectrics
US20110223734A1 (en) * 2010-03-09 2011-09-15 Davis Neal L Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
US20120012741A1 (en) * 2010-07-13 2012-01-19 Sergiy Victorovich Vasylyev Light harvesting system employing microstructures for efficient light trapping

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5376818A (en) * 1993-12-16 1994-12-27 Kulite Semiconductor Products, Inc. Large area P-N junction devices formed from porous silicon
AUPP699798A0 (en) 1998-11-06 1998-12-03 Pacific Solar Pty Limited Thin films with light trapping
JP3759435B2 (en) 2001-07-11 2006-03-22 ソニー株式会社 XY address type solid-state imaging device
US6809008B1 (en) 2003-08-28 2004-10-26 Motorola, Inc. Integrated photosensor for CMOS imagers
JP4794821B2 (en) 2004-02-19 2011-10-19 キヤノン株式会社 Solid-state imaging device and imaging system
JP5320659B2 (en) 2005-12-05 2013-10-23 ソニー株式会社 Solid-state imaging device
US8290318B2 (en) 2009-04-21 2012-10-16 Svv Technology Innovations, Inc. Light trapping optical cover
US8258050B2 (en) 2009-07-17 2012-09-04 Hewlett-Packard Development Company, L.P. Method of making light trapping crystalline structures
US20110203663A1 (en) 2010-02-22 2011-08-25 Dennis Prather Photonic crystal enhanced light trapping solar cell
TWI418890B (en) 2010-03-04 2013-12-11 Au Optronics Corp Touch reflective display panel and manufacturing method thereof
JP2012033583A (en) 2010-07-29 2012-02-16 Sony Corp Solid-state imaging device, method for manufacturing the same, and imaging apparatus
JP2012059881A (en) 2010-09-08 2012-03-22 Toshiba Corp Imaging device, imaging module and method for manufacturing imaging device
US20140110805A1 (en) 2012-10-18 2014-04-24 Infineon Technologies Dresden Gmbh Silicon light trap devices, systems and methods
US9252180B2 (en) 2013-02-08 2016-02-02 Taiwan Semiconductor Manufacturing Company, Ltd. Bonding pad on a back side illuminated image sensor

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5100478A (en) * 1989-12-01 1992-03-31 Mitsubishi Denki Kabushiki Kaisha Solar cell
US20100148940A1 (en) * 1999-10-06 2010-06-17 Gelvin David C Apparatus for internetworked wireless integrated network sensors (wins)
US20050104163A1 (en) * 2001-11-29 2005-05-19 Weber Klaus J. Semiconductor texturing process
US20070200492A1 (en) * 2006-02-24 2007-08-30 Eastman Kodak Company Top-emitter OLED device structure and method
US20110030779A1 (en) * 2008-02-04 2011-02-10 The University Of Tokyo Silicon solar cell
US20100202206A1 (en) * 2009-02-10 2010-08-12 Samsung Electronics Co., Ltd. Non-volatile memory devices including vertical nand channels and methods of forming the same
US20100239983A1 (en) * 2009-03-23 2010-09-23 Scott Sills Methods Of Forming Patterns On Substrates
US20110092061A1 (en) * 2009-10-20 2011-04-21 Yunjun Ho Methods of Forming Silicon Oxides and Methods of Forming Interlevel Dielectrics
US20110223734A1 (en) * 2010-03-09 2011-09-15 Davis Neal L Methods of forming an array of memory cells, methods of forming a plurality of field effect transistors, methods of forming source/drain regions and isolation trenches, and methods of forming a series of spaced trenches into a substrate
US20120012741A1 (en) * 2010-07-13 2012-01-19 Sergiy Victorovich Vasylyev Light harvesting system employing microstructures for efficient light trapping

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
Buried - (2): b - to cover form view (Merriam-Webster dictionary, http://www.merriam-webster.com/dictionary/bury, 2014) *
Definition of immediately downloaded from http://www.merriam-webster.com/dictionary/immediately on 11/27/16 *
Within - inside something; in or into the interior (Merriam-Webster dictionary, http://www.merriam-webster.com/dictionary/within, 2014) *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10007056B2 (en) 2012-10-18 2018-06-26 Infineon Technologies Dresden Gmbh Silicon light trap devices, systems and methods
US8957490B2 (en) 2013-06-28 2015-02-17 Infineon Technologies Dresden Gmbh Silicon light trap devices
US9660112B2 (en) * 2013-06-28 2017-05-23 Infineon Technologies Dresden Gmbh Semiconductor light trap devices
US10784147B2 (en) 2017-07-20 2020-09-22 Infineon Technologies Ag Method for producing a buried cavity structure
US11476289B2 (en) * 2020-04-07 2022-10-18 Globalfoundries U.S. Inc. Photodetector with buried airgap reflectors
US12027553B2 (en) 2020-04-07 2024-07-02 Globalfoundries U.S. Inc. Photodetector with buried airgap reflectors

Also Published As

Publication number Publication date
US20170115452A1 (en) 2017-04-27
US10007056B2 (en) 2018-06-26

Similar Documents

Publication Publication Date Title
US9660112B2 (en) Semiconductor light trap devices
US11721714B2 (en) Pixel isolation elements, devices and associated methods
US10007056B2 (en) Silicon light trap devices, systems and methods
CN101803035B (en) Solar battery structure based on nano wire
CN103400872B (en) Structure of the PIN photoelectric detector that surface field strengthens and preparation method thereof
KR102363563B1 (en) semiconductor photodetector
US11705469B2 (en) Germanium based focal plane array for the short infrared spectral regime
CN209804690U (en) Semiconductor ultraviolet photoelectric detector and ultraviolet radiation detection system
US20220367743A1 (en) Single photon avalanche diode device
CN116053336A (en) Preparation method of light trapping structure on surface of InGaAs avalanche detector
CN103227231A (en) Planar avalanche photoelectric detector
KR101322364B1 (en) Photodiodes with surface plasmon couplers
US10304977B1 (en) High performance ultra-thin solar cell structures
US20170162749A1 (en) Optoelectronic semiconductor chip and method of producing same
KR20120038625A (en) Solar cell
JP2008193037A (en) Photodetector and manufacturing method thereof
CN104009139B (en) Region photonic crystal light-emitting diode device
RU2655704C1 (en) Monocrystalline silicon-based solar photoconverter
CN113707750B (en) Waveguide-coupled avalanche photodetector and preparation method thereof
JPWO2018061898A1 (en) Optical sensor and method of forming the same
US20180069142A1 (en) Photovoltaic solar cell with backside resonant waveguide
CN114927582A (en) A Narrowband Near-Infrared Thermionic Photodetector With Fully Embedded Grating Structure
HK1147141B (en) Nanowire-based solar cell structure

Legal Events

Date Code Title Description
AS Assignment

Owner name: INFINEON TECHNOLOGIES DRESDEN GMBH, GERMANY

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:KAUTZSCH, THORALF;REEL/FRAME:029152/0857

Effective date: 20121017

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION