US20120183024A1 - Digital signal transfer method and apparatus - Google Patents
Digital signal transfer method and apparatus Download PDFInfo
- Publication number
- US20120183024A1 US20120183024A1 US13/434,735 US201213434735A US2012183024A1 US 20120183024 A1 US20120183024 A1 US 20120183024A1 US 201213434735 A US201213434735 A US 201213434735A US 2012183024 A1 US2012183024 A1 US 2012183024A1
- Authority
- US
- United States
- Prior art keywords
- signal
- circuit
- pulse
- announcement
- time window
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
- H04L25/085—Arrangements for reducing interference in line transmission systems, e.g. by differential transmission
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
Definitions
- the present invention relates to a digital signal transfer method, particularly for transferring a digital signal via a potential barrier.
- microcontrollers use interfaces of the RS-485 type or use SPI (Serial Parallel Interface) interfaces to communicate with circuit components that are to be actuated.
- SPI Serial Parallel Interface
- the transfer method needs to be highly immune to interference.
- transformers For data transfer with electrical isolation between a transmitter circuit and a receiver circuit, it is known practice to use transformers, particularly planar transformers integrated on an IC, as described in Published German Patent Application 101 00 282 A1, for example, as data couplers. To transfer signals using such transformers, it is necessary to convert the signals into pulse trains that are suitable for transfer, and it is known practice, for example, to produce cyclic pulse trains from a binary control signal and to transfer them, as described in U.S. Pat. Nos. 4,027,152, 4,748,419, 5,952,849 and 6,262,600, for example.
- Planar transformers integrated in an integrated circuit which are also called coreless transformers, are capable of transferring data at a speed of up to 1 Gbaud, where not just the high data transfer speed, but also the low power consumption with good immunity to interference make such transformers attractive as coupling modules in data transfer links.
- an embodiment of the inventive digital signal transfer method in which a first and a second transfer channel are provided.
- the first transfer channel is used as an “announcement channel” for data transfer and the second transfer channel is used as an actual data channel.
- an announcement signal including at least one pulse is first transferred via the first transfer channel.
- the data signal is subsequently transferred via the second transfer channel within a data signal time window lasting for a prescribed period after the announcement signal.
- the inventive method involves the announcement signal and the data signal being transferred at different times via separate transfer channels, which ensures a very high level of immunity to interference.
- the likelihood of an interference signal which appears on the data channel being incorrectly identified as a useful signal is low in the case of the inventive method, because the receiver accepts only such signals that are received within the data signal time window after the announcement signal.
- the transfer channels each include a magnetic coupling element, particularly a transformer integrated in an integrated circuit.
- a magnetic coupling element particularly a transformer integrated in an integrated circuit.
- interference signals are easy to detect in a receiver circuit and are correspondingly easy to isolate from the useful signal.
- the data signal time window within which data signals are transferred starts after a period which is greater than zero after the announcement signal.
- the announcement signal includes just a single pulse, and the data signal time window does not start until after the end of this announcement pulse.
- a further transfer channel which is used to transfer control information.
- control information includes a parity check signal or a transfer check signal, for example.
- the data signal is transferred within the respective data signal time window in coded form in order to increase redundancy and hence to increase immunity to interference further, and any coding methods which increase redundancy can be used for this.
- a data pulse or a data pulse train is repeated within the data signal time window, that is to say is transferred a plurality of times at successive times.
- the inventive method is also suitable for transferring a binary signal that has a first or a second signal level.
- Such signal profiles in which a signal assumes a first signal level or a second signal level over a comparatively long period, which is much longer than the data signal time window, are typical of control signals, for example turn-on and turn-off signals for loads, which need to be transferred in electrical installations with isolation of potentials.
- a pulse is transferred during the data signal time window when the control signal assumes a first signal level, and no pulse is transferred when the control signal assumes a second signal level.
- the transfer, repeated at cyclic intervals of time, of pulse trains which represent the signal level of the control signal helps to increase immunity to interference during the transfer of such control signals, since even if interference arises during a data signal time window and makes data transfer impossible, the data signal is transferred during one of the subsequent data signal time windows, after the interference has declined.
- a digital signal transfer method that includes providing a transfer channel.
- An announcement signal including at least one pulse is transmitted via the transfer channel.
- a data signal is also transmitted via the transfer channel within a data signal time window lasting for a prescribed period after the announcement signal.
- FIG. 1 is a block diagram of a data transfer link having two transfer channels that each include a coupling element for isolating potentials in a transmitter circuit and a receiver circuit.
- FIG. 2 is a diagram showing exemplary signal profiles of signals on the first and second transfer channels.
- FIG. 3A is a diagram showing exemplary signal profiles of signals, on the first and second transfer channels and also time profiles for selected internal signals in a transmitter circuit and a receiver circuit, which occur in one embodiment of a transfer method.
- FIG. 3B is a diagram showing exemplary signal profiles of signals, on the first and second transfer channels and also on a third channel that is used as control information channel, which occur in a modification of the method.
- FIG. 4 is a diagram showing selected signal profiles for a method for transferring a binary control signal with regular announcement pulses.
- FIG. 5 is a diagram showing selected signal profiles for a method for transferring a binary control signal with event-controlled announcement pulses.
- FIG. 6 is a block diagram of a data transfer link having a single transfer channel that includes a coupling element for isolating potentials in a transmitter circuit and a receiver circuit.
- FIG. 1 there is schematically shown a data transfer link with a transmitter circuit 10 , to which an input signal Sin is supplied, and a receiver circuit 20 which provides an output signal Sout which is dependent on the input signal Sin.
- the data transfer link also includes a first transfer channel with a coupling element TR 1 and a second transfer channel with a second coupling element TR 2 .
- the coupling elements TR 1 , TR 2 preferably each include an integrated transformer for isolating the potentials of the transmitter circuit 10 and the receiver circuit 20 .
- the first transfer channel is used as an announcement channel to transfer an announcement signal S 1 when data transfer needs to take place.
- the second transfer channel is used as the actual data channel to transfer the actual data signal containing the useful information to the receiver.
- Both the announcement signal S 1 and the data signal S 2 are individual pulses or pulse trains that are generated by the transmitter circuit 10 .
- the length of the individual pulses is matched to the transfer properties of the coupling elements TR 1 , TR 2 in order for these pulses to be transferred optimally on interference-free channels.
- each of the transformers TR 1 , TR 2 includes a primary coil which is excited by the signal S 1 or S 2 generated by the transmitter circuit 10 .
- the magnetic coupling of the primary coil and the secondary coil mean that the transmitter-end pulse trains result in corresponding receiver-end pulse trains that are detected by the receiver circuit 20 .
- FIG. 2 fundamentally shows the signal profiles for the announcement signal S 1 and the data signal S 2 in the inventive method.
- the method provides for the first transfer channel, which serves as the announcement channel, to be used to transfer an announcement signal S 1 .
- the method also includes transferring a pulse or a pulse train for the data signal within a respective time window lasting for a prescribed period after a pulse or a pulse train for the announcement signal.
- the announcement signal transferred via the announcement channel is a respective individual announcement pulse.
- a period td after the start of the announcement pulse is followed by the start of a time window, lasting for a period tf, within which the data signal is transferred.
- the data signal includes just one data pulse per time window in the example shown in FIG. 2 .
- the period td after which the data signal time window starts is longer in this case than the pulse length of the announcement pulse, which means that the time window does not start until after the end of the announcement pulse, as a result of which the announcement pulses and the data pulses following the announcement pulses within the time windows are transferred at different times from one another, resulting in immunity to interference when using the method.
- the data pulse train transferred during the data signal time window can contain the information that is to be transferred in virtually any manner.
- just one pulse can be transferred during a data signal time window such that the information which is to be transferred is held in the period, for example, by which this pulse is additionally shifted with respect to the start of the data signal time window.
- a plurality of, for example n, pulses representing that single bits of a data word of a length of n bits to be transferred can be transferred during a data signal time window.
- the transmitter and the receiver are synchronized in the inventive method by virtue of the shape of the announcement signal generated by the transmitter, the period for which the data signal time window lasts, and also because the interval of time between the announcement signal and the data signal time window is known at the receiver. Whenever an announcement signal is received, this results in the receiver taking the known information about the period for which the data signal time window lasts and the latter's distance from the announcement signal as a basis for producing a time window within which pulses which are received on the data channel at the receiver are accepted as a data signal.
- the receiver circuit contains a corresponding decoder which provides the output signal Sout from the signals received via the data channel within the data signal time windows.
- FIGS. 3A and 3B illustrate an exemplary embodiment of the inventive method, in which announcement pulses in the announcement signal S 1 are generated cyclically in time with a clock signal Ts having a clock period tc.
- an input signal Sin is also available which is shown by way of example as a binary signal whose level can change in time with the clock signal Ts. Such signals appear at the outputs of shift registers, for example.
- the information about the current level of the input signal Sin is transferred in data signal time windows of length tf. The start of these data signal time windows respectively come a period td after the start of an announcement pulse.
- the signal level of the input signal Sin is converted into the pulses transferred during the data signal time window by virtue of transferring two pulses at successive times in the data signal time window for a first level, for example, an upper level, of the input signal Sin, while no pulses are generated and transferred during the time window for a second level, for example, a lower level, of the input signal Sin.
- the transfer of two successive pulses serves for redundancy and hence to increase the immunity to interference.
- the receiver circuit 20 contains a shift register.
- the content of this shift register is shown in FIG. 3A .
- This shift register has a logic one written to it whenever two pulses are detected during the data signal time window.
- there is a transfer error because only one pulse is being transferred instead of two pulses. This one pulse is not sufficient for a logic one to be written to the shift register. If no pulses are transferred during a data signal time window after an announcement pulse, a logic zero is written to the shift register.
- a parity signal announcement pulse to be transferred via the announcement channel and for the associated parity signal to be transferred via the data channel within a data signal time window lasting for the period tf.
- This method involves the stipulation that every nth pulse of the announcement signal 51 is an announcement pulse for a parity signal or that a parity signal is transferred during every nth data signal time window.
- every ninth announcement pulse is an announcement pulse for a parity signal.
- the receiver 20 In the case of the method shown in FIG. 3A , the receiver 20 generates an internal transfer signal after a period is after the parity signal announcement pulse.
- the internal transfer signal governs the reading of the shift register described above for the purpose of generating the output signal Sout, provided that the parity check performed on the basis of the parity signal delivers a correct result.
- FIG. 3B shows a modification of the method shown in FIG. 3A in which a third transfer channel is provided, which is shown in dashes in FIG. 1 and which likewise has a coupling element, preferably a magnetic coupling element, used to transfer a parity signal announcement pulse whenever the transfer of a data word has ended. Additionally, a parity signal is transferred via the data channel during a data signal time window lasting for the period tf after this parity signal announcement pulse.
- the provision of a separate channel for the parity signal announcement pulse reduces the systems susceptibility to interference and also makes the system more flexible for transferring data words of different length. Hence, a parity check is not performed until a parity signal announcement pulse is received on the further channel.
- the method shown in FIG. 3B also has provision for the further channel to be used to transfer a stop pulse which governs the generation of the internal transfer signal, which in turn governs the reading of the shift register to which the data from the data channel have previously been written.
- a pulse is transferred on the announcement channel, preferably simultaneously with the stop pulse.
- An internal transfer signal for reading the shift register and for outputting the output signal Sout is produced at the output of the receiver 20 only when the receiver receives the stop pulse and the pulse on the announcement channel.
- FIG. 4 illustrates an exemplary embodiment of a method for transferring the information contained in a control signal Sin.
- the control signal Sin is a binary signal which assumes an upper or a lower level. The respective level is present for a period which is normally much longer than the period for which a data signal time window lasts.
- the announcement channel For transferring such a signal, provision is made for the announcement channel to be used to transfer announcement pulses at regular intervals of time and to transfer at least one pulse containing information about the current signal level of the control signal Sin within data signal time windows, lasting for the period tf, the start of which respectively comes a period td after the start of an announcement pulse.
- a pulse is transferred within the time window tf when the input signal Sin assumes an upper signal level, and no pulse is transferred within the data signal time window when the input signal Sin assumes a lower signal level.
- the inventive method thus involves transferring pulses that indicate the current level of the input signal Sin at regular intervals of time.
- the result of this is a high level of immunity to interference, since even if interference arises during one or more data signal time windows, a correct pulse is transferred sooner or later.
- the input signal Sin changes from a lower level to an upper level at a time t 1 .
- the information about this level change is transferred with a time delay after a period tdp in the method.
- This period tdp results from the interval of time td between the announcement pulse and the data signal time window and from the interval of time between the level change in the input signal Sin and the announcement pulse.
- a delay tdn is produced when the signal level changes from an upper level to a lower level of the input signal Sin, which accordingly results from a delay time between the time t 2 at which the level change takes place and the time of the next announcement pulse and from the interval of time td between the announcement pulse and the data signal time window to which the information about the level change which has taken place is transferred.
- FIG. 5 illustrates a modification to the method for transferring a binary signal Sin which is explained with reference to FIG. 4 .
- This method involves first generating the announcement pulses cyclically, as can be seen, in particular, from the first time period, during which the signal assumes a high level.
- the announcement pulses are generated on an event-controlled basis when there is a level change in the input signal Sin, in order to reduce the delay time between the level change and the data signal's pulse which represents this level change as compared with the method in FIG. 4 . From the time profile for the announcement signal S 1 in FIG. 5 , it becomes clear that, besides the cyclically recurring announcement pulses, further announcement pulses are present whose appearance is dependent on a level change in the input signal Sin.
- the delay time which elapses during this method in line with FIG. 5 between a rising edge of the input signal Sin and the transmission of a useful pulse which represents this edge corresponds essentially to the period td, provided that the useful pulse is transferred immediately at the start of the data signal time window.
- This delay time arises when the signal level of the input signal changes from an upper signal level to a lower signal level.
- This information is transferred by not transferring a pulse during the data signal time window, which means that it is necessary to wait the length of this time window until the output signal Sout changes its level.
- announcement pulses S 1 announcing a data transfer and data pulses S 2 are transferred via physically separate channels TR 1 , TR 2 in order to increase immunity to interference. If a reduction in the immunity to interference is acceptable, then one modification to the method explained up to now has provision for the announcement pulses S 1 and the data pulses S 2 to be transferred via just one common channel 30 as depicted in FIG. 6 instead of via separate channels.
- the data pulses S 2 are each transferred within a data signal time window of prescribed length which comes after an announcement pulse S 1 in time, with, as in the case of the method explained previously, the receiver “accepting” only such data pulses that are transferred within the data signal time window after an announcement signal or announcement pulse.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Abstract
The invention relates to a digital signal transfer method and apparatus in which signals are transferred between first and second electrically isolated circuits. An announcement signal is transferred from the first circuit to the second circuit and a data signal is transferred from the first circuit to the second circuit within a data signal time window associated with the announcement signal.
Description
- This application is a continuation of U.S. application Ser. No. 12/570,082 filed on Sep. 30, 2009, which in turn is a divisional application of U.S. application Ser. No. 11/776,390 filed Jul. 11, 2007, which in turn is a continuation of U.S. application Ser. No. 10/666,221, filed Sep. 18, 2003, now abandoned. Each of the prior filed applications is hereby fully incorporated herein by reference.
- The present application claims priority to German patent application no. DE10243197.3, filed Sep. 18, 2002, the disclosure of which is hereby incorporated by reference.
- The present invention relates to a digital signal transfer method, particularly for transferring a digital signal via a potential barrier.
- The transfer of digital control signals and data signals via a potential barrier is frequently necessary in electrical installations in order to electrically isolate different circuits, for example, a circuit which produces a control signal and a circuit which processes the control signal, from one another. To reduce the number of coupling points between such circuits, which are to be electrically isolated, and data lines, serial transfer methods are frequently used. Thus, by way of example, microcontrollers (IC) use interfaces of the RS-485 type or use SPI (Serial Parallel Interface) interfaces to communicate with circuit components that are to be actuated. In this context, it is desirable to transfer data at a high transfer rate and to isolate potentials between the microcontroller and the circuits that are to be actuated. In addition, the transfer method needs to be highly immune to interference.
- For data transfer with electrical isolation between a transmitter circuit and a receiver circuit, it is known practice to use transformers, particularly planar transformers integrated on an IC, as described in Published German Patent Application 101 00 282 A1, for example, as data couplers. To transfer signals using such transformers, it is necessary to convert the signals into pulse trains that are suitable for transfer, and it is known practice, for example, to produce cyclic pulse trains from a binary control signal and to transfer them, as described in U.S. Pat. Nos. 4,027,152, 4,748,419, 5,952,849 and 6,262,600, for example.
- Planar transformers integrated in an integrated circuit, which are also called coreless transformers, are capable of transferring data at a speed of up to 1 Gbaud, where not just the high data transfer speed, but also the low power consumption with good immunity to interference make such transformers attractive as coupling modules in data transfer links.
- It is accordingly an object of the invention to provide a digital signal transfer method that overcomes the above-mentioned disadvantages of the prior art methods of this general type. In particular, it is an object of the invention to provide a fast and secure data transfer method, particularly a transfer method that is suitable for data transfer using integrated transformers as coupling modules.
- With the foregoing and other objects in view there is provided, in accordance with the invention, an embodiment of the inventive digital signal transfer method in which a first and a second transfer channel are provided. The first transfer channel is used as an “announcement channel” for data transfer and the second transfer channel is used as an actual data channel. To transfer a data signal, an announcement signal including at least one pulse is first transferred via the first transfer channel. The data signal is subsequently transferred via the second transfer channel within a data signal time window lasting for a prescribed period after the announcement signal.
- The inventive method involves the announcement signal and the data signal being transferred at different times via separate transfer channels, which ensures a very high level of immunity to interference. The likelihood of an interference signal which appears on the data channel being incorrectly identified as a useful signal is low in the case of the inventive method, because the receiver accepts only such signals that are received within the data signal time window after the announcement signal.
- Preferably, the transfer channels each include a magnetic coupling element, particularly a transformer integrated in an integrated circuit. The use of two transfer channels, with announcement signals being transferred on the first transfer channel and the data signal being transferred on the second transfer channel, at different times from one another, also reduces immunity to interference, when transformers are used as coupling elements, because electromagnetic interference appears in the two transformers in common mode, i.e., the interference brings about signals which occur simultaneously and whose signal profiles are the same. Such interference signals are easy to detect in a receiver circuit and are correspondingly easy to isolate from the useful signal.
- Preferably, the data signal time window within which data signals are transferred starts after a period which is greater than zero after the announcement signal. By way of example, the announcement signal includes just a single pulse, and the data signal time window does not start until after the end of this announcement pulse.
- In one embodiment of the invention, a further transfer channel is provided which is used to transfer control information. Such control information includes a parity check signal or a transfer check signal, for example. Preferably, the data signal is transferred within the respective data signal time window in coded form in order to increase redundancy and hence to increase immunity to interference further, and any coding methods which increase redundancy can be used for this. In the simplest case, a data pulse or a data pulse train is repeated within the data signal time window, that is to say is transferred a plurality of times at successive times.
- The inventive method is also suitable for transferring a binary signal that has a first or a second signal level. Such signal profiles, in which a signal assumes a first signal level or a second signal level over a comparatively long period, which is much longer than the data signal time window, are typical of control signals, for example turn-on and turn-off signals for loads, which need to be transferred in electrical installations with isolation of potentials. In one embodiment of the inventive method for transferring such control signals, provision is made for announcement pulses to be transferred at regular intervals of time and for respective pulse trains that represent the first or the second signal level to be transferred during the data signal time windows which follow the announcement signals. In the simplest case, a pulse is transferred during the data signal time window when the control signal assumes a first signal level, and no pulse is transferred when the control signal assumes a second signal level. The transfer, repeated at cyclic intervals of time, of pulse trains which represent the signal level of the control signal helps to increase immunity to interference during the transfer of such control signals, since even if interference arises during a data signal time window and makes data transfer impossible, the data signal is transferred during one of the subsequent data signal time windows, after the interference has declined.
- With the foregoing and other objects in view there is also provided, in accordance with the invention, a digital signal transfer method that includes providing a transfer channel. An announcement signal including at least one pulse is transmitted via the transfer channel. A data signal is also transmitted via the transfer channel within a data signal time window lasting for a prescribed period after the announcement signal.
- Other features which are considered as characteristic for the invention are set forth in the appended claims.
- Although the invention is illustrated and described herein as embodied in a digital signal transfer method, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
- The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.
-
FIG. 1 is a block diagram of a data transfer link having two transfer channels that each include a coupling element for isolating potentials in a transmitter circuit and a receiver circuit. -
FIG. 2 is a diagram showing exemplary signal profiles of signals on the first and second transfer channels. -
FIG. 3A is a diagram showing exemplary signal profiles of signals, on the first and second transfer channels and also time profiles for selected internal signals in a transmitter circuit and a receiver circuit, which occur in one embodiment of a transfer method. -
FIG. 3B is a diagram showing exemplary signal profiles of signals, on the first and second transfer channels and also on a third channel that is used as control information channel, which occur in a modification of the method. -
FIG. 4 is a diagram showing selected signal profiles for a method for transferring a binary control signal with regular announcement pulses. -
FIG. 5 is a diagram showing selected signal profiles for a method for transferring a binary control signal with event-controlled announcement pulses. -
FIG. 6 is a block diagram of a data transfer link having a single transfer channel that includes a coupling element for isolating potentials in a transmitter circuit and a receiver circuit. - Unless otherwise indicated, the same reference symbols denote the same circuit components and signals having the same meaning in the figures.
- Referring now to the figures of the drawing in detail and first, particularly, to
FIG. 1 thereof, there is schematically shown a data transfer link with atransmitter circuit 10, to which an input signal Sin is supplied, and areceiver circuit 20 which provides an output signal Sout which is dependent on the input signal Sin. The data transfer link also includes a first transfer channel with a coupling element TR1 and a second transfer channel with a second coupling element TR2. The coupling elements TR1, TR2 preferably each include an integrated transformer for isolating the potentials of thetransmitter circuit 10 and thereceiver circuit 20. - In the case of the transfer link shown, the first transfer channel is used as an announcement channel to transfer an announcement signal S1 when data transfer needs to take place. The second transfer channel is used as the actual data channel to transfer the actual data signal containing the useful information to the receiver. Both the announcement signal S1 and the data signal S2 are individual pulses or pulse trains that are generated by the
transmitter circuit 10. The length of the individual pulses is matched to the transfer properties of the coupling elements TR1, TR2 in order for these pulses to be transferred optimally on interference-free channels. As is sufficiently well known, each of the transformers TR1, TR2 includes a primary coil which is excited by the signal S1 or S2 generated by thetransmitter circuit 10. The magnetic coupling of the primary coil and the secondary coil mean that the transmitter-end pulse trains result in corresponding receiver-end pulse trains that are detected by thereceiver circuit 20. -
FIG. 2 fundamentally shows the signal profiles for the announcement signal S1 and the data signal S2 in the inventive method. The method provides for the first transfer channel, which serves as the announcement channel, to be used to transfer an announcement signal S1. The method also includes transferring a pulse or a pulse train for the data signal within a respective time window lasting for a prescribed period after a pulse or a pulse train for the announcement signal. In the example shown inFIG. 1 , the announcement signal transferred via the announcement channel is a respective individual announcement pulse. A period td after the start of the announcement pulse is followed by the start of a time window, lasting for a period tf, within which the data signal is transferred. The data signal includes just one data pulse per time window in the example shown inFIG. 2 . The period td after which the data signal time window starts is longer in this case than the pulse length of the announcement pulse, which means that the time window does not start until after the end of the announcement pulse, as a result of which the announcement pulses and the data pulses following the announcement pulses within the time windows are transferred at different times from one another, resulting in immunity to interference when using the method. - The data pulse train transferred during the data signal time window can contain the information that is to be transferred in virtually any manner. Thus, by way of example, just one pulse can be transferred during a data signal time window such that the information which is to be transferred is held in the period, for example, by which this pulse is additionally shifted with respect to the start of the data signal time window. In addition, a plurality of, for example n, pulses representing that single bits of a data word of a length of n bits to be transferred, can be transferred during a data signal time window.
- The transmitter and the receiver are synchronized in the inventive method by virtue of the shape of the announcement signal generated by the transmitter, the period for which the data signal time window lasts, and also because the interval of time between the announcement signal and the data signal time window is known at the receiver. Whenever an announcement signal is received, this results in the receiver taking the known information about the period for which the data signal time window lasts and the latter's distance from the announcement signal as a basis for producing a time window within which pulses which are received on the data channel at the receiver are accepted as a data signal.
- If the
transmitter circuit 10 contains a coder which codes the signal transferred within the data signal time windows, the receiver circuit contains a corresponding decoder which provides the output signal Sout from the signals received via the data channel within the data signal time windows. -
FIGS. 3A and 3B illustrate an exemplary embodiment of the inventive method, in which announcement pulses in the announcement signal S1 are generated cyclically in time with a clock signal Ts having a clock period tc. In time with this clock signal, an input signal Sin is also available which is shown by way of example as a binary signal whose level can change in time with the clock signal Ts. Such signals appear at the outputs of shift registers, for example. The information about the current level of the input signal Sin is transferred in data signal time windows of length tf. The start of these data signal time windows respectively come a period td after the start of an announcement pulse. The signal level of the input signal Sin is converted into the pulses transferred during the data signal time window by virtue of transferring two pulses at successive times in the data signal time window for a first level, for example, an upper level, of the input signal Sin, while no pulses are generated and transferred during the time window for a second level, for example, a lower level, of the input signal Sin. The transfer of two successive pulses serves for redundancy and hence to increase the immunity to interference. - The
receiver circuit 20 contains a shift register. The content of this shift register is shown inFIG. 3A . This shift register has a logic one written to it whenever two pulses are detected during the data signal time window. In the case of the fourth data signal time window shown inFIGS. 3A and 3B , there is a transfer error, because only one pulse is being transferred instead of two pulses. This one pulse is not sufficient for a logic one to be written to the shift register. If no pulses are transferred during a data signal time window after an announcement pulse, a logic zero is written to the shift register. - In the method shown in
FIG. 3A , provision is also made for a parity signal announcement pulse to be transferred via the announcement channel and for the associated parity signal to be transferred via the data channel within a data signal time window lasting for the period tf. This method involves the stipulation that every nth pulse of the announcement signal 51 is an announcement pulse for a parity signal or that a parity signal is transferred during every nth data signal time window. For the data transfer of 8-bit data words, every ninth announcement pulse is an announcement pulse for a parity signal. - In the case of the method shown in
FIG. 3A , thereceiver 20 generates an internal transfer signal after a period is after the parity signal announcement pulse. The internal transfer signal governs the reading of the shift register described above for the purpose of generating the output signal Sout, provided that the parity check performed on the basis of the parity signal delivers a correct result. -
FIG. 3B shows a modification of the method shown inFIG. 3A in which a third transfer channel is provided, which is shown in dashes inFIG. 1 and which likewise has a coupling element, preferably a magnetic coupling element, used to transfer a parity signal announcement pulse whenever the transfer of a data word has ended. Additionally, a parity signal is transferred via the data channel during a data signal time window lasting for the period tf after this parity signal announcement pulse. The provision of a separate channel for the parity signal announcement pulse reduces the systems susceptibility to interference and also makes the system more flexible for transferring data words of different length. Hence, a parity check is not performed until a parity signal announcement pulse is received on the further channel. - The method shown in
FIG. 3B also has provision for the further channel to be used to transfer a stop pulse which governs the generation of the internal transfer signal, which in turn governs the reading of the shift register to which the data from the data channel have previously been written. To increase immunity to interference, a pulse is transferred on the announcement channel, preferably simultaneously with the stop pulse. An internal transfer signal for reading the shift register and for outputting the output signal Sout is produced at the output of thereceiver 20 only when the receiver receives the stop pulse and the pulse on the announcement channel. -
FIG. 4 illustrates an exemplary embodiment of a method for transferring the information contained in a control signal Sin. The control signal Sin is a binary signal which assumes an upper or a lower level. The respective level is present for a period which is normally much longer than the period for which a data signal time window lasts. For transferring such a signal, provision is made for the announcement channel to be used to transfer announcement pulses at regular intervals of time and to transfer at least one pulse containing information about the current signal level of the control signal Sin within data signal time windows, lasting for the period tf, the start of which respectively comes a period td after the start of an announcement pulse. In the exemplary embodiment shown inFIG. 4 , a pulse is transferred within the time window tf when the input signal Sin assumes an upper signal level, and no pulse is transferred within the data signal time window when the input signal Sin assumes a lower signal level. - The inventive method thus involves transferring pulses that indicate the current level of the input signal Sin at regular intervals of time. The result of this is a high level of immunity to interference, since even if interference arises during one or more data signal time windows, a correct pulse is transferred sooner or later.
- In the signal profile shown in
FIG. 4 , the input signal Sin changes from a lower level to an upper level at a time t1. The information about this level change is transferred with a time delay after a period tdp in the method. This period tdp results from the interval of time td between the announcement pulse and the data signal time window and from the interval of time between the level change in the input signal Sin and the announcement pulse. Accordingly, a delay tdn is produced when the signal level changes from an upper level to a lower level of the input signal Sin, which accordingly results from a delay time between the time t2 at which the level change takes place and the time of the next announcement pulse and from the interval of time td between the announcement pulse and the data signal time window to which the information about the level change which has taken place is transferred. -
FIG. 5 illustrates a modification to the method for transferring a binary signal Sin which is explained with reference toFIG. 4 . This method involves first generating the announcement pulses cyclically, as can be seen, in particular, from the first time period, during which the signal assumes a high level. In addition, the announcement pulses are generated on an event-controlled basis when there is a level change in the input signal Sin, in order to reduce the delay time between the level change and the data signal's pulse which represents this level change as compared with the method inFIG. 4 . From the time profile for the announcement signal S1 inFIG. 5 , it becomes clear that, besides the cyclically recurring announcement pulses, further announcement pulses are present whose appearance is dependent on a level change in the input signal Sin. The delay time which elapses during this method in line withFIG. 5 between a rising edge of the input signal Sin and the transmission of a useful pulse which represents this edge corresponds essentially to the period td, provided that the useful pulse is transferred immediately at the start of the data signal time window. The maximum time delay between a level change in the input signal Sin and the output signal Sout is tdn=tp+tf, where tp is again the period between the start of an announcement pulse and a data signal time window, and tf is the length of the data signal time window. This delay time arises when the signal level of the input signal changes from an upper signal level to a lower signal level. This information is transferred by not transferring a pulse during the data signal time window, which means that it is necessary to wait the length of this time window until the output signal Sout changes its level. - In the method explained up to now, announcement pulses S1 announcing a data transfer and data pulses S2 are transferred via physically separate channels TR1, TR2 in order to increase immunity to interference. If a reduction in the immunity to interference is acceptable, then one modification to the method explained up to now has provision for the announcement pulses S1 and the data pulses S2 to be transferred via just one
common channel 30 as depicted inFIG. 6 instead of via separate channels. In this case, the data pulses S2 are each transferred within a data signal time window of prescribed length which comes after an announcement pulse S1 in time, with, as in the case of the method explained previously, the receiver “accepting” only such data pulses that are transferred within the data signal time window after an announcement signal or announcement pulse. - In the case of this modification of the method, just one transformer TR1 is required, which means that the chip area required for implementing the transfer link and the associated transmitter and receiver circuits is reduced by up to 50% as compared with the method with two transfer channels.
Claims (21)
1. A method for transferring at least a signal between isolated circuits, comprising:
transferring an announcement signal from a first circuit to a second circuit, the first and second circuits being electrically isolated from each other;
commencing a signal time window subsequent to the transferring of the announcement signal from the first circuit to the second circuit; and
transferring one of a pulse, a plurality of pulses or no pulse during the signal time window depending on a state of an input signal supplied to the first circuit.
2. The method of claim 1 , wherein the signal time window is for a prescribed period of time.
3. The method of claim 1 , wherein the signal time window commences after a prescribed time interval following receipt of the announcement signal by the second circuit.
4. The method of claim 1 , wherein the announcement signal is transferred over a first transfer channel associated with a planar transformer.
5. The method of claim 4 , wherein the act of transferring one of a pulse, a plurality of pulses or no pulse during the signal time window depending on a state of an input signal supplied to the first circuit is facilitated by a second transfer channel.
6. The method of claim 1 , wherein the act of transferring an announcement signal is repeated at regular intervals.
7. The method of claim 1 , wherein the act of transferring an announcement signal is repeated at irregular intervals.
8. The method of claim 1 , wherein the act of transferring one of a pulse, a plurality of pulses or no pulse during the signal time window comprises transferring a pulse or a plurality of pulses when the input signal is in a first state and transferring no pulse when the input signal is in a second state.
9. The method of claim 8 , wherein the first state is a high level of the input signal and the second state is a low level of the input signal.
10. The method of claim 1 , further comprising receiving the input signal at the first circuit.
11. An apparatus, comprising:
a first circuit configured to receive an input signal and transmit an announcement signal, the announcement signal to trigger a signal time window; and
a second circuit electrically isolated from the first circuit, the second circuit configured to receive the announcement signal, the second circuit further configured to receive one of a pulse, a plurality of pulses or no pulse during the signal time window depending on a state of the input signal.
12. The apparatus of claim 11 , wherein signal time window lasts for a prescribed period of time.
13. The apparatus of claim 11 , wherein the signal time window begins after a prescribed time interval following receipt of the announcement signal by the second circuit.
14. The apparatus of claim 11 , further comprising first and second transfer channels, the first transfer channel to communicate the announcement signal to the second circuit and the second transfer channel to communicate one or more pulses to the second circuit during the signal time window.
15. The apparatus of claim 14 , wherein each of the first and second transfer channels comprises a planar transformer.
16. The apparatus of claim 11 , wherein the first circuit comprises a coder configured to encode at least a portion of the input signal, and the second circuit comprises a decoder to decode signals encoded by the first circuit.
17. The apparatus of claim 11 , wherein the second circuit receives a pulse or a plurality of pulses when the input signal is in a first state and receives no pulse when the input signal is in a second state.
18. An apparatus, comprising:
a first circuit configured to receive an input signal and transmit an announcement signal, the announcement signal to trigger a signal time window; and
a second circuit electrically isolated from the first circuit by a transformer, the second circuit configured to receive the announcement signal, the second circuit further configured to receive one of a pulse, a plurality of pulses or no pulse during the signal time window depending on a state of the input signal, wherein at least no pulse is to be received at some point during a logic level low state of the input signal.
19. The apparatus of claim 18 , further comprising a first transfer link coupled to the first and second circuits, the first circuit is configured to transmit the announcement signal to the second circuit using the first transfer link.
20. The apparatus of claim 19 , further comprising a second transfer link coupled to the first and second circuits and the transformer, the second transfer link to carry data from the first circuit to the second circuit.
21. The apparatus of claim 18 , further comprising a transfer link coupled to the first and second circuits, the first circuit is configured to transmit the announcement signal and data to the second circuit using the first transfer link.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/434,735 US20120183024A1 (en) | 2002-09-18 | 2012-03-29 | Digital signal transfer method and apparatus |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10243197.3 | 2002-09-18 | ||
DE10243197A DE10243197B4 (en) | 2002-09-18 | 2002-09-18 | Digital signal transmission method |
US10/666,221 US20040101036A1 (en) | 2002-09-18 | 2003-09-18 | Digital signal transfer method |
US11/776,390 US10419251B2 (en) | 2002-09-18 | 2007-07-11 | Digital signal transfer using integrated transformers with electrical isolation |
US12/570,082 US8189693B2 (en) | 2002-09-18 | 2009-09-30 | Digital signal transfer method and apparatus |
US13/434,735 US20120183024A1 (en) | 2002-09-18 | 2012-03-29 | Digital signal transfer method and apparatus |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/570,082 Continuation US8189693B2 (en) | 2002-09-18 | 2009-09-30 | Digital signal transfer method and apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
US20120183024A1 true US20120183024A1 (en) | 2012-07-19 |
Family
ID=32009837
Family Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/666,221 Abandoned US20040101036A1 (en) | 2002-09-18 | 2003-09-18 | Digital signal transfer method |
US11/776,390 Expired - Fee Related US10419251B2 (en) | 2002-09-18 | 2007-07-11 | Digital signal transfer using integrated transformers with electrical isolation |
US12/570,082 Expired - Fee Related US8189693B2 (en) | 2002-09-18 | 2009-09-30 | Digital signal transfer method and apparatus |
US13/434,735 Abandoned US20120183024A1 (en) | 2002-09-18 | 2012-03-29 | Digital signal transfer method and apparatus |
Family Applications Before (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/666,221 Abandoned US20040101036A1 (en) | 2002-09-18 | 2003-09-18 | Digital signal transfer method |
US11/776,390 Expired - Fee Related US10419251B2 (en) | 2002-09-18 | 2007-07-11 | Digital signal transfer using integrated transformers with electrical isolation |
US12/570,082 Expired - Fee Related US8189693B2 (en) | 2002-09-18 | 2009-09-30 | Digital signal transfer method and apparatus |
Country Status (2)
Country | Link |
---|---|
US (4) | US20040101036A1 (en) |
DE (2) | DE10262239B4 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020176735A1 (en) * | 2019-02-28 | 2020-09-03 | Texas Instruments Incorporated | Architecture for resolution of data and refresh-path conflict for low-power digital isolator |
Families Citing this family (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10262239B4 (en) | 2002-09-18 | 2011-04-28 | Infineon Technologies Ag | Digital signal transmission method |
EP1618712A2 (en) | 2003-04-30 | 2006-01-25 | Analog Devices, Inc. | Signal isolators using micro-transformers |
US7719305B2 (en) * | 2006-07-06 | 2010-05-18 | Analog Devices, Inc. | Signal isolator using micro-transformers |
US9313052B2 (en) | 2008-01-31 | 2016-04-12 | Infineon Technologies Austria Ag | Method and apparatus for signal transmission |
DE102008055862A1 (en) | 2008-11-05 | 2010-05-06 | Tridonicatco Gmbh & Co. Kg | Bulb operating device with potential separation |
US8432182B2 (en) | 2009-03-30 | 2013-04-30 | Analog Devices, Inc. | USB isolator with advanced control features |
JP2010252020A (en) * | 2009-04-15 | 2010-11-04 | Renesas Electronics Corp | Optical reception circuit, and optical coupling type insulation circuit |
US8634480B2 (en) * | 2010-09-30 | 2014-01-21 | Infineon Technologies Austria Ag | Signal transmission arrangement with a transformer and signal transmission method |
US9293997B2 (en) | 2013-03-14 | 2016-03-22 | Analog Devices Global | Isolated error amplifier for isolated power supplies |
US20150351202A1 (en) * | 2014-05-29 | 2015-12-03 | Technical Consumer Products, Inc. | Master-slave control arrangement for a lighting fixture |
US10536309B2 (en) | 2014-09-15 | 2020-01-14 | Analog Devices, Inc. | Demodulation of on-off-key modulated signals in signal isolator systems |
US10270630B2 (en) * | 2014-09-15 | 2019-04-23 | Analog Devices, Inc. | Demodulation of on-off-key modulated signals in signal isolator systems |
US9660848B2 (en) | 2014-09-15 | 2017-05-23 | Analog Devices Global | Methods and structures to generate on/off keyed carrier signals for signal isolators |
US9998301B2 (en) | 2014-11-03 | 2018-06-12 | Analog Devices, Inc. | Signal isolator system with protection for common mode transients |
KR20170033722A (en) * | 2015-09-17 | 2017-03-27 | 삼성전자주식회사 | Apparatus and method for processing user's locution, and dialog management apparatus |
JP6741497B2 (en) * | 2016-07-01 | 2020-08-19 | ラピスセミコンダクタ株式会社 | Signal conversion device, processing device, communication system, and signal conversion method |
IT201600102282A1 (en) * | 2016-10-12 | 2018-04-12 | St Microelectronics Srl | PROCEDURE FOR TRANSFER SIGNALS ON TRANSFORMERS, CIRCUIT AND CORRESPONDING DEVICE |
RU2661278C1 (en) * | 2017-06-16 | 2018-07-13 | Открытое акционерное общество "Авангард" | Logic signals galvanic isolation device (embodiments) |
US10756715B2 (en) * | 2018-07-03 | 2020-08-25 | Rohm Co., Ltd. | Signal transfer device |
DE102020122783B3 (en) | 2020-09-01 | 2021-08-26 | Semikron Elektronik Gmbh & Co. Kg | Method for transmitting a switch-on signal and a switch-off signal from a primary side and to a secondary side of a driver for controlling a power semiconductor switch and driver |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2802202A (en) * | 1955-07-13 | 1957-08-06 | Sperry Rand Corp | Gating circuit |
US2937371A (en) * | 1955-07-26 | 1960-05-17 | Curtiss Wright Corp | Information transfer system |
US5602859A (en) * | 1994-12-19 | 1997-02-11 | Nec Corporation | Start-stop synchronous communicating method capable of correcting improper synchronization and system using the same |
US5652712A (en) * | 1992-09-11 | 1997-07-29 | Reltec Corporation | Method and apparatus for calibration of digital test equipment |
US20030189984A1 (en) * | 2000-07-25 | 2003-10-09 | Toyohiko Komatsu | Data transmission device, data transfer system and method |
Family Cites Families (161)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3058078A (en) | 1956-02-21 | 1962-10-09 | Siegfried R Hoh | Low capacitance transformer |
US3409889A (en) * | 1966-07-18 | 1968-11-05 | Control Data Corp | Synchronized communications system |
US3349328A (en) * | 1963-12-30 | 1967-10-24 | Ultronic Systems Corp | Digital communication system using half-cycle signals at bit transistions |
US3465101A (en) * | 1966-04-18 | 1969-09-02 | Collins Radio Co | High speed inter-computer communication using narrow bandwidth twisted pair cable |
US3537022A (en) | 1968-01-10 | 1970-10-27 | Hewlett Packard Co | Signal translating circuit |
US3525946A (en) * | 1968-06-19 | 1970-08-25 | Westel Co | Single delay line demodulator system for angle modulated signal |
US3573740A (en) * | 1968-07-03 | 1971-04-06 | Ncr Co | Communication multiplexer for online data transmission |
JPS5119739B1 (en) | 1970-11-06 | 1976-06-19 | ||
US3714540A (en) | 1970-11-10 | 1973-01-30 | Oxy Metal Finishing Corp | Isolation and transforming circuit |
US3808673A (en) | 1971-03-17 | 1974-05-07 | Monsanto Co | Opto-isolator devices and method for the fabrication thereof |
US3863244A (en) * | 1972-06-14 | 1975-01-28 | Lichtblau G J | Electronic security system having improved noise discrimination |
US3763472A (en) * | 1972-03-27 | 1973-10-02 | Burroughs Corp | Distributing and collecting memory array and transfer system |
US3798608A (en) | 1972-12-15 | 1974-03-19 | Johnson Service Co | Digital signal transmission apparatus |
DE2529296A1 (en) | 1975-07-01 | 1977-01-20 | Ferranti Ltd | Isolating transformer used as pulse transformer - is for use with high speed pulses and has two annular cores covered in windings |
US4040100A (en) * | 1975-09-25 | 1977-08-02 | Adams-Smith Incorporated | Digital video tape frame code readout system |
US4027152A (en) * | 1975-11-28 | 1977-05-31 | Hewlett-Packard Company | Apparatus and method for transmitting binary-coded information |
US4024452A (en) | 1976-03-10 | 1977-05-17 | Bell Telephone Laboratories, Incorporated | Integrated solid state isolator circuit |
DE2706935C2 (en) | 1977-02-18 | 1984-05-24 | Robert Bosch Gmbh, 7000 Stuttgart | Electronic switch with voltage-independent switch-off status |
US4118603A (en) | 1977-05-31 | 1978-10-03 | Noramco, Inc. | DC signaling circuit for use in conjunction with isolation transformers |
DE2821812C2 (en) | 1978-05-19 | 1984-01-12 | Brown, Boveri & Cie Ag, 6800 Mannheim | Circuit arrangement for isolated transmission of signals |
US4227045A (en) | 1978-06-28 | 1980-10-07 | Honeywell Inc. | Data processing protocol system |
US4275404A (en) | 1979-10-05 | 1981-06-23 | Bell Telephone Laboratories, Incorporated | Monolithic opto-isolator |
US4302807A (en) | 1980-08-04 | 1981-11-24 | Burroughs Corporation | Controlled current base drive circuit |
US4339823A (en) * | 1980-08-15 | 1982-07-13 | Motorola, Inc. | Phase corrected clock signal recovery circuit |
US4547961A (en) | 1980-11-14 | 1985-10-22 | Analog Devices, Incorporated | Method of manufacture of miniaturized transformer |
JPS5946148B2 (en) | 1981-02-10 | 1984-11-10 | 横河電機株式会社 | insulation device |
US4538136A (en) | 1981-03-30 | 1985-08-27 | Amtel Systems Corporation | Power line communication system utilizing a local oscillator |
DE3122457C2 (en) * | 1981-06-05 | 1983-07-07 | Siemens AG, 1000 Berlin und 8000 München | Method for regulating the reception level of messages transmitted by radio |
US4468787A (en) * | 1981-11-09 | 1984-08-28 | Lear Siegler, Inc. | Ternary data transmission system |
US4554462A (en) | 1982-03-16 | 1985-11-19 | Fanuc Limited | Non-polarized contactless relay |
JPS58215833A (en) | 1982-06-10 | 1983-12-15 | Yamatake Honeywell Co Ltd | Transmitter of magnetic signal |
US4818855A (en) | 1985-01-11 | 1989-04-04 | Indala Corporation | Identification system |
GB2173956B (en) | 1985-03-29 | 1989-01-05 | Plessey Co Plc | Improvements relating to electric transformers |
DE3512280A1 (en) | 1985-04-03 | 1986-10-09 | Nixdorf Computer Ag, 4790 Paderborn | CIRCUIT ARRANGEMENT FOR EARTH-FREE TRANSMISSION OF DIGITAL SIGNALS THROUGH DISCONNECTORS |
US4660014A (en) | 1985-06-19 | 1987-04-21 | Jaycor | Electromagnetic pulse isolation transformer |
US4703478A (en) * | 1985-08-02 | 1987-10-27 | Gte Laboratories Incorporated | Burst-switching method for an integrated communications system |
US4703283A (en) | 1986-02-24 | 1987-10-27 | Howard Samuels | Isolation amplifier with T-type modulator |
US4780795A (en) | 1986-04-28 | 1988-10-25 | Burr-Brown Corporation | Packages for hybrid integrated circuit high voltage isolation amplifiers and method of manufacture |
US4835486A (en) | 1986-04-28 | 1989-05-30 | Burr-Brown Corporation | Isolation amplifier with precise timing of signals coupled across isolation barrier |
US4748419A (en) * | 1986-04-28 | 1988-05-31 | Burr-Brown Corporation | Isolation amplifier with precise timing of signals coupled across isolation barrier |
US4785345A (en) | 1986-05-08 | 1988-11-15 | American Telephone And Telegraph Co., At&T Bell Labs. | Integrated transformer structure with primary winding in substrate |
NL8601572A (en) * | 1986-06-18 | 1988-01-18 | Philips Nv | TELECOMMUNICATIONS SYSTEM WITH A BUS CONDUCTOR AND TELECOMMUNICATIONS STATIONS CONNECTED BY TRANSFORMERS CONNECTED TO THAT BUS CONDUCTOR. |
US5025459A (en) * | 1986-07-23 | 1991-06-18 | Optical Communications Corp. | Optical communications transmitter and receiver |
US4772963A (en) * | 1986-10-23 | 1988-09-20 | Datatape Incorporated | Duplicate digital date recording apparatus for enhancing bit error rate performance of a data storage medium |
US4825450A (en) | 1987-03-12 | 1989-04-25 | The Boeing Company | Binary data communication system |
US4924210A (en) | 1987-03-17 | 1990-05-08 | Omron Tateisi Electronics Company | Method of controlling communication in an ID system |
DE3731020A1 (en) | 1987-09-11 | 1989-03-30 | Siemens Ag | CIRCUIT ARRANGEMENT FOR TRANSMITTING TRANSMITTER PULS BETWEEN TWO GALVANICALLY SEPARATED CIRCUITS |
US4885582A (en) | 1987-09-28 | 1989-12-05 | The Grass Valley Group, Inc. | "Simple code" encoder/decoder |
US4959631A (en) | 1987-09-29 | 1990-09-25 | Kabushiki Kaisha Toshiba | Planar inductor |
JPH01116281A (en) | 1987-10-29 | 1989-05-09 | Aisin Seiki Co Ltd | Ignition device |
US4859877A (en) | 1988-01-04 | 1989-08-22 | Gte Laboratories Incorporated | Bidirectional digital signal transmission system |
US4817865A (en) | 1988-03-17 | 1989-04-04 | Racal Data Communications Inc. | Ventilation system for modular electronic housing |
US5155735A (en) * | 1988-03-31 | 1992-10-13 | Wang Laboratories, Inc. | Parity checking apparatus with bus for connecting parity devices and non-parity devices |
AT391959B (en) | 1988-06-03 | 1990-12-27 | Dau Ges M B H & Co Kg | COUPLERS FOR THE POTENTIAL-SEPARATE TRANSMISSION OF A TWO-VALUE SIGNAL BY MEANS OF A PULSE TRANSFORMER |
JPH0297194A (en) * | 1988-06-17 | 1990-04-09 | Ixys Corp | Circuit separating high voltage electric source switch from low voltage controller |
US5041780A (en) | 1988-09-13 | 1991-08-20 | California Institute Of Technology | Integrable current sensors |
CA1331214C (en) | 1989-01-05 | 1994-08-02 | Kun-Ming Lee | Interfacing control circuit with active circuit charge or discharge |
US4937468A (en) | 1989-01-09 | 1990-06-26 | Sundstrand Corporation | Isolation circuit for pulse waveforms |
JPH0377360A (en) | 1989-08-18 | 1991-04-02 | Mitsubishi Electric Corp | Semiconductor device |
US5057968A (en) | 1989-10-16 | 1991-10-15 | Lockheed Corporation | Cooling system for electronic modules |
US5055722A (en) * | 1989-12-20 | 1991-10-08 | Sundstrand Corporation | Gate drive for insulated gate device |
US5396394A (en) | 1990-02-06 | 1995-03-07 | International Business Machines Corp. | ISDN device line protection circuit |
DD292573A5 (en) | 1990-03-07 | 1991-08-01 | �������@ ����@���� k�� | CIRCUIT ARRANGEMENT FOR THE POTENTIALLY TRANSMITTED TRANSMISSION OF PULSES OF ANY LENGTH AND FREQUENCY FOR CONTROLLING TRANSISTOR SWITCHES |
FR2662320B1 (en) | 1990-05-18 | 1994-05-13 | Cemagref | CONTACTLESS CONNECTION DEVICE FOR CONNECTING SERIES BUS LINES. |
DE4117878C2 (en) * | 1990-05-31 | 1996-09-26 | Toshiba Kawasaki Kk | Planar magnetic element |
JPH04172711A (en) | 1990-11-06 | 1992-06-19 | Mitsubishi Electric Corp | Semiconductor delay circuit |
US5128729A (en) | 1990-11-13 | 1992-07-07 | Motorola, Inc. | Complex opto-isolator with improved stand-off voltage stability |
GB2252208B (en) | 1991-01-24 | 1995-05-03 | Burr Brown Corp | Hybrid integrated circuit planar transformer |
US5102040A (en) | 1991-03-28 | 1992-04-07 | At&T Bell Laboratories | Method and apparatus for fan control to achieve enhanced cooling |
US5204551A (en) | 1991-07-01 | 1993-04-20 | Motorola, Inc. | Method and apparatus for high power pulse modulation |
US5418353A (en) * | 1991-07-23 | 1995-05-23 | Hitachi Maxell, Ltd. | Non-contact, electromagnetically coupled transmission and receiving system for IC cards |
FR2679670B1 (en) | 1991-07-23 | 1993-10-29 | Dan Serbanescu | CONTACTLESS BILATERAL COMMUNICATION SYSTEM FOR MICROPROCESSOR CREDIT CARDS. |
US5142432A (en) | 1991-10-21 | 1992-08-25 | General Motors Corporation | Fault detection apparatus for a transformer isolated transistor drive circuit for a power device |
JP3141562B2 (en) | 1992-05-27 | 2001-03-05 | 富士電機株式会社 | Thin film transformer device |
US5369666A (en) | 1992-06-09 | 1994-11-29 | Rockwell International Corporation | Modem with digital isolation |
US5270882A (en) | 1992-07-15 | 1993-12-14 | International Business Machines Corporation | Low-voltage, low-power amplifier for magnetoresistive sensor |
US5588021A (en) | 1992-09-25 | 1996-12-24 | Light & Sound Design Limited | Repeater for use in a control network |
US5444600A (en) | 1992-12-03 | 1995-08-22 | Linear Technology Corporation | Lead frame capacitor and capacitively-coupled isolator circuit using the same |
US5334882A (en) | 1992-12-14 | 1994-08-02 | National Semiconductor | Driver for backplane transceiver logic bus |
US5384808A (en) | 1992-12-31 | 1995-01-24 | Apple Computer, Inc. | Method and apparatus for transmitting NRZ data signals across an isolation barrier disposed in an interface between adjacent devices on a bus |
WO1994017558A1 (en) | 1993-01-29 | 1994-08-04 | The Regents Of The University Of California | Monolithic passive component |
US5469098A (en) | 1993-03-29 | 1995-11-21 | Exide Electronics Corporation | Isolated gate drive |
US5568516A (en) | 1993-07-02 | 1996-10-22 | Phonic Ear Incorporated | Very low power cordless headset system |
US5615229A (en) | 1993-07-02 | 1997-03-25 | Phonic Ear, Incorporated | Short range inductively coupled communication system employing time variant modulation |
US5533054A (en) | 1993-07-09 | 1996-07-02 | Technitrol, Inc. | Multi-level data transmitter |
US5499176A (en) | 1993-08-12 | 1996-03-12 | Toko America, Inc. | Pulse transformer circuit for isolating electrical signals |
EP0644679A3 (en) * | 1993-09-03 | 1997-12-03 | Fujitsu Limited | Remote supervisory system for network elements |
CN1048092C (en) * | 1993-12-10 | 2000-01-05 | 奥地利西门子公司 | Data medium for identifying objects and process for its control |
WO1995020768A1 (en) | 1994-01-31 | 1995-08-03 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Miniaturized planar-design coil assembly for the detection of ferromagnetic materials |
US5467607A (en) | 1994-02-22 | 1995-11-21 | At&T Corp. | Air conditioning control system |
JP3213156B2 (en) | 1994-03-15 | 2001-10-02 | 富士通株式会社 | Electronics |
CA2196601A1 (en) | 1994-08-03 | 1996-02-15 | Lewis Freeth Harpham | Electromagnetic interference isolator |
US5701037A (en) | 1994-11-15 | 1997-12-23 | Siemens Aktiengesellschaft | Arrangement for inductive signal transmission between the chip layers of a vertically integrated circuit |
US5539598A (en) | 1994-12-08 | 1996-07-23 | International Business Machines Corporation | Electrostatic protection for a shielded MR sensor |
JP3487461B2 (en) | 1994-12-17 | 2004-01-19 | ソニー株式会社 | Transformers and amplifiers |
US5596466A (en) | 1995-01-13 | 1997-01-21 | Ixys Corporation | Intelligent, isolated half-bridge power module |
US5716323A (en) | 1995-04-05 | 1998-02-10 | Karl Storz Imaging | Electrical isolation of endoscopic video camera |
JP3110653B2 (en) * | 1995-06-15 | 2000-11-20 | シャープ株式会社 | Signal transmission device |
US5786979A (en) | 1995-12-18 | 1998-07-28 | Douglass; Barry G. | High density inter-chip connections by electromagnetic coupling |
US5990753A (en) | 1996-01-29 | 1999-11-23 | Stmicroelectronics, Inc. | Precision oscillator circuit having a controllable duty cycle and related methods |
CN1183587C (en) | 1996-04-08 | 2005-01-05 | 德克萨斯仪器股份有限公司 | Method and apparatus for galvanically isolating two integrated circuits from each others |
US5801602A (en) | 1996-04-30 | 1998-09-01 | 3Com Corporation | Isolation and signal filter transformer |
US5877667A (en) | 1996-08-01 | 1999-03-02 | Advanced Micro Devices, Inc. | On-chip transformers |
US5831426A (en) | 1996-08-16 | 1998-11-03 | Nonvolatile Electronics, Incorporated | Magnetic current sensor |
US5731954A (en) | 1996-08-22 | 1998-03-24 | Cheon; Kioan | Cooling system for computer |
US5793272A (en) | 1996-08-23 | 1998-08-11 | International Business Machines Corporation | Integrated circuit toroidal inductor |
US5714938A (en) | 1996-11-19 | 1998-02-03 | Cae Electronics Ltd. | Temperature protection device for air cooled electronics housing |
DE19653522A1 (en) * | 1996-12-20 | 1998-06-25 | Bayerische Motoren Werke Ag | Method for the wireless transmission of energy and data |
US5781077A (en) | 1997-01-28 | 1998-07-14 | Burr-Brown Corporation | Reducing transformer interwinding capacitance |
US5952849A (en) | 1997-02-21 | 1999-09-14 | Analog Devices, Inc. | Logic isolator with high transient immunity |
US6385235B1 (en) | 1997-04-22 | 2002-05-07 | Silicon Laboratories, Inc. | Direct digital access arrangement circuitry and method for connecting to phone lines |
DE19718420A1 (en) | 1997-04-30 | 1998-11-12 | Siemens Ag | Integrated data transmission circuit with electrical isolation between input and output circuit |
US5969590A (en) | 1997-08-05 | 1999-10-19 | Applied Micro Circuits Corporation | Integrated circuit transformer with inductor-substrate isolation |
US5831525A (en) | 1997-09-18 | 1998-11-03 | Harvey; James C. | Filtered air, temperature controlled removable computer cartridge devices |
US6154498A (en) * | 1997-09-26 | 2000-11-28 | Intel Corporation | Computer system with a semi-differential bus signaling scheme |
US6188494B1 (en) | 1997-10-17 | 2001-02-13 | Schweitzer Engineering Laboratories, Inc. | Fiber-optic transceiver for long distance data communications |
US6054780A (en) | 1997-10-23 | 2000-04-25 | Analog Devices, Inc. | Magnetically coupled signal isolator using a Faraday shielded MR or GMR receiving element |
US6873065B2 (en) | 1997-10-23 | 2005-03-29 | Analog Devices, Inc. | Non-optical signal isolator |
US20030042571A1 (en) | 1997-10-23 | 2003-03-06 | Baoxing Chen | Chip-scale coils and isolators based thereon |
US5942937A (en) | 1997-11-19 | 1999-08-24 | Advanced Micro Devices, Inc. | Signal detection circuit using a plurality of delay stages with edge detection logic |
US5900683A (en) | 1997-12-23 | 1999-05-04 | Ford Global Technologies, Inc. | Isolated gate driver for power switching device and method for carrying out same |
EP0977406B1 (en) | 1998-07-17 | 2009-09-23 | Endress + Hauser Wetzer GmbH + Co. KG | Circuit for transmission of galvanically isolated digital signals |
US6853685B1 (en) | 1998-07-17 | 2005-02-08 | Stephan Konrad | Circuit arrangement for the electrically isolated transfer of digital signals |
US6069802A (en) | 1998-07-31 | 2000-05-30 | Priegnitz; Robert A. | Transformer isolated driver and isolated forward converter |
US6127663A (en) | 1998-10-09 | 2000-10-03 | Ericsson Inc. | Electronics cabinet cooling system |
US6087882A (en) | 1998-12-04 | 2000-07-11 | Analog Devices, Inc. | Ultra-low power magnetically coupled digital isolator using spin valve resistors |
DE19922127C2 (en) | 1999-05-12 | 2002-05-29 | Siemens Ag | Integrated circuit with an A / D or D / A converter with electrical isolation |
DE19922123A1 (en) | 1999-05-12 | 2000-11-23 | Siemens Ag | Bus interface implemented as integrated circuit |
DE19922129C1 (en) | 1999-05-12 | 2000-09-28 | Siemens Ag | Logical combination method for signals |
DE19922128C1 (en) | 1999-05-12 | 2001-01-25 | Siemens Ag | Integrated circuit for generating a drive signal for an isolated gate bipolar transistor (IGBT) |
US6097273A (en) | 1999-08-04 | 2000-08-01 | Lucent Technologies Inc. | Thin-film monolithic coupled spiral balun transformer |
US6728320B1 (en) | 1999-09-23 | 2004-04-27 | Texas Instruments Incorporated | Capacitive data and clock transmission between isolated ICs |
US6262616B1 (en) | 1999-10-08 | 2001-07-17 | Cirrus Logic, Inc. | Open loop supply independent digital/logic delay circuit |
US6501363B1 (en) | 1999-11-03 | 2002-12-31 | Innosys, Inc. | Vertical transformer |
GB2358303B (en) | 2000-01-14 | 2004-06-02 | Motorola Ltd | Interface circuit and method for digital signals |
US6262600B1 (en) | 2000-02-14 | 2001-07-17 | Analog Devices, Inc. | Isolator for transmitting logic signals across an isolation barrier |
DE10014269A1 (en) | 2000-03-22 | 2001-10-04 | Semikron Elektronik Gmbh | Semiconductor component for controlling power semiconductor switches |
DE10046806A1 (en) | 2000-09-21 | 2002-05-23 | Infineon Technologies Ag | Tri-state driver arrangement |
US6985510B2 (en) * | 2000-12-22 | 2006-01-10 | Qualcomm, Incorporated | Method and system for data and voice transmission over shared and dedicated channels |
DE10100282B4 (en) * | 2001-01-04 | 2005-10-13 | Infineon Technologies Ag | Electric transformer |
US6459352B1 (en) * | 2001-02-08 | 2002-10-01 | Skyworks Solutions, Inc. | On-chip transformers |
WO2002073914A1 (en) | 2001-03-13 | 2002-09-19 | The National University Of Singapore | Method and apparatus to recover data from pulses |
US8095007B2 (en) * | 2001-05-16 | 2012-01-10 | Tellabs Operations, Inc. | Optical add/drop multiplexer using integrated optical components |
US6686768B2 (en) | 2001-07-05 | 2004-02-03 | Alan Elbert Comer | Electrically-programmable interconnect architecture for easily-configurable stacked circuit arrangements |
US6911860B1 (en) | 2001-11-09 | 2005-06-28 | Altera Corporation | On/off reference voltage switch for multiple I/O standards |
DE10205705C1 (en) | 2002-02-12 | 2003-05-08 | Infineon Technologies Ag | Integratable circuit for floating signal transfer has selection circuit connected to secondary winding that separates secondary pulses in accordance with association with input signal edges |
US7042325B2 (en) * | 2002-05-31 | 2006-05-09 | International Rectifier Corporation | Planar transformer arrangement |
DE10228543A1 (en) | 2002-06-26 | 2005-11-03 | Infineon Technologies Ag | Bivalent signal transmitting method for e.g. power transistor driving circuit, involves releasing impulse sequence with impulses to channel after signal level change, where distance in each successive impulse varies randomly/pseudo-randomly |
DE10232642B4 (en) | 2002-07-18 | 2006-11-23 | Infineon Technologies Ag | Integrated transformer arrangement |
DE10262239B4 (en) | 2002-09-18 | 2011-04-28 | Infineon Technologies Ag | Digital signal transmission method |
EP1618712A2 (en) * | 2003-04-30 | 2006-01-25 | Analog Devices, Inc. | Signal isolators using micro-transformers |
US7064442B1 (en) * | 2003-07-02 | 2006-06-20 | Analog Devices, Inc. | Integrated circuit package device |
DE10335082B4 (en) | 2003-07-31 | 2014-12-11 | Infineon Technologies Ag | Data transmission system and method for data transmission |
EP2302062A1 (en) | 2003-10-20 | 2011-03-30 | CropDesign N.V. | Identification of E2F target genes and uses thereof |
US7302247B2 (en) | 2004-06-03 | 2007-11-27 | Silicon Laboratories Inc. | Spread spectrum isolator |
US7421028B2 (en) * | 2004-06-03 | 2008-09-02 | Silicon Laboratories Inc. | Transformer isolator for digital power supply |
US7376212B2 (en) | 2004-06-03 | 2008-05-20 | Silicon Laboratories Inc. | RF isolator with differential input/output |
DE102004036139B4 (en) | 2004-07-26 | 2008-09-04 | Infineon Technologies Ag | Component arrangement with a planar transformer |
US7489526B2 (en) | 2004-08-20 | 2009-02-10 | Analog Devices, Inc. | Power and information signal transfer using micro-transformers |
JP4747621B2 (en) * | 2005-03-18 | 2011-08-17 | 日本電気株式会社 | Memory interface control circuit |
DE102005047055A1 (en) | 2005-09-30 | 2007-04-05 | Infineon Technologies Austria Ag | Control switch for driving a semiconductor element used as a high-side switch comprises a transformer, a first driver switch, a second driver switch and a rectifier element arranged between supply inputs |
-
2002
- 2002-09-18 DE DE10262239A patent/DE10262239B4/en not_active Expired - Fee Related
- 2002-09-18 DE DE10243197A patent/DE10243197B4/en not_active Expired - Fee Related
-
2003
- 2003-09-18 US US10/666,221 patent/US20040101036A1/en not_active Abandoned
-
2007
- 2007-07-11 US US11/776,390 patent/US10419251B2/en not_active Expired - Fee Related
-
2009
- 2009-09-30 US US12/570,082 patent/US8189693B2/en not_active Expired - Fee Related
-
2012
- 2012-03-29 US US13/434,735 patent/US20120183024A1/en not_active Abandoned
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2802202A (en) * | 1955-07-13 | 1957-08-06 | Sperry Rand Corp | Gating circuit |
US2937371A (en) * | 1955-07-26 | 1960-05-17 | Curtiss Wright Corp | Information transfer system |
US5652712A (en) * | 1992-09-11 | 1997-07-29 | Reltec Corporation | Method and apparatus for calibration of digital test equipment |
US5602859A (en) * | 1994-12-19 | 1997-02-11 | Nec Corporation | Start-stop synchronous communicating method capable of correcting improper synchronization and system using the same |
US20030189984A1 (en) * | 2000-07-25 | 2003-10-09 | Toyohiko Komatsu | Data transmission device, data transfer system and method |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020176735A1 (en) * | 2019-02-28 | 2020-09-03 | Texas Instruments Incorporated | Architecture for resolution of data and refresh-path conflict for low-power digital isolator |
US10978135B2 (en) | 2019-02-28 | 2021-04-13 | Texas Instruments Incorporated | Architecture for resolution of data and refresh-path conflict for low-power digital isolator |
Also Published As
Publication number | Publication date |
---|---|
US10419251B2 (en) | 2019-09-17 |
US8189693B2 (en) | 2012-05-29 |
US20100014568A1 (en) | 2010-01-21 |
DE10243197B4 (en) | 2011-05-05 |
US20040101036A1 (en) | 2004-05-27 |
DE10243197A1 (en) | 2004-04-15 |
DE10262239B4 (en) | 2011-04-28 |
US20070258513A1 (en) | 2007-11-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8189693B2 (en) | Digital signal transfer method and apparatus | |
US8139653B2 (en) | Multi-channel galvanic isolator utilizing a single transmission channel | |
US10216690B2 (en) | Single-wire interface bus transceiver system based on I2C-bus, and associated method for communication of single-wire interface bus | |
US6275526B1 (en) | Serial data communication between integrated circuits | |
JPH0459819B2 (en) | ||
KR100791229B1 (en) | Low static powered delay insensitive data transfer apparatus | |
JPS60217734A (en) | Manchester decoder | |
EP0276445B1 (en) | Method and apparatus for detecting transient errors | |
US7180886B2 (en) | Synchronized data communication on a one-wired bus | |
GB2130458A (en) | Asynchronous data transmission | |
EP0066620B1 (en) | Circuit for clock recovery | |
JPS62200847A (en) | Serial transmission system | |
US4809301A (en) | Detection apparatus for bi-phase signals | |
US4255813A (en) | Dicode transmission system | |
SU1695353A1 (en) | Device for receiving excessive signals | |
CN114520655A (en) | Digital isolator and digital signal transmission method | |
CN114553209A (en) | Digital isolator and digital signal transmission method | |
SU1095437A2 (en) | Transmission control unit | |
KR100207482B1 (en) | Parity checking device for smart card | |
RU2282305C2 (en) | Code transformer | |
KR20240152220A (en) | Serial communication interface device | |
SK275392A3 (en) | Enabling code for radiotransmission of data | |
SU1241514A1 (en) | Device for transmission of telemetric and remote control signals | |
JPH11154941A (en) | Communication equipment, communication system and communication method | |
JPH05130046A (en) | Optical bus transmission system and transmitter side encoder and receiver side encoder executing it |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |