US20120074097A1 - Method for fabricating submicron patterned sapphire substrate - Google Patents

Method for fabricating submicron patterned sapphire substrate Download PDF

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US20120074097A1
US20120074097A1 US13/246,043 US201113246043A US2012074097A1 US 20120074097 A1 US20120074097 A1 US 20120074097A1 US 201113246043 A US201113246043 A US 201113246043A US 2012074097 A1 US2012074097 A1 US 2012074097A1
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sapphire substrate
submicron
photoresist layer
etching
stop layer
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Yeeu-Chang Lee
Hsien-Chih Hung
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Chung Yuan Christian University
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Chung Yuan Christian University
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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/40AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
    • C30B29/403AIII-nitrides
    • C30B29/406Gallium nitride
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/186Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/0242Crystalline insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02428Structure
    • H01L21/0243Surface structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02658Pretreatments

Definitions

  • the present invention is generally related to a method for fabricating a submicron patterned sapphire substrate, and more particularly to a method for fabricating a submicron patterned sapphire substrate applied in GaN light emitting diode.
  • LED Light emitting diode
  • LED is a kind of semiconductor devices, at the start LED is used generally for a light source of an indicator light or a display board. However, with the appearance of white light emitting diodes, LED is also used for the function of illuminating. Compared with traditional light source, LED with the advantages of high efficiency, long life and difficult damage, is considered the new light source in 21th century.
  • LED When exerted with a positive voltage, LED may emit a monochromatic light.
  • LED may emit near-ultraviolet, visible light or infrared light.
  • a patterned sapphire substrate is used as the LED substrate.
  • the dislocation density of gallium nitride (GaN) lattice in patterned sapphire substrate may be reduced by epitaxial lateral overgrowth (ELOG) to increase efficiency of combination of electric-hole to radiate lights, and further enhance the internal quantum efficiency.
  • ELOG epitaxial lateral overgrowth
  • the pattern on patterned sapphire substrate the light restricted within LED may be extracted with higher probability, so it can enhance the light extraction efficiency of LED.
  • the line width of the patterned sapphire substrate applied in GaN LED is in a few micron level.
  • submicron patterned sapphire substrate is applied in light emitting diodes.
  • the method of fabricating a submicron patterned sapphire substrate is to fabricate a photoresist layer having a submicron pattern on the substrate, and then etch the substrate through the photoresist to acquire the submicron patterned substrate.
  • physical vapor deposition (PVD) or chemical vapor deposition (CVD) can be used to fabricate a film as an etching mask layer.
  • the etching mask layer can increase the etching depth of a submicron patterned substrate, so the light has more contact area and then improve the light extraction efficiency.
  • the method for fabricating submicron patterned substrates can be three ways.
  • the first fabrication method is to lay the nano-spheres on the substrate with polystyrene to be as the etching mask layer.
  • the method was difficult to control on the uniformity, and the wafer will result in incomplete.
  • Another method is to use electron beam evaporation to form a nickel layer as etching mask layer on the substrate, and then to anneal the nickel to be in self-assembly.
  • this method is time-consuming and could not control the uniformity of the structure.
  • the step-exposure method used commonly in silicon semiconductor fabrication is also available to acquire the submicron patterned substrate.
  • the step-exposure method requires expensive equipment and facility.
  • the above-mentioned method for fabricating submicron patterns had the shortcomings of fabricating incomplete structures of the substrate, time-consuming or high-cost, so it is unfavorable to the fabrication of the submicron patterned sapphire substrate.
  • an objective of the present invention is to provide a method for fabricating a submicron patterned sapphire substrate, be simple and stable to fabricate a submicron pattern on a substrate to solve the above issue.
  • a method of the present invention for fabricating a submicron patterned sapphire substrate comprises the following steps: first, forming an etching stop layer on a sapphire substrate; after that, forming a photoresist layer on the etching stop layer; later, making a photo mask to contact with the photoresist layer; next, illuminating the photoresist layer with a beam of light through the photo mask, and developing the photoresist layer to transfer the submicron pattern from the photo mask to the photoresist layer; further, etching the etching stop layer by using the photoresist layer with the submicron pattern as a mask to form a first etching stop layer; finally, etching the sapphire substrate with the first etching stop layer to acquire the submicron patterned sapphire substrate.
  • the photo mask contact directly with the photoresist layer, and therefore light through the photo mask to be able to avoid the diffraction phenomenon leading to a larger scale of a structure and affected uniformity.
  • Another objective of the present invention is to provide a method for fabricating a submicron patterned sapphire substrate to solve the above mentioned issues.
  • the method of the present invention for fabricating a submicron patterned sapphire substrate comprises the following steps: fabricating a master mold, wherein the master mold having a submicron pattern; after that, pouring and filling a flexible material into the master mold to shape a sub-mold, and therefore the sub-mold having a counterpart pattern to the submicron pattern of the master mold; then, pouring and filling an imprinting material into the counterpart pattern of the sub-mold; next, imprinting a sapphire substrate with the sub-mold, and building the imprinting material with counterpart pattern of the sub-mold on the sapphire substrate to form a photoresist layer with the submicron pattern; finally, performing an etching process to the sapphire substrate by using said photoresist layer as a mask to acquire the submicron patterned sapphire substrate.
  • the submicron pattern on the photoresist layer is fabricated by using a mold with a submicron pattern, and therefore can avoid the diffraction phenomenon of photolithography technology of the prior art affecting the photoresist layer.
  • FIG. 1 is a step flow chart of a method for fabricating a submicron patterned sapphire substrate, according to a preferred embodiment of the present invention
  • FIG. 2A to FIG. 2G is schematic diagrams of each step of FIG. 1 ;
  • FIG. 3 is a detail step flow chart of the contact among a photo mask and a photoresist layer of FIG. 1 ;
  • FIG. 4A is a step flow chart of fabricating a submicron patterned sapphire substrate, according to another preferred embodiment of the present invention.
  • FIG. 4B is a schematic diagram of the step S 50 of FIG. 4A ;
  • FIG. 4C is a schematic diagram of a submicron patterned sapphire substrate fabricating by using the method of FIG. 4A ;
  • FIG. 5 is a step flow chart of method of fabricating a submicron patterned sapphire substrate, according to another preferred embodiment of the present invention.
  • FIG. 6A to FIG. 6G is schematic diagrams of each step of FIG. 5 ;
  • FIG. 7 is a step flow chart of a method for fabricating a submicron patterned sapphire substrate, according to another preferred embodiment of the present invention.
  • FIG. 8A to FIG. 8E is schematic diagrams of each step of FIG. 7 .
  • FIG. 1 is a step flow chart of a method for fabricating a submicron patterned sapphire substrate, and according to the present invention of a preferred embodiment, FIG. 2A to 2G is schematic diagrams of each step of FIG. 1 .
  • the method of the present preferred embodiment comprises steps S 10 to S 22 .
  • step S 10 a sapphire substrate 20 is provided as shown in FIG. 2A .
  • step S 12 an etching stop layer 32 is formed on the sapphire substrate 30 .
  • the material of etching stop layer 32 can be silicon oxide, silicon nitride or silicon oxy-nitride, formed by using conventional physical vapor deposition (PVD) or chemical vapor deposition (CVD), such as plasma enhanced chemical vapor deposition (PECVD) or high density plasma chemical vapor deposition (HDPCVD).
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • PECVD plasma enhanced chemical vapor deposition
  • HDPCVD high density plasma chemical vapor deposition
  • a photoresist layer 34 is formed on the etching stop layer 32 , as shown in FIG. 2C .
  • a photo mask M contacts with a photoresist layer 34 , as shown in FIG. 2D .
  • a beam of light illuminate photoresist layer 34 through the photo mask M and an exposure process is performed, as shown in FIG. 2D .
  • a development process is performed to the photoresist layer 34 to transfer the submicron pattern from the photo mask M to the photoresist layer 34 , as shown in FIG. 2E .
  • step S 20 an etching process is then performed to etching a stop layer 32 by using the photoresist layer 34 with a submicron pattern and then a first etching stop layer 320 is formed. Further, the photoresist layer 34 is removed, as shown in FIG. 2F ; later, in step S 22 , sapphire substrate 30 is then etched with first etching stop layer 320 by using a wet etching process to acquire a submicron patterned sapphire substrate 3 , as shown in FIG. 2G .
  • wet etching process phosphoric acid and nitric acid are mixed with a ratio from 1:3 to 1:5, wherein the etching temperature is between about 200 to 350° C.
  • the user or the designer can change the submicron pattern of the photo mask M to make the submicron pattern of submicron patterned sapphire substrate 3 be changed.
  • the etching stop layer 32 is grown on the sapphire substrate 30 by using physical vapor deposition (PVD) or chemical vapor deposition (CVD).
  • PVD physical vapor deposition
  • CVD chemical vapor deposition
  • the photoresist layer 34 is coated on the etching stop layer 32 by using spin coating process.
  • the thickness of photoresist layer 34 should be coated as thin as possible for ease of a submicron pattern formation; for example, the thickness of photoresist layer 34 can be between about 0.4 ⁇ m to 0.8 ⁇ m.
  • the photoresist layer 34 should be kept clean after coating step to avoid surface particles of photoresist layer 34 to form a gap therebetween, and then the particles may cause the diffraction phenomenon to affect the line width of submicron pattern, wherein the surface particles of photoresist layer 34 is resulted from the contact of the photo mask M and the photoresist layer 34 .
  • step S 16 first of all, the photo mask M contacts directly with the photoresist layer 34 , and then following photolithography processe is proceeded; hence there is no gap between photo mask M and photoresist layer 34 .
  • a beam of light such as 365 nm of ultraviolet light
  • the contact between photo mask M and photoresist layer 34 is hard contact, wherein the contact method can be referred to FIG. 3 .
  • FIG. 3 is a detail step flow chart of step S 16 in the method of FIG. 1 . As shown in FIG.
  • step S 16 further comprises step S 160 and step S 162 .
  • step S 160 the photoresist layer 34 is soft baked, and then in step S 162 , the photo mask M is pressed to make it closely contacts with the photoresist layer 34 .
  • the photoresist layer 34 can be in the best state of viscosity, and therefore, photoresist layer 34 can be mounted on the etching stop layer 32 . Thus it will not fall off.
  • viscosity of the photoresist layer 34 can make the photo mask M closely contact with the photoresist layer 34 and avoid the gap therebetween.
  • a portion of the photoresist layer 34 illuminated by a light beam is removable in the development process; that is, the fabricated photoresist layer 34 is positive.
  • the photoresist layer can also be negative. Whether the fabricated photoresist layer is positive or negative is determined by user's requirements or designer, and the present invention doesn't specify which one is preferred.
  • step S 20 an etching system is used and the developed photoresist layer 34 , with a submicron pattern, as a mask to etch the etching stop layer 32 , such that the etching stop layer 32 and photoresist layer 34 has the same submicron pattern.
  • This etching stop layer 32 with a submicron pattern is defined as the first etching stop layer 320 .
  • a stop structure 36 is used to be a stop layer and a wet etching process is performed to etch the sapphire substrate 30 to obtain a submicron patterned sapphire substrate 3 . Due to this wet etching process, the substrate is whole immersed in the etching solution for etching, and hence the etching of sapphire substrate with a certain degree of isotropy. In other words, according to the use of different etching solutions, different portions of the submicron patterned sapphire substrate 3 predetermining to be etched have etched pattern size greater than or equal to the size of submicron pattern on the first etching stop layer 320 .
  • the diffraction phenomenon can be avoided, and the size of submicron pattern on the first etching stop layer 320 can be controlled, wherein the size of pattern A on the submicron patterned sapphire substrate 3 can be indirectly controlled such that submicron level pattern can be achieved.
  • the intermediate between the two etched portions (pattern A) on the submicron patterned sapphire substrate 3 can also be considered as another submicron pattern B. Due to etching solution with various degrees of isotropy, the size of pattern B can also be easily achieved submicron level.
  • step S 22 the first etching stop layer 320 is further removed after the sapphire substrate 30 is etched to obtain a submicron patterned sapphire substrate 3 , and the submicron patterned sapphire substrate 3 fabricated by using this method of the present preferred embodiment can directly be applied to GaN LED.
  • the above mentioned preferred embodiment is to use wet etching method to etch sapphire substrate, and hence the submicron etching patterns have a certain degree of isotropy.
  • dry etching process for etching sapphire substrate can also be applied to this embodiment.
  • FIG. 4 is a step flow chart of fabricating a submicron patterned sapphire substrate 6 , according to another preferred embodiment of the present invention.
  • FIG. 4B is a schematic diagram of the step S 50 of FIG. 4A .
  • FIG. 4C is a schematic diagram of a submicron patterned sapphire substrate 6 fabricating by using the method of FIG. 4A .
  • step S 50 a photoresist layer 64 with a submicron pattern is used to etch the etching stop layer 62 , and both the photoresist layer 64 with a submicron pattern and the etching stop layer 62 are etched to form a stop structure 66 , as shown in FIG. 4B .
  • step S 52 dry etching process is used to etch sapphire substrate 60 with the stop structure 66 to obtain a submicron patterned sapphire substrate 6 as shown in FIG.
  • the dry etching process can be performed by using inductively coupled plasma (ICP) or reactive ion etching (RIE).
  • ICP inductively coupled plasma
  • RIE reactive ion etching
  • the method of present preferred embodiment is to fabricate a submicron patterned sapphire substrate 6 by using anisotropic dry etching process, and the cross-section profile can be referred to FIG. 4C .
  • dry etching process can be, but are not limited to, plasma etching.
  • the submicron pattern on the photo mask can be directly transferred to the photoresist layer and the etching stop layer, such that a stop structure with a submicron pattern can be formed. Due to the thickness of etching stop layer 62 plus the thickness of photoresist layer equal to the thickness of stop structure 66 , so it is able to perform an etching process and acquire a deeper depth of submicron patterned sapphire substrate 6 by using the stop structure 66 . In addition, due to the anisotropic etch of the dry etch and existence of the stop structure, a submicron pattern can be formed on the sapphire substrate.
  • the sub-micron pattern on the mask can be directly transferred to the photoresist layer and the etching stop layer to form an etching stop layer or a stop structure with a submicron pattern.
  • the etching stop layer or the stop structure with a submicron pattern it is able to easily fabricate a submicron patterned sapphire substrate by using dry etching or wet etching process due to thickness of stop structure includes etching stop layer with the photoresist layer.
  • the method of directly contacting with photoresist layer to the photo mask can avoid the diffraction phenomenon generated from lithography process to affect the line width of submicron pattern.
  • this method can be applied to formation of submicron pattern in lithography process, advantages of reduced fabrication cycle time, better structure uniformity, and lower cost can be achieved.
  • FIG. 5 is a process flow chart of a method for fabricating a submicron patterned sapphire substrate 8 , according to another preferred embodiment of the present invention.
  • FIG. 6A to FIG. 6G are schematic diagrams of each step in FIG. 5 .
  • a method of present preferred embodiment comprises step S 70 to step S 78 .
  • step S 70 a master mold 90 with submicron pattern 900 is fabricated, as shown in FIG. 6A .
  • a flexible material is poured and filled into the master mold 90 to shape a sub-mold 92 , in which the sub-mold 92 has a counterpart pattern 920 to the submicron pattern 900 of the master mold 90 , as shown in FIG. 6B and FIG. 6C .
  • imprinting material 84 is poured and filled into the counterpart pattern 920 of the sub-mold 92 , as shown in FIG. 6D .
  • step S 76 sapphire substrate 80 with sub-mold 92 is imprinted, and then the imprinting material 84 is provided on the sapphire substrate 80 to form a photoresist layer 82 , in which the photoresist layer 82 has the same submicron pattern 900 to the master mold 90 , as shown in FIG. 6E and FIG. 6F .
  • step S 78 an etching process is performed to the sapphire substrate 80 by using the photoresist layer 82 as a mask to obtain the submicron patterned sapphire substrate 8 , as shown in FIG. 6G .
  • the master mold 90 can be, but is not limited to, silicon-based material. Additionally, in practice, it is able to use the etching process, such as electron beam or exposure facility to form a submicron pattern 900 on the silicon master mold 90 .
  • the flexible material being used for forming the sub-mold 92 can be, but not limited to, polydimethylsiloxane (PDMS).
  • the imprinting material 84 pouring and filling into counterpart pattern 920 of sub-mold 92 is, but not limited to, Polymethylmethacrylate (PMMA).
  • the sapphire substrate 80 in the present preferred embodiment can be fabricated by using dry etching or wet etching process to obtain the submicron pattern sapphire substrate 8 , the difference between the two etching processes is that dry etching is anisotropic and wet etching is isotropic.
  • dry etching is anisotropic
  • wet etching is isotropic.
  • the submicron pattern is formed on the photoresist layer by using a mold, wherein the photoresist layer is provided on sapphire substrate by directly contact. Because the photoresist layer is not processed by using conventional lithography process, diffraction phenomena, which may affect formation of the submicron pattern, can be avoided. Meanwhile, the method of fabricating photoresist layer by using mold is easier, and it is able to avoid time-consuming or high cost shortcomings of prior art.
  • etching stop layer on a sapphire substrate, it is able to use the foregoing method to transfer the submicron pattern to the etching stop layer, and to use the etching stop layer with the submicron structure to perform an etching process to the sapphire substrate to obtain a submicron patterned sapphire substrate.
  • FIG. 7 is a process flow chart of a method for fabricating a submicron patterned sapphire substrate 8 , according to another preferred embodiment of the present invention
  • FIG. 8A to FIG. 8E are schematic diagrams of each step of FIG. 7 .
  • sapphire substrate 80 further comprises etching stop layer 800 .
  • the difference between the present preferred embodiment and the above mentioned preferred embodiment is the method of present preferred embodiment further comprises step S 760 , S 780 , S 782 and S 784 .
  • step S 760 sapphire substrate 80 is imprinted by using sub-mold 92 , and then imprinting material 84 is formed on the etching stop layer 800 of the sapphire substrate 80 ; similarly, the photoresist layer 82 has the same pattern compared to the submicron pattern of the master mold 90 , as shown in FIG. 8A and FIG. 8B .
  • step S 780 the etching stop layer 800 is etched by using the photoresist layer 82 with a submicron pattern to transfer the submicron pattern form photoresist layer 82 to the etching stop layer 800 , as shown in FIG. 8C .
  • step S 782 the photoresist layer 82 is removed, as shown in FIG. 8D .
  • step S 784 an etching process is performed to the sapphire substrate 80 by using etching stop layer 800 with the submicron structure to obtain the submicron patterned sapphire substrate 8 , as shown in FIG. 8E .
  • FIG. 8E Please note that due to the other steps of the method of present preferred embodiment and the corresponding steps of above mentioned preferred embodiment is the same, so this will not be described repeatedly again.
  • the photoresist layer 82 is removed and the sapphire substrate 80 is etched by using the etching stop layer 800 only.
  • the photoresist layer can also be kept and together with the etching stop layer to form a stop structure, and then the stop structure is used to perform an etching process to the sapphire substrate to obtain a submicron patterned sapphire substrate.
  • the method for fabricating a submicron patterned sapphire substrate in the present invention is to use a photo mask to contact directly with the photoresist layer on the sapphire substrate and perform a lithography process, so as to form a submicron structure on the photoresist layer, or to directly use a mold to fabricate a photoresist layer with submicron pattern and to imprint the photoresist layer on the sapphire substrate.
  • the present invention method is able to avoid the effect of diffraction phenomenon in the lithography process, and makes the photoresist layer have an accurate submicron pattern after developing.
  • the submicron patterned sapphire substrate can be obtained by etching the sapphire substrate with the accurate submicron pattern of photoresist layer.
  • the fabrication of present invention method is easier, so it is able to avoid time-consuming shortcoming and high cost of prior art.

Abstract

The present invention provides a method for fabricating a submicron patterned sapphire substrate to be able to apply in GaN light emitting diode. The method includes the following steps: forming an etching stop layer on a sapphire substrate; forming a photoresist layer on the etching stop layer; making a photo mask to contact with the photoresist layer; illuminating the photoresist layer with a beam of light by using the photo mask, and developing the photoresist layer to transfer a submicron pattern from the photo mask to the photoresist layer; etching the etching stop layer by using the photoresist layer with the submicron pattern as a mask to form a first etching stop layer; and etching the sapphire substrate with the first etching stop layer to acquire a submicron patterned sapphire substrate.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention is generally related to a method for fabricating a submicron patterned sapphire substrate, and more particularly to a method for fabricating a submicron patterned sapphire substrate applied in GaN light emitting diode.
  • 2. Description of the Prior Art
  • Light emitting diode (LED) is a kind of semiconductor devices, at the start LED is used generally for a light source of an indicator light or a display board. However, with the appearance of white light emitting diodes, LED is also used for the function of illuminating. Compared with traditional light source, LED with the advantages of high efficiency, long life and difficult damage, is considered the new light source in 21th century. When exerted with a positive voltage, LED may emit a monochromatic light. And in accordance with the chemical composition of semiconductor materials, LED may emit near-ultraviolet, visible light or infrared light.
  • However, the luminous efficiency of traditional LED is still inadequate. Therefore, in order to improve the internal quantum efficiency and the light extraction efficiency of a LED, a patterned sapphire substrate is used as the LED substrate. The dislocation density of gallium nitride (GaN) lattice in patterned sapphire substrate may be reduced by epitaxial lateral overgrowth (ELOG) to increase efficiency of combination of electric-hole to radiate lights, and further enhance the internal quantum efficiency. On the other hand, by the pattern on patterned sapphire substrate, the light restricted within LED may be extracted with higher probability, so it can enhance the light extraction efficiency of LED.
  • In the prior art, the line width of the patterned sapphire substrate applied in GaN LED is in a few micron level. In order to further enhance the luminous efficiency, submicron patterned sapphire substrate is applied in light emitting diodes. The method of fabricating a submicron patterned sapphire substrate is to fabricate a photoresist layer having a submicron pattern on the substrate, and then etch the substrate through the photoresist to acquire the submicron patterned substrate. In addition, before fabricating the photoresist, physical vapor deposition (PVD) or chemical vapor deposition (CVD) can be used to fabricate a film as an etching mask layer. The etching mask layer can increase the etching depth of a submicron patterned substrate, so the light has more contact area and then improve the light extraction efficiency.
  • In the prior art, the method for fabricating submicron patterned substrates can be three ways. The first fabrication method is to lay the nano-spheres on the substrate with polystyrene to be as the etching mask layer. However, the method was difficult to control on the uniformity, and the wafer will result in incomplete. Another method is to use electron beam evaporation to form a nickel layer as etching mask layer on the substrate, and then to anneal the nickel to be in self-assembly. However, this method is time-consuming and could not control the uniformity of the structure. Furthermore, the step-exposure method used commonly in silicon semiconductor fabrication is also available to acquire the submicron patterned substrate. However, the step-exposure method requires expensive equipment and facility.
  • The above-mentioned method for fabricating submicron patterns had the shortcomings of fabricating incomplete structures of the substrate, time-consuming or high-cost, so it is unfavorable to the fabrication of the submicron patterned sapphire substrate.
  • SUMMARY OF THE INVENTION
  • Hence, an objective of the present invention is to provide a method for fabricating a submicron patterned sapphire substrate, be simple and stable to fabricate a submicron pattern on a substrate to solve the above issue.
  • According to a preferred embodiment, a method of the present invention for fabricating a submicron patterned sapphire substrate comprises the following steps: first, forming an etching stop layer on a sapphire substrate; after that, forming a photoresist layer on the etching stop layer; later, making a photo mask to contact with the photoresist layer; next, illuminating the photoresist layer with a beam of light through the photo mask, and developing the photoresist layer to transfer the submicron pattern from the photo mask to the photoresist layer; further, etching the etching stop layer by using the photoresist layer with the submicron pattern as a mask to form a first etching stop layer; finally, etching the sapphire substrate with the first etching stop layer to acquire the submicron patterned sapphire substrate.
  • In the present preferred embodiment, the photo mask contact directly with the photoresist layer, and therefore light through the photo mask to be able to avoid the diffraction phenomenon leading to a larger scale of a structure and affected uniformity.
  • Another objective of the present invention is to provide a method for fabricating a submicron patterned sapphire substrate to solve the above mentioned issues.
  • According to a preferred embodiment, the method of the present invention for fabricating a submicron patterned sapphire substrate comprises the following steps: fabricating a master mold, wherein the master mold having a submicron pattern; after that, pouring and filling a flexible material into the master mold to shape a sub-mold, and therefore the sub-mold having a counterpart pattern to the submicron pattern of the master mold; then, pouring and filling an imprinting material into the counterpart pattern of the sub-mold; next, imprinting a sapphire substrate with the sub-mold, and building the imprinting material with counterpart pattern of the sub-mold on the sapphire substrate to form a photoresist layer with the submicron pattern; finally, performing an etching process to the sapphire substrate by using said photoresist layer as a mask to acquire the submicron patterned sapphire substrate.
  • In the present preferred embodiment, the submicron pattern on the photoresist layer is fabricated by using a mold with a submicron pattern, and therefore can avoid the diffraction phenomenon of photolithography technology of the prior art affecting the photoresist layer.
  • The advantages and spirit of the present invention can be further understood by means of following invention descriptions and corresponding figures.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a step flow chart of a method for fabricating a submicron patterned sapphire substrate, according to a preferred embodiment of the present invention;
  • FIG. 2A to FIG. 2G is schematic diagrams of each step of FIG. 1;
  • FIG. 3 is a detail step flow chart of the contact among a photo mask and a photoresist layer of FIG. 1;
  • FIG. 4A is a step flow chart of fabricating a submicron patterned sapphire substrate, according to another preferred embodiment of the present invention;
  • FIG. 4B is a schematic diagram of the step S50 of FIG. 4A;
  • FIG. 4C is a schematic diagram of a submicron patterned sapphire substrate fabricating by using the method of FIG. 4A;
  • FIG. 5 is a step flow chart of method of fabricating a submicron patterned sapphire substrate, according to another preferred embodiment of the present invention;
  • FIG. 6A to FIG. 6G is schematic diagrams of each step of FIG. 5;
  • FIG. 7 is a step flow chart of a method for fabricating a submicron patterned sapphire substrate, according to another preferred embodiment of the present invention; and
  • FIG. 8A to FIG. 8E is schematic diagrams of each step of FIG. 7.
  • DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Referring to FIG. 1, FIG. 2A to 2G, FIG. 1 is a step flow chart of a method for fabricating a submicron patterned sapphire substrate, and according to the present invention of a preferred embodiment, FIG. 2A to 2G is schematic diagrams of each step of FIG. 1.
  • As shown in FIG. 1, the method of the present preferred embodiment comprises steps S10 to S22. In step S10, a sapphire substrate 20 is provided as shown in FIG. 2A. Then, in step S12, an etching stop layer 32 is formed on the sapphire substrate 30. As shown in FIG. 2B, wherein the material of etching stop layer 32 can be silicon oxide, silicon nitride or silicon oxy-nitride, formed by using conventional physical vapor deposition (PVD) or chemical vapor deposition (CVD), such as plasma enhanced chemical vapor deposition (PECVD) or high density plasma chemical vapor deposition (HDPCVD). In step S14, a photoresist layer 34 is formed on the etching stop layer 32, as shown in FIG. 2C. In step S16, a photo mask M contacts with a photoresist layer 34, as shown in FIG. 2D. In step S18, a beam of light illuminate photoresist layer 34 through the photo mask M and an exposure process is performed, as shown in FIG. 2D. Then, a development process is performed to the photoresist layer 34 to transfer the submicron pattern from the photo mask M to the photoresist layer 34, as shown in FIG. 2E. In step S20, an etching process is then performed to etching a stop layer 32 by using the photoresist layer 34 with a submicron pattern and then a first etching stop layer 320 is formed. Further, the photoresist layer 34 is removed, as shown in FIG. 2F; later, in step S22, sapphire substrate 30 is then etched with first etching stop layer 320 by using a wet etching process to acquire a submicron patterned sapphire substrate 3, as shown in FIG. 2G. In the above mentioned wet etching process, phosphoric acid and nitric acid are mixed with a ratio from 1:3 to 1:5, wherein the etching temperature is between about 200 to 350° C. Please note that, in practice, the user or the designer can change the submicron pattern of the photo mask M to make the submicron pattern of submicron patterned sapphire substrate 3 be changed.
  • In a present preferred embodiment, the etching stop layer 32 is grown on the sapphire substrate 30 by using physical vapor deposition (PVD) or chemical vapor deposition (CVD). After that, the photoresist layer 34 is coated on the etching stop layer 32 by using spin coating process. Please note that, in practice, the thickness of photoresist layer 34 should be coated as thin as possible for ease of a submicron pattern formation; for example, the thickness of photoresist layer 34 can be between about 0.4 μm to 0.8 μm. Furthermore, the photoresist layer 34 should be kept clean after coating step to avoid surface particles of photoresist layer 34 to form a gap therebetween, and then the particles may cause the diffraction phenomenon to affect the line width of submicron pattern, wherein the surface particles of photoresist layer 34 is resulted from the contact of the photo mask M and the photoresist layer 34.
  • In step S16, first of all, the photo mask M contacts directly with the photoresist layer 34, and then following photolithography processe is proceeded; hence there is no gap between photo mask M and photoresist layer 34. When a beam of light (such as 365 nm of ultraviolet light) illuminate the photoresist layer 34 through the photo mask M, the diffraction phenomenon resulted from gaps to lead to a broader line width of submicron pattern can be avoided. The contact between photo mask M and photoresist layer 34 is hard contact, wherein the contact method can be referred to FIG. 3. FIG. 3 is a detail step flow chart of step S16 in the method of FIG. 1. As shown in FIG. 3, step S16 further comprises step S160 and step S162. In step S160, the photoresist layer 34 is soft baked, and then in step S162, the photo mask M is pressed to make it closely contacts with the photoresist layer 34.
  • Due to step of soft baking, the photoresist layer 34 can be in the best state of viscosity, and therefore, photoresist layer 34 can be mounted on the etching stop layer 32. Thus it will not fall off. In addition, when the photo mask M contacts with the photoresist layer 34, viscosity of the photoresist layer 34 can make the photo mask M closely contact with the photoresist layer 34 and avoid the gap therebetween.
  • In the present preferred embodiment, a portion of the photoresist layer 34 illuminated by a light beam is removable in the development process; that is, the fabricated photoresist layer 34 is positive. However, in practice, the photoresist layer can also be negative. Whether the fabricated photoresist layer is positive or negative is determined by user's requirements or designer, and the present invention doesn't specify which one is preferred.
  • In the above mentioned step S20, an etching system is used and the developed photoresist layer 34, with a submicron pattern, as a mask to etch the etching stop layer 32, such that the etching stop layer 32 and photoresist layer 34 has the same submicron pattern. This etching stop layer 32 with a submicron pattern is defined as the first etching stop layer 320.
  • Please referring to FIG. 2G, in step S22, a stop structure 36 is used to be a stop layer and a wet etching process is performed to etch the sapphire substrate 30 to obtain a submicron patterned sapphire substrate 3. Due to this wet etching process, the substrate is whole immersed in the etching solution for etching, and hence the etching of sapphire substrate with a certain degree of isotropy. In other words, according to the use of different etching solutions, different portions of the submicron patterned sapphire substrate 3 predetermining to be etched have etched pattern size greater than or equal to the size of submicron pattern on the first etching stop layer 320. However, by means of the hard contact between the photo mask M and the photoresist layer 34 in step S16, the diffraction phenomenon can be avoided, and the size of submicron pattern on the first etching stop layer 320 can be controlled, wherein the size of pattern A on the submicron patterned sapphire substrate 3 can be indirectly controlled such that submicron level pattern can be achieved. On the other hand, as shown in FIG. 2G, the intermediate between the two etched portions (pattern A) on the submicron patterned sapphire substrate 3 can also be considered as another submicron pattern B. Due to etching solution with various degrees of isotropy, the size of pattern B can also be easily achieved submicron level.
  • In addition, in a present preferred embodiment, in step S22 the first etching stop layer 320 is further removed after the sapphire substrate 30 is etched to obtain a submicron patterned sapphire substrate 3, and the submicron patterned sapphire substrate 3 fabricated by using this method of the present preferred embodiment can directly be applied to GaN LED.
  • The above mentioned preferred embodiment is to use wet etching method to etch sapphire substrate, and hence the submicron etching patterns have a certain degree of isotropy. However, dry etching process for etching sapphire substrate can also be applied to this embodiment.
  • Please refer to FIG. 4, FIG. 4B and FIG. 4C. FIG. 4 is a step flow chart of fabricating a submicron patterned sapphire substrate 6, according to another preferred embodiment of the present invention. FIG. 4B is a schematic diagram of the step S50 of FIG. 4A. FIG. 4C is a schematic diagram of a submicron patterned sapphire substrate 6 fabricating by using the method of FIG. 4A.
  • As shown in FIG. 4A, a method of a present preferred embodiment comprising step S50 and step S52 is different to the above mentioned preferred embodiment. In step S50, a photoresist layer 64 with a submicron pattern is used to etch the etching stop layer 62, and both the photoresist layer 64 with a submicron pattern and the etching stop layer 62 are etched to form a stop structure 66, as shown in FIG. 4B. In step S52, dry etching process is used to etch sapphire substrate 60 with the stop structure 66 to obtain a submicron patterned sapphire substrate 6 as shown in FIG. 4C, wherein the dry etching process can be performed by using inductively coupled plasma (ICP) or reactive ion etching (RIE). Please note that due to the other steps of this method of present preferred embodiment and the corresponding steps of above mentioned preferred embodiment is the same, so this method will not be recited repeatedly.
  • The method of present preferred embodiment is to fabricate a submicron patterned sapphire substrate 6 by using anisotropic dry etching process, and the cross-section profile can be referred to FIG. 4C. In practice, dry etching process can be, but are not limited to, plasma etching.
  • Similarly, in the present preferred embodiment, due to the photo mask is directly contacted with photoresist layer, the submicron pattern on the photo mask can be directly transferred to the photoresist layer and the etching stop layer, such that a stop structure with a submicron pattern can be formed. Due to the thickness of etching stop layer 62 plus the thickness of photoresist layer equal to the thickness of stop structure 66, so it is able to perform an etching process and acquire a deeper depth of submicron patterned sapphire substrate 6 by using the stop structure 66. In addition, due to the anisotropic etch of the dry etch and existence of the stop structure, a submicron pattern can be formed on the sapphire substrate.
  • In the above mentioned embodiment, because the photo mask directly contacts with the photoresist layer, the sub-micron pattern on the mask can be directly transferred to the photoresist layer and the etching stop layer to form an etching stop layer or a stop structure with a submicron pattern. By means of the etching stop layer or the stop structure with a submicron pattern, it is able to easily fabricate a submicron patterned sapphire substrate by using dry etching or wet etching process due to thickness of stop structure includes etching stop layer with the photoresist layer. Compared to prior arts, the method of directly contacting with photoresist layer to the photo mask can avoid the diffraction phenomenon generated from lithography process to affect the line width of submicron pattern. In addition, because this method can be applied to formation of submicron pattern in lithography process, advantages of reduced fabrication cycle time, better structure uniformity, and lower cost can be achieved.
  • Please referring to FIG. 5, FIG. 6A to FIG. 6G. FIG. 5 is a process flow chart of a method for fabricating a submicron patterned sapphire substrate 8, according to another preferred embodiment of the present invention. FIG. 6A to FIG. 6G are schematic diagrams of each step in FIG. 5.
  • As shown in FIG. 5, a method of present preferred embodiment comprises step S70 to step S78. In step S70, a master mold 90 with submicron pattern 900 is fabricated, as shown in FIG. 6A. After that, in step S72, a flexible material is poured and filled into the master mold 90 to shape a sub-mold 92, in which the sub-mold 92 has a counterpart pattern 920 to the submicron pattern 900 of the master mold 90, as shown in FIG. 6B and FIG. 6C. Later, in step S74, imprinting material 84 is poured and filled into the counterpart pattern 920 of the sub-mold 92, as shown in FIG. 6D. Next, in step S76, sapphire substrate 80 with sub-mold 92 is imprinted, and then the imprinting material 84 is provided on the sapphire substrate 80 to form a photoresist layer 82, in which the photoresist layer 82 has the same submicron pattern 900 to the master mold 90, as shown in FIG. 6E and FIG. 6F. Finally, in step S78, an etching process is performed to the sapphire substrate 80 by using the photoresist layer 82 as a mask to obtain the submicron patterned sapphire substrate 8, as shown in FIG. 6G.
  • In a present preferred embodiment, the master mold 90 can be, but is not limited to, silicon-based material. Additionally, in practice, it is able to use the etching process, such as electron beam or exposure facility to form a submicron pattern 900 on the silicon master mold 90. In the present preferred embodiment, the flexible material being used for forming the sub-mold 92 can be, but not limited to, polydimethylsiloxane (PDMS). In addition, in the present preferred embodiment, the imprinting material 84 pouring and filling into counterpart pattern 920 of sub-mold 92 is, but not limited to, Polymethylmethacrylate (PMMA). As shown in the above mentioned preferred embodiment, the sapphire substrate 80 in the present preferred embodiment can be fabricated by using dry etching or wet etching process to obtain the submicron pattern sapphire substrate 8, the difference between the two etching processes is that dry etching is anisotropic and wet etching is isotropic. In practice, choice of which etching process is determined by requirements of the user or designer, and is not limited by the present invention.
  • Therefore, by means of the method of the present preferred embodiment, the submicron pattern is formed on the photoresist layer by using a mold, wherein the photoresist layer is provided on sapphire substrate by directly contact. Because the photoresist layer is not processed by using conventional lithography process, diffraction phenomena, which may affect formation of the submicron pattern, can be avoided. Meanwhile, the method of fabricating photoresist layer by using mold is easier, and it is able to avoid time-consuming or high cost shortcomings of prior art.
  • If there is an etching stop layer on a sapphire substrate, it is able to use the foregoing method to transfer the submicron pattern to the etching stop layer, and to use the etching stop layer with the submicron structure to perform an etching process to the sapphire substrate to obtain a submicron patterned sapphire substrate.
  • Please referring to FIG. 7 and FIG. 8A to FIG. 8E. FIG. 7 is a process flow chart of a method for fabricating a submicron patterned sapphire substrate 8, according to another preferred embodiment of the present invention; FIG. 8A to FIG. 8E are schematic diagrams of each step of FIG. 7. Please note that, in a present preferred embodiment, sapphire substrate 80 further comprises etching stop layer 800.
  • As shown in FIG. 7, the difference between the present preferred embodiment and the above mentioned preferred embodiment is the method of present preferred embodiment further comprises step S760, S780, S782 and S784. In step S760, sapphire substrate 80 is imprinted by using sub-mold 92, and then imprinting material 84 is formed on the etching stop layer 800 of the sapphire substrate 80; similarly, the photoresist layer 82 has the same pattern compared to the submicron pattern of the master mold 90, as shown in FIG. 8A and FIG. 8B. In step S780, the etching stop layer 800 is etched by using the photoresist layer 82 with a submicron pattern to transfer the submicron pattern form photoresist layer 82 to the etching stop layer 800, as shown in FIG. 8C. In step S782, the photoresist layer 82 is removed, as shown in FIG. 8D. Finally, in step S784, an etching process is performed to the sapphire substrate 80 by using etching stop layer 800 with the submicron structure to obtain the submicron patterned sapphire substrate 8, as shown in FIG. 8E. Please note that due to the other steps of the method of present preferred embodiment and the corresponding steps of above mentioned preferred embodiment is the same, so this will not be described repeatedly again.
  • In the present preferred embodiment, after the submicron pattern is transferred from the photoresist layer 82 to the etching stop layer 800, the photoresist layer 82 is removed and the sapphire substrate 80 is etched by using the etching stop layer 800 only. However, in another preferred embodiment, the photoresist layer can also be kept and together with the etching stop layer to form a stop structure, and then the stop structure is used to perform an etching process to the sapphire substrate to obtain a submicron patterned sapphire substrate. Hence, after the submicron pattern is transferred from the photoresist layer to the etching stop layer, whether the photoresist layer should be kept or not is determined by requirements of the user or designer, and is not limited by the present invention.
  • In summary, the method for fabricating a submicron patterned sapphire substrate in the present invention is to use a photo mask to contact directly with the photoresist layer on the sapphire substrate and perform a lithography process, so as to form a submicron structure on the photoresist layer, or to directly use a mold to fabricate a photoresist layer with submicron pattern and to imprint the photoresist layer on the sapphire substrate. Compared to the prior art, the present invention method is able to avoid the effect of diffraction phenomenon in the lithography process, and makes the photoresist layer have an accurate submicron pattern after developing. By means of the present invention method, the submicron patterned sapphire substrate can be obtained by etching the sapphire substrate with the accurate submicron pattern of photoresist layer. In addition, the fabrication of present invention method is easier, so it is able to avoid time-consuming shortcoming and high cost of prior art.
  • By means of description of the above mentioned preferred embodiments, is hoping to more clearly describe the features and spirit of the present invention, and really not to use the above mentioned preferred embodiments to limit the scope of the invention. On the contrary, the purpose is hoping to cover all kinds of modifications and arrangements with equivalence within the scope of the claims of the present invention seeking to file. Hence, the scope of the claims of the present invention seeking to file should be based on the foregoing description to make the broadest interpretation to cover all possible modifications and arrangements with equivalence.

Claims (17)

1. A method for fabricating a submicron patterned sapphire substrate, the method comprises the following procedures:
forming an etching stop layer on a sapphire substrate;
forming a photoresist layer on the etching stop layer;
contacting the photoresist layer with a photo mask having the submicron pattern;
illuminating the photoresist layer with a beam of light through the photo mask, and developing the photoresist layer to transfer the submicron pattern from the photo mask to the photoresist layer;
etching the etching stop layer by using the photoresist layer with the submicron pattern as a mask to form a first etching stop layer; and
etching the sapphire substrate with the first etching stop layer to acquire the submicron patterned sapphire substrate.
2. The method according to claim 1, further comprising the following step:
contacting said photoresist layer with the photo mask after soft-baking the photoresist layer.
3. The method according to claim 1, wherein said beam of light is an ultraviolet light.
4. The method according to claim 1, further comprising the following step:
removing said photoresist layer after forming the first etching stop layer.
5. The method according to claim 4, further comprising the following step:
etching said sapphire substrate having the first etching stop layer by using a wet etching process.
6. The method according to claim 1, further comprising the following step:
a block structure is formed with said etching stop layer and said photoresist layer with the submicron structure, after forming said first etching stop layer.
7. The method according to claim 6, further comprising the following procedure:
etching said sapphire substrate having said block structure by using a dry etching process.
8. The method according to claim 1, wherein said etching stop layer is formed on said substrate with physical vapor deposition process.
9. The method according to claim 1, wherein said etching stop layer is formed on said substrate with chemical vapor deposition process.
10. The method according to claim 1, wherein said photoresist layer is formed on said etching stop layer with spin coating process.
11. A method of fabricating a submicron patterned sapphire substrate, the method comprising the following procedures:
fabricating a master mold, wherein the master mold having a submicron pattern;
pouring and filling a flexible material into said master mold to shape a sub-mold, the sub-mold having a counterpart pattern to said submicron pattern of the master mold;
pouring and filling an imprinting material into said counterpart pattern of said sub-mold;
imprinting a sapphire substrate with said sub-mold, and then building said imprinting material on said sapphire substrate to form a photoresist layer, said photoresist layer having said submicron pattern; and
performing an etching process to said sapphire substrate by using said photoresist layer as a mask to acquire said submicron patterned sapphire substrate.
12. The method according to claim 11, wherein said sapphire substrate further comprising an etching stop layer and said photoresist layer is set upon said etching stop layer, the method further comprising the following steps:
etching said etching stop layer by using said photoresist layer with said submicron pattern as a first mask to transfer said submicron pattern to said etching stop layer; and
performing said etching process to said sapphire substrate by using said etching stop layer with said submicron structure as a second mask to acquire said submicron patterned sapphire substrate.
13. The method according to claim 12, further comprising the following step:
removing said photoresist layer after transferring said submicron pattern to said etching stop layer.
14. The method according to claim 11, further comprising the following step:
performing a wet etching process to said sapphire substrate to acquire said submicron patterned sapphire substrate.
15. The method according to claim 11, further comprising the following step:
performing a dry etching process to said sapphire substrate to acquire said submicron patterned sapphire substrate.
16. The method according to claim 11, further comprising the following step:
using an electron beam lithography process to fabricate said master mold.
17. The method according to claim 11, further comprising the following step:
Using an exposure process and an etching process to fabricate said master mold.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120273821A1 (en) * 2011-04-27 2012-11-01 Sino-American Silicon Prodcuts Inc. Method for patterning an epitaxial substrate, a light emitting diode and a method for forming a light emitting diode
US20140312004A1 (en) * 2011-11-15 2014-10-23 El-Seed Corporation Etching method
US10151973B2 (en) * 2015-04-10 2018-12-11 Samsung Display Co., Ltd Imprint lithography method, method for manufacturing master template using the method and master template manufactured by the method

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050064346A1 (en) * 2003-09-19 2005-03-24 Matsushita Electric Industrial Co., Ltd. Method for forming resist pattern, method for manufacturing master information carrier, magnetic recording medium, and magnetic recording/reproducing apparatus, and magnetic recording/reproducing apparatus
US7309515B2 (en) * 2004-02-04 2007-12-18 Industrial Technology Research Institute Method for fabricating an imprint mold structure
US20080070413A1 (en) * 2006-09-18 2008-03-20 National Central University Fabrication methods of a patterned sapphire substrate and a light-emitting diode
US20080290064A1 (en) * 2007-05-25 2008-11-27 Ki-Jun Yun Method for forming sapphire micro-lens in led process
US20080303042A1 (en) * 2006-12-21 2008-12-11 Nichia Corporation Method for manufacturing substrate for semiconductor light emitting element and semiconductor light emitting element using the same
US20110168670A1 (en) * 2010-01-14 2011-07-14 Yew-Chung Sermon Wu Patterned Sapphire Substrate Manufacturing Method
US8263129B2 (en) * 2003-12-19 2012-09-11 The University Of North Carolina At Chapel Hill Methods for fabricating isolated micro-and nano-structures using soft or imprint lithography

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7455955B2 (en) * 2002-02-27 2008-11-25 Brewer Science Inc. Planarization method for multi-layer lithography processing
TW200741337A (en) * 2006-04-21 2007-11-01 Univ Nat Cheng Kung Method for imprinting 3-D circuit patterns on curved surface

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050064346A1 (en) * 2003-09-19 2005-03-24 Matsushita Electric Industrial Co., Ltd. Method for forming resist pattern, method for manufacturing master information carrier, magnetic recording medium, and magnetic recording/reproducing apparatus, and magnetic recording/reproducing apparatus
US8263129B2 (en) * 2003-12-19 2012-09-11 The University Of North Carolina At Chapel Hill Methods for fabricating isolated micro-and nano-structures using soft or imprint lithography
US7309515B2 (en) * 2004-02-04 2007-12-18 Industrial Technology Research Institute Method for fabricating an imprint mold structure
US20080070413A1 (en) * 2006-09-18 2008-03-20 National Central University Fabrication methods of a patterned sapphire substrate and a light-emitting diode
US20080303042A1 (en) * 2006-12-21 2008-12-11 Nichia Corporation Method for manufacturing substrate for semiconductor light emitting element and semiconductor light emitting element using the same
US20080290064A1 (en) * 2007-05-25 2008-11-27 Ki-Jun Yun Method for forming sapphire micro-lens in led process
US20110168670A1 (en) * 2010-01-14 2011-07-14 Yew-Chung Sermon Wu Patterned Sapphire Substrate Manufacturing Method

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
Cannistra et al., "Characterization of hybrid molding and lithography for SU-8 micro-optical components", 02/18/10, Journal of Micro/Nanolithography, Vol. 9, Issue 1 *
Guo ("Nanoimprint Lithography:Methods and Material Requirements", Adv. Matter. 2007, 19, 495-513). *
Huang et al. ("Reversal imprinting by transferring polymer from mold to substrate", J. Vac. Sci. Technol. B20(6), Nov/Dec 2002). *
Xia et al., Soft Lithography, Annual Review Material Science, 1998, 28, 153-184. *
Zhao et al., Fabrication of Three-Dimensional Micro-Structures- Microtransfer Molding, Advanced Materials, 1996, 8, No. 10., pg. 837-840. *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120273821A1 (en) * 2011-04-27 2012-11-01 Sino-American Silicon Prodcuts Inc. Method for patterning an epitaxial substrate, a light emitting diode and a method for forming a light emitting diode
US8742442B2 (en) * 2011-04-27 2014-06-03 Sino-American Silicon Products Inc. Method for patterning an epitaxial substrate, a light emitting diode and a method for forming a light emitting diode
US20140312004A1 (en) * 2011-11-15 2014-10-23 El-Seed Corporation Etching method
US9472736B2 (en) * 2011-11-15 2016-10-18 El-Seed Corporation Etching method
US10151973B2 (en) * 2015-04-10 2018-12-11 Samsung Display Co., Ltd Imprint lithography method, method for manufacturing master template using the method and master template manufactured by the method

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