US20110253435A1 - Multilayer three-dimensional circuit structure - Google Patents

Multilayer three-dimensional circuit structure Download PDF

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Publication number
US20110253435A1
US20110253435A1 US13/166,133 US201113166133A US2011253435A1 US 20110253435 A1 US20110253435 A1 US 20110253435A1 US 201113166133 A US201113166133 A US 201113166133A US 2011253435 A1 US2011253435 A1 US 2011253435A1
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United States
Prior art keywords
dimensional
circuit structure
structure
dimensional circuit
multilayer
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Abandoned
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US13/166,133
Inventor
Han-Pei Huang
Cheng-Hung Yu
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Unimicron Technology Corp
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Unimicron Technology Corp
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Priority to TW97139189 priority Critical
Priority to TW097139189A priority patent/TWI394506B/en
Priority to US12/333,014 priority patent/US7987589B2/en
Application filed by Unimicron Technology Corp filed Critical Unimicron Technology Corp
Priority to US13/166,133 priority patent/US20110253435A1/en
Publication of US20110253435A1 publication Critical patent/US20110253435A1/en
Application status is Abandoned legal-status Critical

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0284Details of three-dimensional rigid printed circuit boards
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B33ADDITIVE MANUFACTURING TECHNOLOGY
    • B33YADDITIVE MANUFACTURING, i.e. MANUFACTURING OF THREE-DIMENSIONAL [3-D] OBJECTS BY ADDITIVE DEPOSITION, ADDITIVE AGGLOMERATION OR ADDITIVE LAYERING, e.g. BY 3-D PRINTING, STEREOLITHOGRAPHY OR SELECTIVE LASER SINTERING
    • B33Y10/00Processes of additive manufacturing
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B33ADDITIVE MANUFACTURING TECHNOLOGY
    • B33YADDITIVE MANUFACTURING, i.e. MANUFACTURING OF THREE-DIMENSIONAL [3-D] OBJECTS BY ADDITIVE DEPOSITION, ADDITIVE AGGLOMERATION OR ADDITIVE LAYERING, e.g. BY 3-D PRINTING, STEREOLITHOGRAPHY OR SELECTIVE LASER SINTERING
    • B33Y80/00Products made by additive manufacturing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0236Plating catalyst as filler in insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09118Moulded substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0104Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/0108Male die used for patterning, punching or transferring
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0104Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/013Inkjet printing, e.g. for printing insulating material or resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/046Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • H05K3/182Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
    • H05K3/185Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method by making a catalytic pattern by photo-imaging
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128Assembling formed circuit to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Abstract

A multilayer three-dimensional circuit structure and a manufacturing method thereof are provided in the present invention. The manufacturing method includes following steps. First, a three-dimensional insulating structure is provided. A first three-dimensional circuit structure is then formed on a surface of the three-dimensional insulating structure. Next, an insulating layer covering the first three-dimensional circuit structure is formed. Thereafter, a second three-dimensional circuit structure is formed on the insulating layer. Subsequently, at least a conductive via penetrating the insulating layer is formed for electrically connecting the second three-dimensional circuit structure and the first three-dimensional circuit structure.

Description

    CROSS-REFERENCE TO RELATED APPLICATION
  • This application is a divisional application and claims the priority benefit of U.S. application Ser. No. 12/333,014, filed on Dec. 11, 2008, now allowed, which claims the priority benefit of Taiwan application serial no. 97139189, filed on Oct. 13, 2008. The entirety of each of the above-mentioned patent applications is hereby incorporated by reference herein and made a part of specification.
  • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to a three-dimensional circuit structure and a manufacturing method thereof. More particularly, the present invention relates to a multilayer three-dimensional circuit structure and a manufacturing method thereof.
  • 2. Description of Related Art
  • In recent years, with rapid progress of electronic technologies and advancement of high-tech electronic industry, human-oriented electronic products with superior performance have brought forth a new era and have been designed to cater to the trend of being light, thin, short, and small. Generally, according to the pertinent art, a circuit board for hosting and electrically connecting a plurality of electronic devices is disposed in a casing for protecting the circuit board and the electronic devices. Nonetheless, since shapes of the electronic devices are limited to be in conformity with a shape and a dimension of the circuit board, most of the electronic devices are two-dimensional rather than three-dimensional.
  • In order to directly form signal traces on the circuit board having a three-dimensional structure in replacement of the conventional circuit board, a molded interconnect device (MID) equipped with both electronic and mechanical functions in a three-dimensional structure was proposed, such that printed circuit boards are no longer required to be planar. By conducting the concept of MID, a three-dimensional circuit structure can be formed on a surface of a three-dimensional structure, so as to increase usable space within the casing and miniaturizing the electronic devices to a better degree.
  • FIG. 1 is a schematic cross-sectional view of a conventional three-dimensional circuit. Referring to FIG. 1, a conventional three-dimensional circuit 100 includes a three-dimensional structure 110 and a three-dimensional circuit structure 120 that is disposed on a surface 112 of the three-dimensional structure 110. However, the conventional three-dimensional circuit 100 merely has a single-layer three-dimensional circuit structure 120. Hence, a surface area of the three-dimensional structure 110 must be sufficient enough to accommodate all of the three-dimensional circuit structures 120. Namely, the three-dimensional structure 110 is unlikely to host all of the three-dimensional circuit structures 120, give that the surface area of the three-dimensional structure 110 is rather small.
  • SUMMARY OF THE INVENTION
  • The present invention is directed to a manufacturing method of a multilayer three-dimensional circuit. The manufacturing method can be applied to fabricate a three-dimensional circuit with a multilayer three-dimensional circuit structure.
  • The present invention is further directed to a multilayer three-dimensional circuit structure.
  • In the present invention, a manufacturing method of a multilayer three-dimensional circuit is described as follows. First, a three-dimensional insulating structure is provided. A first three-dimensional circuit structure is then formed on a surface of the three-dimensional insulating structure. Next, an insulating layer covering the first three-dimensional circuit structure is formed. After that, a second three-dimensional circuit structure is formed on the insulating layer. Subsequently, at least a conductive via penetrating the insulating layer is formed to electrically connect the second three-dimensional circuit structure and the first three-dimensional circuit structure.
  • In an embodiment of the present invention, a method of forming the three-dimensional insulating structure and the first three-dimensional circuit structure is described as follows. First, an injection molding process or an inkjet rapid prototyping process is performed to form the three-dimensional insulating structure having a three-dimensional surface. Next, a first metallized pattern is hot embossed or electroformed on the three-dimensional surface to form the first three-dimensional circuit structure.
  • In an embodiment of the present invention, a method of forming the insulating layer and the second three-dimensional circuit structure is described as follows. First, the insulating layer is formed by performing a two-shot molding process, an insert molding process, or an inkjet rapid prototyping process. The insulating layer covers the three-dimensional insulating structure and the first three-dimensional circuit structure. Next, a second metallized pattern is hot embossed or electroformed on the insulating layer to form the second three-dimensional circuit structure.
  • In an embodiment of the present invention, a method of forming the three-dimensional insulating structure and the first three-dimensional circuit structure is described as follows. First, an injection molding process or an inkjet rapid prototyping process is performed to form the three-dimensional insulating structure having a first three-dimensional surface. A material of the three-dimensional insulating structure includes an insulating material having a plurality of catalyst particles. The catalyst particles are suitable for being activated by laser. Next, a region of the first three-dimensional surface is activated by performing a laser process thereon, wherein the first three-dimensional circuit structure is to be formed on the region of the first three-dimensional surface. A surface metallization process is then performed to form the first three-dimensional circuit structure on the region of the first three-dimensional surface.
  • In an embodiment of the present invention, the surface metallization process includes a chemical deposition process.
  • In an embodiment of the present invention, the manufacturing method of the multilayer three-dimensional circuit further includes laminating the insulating layer onto the three-dimensional insulating structure after the insulating layer and the second three-dimensional circuit structure are formed, wherein the insulating layer has a second three-dimensional surface, and a shape of a second three-dimensional surface and a shape of the first three-dimensional surface are similar.
  • In an embodiment of the present invention, the manufacturing method of the multilayer three-dimensional circuit further includes forming an adhesion layer on the first three-dimensional surface before laminating the insulating layer onto the three-dimensional insulating structure. The adhesion layer covers the first three-dimensional circuit structure.
  • In an embodiment of the present invention, a method of forming the insulating layer and the second three-dimensional circuit structure is described as follows. First, an injection molding process or an inkjet rapid prototyping process is performed to form the insulating layer having a second three-dimensional surface and a third three-dimensional surface opposite thereto. A material of the insulating layer includes an insulating material having a plurality of catalyst particles. The catalyst particles are suitable for being activated by laser. Next, a region of the third three-dimensional surface is activated by performing a laser process thereon, wherein the second three-dimensional circuit structure is to be formed on the region of the third three-dimensional surface. A surface metallization process is then performed to form the second three-dimensional circuit structure on the region of the third three-dimensional surface.
  • In an embodiment of the present invention, the surface metallization process includes a chemical deposition process.
  • In an embodiment of the present invention, a method of forming the three-dimensional insulating structure and the first three-dimensional circuit structure is described as follows. First, an injection molding process or an inkjet rapid prototyping process is performed to form the three-dimensional insulating structure having a three-dimensional surface. Next, a first conductive layer is formed on the three-dimensional surface. A portion of the first conductive layer is then etched to form the first three-dimensional circuit structure.
  • In an embodiment of the present invention, a method of forming the insulating layer and the second three-dimensional circuit structure is described as follows. First, the three-dimensional surface is coated with an insulating material to form the insulating layer. Next, a second conductive layer is formed on the insulating layer. A portion of the second conductive layer is then etched to form the second three-dimensional circuit structure.
  • In an embodiment of the present invention, a material of the three-dimensional insulating structure and the insulating layer is an elastic material including engineering plastic, ceramics, or glass.
  • In an embodiment of the present invention, a material of the engineering plastic is selected from a group consisting of epoxy resin, modified epoxy resin, polyester, acrylate, fluoro-polymer, polyphenylene oxide (PPO), polyimide (PI), phenolicresin, polysulfone (PSF), silicone polymer, bismaleimide triazine modified epoxy (BT Resin), cyanate ester, polyethylene (PE), polycarbonate (PC), acrylonitrile-butadiene-styrene (ABS) copolymer, polyethylene terephthalate (PET), polybutylene terephthalate (PBT), liquid crystal polymer (LCP), polyamide 6 (PA 6), nylon, polyoxymethylene (POM), polyphenylene sulfide (PPS), and cyclic olefin copolymer (COC).
  • In an embodiment of the present invention, the elastic material further includes an insulating material having a plurality of catalyst particles. The catalyst particles are suitable for being activated by laser and are selected from a group consisting of metallic oxide particles, metallic nitride particles, metallic complex particles, metallic chelate particles, and metallic coordination compound particles.
  • In an embodiment of the present invention, a material of the catalyst particles is selected from a group consisting of manganese (Mn), chromium (Cr), palladium (Pd), copper (Cu), aluminum (Al), zinc (Zn), silver (Ag), gold (Au), nickel (Ni), cobalt (Co), rhodium (Rh), iridium (Ir), iron (Fe), molybdenum (Mo), wolfram (W), vanadium (V), tantalum (Ta), titanium (Ti), indium (In) and platinum (Pt).
  • The present invention further provides a multilayer three-dimensional circuit structure including a three-dimensional insulating structure, a first three-dimensional circuit structure, an insulating layer, a second three-dimensional circuit structure, and at least a conductive via. The three-dimensional insulating structure has at least a three-dimensional surface. The first three-dimensional circuit structure is disposed on the at least a three-dimensional surface. The insulating layer is disposed on the three-dimensional insulating structure and covers the first three-dimensional circuit structure. The second three-dimensional circuit structure is disposed on the insulating layer. The at least a conductive via penetrates the insulating layer and electrically connects the first three-dimensional circuit structure and the second three-dimensional circuit structure.
  • In an embodiment of the present invention, the three-dimensional insulating structure is an injection molding structure or an inkjet rapid prototyping structure.
  • In an embodiment of the present invention, the insulating layer has an injection molding structure, a coating structure, a two-shot molding structure, an insert molding structure, or an inkjet rapid prototyping structure.
  • In an embodiment of the present invention, the insulating layer has the injection molding structure, and the multilayer three-dimensional circuit structure further includes an adhesion layer that is interposed between the insulating layer and the three-dimensional insulating structure.
  • In an embodiment of the present invention, a material of the three-dimensional insulating structure and the insulating layer is an elastic material including engineering plastic, ceramics, or glass.
  • In an embodiment of the present invention, a material of the engineering plastic is selected from a group consisting of epoxy resin, modified epoxy resin, polyester, acrylate, fluoro-polymer, PPO, PI, phenolicresin, PSF, silicone polymer, BT Resin, cyanate ester, PE, PC, ABS copolymer, PET, PBT, LCP, PA 6, nylon, POM, PPS, and COC.
  • In an embodiment of the present invention, the elastic material further includes an insulating material having a plurality of catalyst particles. The catalyst particles are suitable for being activated by laser and are selected from a group consisting of metallic oxide particles, metallic nitride particles, metallic complex particles, metallic chelate particles, and metallic coordination compound particles.
  • In an embodiment of the present invention, a material of the catalyst particles is selected from a group consisting of manganese, chromium, palladium, copper, aluminum, zinc, silver, gold, nickel, cobalt, rhodium, iridium, iron, molybdenum, wolfram, vanadium, tantalum, titanium, indium, and platinum.
  • In light of the foregoing, the three-dimensional circuit having the multilayer three-dimensional circuit structure can be formed by applying the manufacturing method of the multilayer three-dimensional circuit in the present invention. Hence, in comparison with the pertinent art, the present invention can make use of the surface of the three-dimensional insulating structure in a more effective manner.
  • In order to make the above and other features and advantages of the present invention more comprehensible, several embodiments accompanied with figures are described in detail below.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • The accompanying drawings constituting a part of this specification are incorporated herein to provide a further understanding of the invention. Here, the drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
  • FIG. 1 is a schematic view of a conventional three-dimensional circuit.
  • FIG. 2 is a flowchart of fabricating a multilayer three-dimensional circuit according to an embodiment of the present invention.
  • FIGS. 3A to 3B are cross-sectional views illustrating a process of fabricating a multilayer three-dimensional circuit according to an embodiment of the present invention.
  • FIGS. 4A to 4C are cross-sectional views illustrating a process of fabricating a multilayer three-dimensional circuit according to another embodiment of the present invention.
  • FIGS. 5A to 5D are cross-sectional views illustrating a process of fabricating a multilayer three-dimensional circuit according to still another embodiment of the present invention.
  • DESCRIPTION OF EMBODIMENTS
  • FIG. 2 is a flowchart of fabricating a multilayer three-dimensional circuit according to an embodiment of the present invention. Referring to FIG. 2, in the present embodiment, a manufacturing method of a multilayer three-dimensional circuit includes following steps. First, in step S1, a three-dimensional insulating structure is provided. The three-dimensional insulating structure is formed by performing an injection molding process or an inkjet rapid prototyping process, for example.
  • A material of the three-dimensional insulating structure is, for example, an elastic material including engineering plastic, ceramics, or glass. A material of the engineering plastic is selected from a group consisting of epoxy resin, modified epoxy resin, polyester, acrylate, fluoro-polymer, PPO, PI, phenolicresin, PSF, silicone polymer, BT Resin, cyanate ester, PE, PC, ABS copolymer, PET, PBT, LCP, PA 6, nylon, POM, PPS, and COC. The elastic material can selectively be an insulating material having a plurality of catalyst particles. The catalyst particles are suitable for being activated by laser. By implementing a surface metallization process, a metal layer is formed on the catalyst particles that are activated by laser. The catalyst particles are selected from a group consisting of metallic oxide particles, metallic nitride particles, metallic complex particles, metallic chelate particles, and metallic coordination compound particles. In an alternative, a material of the catalyst particles is selected from a group consisting of manganese, chromium, palladium, copper, aluminum, zinc, silver, gold, nickel, cobalt, rhodium, iridium, iron, molybdenum, wolfram, vanadium, tantalum, titanium, indium, and platinum or the combination thereof. For example, the catalyst particles are cupric oxide particles, aluminum nitride particles, Cobalt Molybdenum Bimetallic Nitrides (Co2Mo3Nx) particles or palladium particles.
  • Next, in step S2, a first three-dimensional circuit structure is formed on a surface of the three-dimensional insulating structure. Note that the first three-dimensional circuit structure can be formed by performing a hot embossing process or an electroforming process on a surface of the three-dimensional insulating structure, given that the three-dimensional insulating structure is made of a normal elastic material.
  • When the three-dimensional insulating structure is made of an insulating material having a plurality of catalyst particles, the first three-dimensional circuit structure can be formed by first performing a laser process to activate a portion of the surface of the three-dimensional insulating structure. Next, a surface metallization process is performed on the portion of the surface of the three-dimensional insulating structure.
  • Afterwards, in step S3, an insulating layer covering the first three-dimensional circuit structure is formed. The insulating layer can be formed by implementing a two-shot molding process, an insert molding process, an injection molding process, a coating process, a spray coating process, an inkjet rapid prototyping process, or any other appropriate process. The inkjet rapid prototyping process is derived from “rapid prototyping” which refers to construction of physical objects using freeform fabrication in combination of computer aided design (CAD) and slicing operation. In particular, models designed by computers are sliced to take horizontal cross sections from the model, and physical models are then fabricated by means of the horizontal cross sections layer by layer. By contrast, when the inkjet rapid prototyping process is performed, physical models are built up by means of three-dimensional (3D) printers. The operating principle of the 3D printers is similar to that of inkjet printers, while the difference therebetween lies in that paper and ink used in the inkjet printers are respectively replaced with powder and adhesive in the 3D printers. The powder and adhesive arranged in a planar form are stacked to form physical three-dimensional objects. Here, the powder is composite powder made of materials including plaster, starch, and/or ABS plastic.
  • A process of fabricating the insulating layer by implementing the inkjet rapid prototyping process is described below. First, a three-dimensional CAD model of the insulating layer is illustrated by a 3D CAD system, and the illustrated 3D files are then inputted into a 3D printer. Next, a paint roller in the 3D printer transfers the composite powder from a material deposition region to a molding platform, and the composite powder is evenly spread over the molding platform. A molding nozzle then sprays adhesive onto the composite powder in the shape of a cross section of the CAD model. After that, the paint roller and the nozzle are moved back to the material deposition region, and the molding platform lowers one layer. The steps are repetitively performed to bond the cross sections layer by layer (i.e., the so-called “printing” process) until the model of the insulating layer is completely built. Moreover, after the fabrication of the insulating layer, a solidifying solution can be applied on the insulating layer or can be use to soak the insulating layer. The insulating layer is then solidified after 10˜15 minutes.
  • A material of the insulating layer can be an elastic material including engineering plastic, ceramics, or glass. A material of the engineering plastic is selected from a group consisting of epoxy resin, modified epoxy resin, polyester, acrylate, fluoro-polymer, PPO, PI, phenolicresin, PSF, silicone polymer, BT Resin, cyanate ester, PE, PC, ABS copolymer, PET, PBT, LCP, PA 6, nylon, POM, PPS, and COC. The elastic material can selectively be an insulating material having a plurality of catalyst particles. The catalyst particles are suitable for being activated by laser. The catalyst particles are selected from a group consisting of metallic oxide particles, metallic nitride particles, metallic complex particles, metallic chelate particles, and metallic coordination compound particles. In an alternative, a material of the catalyst particles is selected from a group consisting of manganese, chromium, palladium, copper, aluminum, zinc, silver, gold, nickel, cobalt, rhodium, iridium, iron, molybdenum, wolfram, vanadium, tantalum, titanium, indium, and platinum.
  • After that, in step S4, a second three-dimensional circuit structure is formed on the insulating layer. Similar to the method of forming the first three-dimensional circuit structure, a method of forming the second three-dimensional circuit structure can include performing a hot embossing process or an electroforming process on a surface of the insulating layer when the insulating layer is made of a normal elastic material.
  • When the insulating layer is made of an insulating material having a plurality of catalyst particles, the second three-dimensional circuit structure can be formed by first performing a laser process to activate a portion of the surface of the insulating layer. Next, a surface metallization process is performed on the portion of the surface of the insulating layer.
  • Subsequently, in step S5, at least a conductive via penetrating the insulating layer is formed to electrically connect the second three-dimensional circuit structure and the first three-dimensional circuit structure. Note that the conductive via can be formed by performing an electroforming process on an inner wall of a via hole of the insulating layer when the insulating layer is made of a normal elastic material.
  • When the insulating layer is made of an insulating material having a plurality of catalyst particles, the conductive via can be formed by first performing a laser process to activate the inner wall of the via hole of the insulating layer. Next, a surface metallization process is performed on the inner wall of the via hole of the insulating layer.
  • It should be mentioned that in steps S1˜S5 of the present embodiment, only the two-layer three-dimensional circuit structure is formed. However, according to other embodiments, after step S5 is performed, steps S3˜S5 can be repeated over and over, which is determined upon the required layer number of the three-dimensional circuit structure. As such, in other embodiments, the three-dimensional circuit structure can have more than two layers, such as three, four, or more than four. Note that materials and fabricating methods of the elements in each step of the present embodiment can be combined with other materials and fabricating methods of the elements in other steps.
  • In light of the foregoing, the three-dimensional circuit having the multilayer three-dimensional circuit structure can be formed by applying the manufacturing method of the multilayer three-dimensional circuit in the present embodiment. Hence, in comparison with the pertinent art, the present embodiment can make use of the surface of the three-dimensional insulating structure in a more effective manner.
  • To better understand the manufacturing method of the multilayer three-dimensional circuit in the present invention, three embodiments are provided hereinafter. However, note that the following three embodiments should not be construed as limitations to the manufacturing method of the multilayer three-dimensional circuit in the present invention.
  • FIGS. 3A to 3B are cross-sectional views illustrating a process of fabricating a multilayer three-dimensional circuit according to an embodiment of the present invention. First, referring to FIG. 3A, an injection molding process or an inkjet rapid prototyping process is performed on a three-dimensional insulating structure 310 having a three-dimensional surface 312. A material of the three-dimensional insulating structure 310 is, for example, an elastic material including engineering plastic, ceramics, or glass. A material of the engineering plastic is selected from a group consisting of epoxy resin, modified epoxy resin, polyester, acrylate, fluoro-polymer, PPO, PI, phenolicresin, PSF, silicone polymer, BT Resin, cyanate ester, PE, PC, ABS copolymer, PET, PBT, LCP, PA 6, nylon, POM, PPS, and COC.
  • In addition, the elastic material can selectively be an insulating material having a plurality of catalyst particles (not shown). The catalyst particles are suitable for being activated by laser. The catalyst particles can be selected from a group consisting of metallic oxide particles, metallic nitride particles, metallic complex particles, metallic chelate particles, and metallic coordination compound particles. In an alternative, a material of the catalyst particles is selected from a group consisting of manganese, chromium, palladium, copper, aluminum, zinc, silver, gold, nickel, cobalt, rhodium, iridium, iron, molybdenum, wolfram, vanadium, tantalum, titanium, indium, and platinum.
  • Next, a first metallized pattern is hot embossed or electroformed on the three-dimensional surface 312 to form the first three-dimensional circuit structure 320. When a material of the three-dimensional insulating structure 310 includes an insulating material having a plurality of catalyst particles, a method of forming the first three-dimensional circuit structure 320 is described as follows. First, a region of the three-dimensional surface 312 is activated by performing a laser process thereon, wherein the first three-dimensional circuit structure 320 is to be formed on the region of the three-dimensional surface 312. A surface metallization process is then performed on the region of the three-dimensional surface 312 to form the first three-dimensional circuit structure 320.
  • After that, referring to FIG. 3B, an insulating layer 330 covering the three-dimensional insulating structure 310 and the first three-dimensional circuit structure 320 is formed by implementing a two-shot molding process, a spray coating process, an inkjet rapid prototyping process, or an insert molding process. Thereafter, referring to FIG. 3B, a second metallized pattern is hot embossed or electroformed on the insulating layer 330 to form a second three-dimensional circuit structure 340. Subsequently, a plurality of conductive vias 350 penetrating the insulating layer 330 is formed to electrically connect the second three-dimensional circuit structure 340 and the first three-dimensional circuit structure 320.
  • The structure of the multilayer three-dimensional circuit depicted in FIG. 3B is detailed hereinafter.
  • As shown in FIG. 3B, a structure of the multilayer three-dimensional circuit 300 includes a three-dimensional insulating structure 310, a first three-dimensional circuit structure 320, an insulating layer 330, a second three-dimensional circuit structure 340, and a plurality of conductive vias 350.
  • The three-dimensional insulating structure 310 is, for example, an injection molding structure or an inkjet rapid prototyping structure. Besides, the three-dimensional insulating structure 310 has at least a three-dimensional surface 312, such as an arc-shaped surface, a surface having particles or protrusions, a surface having trenches, or other non-planar surfaces. In the present embodiment, a bonding portion can be formed on a non-planar surface for aligning or securing other bonding components according to demands on tightness between the bonding components and the three-dimensional surface 312. The first three-dimensional circuit structure 320 is disposed on the three-dimensional surface 312. The insulating layer 330 is disposed on the three-dimensional insulating structure 310 and covers the first three-dimensional circuit structure 320. Besides, the insulating layer 330 can have a two-shot molding structure, an inkjet prototyping structure, or an insert molding structure. The second three-dimensional circuit structure 340 is disposed on the insulating layer 330, and the conductive vias 350 penetrate the insulating layer 330 and electrically connect the first three-dimensional circuit structure 320 and the second three-dimensional circuit structure 340.
  • FIGS. 4A to 4C are cross-sectional views illustrating a process of fabricating a multilayer three-dimensional circuit according to another embodiment of the present invention. First, referring to FIG. 4A, an injection molding process or an inkjet rapid prototyping process is performed on a three-dimensional insulating structure 410 having a first three-dimensional surface 412, and a material of the three-dimensional insulating structure 410 includes an insulating material having a plurality of catalyst particles, for example. Next, a region of the first three-dimensional surface 412 is activated by performing a laser process thereon, wherein a first three-dimensional circuit structure 420 is to be formed on the region of the first three-dimensional surface 412. A surface metallization process is then performed on the region of the first three-dimensional surface 412 to form the first three-dimensional circuit structure 420. In the surface metallization process, for example, a chemical deposition process is performed on the region of the first three-dimensional surface 412. Alternatively, a chemical deposition process is performed, and an electroplating deposition process is subsequently carried out.
  • After that, as shown in FIG. 4B, an adhesion layer 430 is selectively formed on the first three-dimensional surface 412. The adhesion layer 430 covers the first three-dimensional circuit structure 420. An injection molding process or an inkjet rapid prototyping process is then performed to form the insulating layer 440 having a second three-dimensional surface 442 and a third three-dimensional surface 444 opposite thereto. A shape of the second three-dimensional surface 442 and a shape of the first three-dimensional surface 412 are similar. The insulating layer 440 can be made of an insulating material having a plurality of catalyst particles. Additionally, in other embodiments, the insulating layer 440 can also be directly formed by performing a two-shot molding process, an inkjet rapid prototyping process, or an insert molding process without the need of forming the adhesion layer 430.
  • Thereafter, as shown in FIG. 4C, the insulating layer 440 is laminated onto the adhesion layer 430, such that the insulating layer 440 is secured onto the first three-dimensional surface 412 by means of the adhesion layer 430. Next, a region of the third three-dimensional surface 444 is activated by performing a laser process thereon, wherein a second three-dimensional circuit structure 450 is to be formed on the region of the third three-dimensional surface 444. Subsequently, a plurality of conductive vias 460 penetrating the insulating layer 440 is formed to electrically connect the second three-dimensional circuit structure 450 and the first three-dimensional circuit structure 420.
  • A method of forming the conductive vias 460 is provided below. First, a plurality of via holes 446 penetrating the insulating layer 440 is formed. Inner walls of the via holes 446 are then activated by implementing a laser process thereon. Next, a surface metallization process is performed on the inner walls of the via holes 446. Besides, the conductive vias 460 can also be formed by performing an electroforming process on the inner walls of the via holes 446.
  • The structure of the multilayer three-dimensional circuit depicted in FIG. 4C is detailed hereinafter.
  • As shown in FIG. 4C, a structure of the multilayer three-dimensional circuit 400 includes a three-dimensional insulating structure 410, a first three-dimensional circuit structure 420, an adhesion layer 430, an insulating layer 440, a second three-dimensional circuit structure 450, and a plurality of conductive vias 460.
  • The three-dimensional insulating structure 410 is, for example, an injection molding structure or an inkjet rapid prototyping structure, for example. Besides, the three-dimensional insulating structure 410 has a first three-dimensional surface 412. The first three-dimensional circuit structure 420 is disposed on the first three-dimensional surface 412. In the present embodiment, the three-dimensional insulating structure 410 can be made of an insulating material having a plurality of catalyst particles. The first three-dimensional circuit structure 420 is a circuit structure formed by performing the surface metallization process on the laser-activated catalyst particles after the catalyst particles are activated by laser.
  • The insulating layer 440 is disposed on the three-dimensional insulating structure 410 and covers the first three-dimensional circuit structure 420. Besides, the insulating layer 440 can have an injection molding structure or an inkjet rapid prototyping structure. The adhesion layer 430 is interposed between the insulating layer 440 and the three-dimensional insulating structure 410, so as to bond the insulating layer 440 to the three-dimensional insulating structure 410. The second three-dimensional circuit structure 450 is disposed on the insulating layer 440, and the conductive vias 460 penetrate the insulating layer 440 and electrically connect the first three-dimensional circuit structure 420 and the second three-dimensional circuit structure 450.
  • According to the present embodiment, the insulating layer 440 can be made of an insulating material having a plurality of catalyst particles. The second three-dimensional circuit structure 450 is a circuit structure formed by performing the surface metallization process on the laser-activated catalyst particles after the catalyst particles are activated by laser.
  • FIGS. 5A to 5D are cross-sectional views illustrating a process of fabricating a multilayer three-dimensional circuit according to still another embodiment of the present invention.
  • First, referring to FIG. 5A, an injection molding process or an inkjet rapid prototyping process is performed on a three-dimensional insulating structure 510 having a three-dimensional surface 512. Next, a first conductive layer 520 a is formed on the three-dimensional surface 512.
  • Thereafter, as shown in FIG. 5B, a portion of the first conductive layer 520 a is etched to form the first three-dimensional circuit structure 520. Referring to FIG. 5C, the three-dimensional surface 512 is then coated with an insulating material, so as to form an insulating layer 530. Next, a second conductive layer 540 a is formed on the insulating layer 530.
  • Afterwards, as shown in FIG. 5D, a portion of the second conductive layer 540 a is etched to form the second three-dimensional circuit structure 540. Subsequently, a plurality of conductive vias 550 penetrating the insulating layer 530 is formed to electrically connect the second three-dimensional circuit structure 540 and the first three-dimensional circuit structure 520.
  • Moreover, referring to FIG. 5D, the structure of the multilayer three-dimensional circuit 500 of the present embodiment is similar to the structure of the multilayer three-dimensional circuit 300 depicted in FIG. 3B, whereas the difference therebetween lies in that the insulating layer 530 of the present embodiment has a coating structure.
  • To sum up, the three-dimensional circuit having the multilayer three-dimensional circuit structure can be formed by applying the manufacturing method of the multilayer three-dimensional circuit in the present invention. Hence, in comparison with the pertinent art, the present invention can make use of the surface of the three-dimensional insulating structure in a more effective manner.
  • It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.

Claims (16)

1. A multilayer three-dimensional circuit structure, comprising:
a three-dimensional insulating structure, comprising at least a first three-dimensional surface;
a first three-dimensional circuit structure, disposed on the first three-dimensional surface;
an insulating layer, disposed on the three-dimensional insulating structure and covering the first three-dimensional circuit structure;
a second three-dimensional circuit structure, disposed on the insulating layer; and
at least a conductive via penetrating the insulating layer and electrically connecting the first three-dimensional circuit structure and the second three-dimensional circuit structure.
2. The multilayer three-dimensional circuit structure as claimed in claim 1, wherein the three-dimensional insulating structure is an injection molding structure or an inkjet rapid prototyping structure.
3. The multilayer three-dimensional circuit structure as claimed in claim 1, wherein the insulating layer has an injection molding structure, an inkjet rapid prototyping structure, a coating structure, a two-shot molding structure, or an insert molding structure.
4. The multilayer three-dimensional circuit structure as claimed in claim 3, wherein the insulating layer has the injection molding structure, and the multilayer three-dimensional circuit structure further comprises:
an adhesion layer, interposed between the insulating layer and the three-dimensional insulating structure.
5. The multilayer three-dimensional circuit structure as claimed in claim 1, wherein a material of the three-dimensional insulating structure and the insulating layer is an elastic material comprising engineering plastic, ceramics, or glass.
6. The multilayer three-dimensional circuit structure as claimed in claim 5, wherein a material of the engineering plastic is selected from a group consisting of epoxy resin, modified epoxy resin, polyester, acrylate, fluoro-polymer, polyphenylene oxide, polyimide, phenolicresin, polysulfone, silicone polymer, bismaleimide triazine modified epoxy, cyanate ester, polyethylene, polycarbonate, acrylonitrile-butadiene-styrene copolymer, polyethylene terephthalate, polybutylene terephthalate, liquid crystal polymer, polyamide 6, nylon, polyoxymethylene, polyphenylene sulfide, and cyclic olefin copolymer.
7. The multilayer three-dimensional circuit structure as claimed in claim 6, wherein the elastic material further comprises an insulating material having a plurality of catalyst particles.
8. The multilayer three-dimensional circuit structure as claimed in claim 7, wherein the plurality of catalyst particles is selected from a group consisting of metallic oxide particles, metallic nitride particles, metallic complex particles, metallic chelate particles, and metallic coordination compound particles.
9. The multilayer three-dimensional circuit structure as claimed in claim 7, wherein a material of the plurality of catalyst particles is selected from a group consisting of manganese, chromium, palladium, copper, aluminum, zinc, silver, gold, nickel, cobalt, rhodium, iridium, iron, molybdenum, wolfram, vanadium, tantalum, titanium, indium, and platinum.
10. The multilayer three-dimensional circuit structure as claimed in claim 1, wherein the three-dimensional insulating structure has the first three-dimensional surface inside a cavity, a bottom portion and at least one bending portion which is connected to and protrudes from the bottom portion.
11. The multilayer three-dimensional circuit structure as claimed in claim 10, wherein the insulating layer has a second three-dimensional surface, and a shape of the second three-dimensional surface is similar to a shape of the first three-dimensional surface.
12. The multilayer three-dimensional circuit structure as claimed in claim 11, wherein the second three-dimensional circuit structure is disposed on a third three-dimensional surface of the insulating layer opposite to the second three-dimensional surface.
13. The multilayer three-dimensional circuit structure as claimed in claim 12, wherein a material of the insulating layer comprises an insulating material having a plurality of catalyst particles.
14. The multilayer three-dimensional circuit structure as claimed in claim 13, wherein the second three-dimensional circuit structure is disposed on a laser activated region of the third three-dimensional surface, and the catalyst particles in the laser activated region are exposed.
15. The multilayer three-dimensional circuit structure as claimed in claim 12, wherein a material of the three-dimensional insulating structure comprises an insulating material having a plurality of catalyst particles.
16. The multilayer three-dimensional circuit structure as claimed in claim 15, wherein the first three-dimensional circuit structure is disposed on a laser activated region of the first three-dimensional surface, and the catalyst particles in the laser activated region are exposed.
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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10039195B2 (en) 2014-10-23 2018-07-31 Facebook, Inc. Fabrication of intra-structure conductive traces and interconnects for three-dimensional manufactured structures
US10099429B2 (en) 2014-10-23 2018-10-16 Facebook, Inc. Methods for generating 3D printed substrates for electronics assembled in a modular fashion
DE102017123307A1 (en) * 2017-10-06 2019-04-11 At & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with at least one part formed as a three-dimensional printed structure

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI355220B (en) * 2008-07-14 2011-12-21 Unimicron Technology Corp Circuit board structure
US10157909B2 (en) 2009-10-12 2018-12-18 Monolithic 3D Inc. 3D semiconductor device and structure
US9577642B2 (en) * 2009-04-14 2017-02-21 Monolithic 3D Inc. Method to form a 3D semiconductor device
US10043781B2 (en) 2009-10-12 2018-08-07 Monolithic 3D Inc. 3D semiconductor device and structure
US10354995B2 (en) 2009-10-12 2019-07-16 Monolithic 3D Inc. Semiconductor memory device and structure
US10497713B2 (en) 2010-11-18 2019-12-03 Monolithic 3D Inc. 3D semiconductor memory device and structure
US10366970B2 (en) 2009-10-12 2019-07-30 Monolithic 3D Inc. 3D semiconductor device and structure
US10388863B2 (en) 2009-10-12 2019-08-20 Monolithic 3D Inc. 3D memory device and structure
US10388568B2 (en) 2011-06-28 2019-08-20 Monolithic 3D Inc. 3D semiconductor device and system
US10217667B2 (en) 2011-06-28 2019-02-26 Monolithic 3D Inc. 3D semiconductor device, fabrication method and system
US10290682B2 (en) 2010-10-11 2019-05-14 Monolithic 3D Inc. 3D IC semiconductor device and structure with stacked memory
EP2457719A1 (en) * 2010-11-24 2012-05-30 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Interconnect structure and method for producing same
US20120294032A1 (en) * 2011-05-18 2012-11-22 Kocam International Co., Ltd. Backlight Module with Three-Dimensional Circuit Structure
US10115663B2 (en) 2012-12-29 2018-10-30 Monolithic 3D Inc. 3D semiconductor device and structure
US8902663B1 (en) 2013-03-11 2014-12-02 Monolithic 3D Inc. Method of maintaining a memory state
US10325651B2 (en) 2013-03-11 2019-06-18 Monolithic 3D Inc. 3D semiconductor device with stacked memory
WO2014200595A2 (en) * 2013-03-15 2014-12-18 3D Systems, Inc. Direct writing for additive manufacturing systems
US10224279B2 (en) 2013-03-15 2019-03-05 Monolithic 3D Inc. Semiconductor device and structure
CN105230145B (en) * 2013-03-28 2019-03-08 安提特软件有限责任公司 Shield for electronic equipment
US9021414B1 (en) 2013-04-15 2015-04-28 Monolithic 3D Inc. Automation for monolithic 3D devices
CN103327741B (en) * 2013-07-04 2016-03-02 江俊逢 A kind of base plate for packaging based on 3D printing and manufacture method thereof
TWI561132B (en) 2013-11-01 2016-12-01 Ind Tech Res Inst Method for forming metal circuit, liquid trigger material for forming metal circuit and metal circuit structure
CN105027687B (en) * 2014-01-02 2017-03-08 皇家飞利浦有限公司 Method for manufacturing non-plane printed circuit board assembly
CN106164680B (en) 2014-04-04 2019-11-22 精炼金属股份有限公司 Contact spacing converter, electric detection means and the method for manufacturing contact spacing converter
CN104411122B (en) * 2014-05-31 2017-10-20 福州大学 A kind of 3D printing method of multi-layer flexible circuit board
US10297586B2 (en) 2015-03-09 2019-05-21 Monolithic 3D Inc. Methods for processing a 3D semiconductor device
CN104853528A (en) * 2015-04-13 2015-08-19 常熟康尼格科技有限公司 Method for packaging PCBA based on multidimensional printing
US10381328B2 (en) 2015-04-19 2019-08-13 Monolithic 3D Inc. Semiconductor device and structure
CN108401468A (en) 2015-09-21 2018-08-14 莫诺利特斯3D有限公司 3D semiconductor devices and structure
US10522225B1 (en) 2015-10-02 2019-12-31 Monolithic 3D Inc. Semiconductor device with non-volatile memory
US10418369B2 (en) 2015-10-24 2019-09-17 Monolithic 3D Inc. Multi-level semiconductor memory device and structure
EP3443294A4 (en) 2016-04-15 2019-12-11 Hewlett Packard Development Co 3-dimensional printed load cell parts
TWI649193B (en) * 2017-12-07 2019-02-01 財團法人工業技術研究院 And a method for manufacturing a ceramic element

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6100178A (en) * 1997-02-28 2000-08-08 Ford Motor Company Three-dimensional electronic circuit with multiple conductor layers and method for manufacturing same
US20020062987A1 (en) * 2000-11-27 2002-05-30 Yoshiyuki Uchinono Multilayer circuit board and method of manufacturing the same
US6495769B1 (en) * 1999-03-31 2002-12-17 Hitachi, Ltd. Wiring board and production method thereof, and semiconductor apparatus
US20040112634A1 (en) * 2001-03-02 2004-06-17 Hirokazu Tanaka Method for plating polymer molding material, circuit forming component and method for producing circuit forming component
US20050284655A1 (en) * 2004-06-29 2005-12-29 Phoenix Precision Technology Corporation Circuit board with asymmetrical structure and method for fabricating the same
US20090021136A1 (en) * 2005-05-31 2009-01-22 Coll Bernard F Emitting device having electron emitting nanostructures and method of operation

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2174789B (en) 1985-03-23 1988-09-01 Schlumberger Eletronics Improvements in weapon training systems
JP2747096B2 (en) * 1990-07-24 1998-05-06 北川工業株式会社 3D circuit board manufacturing method of
JPH06152098A (en) * 1992-11-13 1994-05-31 Fujitsu Ltd Three-dimensional printed wiring molded object and its manufacture
FR2711008B1 (en) 1993-10-08 1995-11-24 Framatome Sa Steam generator locking elements of the pivotal water street.
AU2631395A (en) 1994-06-13 1996-01-05 Takeshi Ikeda Tuned amplifier
US5989993A (en) * 1996-02-09 1999-11-23 Elke Zakel Method for galvanic forming of bonding pads
US6032357A (en) * 1998-06-16 2000-03-07 Lear Automotive Dearborn, Inc. Method of fabricating a printed circuit
JP4293178B2 (en) 2005-11-09 2009-07-08 パナソニック電工株式会社 Manufacturing method of three-dimensional circuit board
US7765691B2 (en) 2005-12-28 2010-08-03 Intel Corporation Method and apparatus for a printed circuit board using laser assisted metallization and patterning of a substrate
DE102006017630A1 (en) 2006-04-12 2007-10-18 Lpkf Laser & Electronics Ag Method for producing a printed conductor structure and a printed conductor structure produced in this way
EP2141212B1 (en) * 2007-04-27 2013-09-18 Asahi Glass Company, Limited Water-repellant/oil-repellant composition, method for production thereof, and article
US20090017309A1 (en) * 2007-07-09 2009-01-15 E. I. Du Pont De Nemours And Company Compositions and methods for creating electronic circuitry
US8620379B2 (en) * 2010-12-06 2013-12-31 Broadcom Corporation Windows portable devices interface for Bluetooth low energy devices

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6100178A (en) * 1997-02-28 2000-08-08 Ford Motor Company Three-dimensional electronic circuit with multiple conductor layers and method for manufacturing same
US6495769B1 (en) * 1999-03-31 2002-12-17 Hitachi, Ltd. Wiring board and production method thereof, and semiconductor apparatus
US20020062987A1 (en) * 2000-11-27 2002-05-30 Yoshiyuki Uchinono Multilayer circuit board and method of manufacturing the same
US20040112634A1 (en) * 2001-03-02 2004-06-17 Hirokazu Tanaka Method for plating polymer molding material, circuit forming component and method for producing circuit forming component
US20050284655A1 (en) * 2004-06-29 2005-12-29 Phoenix Precision Technology Corporation Circuit board with asymmetrical structure and method for fabricating the same
US20090021136A1 (en) * 2005-05-31 2009-01-22 Coll Bernard F Emitting device having electron emitting nanostructures and method of operation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10039195B2 (en) 2014-10-23 2018-07-31 Facebook, Inc. Fabrication of intra-structure conductive traces and interconnects for three-dimensional manufactured structures
US10099429B2 (en) 2014-10-23 2018-10-16 Facebook, Inc. Methods for generating 3D printed substrates for electronics assembled in a modular fashion
DE102017123307A1 (en) * 2017-10-06 2019-04-11 At & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with at least one part formed as a three-dimensional printed structure

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US20100089627A1 (en) 2010-04-15
US7987589B2 (en) 2011-08-02

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