US20110143541A1 - Apparatus and method of treating surface of semiconductor substrate - Google Patents

Apparatus and method of treating surface of semiconductor substrate Download PDF

Info

Publication number
US20110143541A1
US20110143541A1 US12/886,427 US88642710A US2011143541A1 US 20110143541 A1 US20110143541 A1 US 20110143541A1 US 88642710 A US88642710 A US 88642710A US 2011143541 A1 US2011143541 A1 US 2011143541A1
Authority
US
United States
Prior art keywords
semiconductor substrate
water repellent
protective film
water
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/886,427
Inventor
Yoshihiro Ogawa
Tatsuhiko Koide
Shinsuke Kimura
Hisashi Okuchi
Hiroshi Tomita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Assigned to KABUSHIKI KAISHA TOSHIBA reassignment KABUSHIKI KAISHA TOSHIBA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KIMURA, SHINSUKE, KOIDE, TATSUHIKO, OGAWA, YOSHIHIRO, OKUCHI, HISASHI, TOMITA, HIROSHI
Publication of US20110143541A1 publication Critical patent/US20110143541A1/en
Priority to US14/925,805 priority Critical patent/US9859111B2/en
Priority to US15/827,427 priority patent/US9991111B2/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02043Cleaning before device manufacture, i.e. Begin-Of-Line process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67028Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like

Definitions

  • FIG. 12B is a view showing a configuration in which the whole pattern is tilted.
  • the surface of the semiconductor substrate W is modified with the process chemical different from the cleaning chemical after the semiconductor substrate W is cleaned.
  • the modifying process does not have to be performed separately, if the cleaning chemical is also used to achieve the modifying effect, i.e., the cleaning chemical has an oxidation effect.
  • the cleaning process and the modifying process are separately performed, the modification is performed to the cleaned surface after the surface, which is to be cleaned, of the convex micropattern is cleaned. Therefore, the modifying effect can further be enhanced, compared to the case of using the chemical having the oxidation effect. Accordingly, it is desirable to separate the cleaning process and the modifying process.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, first to fourth supplying units, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, or acid water to the surface of the semiconductor substrate in order to rinse the semiconductor substrate. A removing unit removes the water repellent protective film with the convex pattern being left.

Description

    CROSS REFERENCE TO RELATED APPLICATION
  • This application is based upon and claims benefit of priority from the Japanese Patent Application No. 2009-281346, filed on Dec. 11, 2009, the entire contents of which are incorporated herein by reference.
  • FIELD
  • Embodiments described herein relate generally to an apparatus and a method of treating surface of a semiconductor substrate.
  • BACKGROUND
  • A manufacturing process of a semiconductor device includes various processes such as a lithography process, an etching process, and an ion implantation process. After each process is completed, and before the following process is started, a cleaning process and drying process for removing impurities and residues remaining on a surface of a wafer so as to clean the surface of the wafer are performed.
  • With microfabrication of a device, a problem of a resist pattern being collapsed due to a capillary action arises, when the resist pattern after the lithography process (exposure and development) is rinsed and dried. In order to solve this problem, there has been proposed a technique in which a surface of a resist pattern is made water repellant to reduce a capillary force acted between the resist pattern and a liquid developer as well as a rinsing pure water (e.g., JP-A 7-142349 (KOKAI)). According to this method, an organic substance is deposited on the surface of the resist pattern. However, this organic substance is removed in the etching process after the lithography process together with the resist pattern.
  • For example, in the wafer cleaning process after the lithography process, chemical used for the cleaning process of the surface of the wafer is supplied, and then, pure water is supplied to perform a rinsing process. After the rinsing process, the drying process is performed in which the pure water remaining on the surface of the wafer is removed to dry the same.
  • As the drying process, a spin drying is performed, for example, in which the wafer is rotated to remove the water content on the surface with centrifugal force. There arises a problem, during the drying process, that silicon is eluted to produce a drying stain called a watermark on the wafer, which reduces a yield. There arises a further problem that, during the drying process, the pattern on the wafer is collapsed due to the capillary force.
  • In recent years, there has been proposed a technique of drying a wafer by substituting the pure water on the wafer into IPA (isopropyl alcohol) with the use of IPA (e.g., specification of Japanese Patent No. 3866130). There has also been proposed a technique of using HFE (hydrofluoroether) having a surface tension lower than that of IPA. However, even by the drying methods described above, it is difficult to prevent the collapse of the micropattern on the wafer caused by the surface tension of liquid.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a diagram showing a schematic configuration of a surface treatment apparatus of a semiconductor substrate according to a first embodiment of the present invention;
  • FIG. 2 is a flowchart explaining a surface treatment method of a semiconductor substrate according to the first embodiment;
  • FIG. 3A is a graph showing a relationship between a cleaning sequence and a contact angle of water to a pattern;
  • FIG. 3B is a graph showing a relationship between a cleaning sequence and a contact angle of water to a pattern;
  • FIG. 4 is a view showing surface tension of liquid to the pattern;
  • FIG. 5 is a graph showing a relationship between an IPA concentration and amount of dissolution of silicon;
  • FIG. 6 is a graph showing a relationship between an IPA concentration of rinsing liquid and a number of watermarks formed on a wafer;
  • FIG. 7A is a view showing a state of a pattern after a drying process in case where a water repellent protective film is not formed;
  • FIG. 7B is a view showing a state of a pattern after a drying process in case where a water repellent protective film is formed;
  • FIG. 8 is a diagram showing a schematic configuration of a surface treatment apparatus of a semiconductor substrate according to a second embodiment of the present invention;
  • FIG. 9 is a diagram showing a schematic configuration of a surface treatment apparatus of a semiconductor substrate according to a third embodiment of the present invention;
  • FIG. 10A is a sectional view showing a side-wall transfer process;
  • FIG. 10B is a cross-sectional view showing a step subsequent to FIG. 10A;
  • FIG. 10C is a cross-sectional view showing a step subsequent to FIG. 10B;
  • FIG. 10D is a cross-sectional view showing a step subsequent to FIG. 10C;
  • FIG. 11A is a cross-sectional view showing a step subsequent to FIG. 10D;
  • FIG. 11B is a cross-sectional view showing a step subsequent to FIG. 11A;
  • FIG. 11C is a cross-sectional view showing a step subsequent to FIG. 11B;
  • FIG. 12A is a view showing a surface tension of liquid to the pattern; and
  • FIG. 12B is a view showing a configuration in which the whole pattern is tilted.
  • DETAILED DESCRIPTION
  • In one embodiment, an apparatus of treating a surface of a semiconductor substrate comprises a substrate holding and rotating unit, a first supplying unit, a second supplying unit, a third supplying unit, a fourth supplying unit, and a removing unit. A substrate holding and rotating unit holds a semiconductor substrate, having a convex pattern formed on its surface, and rotates the semiconductor substrate. A first supplying unit supplies a chemical onto the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to clean the semiconductor substrate. A second supplying unit supplies pure water to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate. A third supplying unit supplies a water repellent agent to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to form a water repellent protective film onto the surface of the convex pattern. A fourth supplying unit supplies alcohol, which is diluted with pure water, to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate. A removing unit removes the water repellent protective film with the convex pattern being left.
  • The cleaning process in the manufacturing process of a semiconductor device is to return a semiconductor substrate surface to a clean surface state without generating any defect (missing pattern, scratch, thinned pattern, dug substrate, or the like) in a fine pattern structure formed on a semiconductor substrate. Specifically, target matters to be cleaned includes resist material used in a lithography process, a reaction by-product (residue) remaining on a semiconductor wafer surface in a dry etching process, and metallic impurity, organic contaminant or the like, these processes are generally employed in a semiconductor manufacturing process. If the wafer is flown to the following manufacturing process while leaving the target materials to be cleaned, a device manufacturing yield ratio has to be lowered.
  • Accordingly, the cleaning process has an important role of forming a clean semiconductor wafer surface after cleaning without generating any defect (missing pattern, scratch, thinned pattern, dug substrate, or the like) in a fine pattern structure formed on the semiconductor substrate. As an element is miniaturized, cleanliness demanded in the cleaning process becomes higher.
  • On the other hand, in a recent structure in which a convex fine pattern of high aspect is provided (for example, a structure having pattern size of 30 nm or less, and an aspect ratio of 10 or more), since hydrophobic force is insufficient only by applying hydrophobic technique which is used in the resist process, it has been difficult to form a clean substrate surface with suppressing collapse of the pattern. On the other hand, in accordance with the following embodiment, it is possible to achieve high hydrophobic contact and to suppress the pattern collapse, while keeping the pattern surface clean, with respect to the structure having the convex fine pattern of high aspect.
  • First Embodiment
  • FIG. 1 shows a schematic configuration of a surface treatment apparatus of a semiconductor substrate according to a first embodiment of the present invention. The surface treatment apparatus includes a substrate holding and rotating unit 100, a diluted IPA supplying unit 200, and a chemical supplying unit 300.
  • The substrate holding and rotating unit 100 has a spin cup 101 constituting a process chamber, a rotation axis 102, a spin base 103, and a chuck pin 104. The rotation axis 102 extends substantially in a vertical direction, and the disk-like spin base 103 is mounted on the upper end of the rotation axis 102. The rotation axis 102 and the spin base 103 are rotated with a motor (not shown).
  • The chuck pin 104 is mounted on the peripheral end of the spin base 103. The chuck pin 104 holds the substrate (wafer) W, whereby the substrate holding and rotating unit 100 can hold and rotate the substrate W in substantially horizontal direction.
  • When liquid is supplied to the vicinity of the rotation center of the surface of the substrate W from the diluted IPA supplying unit 200 or the chemical supplying unit 300, the liquid spreads in the radius direction of the substrate W. The substrate holding and rotating unit 100 can perform a spin-drying of the substrate W. The unnecessary liquid scattering in the radius direction of the substrate W is caught by the spin cup 101, and discharged through a waste liquid tube 105.
  • The diluted IPA supplying unit 200 supplies diluted IPA (isopropyl alcohol) to the substrate W that is held by the substrate holding and rotating unit 100. The diluted IPA is supplied to the semiconductor substrate W before the spin-drying.
  • The IPA is stored in a buffer tank 220 through a supplying line (tube) 201. The supplying line 201 is provided with a flowmeter 202 and a valve 203 so as to be capable of controlling the supplied amount to the buffer tank 220.
  • Pure water is supplied to the buffer tank 220 through a supplying line 211. The supplying line 211 is provided with a flowmeter 212 and a valve 213 so as to be capable of controlling the supplied amount to the buffer tank 220.
  • The buffer tank 220 stores the IPA and pure water, i.e., the diluted IPA (diluted IPA). A concentration sensor 221 for detecting the IPA concentration of the diluted IPA is provided to the buffer tank 220. The open degrees of the valves 203 and 213 are controlled based on the detection result of the concentration sensor 221, whereby the diluted IPA in the buffer tank 220 can be adjusted to have a desired concentration.
  • The diluted IPA in the buffer tank 220 is discharged by a pump 230, passes through a filter 231, and then, ejected from a nozzle 233 through a supplying line 232 to be supplied to the surface of the substrate W. A valve 234 is provided to the supplying line 232, so that the supplied amount and flow rate of the diluted IPA to the surface of the substrate W can be controlled. Some of the diluted IPA discharged from the pump 230 is returned again to the buffer tank 220 for circulation.
  • The chemical supplying unit 300 can supply the IPA, pure water, and water repellent agent to the surface of the substrate W. The IPA is supplied through a supplying line 301, and ejected from a nozzle 302. Similarly, the pure water is supplied through a supplying line 303 and ejected from a nozzle 304. The water repellent agent is supplied through a supplying line 305, and ejected from a nozzle 306. The chemical supplying unit 300 has a line 307 for supplying other chemicals such as SPM (Sulfuric acid Hydrogen Peroxide Mixture) and a nozzle 308 for ejecting the same.
  • The water repellent agent is a chemical that forms a water repellent protective film on the surface of a pattern, having a convex shape and formed on the surface of the substrate W, so as to make the surface of the pattern water repellent. The water repellent agent is, for example, a silane coupling agent. The silane coupling agent has a hydrolysable group having affinity and reactivity for an inorganic material, and an organic functional group that is chemically bonded to an organic material, in a molecule. Examples of usable silane coupling agent include hexamethyldisilazane (HMDS), tetramethyl silyl diethylamine (TMSDEA), or the like. To make the surface of the pattern having the convex shape water repellent will be described below.
  • The surface treatment apparatus also has an excimer UV (ultraviolet) irradiating unit (not shown). The excimer UV irradiating unit irradiates an ultraviolet ray to the semiconductor substrate W to be capable of allowing the convex pattern to be left and of removing the water repellent protective film. A removing unit for removing the water repellent protective film but allowing the convex pattern to be left with the method other than the ultraviolet irradiation may be provided.
  • A method for performing a surface treatment of a semiconductor substrate by using the surface treatment apparatus described above will be described with reference to the flowchart shown in FIG. 2. The operations of the substrate holding and rotating unit 100, the diluted IPA supplying unit 200, and the chemical supplying unit 300 can be controlled by a control unit not shown.
  • (Step S101) The semiconductor substrate W, which has plural convex patterns on a predetermined area of a surface and which is a subject to be processed, is carried in by a conveying unit (not shown), and held by the substrate holding and rotating unit 100. The convex pattern is, for example, a line and space pattern. A part of the convex pattern may be formed of a film containing silicon. The convex pattern is formed by, for example, an RIE (Reactive Ion Etching) method.
  • (Step S102) The semiconductor substrate W is rotated with a predetermined revolution, and the chemical supplying unit 300 supplies the chemical to the vicinity of the rotation center of the surface of the semiconductor substrate W. The chemical is, for example, SPM, SC-1 (Standard Clean 1), SC-2, or HF. One type of chemical may be used, or plural chemicals may simultaneously or continuously be supplied.
  • The chemical receives centrifugal force from the rotation of the semiconductor substrate W to be spread all over the surface of the semiconductor substrate W, whereby the chemical (cleaning) process is performed to the semiconductor substrate W.
  • (Step S103) The chemical supplying unit 300 supplies pure water to the vicinity of the rotation center of the surface of the semiconductor substrate W. The pure water receives centrifugal force by the rotation of the semiconductor substrate W to be spread all over the surface of the semiconductor substrate W. Thus, a pure water rinsing process is performed in which the chemical remaining on the surface of the semiconductor substrate W is washed away by the pure water.
  • (Step S104) The chemical supplying unit 300 supplies alcohol, such as IPA, to the vicinity of the rotation center of the surface of the semiconductor substrate W. The IPA receives centrifugal force by the rotation of the semiconductor substrate W to be spread all over the surface of the semiconductor substrate W. Thus, an alcohol rinsing process is performed in which the pure water remaining onto the surface of the semiconductor substrate W is substituted with the IPA.
  • (Step S105) The chemical supplying unit 300 supplies a water repellent agent to the vicinity of the rotation center of the surface of the semiconductor substrate W. The water repellent agent is, for example, a silane coupling agent.
  • The silane coupling agent receives centrifugal force by the rotation of the semiconductor substrate W to be spread all over the surface of the semiconductor substrate W. Thus, a protective film (water repellent protective film) having low wettability is formed on the surface of the convex pattern.
  • The water repellent protective film is formed because of an ester reaction of the silane coupling agent. Accordingly, an annealing process may be performed to raise the liquid temperature in order to accelerate the reaction.
  • When the convex pattern is a silicon nitride film or a silicon film such as polysilicon, a silylation reaction may be insufficient even if a silylation process is performed using the silane coupling agent, so that water repellency sufficient for preventing the collapse of the pattern cannot be obtained. In this case, it is preferable that, in step S102, a process by a process chemical containing an oxide agent that can oxidize the surface of the silicon material is added so as to change the surface of the silicon material into a chemical oxide film of the silicon oxide. Thereafter, the silylation process is performed, whereby the water repellency after the silylation process can be enhanced.
  • When the convex pattern is the silicon based film, for example, only a dHF process is performed to form the water repellent protective film. As a result, the contact angle of water to the pattern is 89° as shown in FIG. 3A. When H2O2 process is added to this process, the contact angle increases up to 95°. This is considered because an appropriate oxide film is formed on the surface of the silicon based film.
  • As showing in FIG. 3B, when the convex pattern is the silicon nitride film and the water repellent protective film is formed only by using the dHF process, the contact angle of water is about 46°. When the H2O2 process is added to this process, the contact angle increases up to 54°, and when an SPM process is added, the contact angle increases up to 59°. This is considered because the water repellent protective film is easy to be formed since an optimum modifying process is added in order to allow the water-repellent process to be performed on the surface of the substrate after the cleaning.
  • After an RIE (Reactive Ion Etching) process, many process residues are produced after the process. The water repellent protective film is difficult to be formed with the process residues being left. Therefore, removing the residues through the SPM process in step S102 is effective for forming the water repellent protective film. Further, a plasma damage is accumulated onto the pattern surface with the RIE process to thereby form a dangling-bond. When the modifying process is performed with the chemical having an oxidation effect, the dangling-bond is modified with an OH group. When many OH groups are present, the probability of the silylation reaction is increased, so that the water repellent protective film is easy to be formed. Therefore, more higher water repellency can be achieved. In this case, an effect can be provided even if the micropattern is a silicon oxide film.
  • In the above description, the surface of the semiconductor substrate W is modified with the process chemical different from the cleaning chemical after the semiconductor substrate W is cleaned. However, the modifying process does not have to be performed separately, if the cleaning chemical is also used to achieve the modifying effect, i.e., the cleaning chemical has an oxidation effect. However, when the cleaning process and the modifying process are separately performed, the modification is performed to the cleaned surface after the surface, which is to be cleaned, of the convex micropattern is cleaned. Therefore, the modifying effect can further be enhanced, compared to the case of using the chemical having the oxidation effect. Accordingly, it is desirable to separate the cleaning process and the modifying process.
  • (Step S106) The chemical supplying unit 300 supplies the IPA to the vicinity of the rotation center of the surface of the semiconductor substrate W. The IPA receives centrifugal force by the rotation of the semiconductor substrate W to be spread all over the surface of the semiconductor substrate W. Thus, the alcohol rinsing process is performed in which the unreacted silane coupling agent remaining onto the surface of the semiconductor substrate W is substituted with the IPA. The IPA supplied here is the one that is not diluted and has a concentration of 100%.
  • (Step S107) The diluted IPA supplying unit 200 supplies the diluted IPA to the vicinity of the rotation center of the surface of the semiconductor substrate W. The diluted IPA receives centrifugal force by the rotation of the semiconductor substrate W to be spread all over the surface of the semiconductor substrate W. Thus, the diluted IPA rinsing process is performed in which the IPA remaining on the surface of the semiconductor substrate W is washed away with the diluted IPA.
  • (Step S108) The semiconductor substrate W is subject to the drying process. For example, the spin-drying process is performed in which the revolution speed of the semiconductor substrate W increases to a predetermined spin-drying speed so as to blow away the diluted IPA remaining onto the surface of the semiconductor substrate W.
  • Since the convex pattern formed on the semiconductor substrate W is covered with the water repellent protective film, the contact angle θ of the liquid increases. In particular, the contact angle θ is made close to 90° by substituting the liquid onto the surface of the semiconductor substrate W with the diluted IPA in step S107.
  • FIG. 4 shows the state in which a part of the pattern 4 formed on the semiconductor substrate W is wet with the liquid 5. When the distance between the pattern 4 is defined as Space, the height of the pattern 4 is H, and the surface tension of the liquid 5 is defined as γ, the force P applied to the pattern 4 is as follows: P=2×γ×cos θ·H/Space (Equation 1).
  • Since θ is made close to 90°, cos θ approaches zero, which indicates that the force P applied to the pattern during the drying process is decreased. Thus, the collapse of the pattern during the drying process can be prevented.
  • The watermark will next be considered. The watermark is formed by the elution of silicon during the drying process. FIG. 5 shows the relationship between the IPA concentration of the rinsing liquid, which is obtained by mixing pure water and IPA, and the amount of dissolution of the silicon in the rinsing liquid. The axis of ordinate in FIG. 5 represents the result of chemical analysis of the amount of dissolution of silicon in the rinsing liquid, while the axis of abscissa represents the IPA concentration of the rinsing liquid. It is understood from FIG. 5 that, when the IPA concentration is 0%, i.e., in the case of the pure water, the amount of dissolution of silicon is great, and with the increase of the IPA concentration, the amount of dissolution of silicon is reduced.
  • FIG. 6 shows the relationship between the IPA concentration of the rising liquid used in step S107 and the number of watermarks formed on the wafer after the drying process. The number of the watermarks is obtained from an optical defect inspection and an SEM image analysis on the surface of the wafer. It is understood from FIG. 6 that the number of the watermarks is reduced by using the rinsing liquid containing the IPA, compared with the case of the rising process with the use of the pure water.
  • In the present embodiment, the diluted IPA rinsing process is performed in the rinsing process (step S107) before the drying process, so that the elution of silicon is prevented to prevent the formation of the watermarks.
  • (Step S109) Ultraviolet ray is irradiated from the excimer UV irradiating unit to remove the water repellent protective film formed on the surface of the convex pattern. The present embodiment is to clean and dry the surface of the semiconductor substrate. Therefore, the cleaning process is completed by removing the water repellent protective film. When the water repellent protective film is to be removed in the process next to this process, the water repellent protective film does not have to be removed soon after the drying process.
  • FIG. 7 shows the patterns after the drying process in case where the water repellent protective film is formed and in case where the water repellent protective film is not formed. Three types of patterns, each having a height of line of 150 nm, 170 nm, and 200 nm, respectively, and three types of patterns, each having a line width of normal, fine, and ultra-fine (normal>fine>ultra-fine), are subject to the surface treatment.
  • As understood from FIG. 7A, in the case of patterns having ultra-fine line width having the water repellent protective film not formed thereon, the patterns having the line height of 150 nm, 170 nm, and 200 nm were all collapsed. Further, the pattern, having the fine line width, having the line height of 200 nm, and having the water repellent protective film not formed thereon, was collapsed.
  • On the other hand, as understood from FIG. 7B, when the water repellent protective film was formed, the collapse of the pattern could be prevented except for the pattern having the ultra-fine line width and having the line height of 200 nm. It is understood from the above that, when the water repellent protective film is formed, even the collapse of the pattern having a high aspect ratio due to the cleaning and drying processes can be prevented, whereby the collapse margin can be enhanced.
  • As described above, in the present embodiment, the water repellent protective film is formed upon cleaning the surface of the semiconductor substrate W, whereby the collapse of the micropattern having the convex shape can be prevented during the drying process. Since the diluted IPA rinsing process is performed before the drying process, the elution of silicon is prevented to prevent the formation of the watermark.
  • In order to prevent the collapse of the pattern formed on the substrate, the force applied to the pattern (P represented by the equation 1) should be reduced. Among the parameters in the equation 1, the Space is a fixed parameter determined by the pattern size, and the wettability cos θ is a fixed parameter determined by the relationship between the material constituting the micropattern (the surface of the micropattern) and the liquid. Therefore, in the conventional substrate process, attention is focused on the surface tension γ, and the liquid having small γ is used in order to reduce the force applied to the pattern. However, there is a limitation on reducing γ, and hence, it becomes impossible to prevent the collapse of the pattern.
  • On the other hand, in the surface treatment method according to the present embodiment, the water repellent protective film is formed on the surface of the pattern so as to control the wettability cos θ, whereby the force applied to the pattern during the drying process is greatly reduced, which can prevent the collapse of the pattern.
  • The surface treatment method according to the present embodiment is particularly effective for preventing the collapse of the pattern having an aspect ratio of eight or more.
  • In the present embodiment, the alcohol rinsing process is performed (steps S104 and S106) before and after the process of forming the water repellent protective film (step S105). This is because the silane coupling agent used for forming the water repellent protective film may not be capable of being substituted with pure water, depending on the type thereof. Therefore, the alcohol rinsing process can be omitted, when the silane coupling agent to be used can be substituted with the pure water.
  • In the present embodiment, the water repellent agent may be diluted within a range that can form the water repellent protective film. When the water repellent agent is diluted with cheap chemical such as cyclohexanone or alcohol, cost can be reduced. When the silane coupling agent used as the water repellent agent might hydrolyze by a hydroxyl group in the IPA to reduce the water-repellent capability, the IPA on the semiconductor substrate may be substituted with thinner before the water repellent agent is supplied.
  • In the above-mentioned present embodiment, the buffer tank 220 may be provided at the outside of the main body of the surface treatment apparatus. Instead of the concentration sensor 221, a weighing pump and a fluid level sensor for detecting a fluid level position in the buffer tank 220 may be provided so as to adjust the dilution degree of the IPA.
  • In the present embodiment, the IPA and pure water are mixed in the buffer tank 220. However, a mixing valve coupled to the supplying lines 201 and 211 may be provided immediately before the nozzle 233 so as to supply the diluted IPA to the substrate W. Further, the IPA and pure water may be directly supplied to the substrate W to be mixed on the substrate W. In this case, the diluted IPA supplying unit 200 may be eliminated.
  • Second Embodiment
  • FIG. 8 shows a schematic configuration of a surface treatment apparatus of a semiconductor substrate according to a second embodiment of the present invention. The surface treatment apparatus according to the present embodiment is a batch-type surface treatment apparatus that performs a cleaning and drying to plural semiconductor substrates at a time.
  • The surface treatment apparatus includes tanks 11 to 16, excimer UV irradiating unit 17, gas supplying unit, and a conveying unit (both are not shown). The conveying unit can hold and convey plural substrates.
  • The tank 11 stores chemicals for cleaning the substrate, such as SPM, SC-1 (Standard Clean 1), SC-2, and HF. Since the conveying unit carries the substrate into the tank 11, the chemical process (step S102) in the surface treatment method according to the first embodiment can be performed.
  • The tank 12 stores pure water. Since the conveying unit pulls up the substrate from the tank 11 and puts the same into the tank 12, the pure water rinsing process (step S103) of the surface treatment method according to the first embodiment can be performed.
  • The tank 13 stores the IPA. Since the conveying unit pulls up the substrate from the tank 12 and puts the same into the tank 13, the alcohol rinsing process (step S104) of the surface treatment method according to the first embodiment can be performed.
  • The tank 14 stores the water repellent agent. Since the conveying unit pulls up the substrate from the tank 13 and puts the same into the tank 14, the water repellent protective film is formed on the convex pattern on the substrate, whereby the water repellent process (step S105) of the surface treatment method according to the first embodiment can be performed. The diluted solvent may be supplied to the tank 14 to dilute the water repellent agent.
  • The tank 15 stores the IPA. Since the conveying unit pulls up the substrate from the tank 14 and puts the same into the tank 15, the alcohol rinsing process (step S106) of the surface treatment method according to the first embodiment can be performed.
  • The tank 16 stores the diluted IPA that is obtained by mixing the IPA and water. Since the conveying unit pulls up the substrate from the tank 15 and puts the same into the tank 16, the diluted IPA rinsing process (step S107) of the surface treatment method according to the first embodiment can be performed.
  • The gas supplying unit supplies dry air to the substrate in order to be capable of performing the evaporative drying to the substrate. The conveying unit pulls up the substrate from the tank 16, and then, the gas supplying unit supplies dry air to the substrate for drying. Thus, the drying process (step S108) in the surface treatment method according to the first embodiment can be performed. The drying process is not limited to the above-mentioned process. The other method such as a spin drying may be employed.
  • Since the substrate is put into the tank 14 to form the water repellent protective film onto the surface of the convex pattern, the force applied to the pattern is small, whereby the collapse of the pattern can be prevented. Since the substrate is put into the tank 16 to perform the diluted IPA process, the elution of silicon can be prevented to prevent the formation of the watermark.
  • The conveying unit conveys the dried substrate to the excimer UV irradiating unit 17. The excimer UV irradiating unit 17 irradiates ultraviolet ray to remove the water repellent protective film formed on the surface of the convex pattern. Thus, the water repellent protective film removing process (step S109) in the surface treatment method according to the first embodiment can be performed.
  • As described above, the collapse of the pattern and the formation of the watermark can be prevented, and the substrate can be cleaned and dried, like the first embodiment, by using the batch-type surface treatment apparatus according to the present embodiment.
  • The surface treatment apparatus according to the second embodiment has tanks 11 to 16 according to the type of the liquid. However, the apparatus may be configured to have an over-flow structure in which a single tank is provided, and the liquid is supplied through a continuous changeover.
  • Third Embodiment
  • In the above-mentioned first embodiment, the rinsing process is performed by using the diluted IPA before the drying process. However, acid water such as carbonated water may be used. FIG. 9 shows an example of a configuration of a surface treatment apparatus of a semiconductor substrate for performing the process described above.
  • The surface treatment apparatus is different from the surface treatment apparatus in the first embodiment shown in FIG. 1 in that the diluted IPA supplying unit 200 is not provided and an acid water supplying unit 400 is provided. The components in FIG. 9 same as those in the first embodiment in FIG. 1 are identified by the same numerals, and the description will not be repeated.
  • The acid water supplying unit 400 includes a supplying line 401 that supplies pure water, a flowmeter 402 provided on the supplying line 401, a supplying line 403 that supplies carbon dioxide gas, a flowmeter 404 provided on the supplying line 403, a carbon dioxide dissolving film 405, a supplying line 406 that flows carbonated water, a nozzle 407 that ejects the carbonated water, and a filter 408 and a valve 409 that are provided on the supplying line 406.
  • Pure water is supplied to the carbon dioxide dissolving film 405 through the supplying line 401, and carbon dioxide gas is supplied to the carbon dioxide dissolving film 405 through the supplying line 403. The pure water and the carbon dioxide gas pass through the carbon dioxide dissolving film 405 to become carbonated water.
  • The carbonated water is supplied to the nozzle 407 by the supplying line 406, and ejected onto the semiconductor substrate W from the nozzle 407. The supplied amount of the carbonated water to the semiconductor substrate W can be adjusted by the open degree of the valve 409.
  • The surface treatment apparatus according to the third embodiment employs acid water in the rinsing process before the drying process, thereby being capable of preventing the elution of silicon and formation of the watermark. Accordingly, the collapse of the pattern and the formation of the watermark can be prevented, and the substrate can be cleaned and dried, like the first embodiment, by using the surface treatment apparatus according to the present embodiment.
  • In the above-mentioned embodiment, the rinsing process is performed with the use of carbonated water. However, as the acid water, solution obtained by dissolving nitrogen oxide NOx in pure water or solution obtained by mixing hydrochloric acid with pure water may be used.
  • The surface treatment apparatuses according to the first to third embodiments are suitable for cleaning and drying a semiconductor substrate having a convex pattern formed by a side-wall transfer process. In the side-wall transfer process, a second film 502 is firstly formed on a first film 501 formed on a semiconductor substrate (not shown) as shown in FIG. 10A. Then, a resist 503 having a line and space pattern is formed on the second film 502.
  • Next, as shown in FIG. 10B, the second film 502 is etched with the resist 503 being used as a mask so as to transfer the pattern.
  • As shown in FIG. 10C, a slimming process is performed to the second film 502 to decrease the width to about a half, and the resultant is processed into a core material 504. The resist 503 is removed before or after the slimming process. The slimming process is performed by a wetting process, a drying process, or the combination of a wetting process and a drying process.
  • Then, as shown in FIG. 10D, a third film 505 is formed, by a CVD (Chemical Vapor Deposition) method and the like, to cover the upper surface and the side surface of the core material 504 with a fixed thickness. The third film 505 is formed of a material that can assume a great etching selection ratio to the core material 504.
  • Then, as shown in FIG. 11A, the third film 505 is dry-etched until the top surface of the core material 504 is exposed. The dry-etching is performed under an etching condition having selectivity to the core material 504. Accordingly, the third film 505 remains in a spacer shape along the side surface of the core material 504. The remaining third film 505 is formed such that the upper end 505 a is brought into contact with the upper portion of the side surface of the core material 504, and the upper side portion is curved convexly toward the outer side of the core material 504.
  • As shown in FIG. 11B, the core material 504 is removed by a wet-etching process. The third film 505 has an asymmetric pattern in which patterns having the narrower distance (the size of the opening width of the space pattern) between two adjacent patterns and patterns having the greater distance are present alternately.
  • When the asymmetric pattern like the third film 505 is cleaned and dried, the lowering speed of the liquid level of the rinsing liquid at the space portion is greatly different, so that great force is applied to the pattern, as shown in FIG. 11C, with the result that the prevention of the collapse of the pattern is difficult.
  • The first film 501 and the semiconductor substrate below the first film 501, which are subjects to be processed, are dry-etched with the obtained pattern of the third film 505 being used as a mask to transfer the pattern, and then, residual product by the reaction caused by the dry-etching is cleaned and removed. In this case, the size of the opening width of the space pattern varies even in the subject to be processed on which the pattern is transferred, because of the affect by the asymmetric shape of the third film 505, which has a shape that the upper side portion is curved convexly, used as the mask. Therefore, when the pattern on the subject to be processed is cleaned and dried, the lowering speed of the liquid level of the rinsing liquid at the space portion is greatly different, so that great force is applied to the pattern, as in the case of the pattern of the third film 505, with the result that the prevention of the collapse of the pattern is difficult.
  • However, since the water repellent process of the surface of the pattern and the diluted IPA rinsing process or the acid water rinsing process before the drying process are performed by using the surface treatment apparatuses according to the first to third embodiments, the substrate can be cleaned and dried, while preventing the collapse of the pattern and the formation of the watermark, even if the pattern is the asymmetric pattern formed by the side-wall transfer process.
  • As understood from the equation 1 and FIG. 4, the force P applied to the pattern 4 depends upon the vertical component of the surface tension γ. Therefore, as shown in FIG. 12A, the vertical component of the surface tension y can be decreased to reduce the force applied to the pattern, by the configuration in which the upper portion of the pattern is tilted.
  • The configuration described above can be formed by lowering the temperature or setting the condition in which the selection ratio between the mask material and the pattern material is low, when the pattern is processed with RIE.
  • As shown in FIG. 12B, the same effect can be obtained in the configuration in which the whole pattern is tilted.
  • While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.

Claims (20)

1. An apparatus of treating a surface of a semiconductor substrate, comprising:
a substrate holding and rotating unit configured to hold a semiconductor substrate, having a convex pattern formed on its surface, and to rotate the semiconductor substrate;
a first supplying unit configured to supply a chemical onto the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to clean the semiconductor substrate;
a second supplying unit configured to supply pure water to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate;
a third supplying unit configured to supply a water repellent agent to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to form a water repellent protective film onto the surface of the convex pattern;
a fourth supplying unit configured to supply alcohol, which is diluted with pure water, to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate; and
a removing unit configured to remove the water repellent protective film with the convex pattern being left.
2. The apparatus according to claim 1, wherein
the removing unit is a ultraviolet ray irradiating unit that irradiates ultraviolet ray to the semiconductor substrate to remove the water repellent protective film.
3. The apparatus according to claim 1, further comprising a fifth supplying unit configured to supply an alcohol to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate.
4. The apparatus according to claim 1, further comprising a fifth supplying unit configured to supply a chemical, containing an oxidant for oxidizing the surface of the convex pattern having silicon, to the surface of the semiconductor substrate.
5. The apparatus according to claim 1, wherein
the third supplying unit supplies the water repellent agent diluted with cyclohexanone or alcohol.
6. An apparatus of treating a surface of a semiconductor substrate, comprising:
a substrate holding and rotating unit configured to hold a semiconductor substrate, having a convex pattern formed on its surface, and to rotate the semiconductor substrate;
a first supplying unit configured to supply a chemical onto the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to clean the semiconductor substrate;
a second supplying unit configured to supply pure water to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate;
a third supplying unit configured to supply a water repellent agent to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to form a water repellent protective film onto the surface of the convex pattern;
a fourth supplying unit configured to supply acid water to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate; and
a removing unit configured to remove the water repellent protective film with the convex pattern being left.
7. The apparatus according to claim 6, wherein
the fourth supplying unit includes:
a first supplying line that supplies pure water;
a second supplying line that supplies carbon dioxide gas;
a carbon dioxide dissolving film to which the pure water is supplied from the first supplying line and the carbon dioxide gas is supplied from the second supplying line, and that discharges carbonated water; and
a nozzle that ejects the carbonated water onto the surface of the semiconductor substrate.
8. The apparatus according to claim 6, wherein
the removing unit is a ultraviolet ray irradiating unit that irradiates ultraviolet ray to the semiconductor substrate to remove the water repellent protective film.
9. The apparatus according to claim 6, further comprising a fifth supplying unit configured to supply an alcohol to the surface of the semiconductor substrate, which is held by the substrate holding and rotating unit, in order to rinse the semiconductor substrate.
10. The apparatus according to claim 6, further comprising a fifth supplying unit configured to supply a chemical, containing an oxidant for oxidizing the surface of the convex pattern having silicon, to the surface of the semiconductor substrate.
11. The apparatus according to claim 6, wherein
the third supplying unit supplies the water repellent agent diluted with cyclohexanone or alcohol.
12. A method of treating a surface of a semiconductor substrate, comprising:
forming plural convex patterns on a semiconductor substrate;
cleaning the surface of the convex patterns with the use of a chemical;
forming a water repellent protective film on the cleaned surface of the convex patterns with the use of a water repellent agent;
rinsing the semiconductor substrate by using acid water or diluted alcohol after the formation of the water repellent protective film;
drying the rinsed semiconductor substrate; and
removing the water repellent protective film with the convex patterns being left after the drying.
13. The method according to claim 12, wherein
the convex patterns contain silicon, and
the surface of the convex patterns is oxidized with the use of oxidant before the formation of the water repellent protective film.
14. The method according to claim 12, wherein
the water repellent agent is a silane coupling agent.
15. The method according to claim 14, wherein
the semiconductor substrate is rinsed by using alcohol after the surface of the convex patterns is cleaned and before the water repellent protective film is formed.
16. The method according to claim 14, wherein
the semiconductor substrate is rinsed by using alcohol after the water repellent protective film is formed and before the rinsing with the use of the acid water or the diluted alcohol.
17. The method according to claim 12, wherein
ultraviolet ray is irradiated to the semiconductor substrate in removing the water repellent protective film.
18. The method according to claim 12, wherein
the acid water is carbonated water, pure water in which nitrogen oxide is dissolved, or mixture solution of hydrochloric acid and pure water.
19. The method according to claim 12, wherein
the water repellent protective film is formed by using the water repellent agent that is diluted with cyclohexanone or alcohol.
20. The method according to claim 12, wherein
the convex patterns are formed by a side-wall transfer process.
US12/886,427 2009-12-11 2010-09-20 Apparatus and method of treating surface of semiconductor substrate Abandoned US20110143541A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US14/925,805 US9859111B2 (en) 2009-12-11 2015-10-28 Apparatus and method of treating surface of semiconductor substrate
US15/827,427 US9991111B2 (en) 2009-12-11 2017-11-30 Apparatus and method of treating surface of semiconductor substrate

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009281346A JP5404361B2 (en) 2009-12-11 2009-12-11 Semiconductor substrate surface treatment apparatus and method
JP2009-281346 2009-12-11

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US14/925,805 Division US9859111B2 (en) 2009-12-11 2015-10-28 Apparatus and method of treating surface of semiconductor substrate

Publications (1)

Publication Number Publication Date
US20110143541A1 true US20110143541A1 (en) 2011-06-16

Family

ID=44143414

Family Applications (3)

Application Number Title Priority Date Filing Date
US12/886,427 Abandoned US20110143541A1 (en) 2009-12-11 2010-09-20 Apparatus and method of treating surface of semiconductor substrate
US14/925,805 Active 2030-12-09 US9859111B2 (en) 2009-12-11 2015-10-28 Apparatus and method of treating surface of semiconductor substrate
US15/827,427 Active US9991111B2 (en) 2009-12-11 2017-11-30 Apparatus and method of treating surface of semiconductor substrate

Family Applications After (2)

Application Number Title Priority Date Filing Date
US14/925,805 Active 2030-12-09 US9859111B2 (en) 2009-12-11 2015-10-28 Apparatus and method of treating surface of semiconductor substrate
US15/827,427 Active US9991111B2 (en) 2009-12-11 2017-11-30 Apparatus and method of treating surface of semiconductor substrate

Country Status (4)

Country Link
US (3) US20110143541A1 (en)
JP (1) JP5404361B2 (en)
KR (1) KR101170258B1 (en)
TW (1) TWI514450B (en)

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8399357B2 (en) 2010-10-06 2013-03-19 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US8557705B2 (en) 2010-10-14 2013-10-15 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device and apparatus for manufacturing semiconductor device
US8772164B2 (en) 2011-12-15 2014-07-08 Kabushiki Kaisha Toshiba Method for forming interconnection pattern and semiconductor device
US8821974B2 (en) 2010-08-20 2014-09-02 Dainippon Screen Mfg. Co., Ltd. Substrate processing method
US20150034130A1 (en) * 2013-08-05 2015-02-05 Kabushiki Kaisha Toshiba Method of cleaning semiconductor substrate and apparatus for cleaning semiconductor substrate
EP2854164A1 (en) * 2013-09-30 2015-04-01 Shibaura Mechatronics Corporation Substrate processing device and substrate processing method
US9520459B2 (en) * 2012-12-21 2016-12-13 SK Hynix Inc. Surface treatment method for semiconductor device
US9583331B2 (en) 2013-01-18 2017-02-28 Kabushiki Kaisha Toshiba Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
CN106796876A (en) * 2014-10-21 2017-05-31 东京毅力科创株式会社 The computer-readable recording medium of substrate method for treating liquids, substrate liquid handling device and the substrate liquid handler that is stored with
US9859111B2 (en) 2009-12-11 2018-01-02 Toshiba Memory Corporation Apparatus and method of treating surface of semiconductor substrate
CN107644822A (en) * 2016-07-21 2018-01-30 弘塑科技股份有限公司 Semiconductor drying equipment and semiconductor are dried with processing liquid circulation and filter method
US20190088469A1 (en) * 2017-09-21 2019-03-21 SCREEN Holdings Co., Ltd. Method of processing substrate and substrate processing apparatus
US10293383B2 (en) 2014-07-18 2019-05-21 Alfred Kärcher SE Co. KG Mobile high-pressure cleaning apparatus
US10312114B2 (en) 2013-10-10 2019-06-04 SCREEN Holdings Co., Ltd. Substrate processing method, and substrate processing device
US20190374982A1 (en) * 2018-06-06 2019-12-12 Tokyo Ohka Kogyo Co., Ltd. Method for treating substrate and rinsing liquid
CN113394074A (en) * 2020-03-11 2021-09-14 长鑫存储技术有限公司 Method for processing semiconductor structure
US20220208545A1 (en) * 2020-12-28 2022-06-30 SCREEN Holdings Co., Ltd. Substrate treatment apparatus and substrate treatment method
US20230290631A1 (en) * 2020-07-31 2023-09-14 SCREEN Holdings Co., Ltd. Substrate processing method

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5248652B2 (en) * 2011-04-27 2013-07-31 大日本スクリーン製造株式会社 Substrate processing method and substrate processing apparatus
TWI526257B (en) 2012-11-27 2016-03-21 東京威力科創股份有限公司 Controlling cleaning of a layer on a substrate using nozzles
JP6585243B2 (en) * 2013-09-30 2019-10-02 芝浦メカトロニクス株式会社 Substrate processing apparatus and substrate processing method
CN106463397A (en) * 2014-05-12 2017-02-22 东京毅力科创株式会社 Method and system to improve drying of flexible nano-structures
US10026629B2 (en) 2014-10-17 2018-07-17 Tokyo Electron Limited Substrate liquid processing apparatus, substrate liquid processing method, and computer-readable storage medium storing substrate liquid processing program
JP6770887B2 (en) 2016-12-28 2020-10-21 株式会社Screenホールディングス Board processing equipment and board processing system
JP7250566B2 (en) * 2019-02-26 2023-04-03 東京エレクトロン株式会社 SUBSTRATE PROCESSING APPARATUS AND SUBSTRATE PROCESSING METHOD
JP7311988B2 (en) * 2019-03-20 2023-07-20 株式会社Screenホールディングス SUBSTRATE PROCESSING METHOD, SEMICONDUCTOR MANUFACTURING METHOD AND SUBSTRATE PROCESSING APPARATUS
JP7532135B2 (en) * 2020-07-31 2024-08-13 株式会社Screenホールディングス SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
JP2023076165A (en) * 2021-11-22 2023-06-01 株式会社Screenホールディングス Substrate processing method

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6698439B2 (en) * 2000-07-03 2004-03-02 Tokyo Electron Limited Processing apparatus with sealing mechanism
US20040226582A1 (en) * 2003-05-12 2004-11-18 Joya Satoshi Apparatus and method for substrate processing
US20070000524A1 (en) * 2005-06-30 2007-01-04 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus and substrate processing method
US20070295365A1 (en) * 2006-06-27 2007-12-27 Katsuhiko Miya Substrate processing method and substrate processing apparatus
US20080008973A1 (en) * 2006-07-10 2008-01-10 Tomohiro Goto Substrate processing method and substrate processing apparatus
US20080295868A1 (en) * 2007-06-04 2008-12-04 Hitachi Kokusai Electric Inc. Manufacturing method of a semiconductor device and substrate cleaning apparatus
US20090311874A1 (en) * 2008-06-16 2009-12-17 Hiroshi Tomita Method of treating surface of semiconductor substrate
US20110143545A1 (en) * 2009-12-15 2011-06-16 Hisashi Okuchi Apparatus and method of treating surface of semiconductor substrate
US8361234B2 (en) * 2008-10-29 2013-01-29 Dainippon Screen Mfg. Co., Ltd. Substrate treatment apparatus

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5374502A (en) 1992-04-23 1994-12-20 Sortec Corporation Resist patterns and method of forming resist patterns
US5326672A (en) 1992-04-23 1994-07-05 Sortec Corporation Resist patterns and method of forming resist patterns
JPH05326464A (en) * 1992-05-15 1993-12-10 Dainippon Screen Mfg Co Ltd Method for vapor-phase washing of substrate surface
JP3195439B2 (en) 1992-09-28 2001-08-06 森永製菓株式会社 Method for purifying factor XIII
JPH06302598A (en) 1993-04-15 1994-10-28 Matsushita Electric Ind Co Ltd Fabrication of semiconductor device
JPH07142349A (en) 1993-11-16 1995-06-02 Mitsubishi Electric Corp Method for preventing tilting of photoresist pattern in developing step
JPH07273083A (en) 1994-03-30 1995-10-20 Nippon Telegr & Teleph Corp <Ntt> Fine pattern forming method
JPH07335603A (en) 1994-06-10 1995-12-22 Toshiba Corp Semiconductor substrate treatment method and treatment agent
JP2000040679A (en) 1998-07-24 2000-02-08 Hitachi Ltd Manufacture of semiconductor integrated circuit device
JP2000089477A (en) 1998-09-11 2000-03-31 Nec Corp Resist pattern forming method
US6468362B1 (en) 1999-08-25 2002-10-22 Applied Materials, Inc. Method and apparatus for cleaning/drying hydrophobic wafers
US6858089B2 (en) 1999-10-29 2005-02-22 Paul P. Castrucci Apparatus and method for semiconductor wafer cleaning
JP4541422B2 (en) 2000-05-15 2010-09-08 東京エレクトロン株式会社 Substrate processing apparatus and substrate processing method
US6620260B2 (en) 2000-05-15 2003-09-16 Tokyo Electron Limited Substrate rinsing and drying method
JP2002006476A (en) 2000-06-23 2002-01-09 Hitachi Ltd Photomask and method for producing the same
JP3866130B2 (en) 2001-05-25 2007-01-10 大日本スクリーン製造株式会社 Substrate processing apparatus and substrate processing method
KR100451950B1 (en) 2002-02-25 2004-10-08 삼성전자주식회사 Sawing method for image sensor device wafer
US20040003828A1 (en) 2002-03-21 2004-01-08 Jackson David P. Precision surface treatments using dense fluids and a plasma
JP4016701B2 (en) 2002-04-18 2007-12-05 信越半導体株式会社 Manufacturing method of bonded substrate
JP4084235B2 (en) 2002-08-22 2008-04-30 株式会社神戸製鋼所 Protective film laminated fine structure and method for drying fine structure using the structure
JP2004152946A (en) 2002-10-30 2004-05-27 Matsushita Electric Ind Co Ltd Cleaning method of semiconductor device
US7163018B2 (en) 2002-12-16 2007-01-16 Applied Materials, Inc. Single wafer cleaning method to reduce particle defects on a wafer surface
WO2004068555A2 (en) 2003-01-25 2004-08-12 Honeywell International Inc Repair and restoration of damaged dielectric materials and films
JP2005136246A (en) 2003-10-31 2005-05-26 Renesas Technology Corp Manufacturing method of semiconductor integrate circuit device
JP3857692B2 (en) 2004-01-15 2006-12-13 株式会社東芝 Pattern formation method
JP2005276857A (en) 2004-03-22 2005-10-06 Kyocera Corp Photoelectric conversion device and its manufacturing method
JP4040074B2 (en) * 2004-04-23 2008-01-30 東京エレクトロン株式会社 Substrate cleaning method, substrate cleaning apparatus, computer program, and program storage medium
KR20070060117A (en) 2004-09-15 2007-06-12 허니웰 인터내셔널 인코포레이티드 Treating agent materials
WO2006049595A1 (en) 2004-10-27 2006-05-11 International Business Machines Corporation Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics
US7880860B2 (en) 2004-12-20 2011-02-01 Asml Netherlands B.V. Lithographic apparatus and device manufacturing method
US20080207005A1 (en) 2005-02-15 2008-08-28 Freescale Semiconductor, Inc. Wafer Cleaning After Via-Etching
CN101351537B (en) 2005-11-01 2013-09-25 纳幕尔杜邦公司 Solvent compositions comprising unsaturated fluorinated hydrocarbons
JP4882480B2 (en) 2006-04-21 2012-02-22 東京エレクトロン株式会社 Protective film removing apparatus, chemical recovery method and storage medium
JP2008041722A (en) * 2006-08-02 2008-02-21 Dainippon Screen Mfg Co Ltd Method and device for processing substrate
JP4866165B2 (en) * 2006-07-10 2012-02-01 大日本スクリーン製造株式会社 Substrate development processing method and substrate development processing apparatus
JP2009016800A (en) 2007-06-04 2009-01-22 Hitachi Kokusai Electric Inc Manufacturing method of semiconductor device, and substrate cleaning apparatus
JP5016525B2 (en) 2008-03-12 2012-09-05 大日本スクリーン製造株式会社 Substrate processing method and substrate processing apparatus
US8567420B2 (en) 2008-03-31 2013-10-29 Kabushiki Kaisha Toshiba Cleaning apparatus for semiconductor wafer
JP5404361B2 (en) 2009-12-11 2014-01-29 株式会社東芝 Semiconductor substrate surface treatment apparatus and method

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6698439B2 (en) * 2000-07-03 2004-03-02 Tokyo Electron Limited Processing apparatus with sealing mechanism
US20040226582A1 (en) * 2003-05-12 2004-11-18 Joya Satoshi Apparatus and method for substrate processing
US20070000524A1 (en) * 2005-06-30 2007-01-04 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus and substrate processing method
US20070295365A1 (en) * 2006-06-27 2007-12-27 Katsuhiko Miya Substrate processing method and substrate processing apparatus
US20080008973A1 (en) * 2006-07-10 2008-01-10 Tomohiro Goto Substrate processing method and substrate processing apparatus
US20080295868A1 (en) * 2007-06-04 2008-12-04 Hitachi Kokusai Electric Inc. Manufacturing method of a semiconductor device and substrate cleaning apparatus
US20090311874A1 (en) * 2008-06-16 2009-12-17 Hiroshi Tomita Method of treating surface of semiconductor substrate
US8361234B2 (en) * 2008-10-29 2013-01-29 Dainippon Screen Mfg. Co., Ltd. Substrate treatment apparatus
US20110143545A1 (en) * 2009-12-15 2011-06-16 Hisashi Okuchi Apparatus and method of treating surface of semiconductor substrate

Cited By (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9991111B2 (en) 2009-12-11 2018-06-05 Toshiba Memory Corporation Apparatus and method of treating surface of semiconductor substrate
US9859111B2 (en) 2009-12-11 2018-01-02 Toshiba Memory Corporation Apparatus and method of treating surface of semiconductor substrate
US8821974B2 (en) 2010-08-20 2014-09-02 Dainippon Screen Mfg. Co., Ltd. Substrate processing method
US9005703B2 (en) 2010-08-20 2015-04-14 SCREEN Holdings Co., Ltd. Substrate processing method
US9455134B2 (en) 2010-08-20 2016-09-27 SCREEN Holdings Co., Ltd. Substrate processing method
US8399357B2 (en) 2010-10-06 2013-03-19 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US8557705B2 (en) 2010-10-14 2013-10-15 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device and apparatus for manufacturing semiconductor device
US20140014142A1 (en) * 2010-10-14 2014-01-16 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device and apparatus for manufacturing semiconductor device
US9190262B2 (en) * 2010-10-14 2015-11-17 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device and apparatus for manufacturing semiconductor device
US8772164B2 (en) 2011-12-15 2014-07-08 Kabushiki Kaisha Toshiba Method for forming interconnection pattern and semiconductor device
US9520459B2 (en) * 2012-12-21 2016-12-13 SK Hynix Inc. Surface treatment method for semiconductor device
US9818627B2 (en) 2013-01-18 2017-11-14 Toshiba Memory Corporation Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
US9583331B2 (en) 2013-01-18 2017-02-28 Kabushiki Kaisha Toshiba Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
US10032658B2 (en) 2013-01-18 2018-07-24 Toshiba Memory Corporation Manufacturing method of semiconductor device and semiconductor manufacturing apparatus
US20150034130A1 (en) * 2013-08-05 2015-02-05 Kabushiki Kaisha Toshiba Method of cleaning semiconductor substrate and apparatus for cleaning semiconductor substrate
US10406566B2 (en) 2013-09-30 2019-09-10 Shibaura Mechatronics Corporation Substrate processing device and substrate processing method
KR20150037507A (en) * 2013-09-30 2015-04-08 시바우라 메카트로닉스 가부시끼가이샤 Substrate treatment device and substrate treatment method
KR101971303B1 (en) * 2013-09-30 2019-04-22 시바우라 메카트로닉스 가부시끼가이샤 Substrate treatment device and substrate treatment method
EP2854164A1 (en) * 2013-09-30 2015-04-01 Shibaura Mechatronics Corporation Substrate processing device and substrate processing method
TWI649822B (en) * 2013-09-30 2019-02-01 芝浦機械電子裝置股份有限公司 Substrate processing apparatus and substrate processing method
US10312114B2 (en) 2013-10-10 2019-06-04 SCREEN Holdings Co., Ltd. Substrate processing method, and substrate processing device
US10293383B2 (en) 2014-07-18 2019-05-21 Alfred Kärcher SE Co. KG Mobile high-pressure cleaning apparatus
US20170301534A1 (en) * 2014-10-21 2017-10-19 Tokyo Electron Limited Substrate liquid processing method, substrate liquid processing apparatus, and computer-readable storage medium that stores substrate liquid processing program
CN106796876A (en) * 2014-10-21 2017-05-31 东京毅力科创株式会社 The computer-readable recording medium of substrate method for treating liquids, substrate liquid handling device and the substrate liquid handler that is stored with
CN107644822A (en) * 2016-07-21 2018-01-30 弘塑科技股份有限公司 Semiconductor drying equipment and semiconductor are dried with processing liquid circulation and filter method
CN107644822B (en) * 2016-07-21 2020-12-15 弘塑科技股份有限公司 Semiconductor drying equipment and semiconductor drying treatment liquid circulating and filtering method
US20190088469A1 (en) * 2017-09-21 2019-03-21 SCREEN Holdings Co., Ltd. Method of processing substrate and substrate processing apparatus
US20190374982A1 (en) * 2018-06-06 2019-12-12 Tokyo Ohka Kogyo Co., Ltd. Method for treating substrate and rinsing liquid
CN113394074A (en) * 2020-03-11 2021-09-14 长鑫存储技术有限公司 Method for processing semiconductor structure
US20230290631A1 (en) * 2020-07-31 2023-09-14 SCREEN Holdings Co., Ltd. Substrate processing method
US20220208545A1 (en) * 2020-12-28 2022-06-30 SCREEN Holdings Co., Ltd. Substrate treatment apparatus and substrate treatment method

Also Published As

Publication number Publication date
US9991111B2 (en) 2018-06-05
JP5404361B2 (en) 2014-01-29
KR101170258B1 (en) 2012-07-31
KR20110066837A (en) 2011-06-17
US9859111B2 (en) 2018-01-02
TWI514450B (en) 2015-12-21
JP2011124410A (en) 2011-06-23
TW201133584A (en) 2011-10-01
US20180082832A1 (en) 2018-03-22
US20160049289A1 (en) 2016-02-18

Similar Documents

Publication Publication Date Title
US9991111B2 (en) Apparatus and method of treating surface of semiconductor substrate
JP5404364B2 (en) Semiconductor substrate surface treatment apparatus and method
US7749909B2 (en) Method of treating a semiconductor substrate
US10573508B2 (en) Surface treatment apparatus and method for semiconductor substrate
JP5361790B2 (en) Method for surface treatment of semiconductor substrate
US20150034130A1 (en) Method of cleaning semiconductor substrate and apparatus for cleaning semiconductor substrate

Legal Events

Date Code Title Description
AS Assignment

Owner name: KABUSHIKI KAISHA TOSHIBA, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:OGAWA, YOSHIHIRO;KOIDE, TATSUHIKO;KIMURA, SHINSUKE;AND OTHERS;SIGNING DATES FROM 20100909 TO 20100913;REEL/FRAME:025106/0253

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION