US20090206000A1

US20090206000A1 - Electronic device carrier tape

Info

Publication number: US20090206000A1
Application number: US12/033,448
Authority: US
Inventors: Roslie Saini Bin Bakar
Original assignee: Infineon Technologies AG
Current assignee: Infineon Technologies AG
Priority date: 2008-02-19
Filing date: 2008-02-19
Publication date: 2009-08-20

Abstract

One aspect provides a carrier tape configured to transport semiconductor packages having a semiconductor package thickness. The carrier tape includes a film having a film thickness extending between a first major surface and a second major surface that is less than the semiconductor package thickness. The film is structured to define at least a first structure and a second structure extending between the first and second major surfaces, the first and second structure(s) each having a structure height that is at least equal to the semiconductor package thickness. A hole is punched entirely through the film thickness to define a pocket positioned between the first and second structures, the pocket having a depth equal to the structure height.

Description

BACKGROUND

Carrier tape assemblies are conventionally employed to transport semiconductor packages post-assembly to end-users. A carrier tape assembly generally includes a carrier tape defining multiple pockets, and a sealing film placed over the carrier tape pockets to enclose the semiconductor packages placed in the pockets.
Advanced telecommunication and automotive semiconductor devices are fabricated in a wide range of shapes and sizes. Some semiconductor packages, such as thin small leadless packages, are so small that it can be difficult to usefully orient/access the package in the pocket of the carrier tape. Producers of the devices into which the advanced semiconductor packages are placed demand that the semiconductor packages be uniformly oriented and positioned in the pockets to enable automated equipment to accurately pick-and-place the packages for insertion into the devices.
Improved carrier tape assemblies will benefit the semiconductor package manufacturer by providing an improved delivery vehicle for transporting small semiconductor packages to the customer. Customers will benefit from improved carrier tape assemblies through improved handling of the small semiconductor packages in a manner that simplifies insertion of the packages into electronic devices.
For these and other reasons, there is a need for the present invention.

SUMMARY

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a further understanding of embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and together with the description serve to explain principles of embodiments. Other embodiments and many of the intended advantages of embodiments will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts.

FIG. 1 is a cross-sectional view of a carrier tape according to one embodiment.

FIG. 2 is a cross-sectional view of the carrier tape shown in FIG. 1 including holes punched entirely through a film of the carrier tape to define pockets.

FIG. 3 is the carrier tape shown in FIG. 2 including a first cover sealed to a first major surface of the carrier tape to define a well bottom for the pockets.

FIG. 4 is a cross-sectional view of the carrier tape shown in FIG. 3 including semiconductor packages placed in the pockets.

FIG. 5 is a cross-sectional view of a carrier tape assembly including the carrier tape and the first cover shown in FIG. 4 and a second cover sealed over a second major surface of the carrier tape according to one embodiment.

FIG. 6 is a top view of the carrier tape assembly shown in FIG. 5.

FIG. 7 is a schematic view of a flow chart for a process of fabricating a carrier tape assembly according to one embodiment.

FIG. 8 is a side view of a process employed to fabricate a carrier tape configured to transport semiconductor packages according to one embodiment.

DETAILED DESCRIPTION

In the following Detailed Description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top,” “bottom,” “front,” “back,” “leading,” “trailing,” etc., is used with reference to the orientation of the Figure(s) being described. Because components of embodiments can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
It is to be understood that the features of the various exemplary embodiments described herein may be combined with each other, unless specifically noted otherwise.
Embodiments provide a carrier tape and a carrier tape assembly configured to transport semiconductor packages. The carrier tape is fabricated from a film to include pockets having a depth configured to retain semiconductor packages, and the film thickness is less than the pocket depth and less than a thickness of semiconductor packages.
Embodiments described below provide for a carrier tape that uses fewer raw materials than conventional punched-through carrier tapes, and has a flexible design that accommodates a variety of semiconductor package thicknesses. In one embodiment, the carrier tape is fabricated from a thin film having a thickness of about 0.2 mm that is structured to transport a semiconductor packages having a package thickness of about 0.5 mm (consistent with thin small leadless packages) and other ultra small semiconductor packages.
FIG. 1 is a cross-sectional view of a carrier tape 20 according to one embodiment. Carrier tape 20 has a lateral dimension into the paper of FIG. 1 (see FIG. 6 for a top view of carrier tape 20) and is structured to have the thicknesses shown and described below. Carrier tape 20 includes a film 22 having a thickness T extending between a first major surface 24 and an opposing second major surface 26. Film 22 is processed as described below to define structures 30, 32, 34, 36 extending between first and second major surfaces 24, 26, where each structure 30, 32, 34, 36 has a height H that is greater than the thickness T.
Film 22 is fabricated to include specific structures 30, 32, 34, 36, each of which ultimately provides a pocket for retaining a semiconductor package (not shown) that is thicker than the thickness T of film 22. It is to be understood that a different number of structures and a different conformation of structures 30, 32, 34, 36 can be formed in film 22 without departing from the scope of the embodiments described herein.
Film 22 includes plastic, plastic films including surface treatments/additives/layers, and film laminates. Suitable plastics for film 22 include thermo-formable materials, polycarbonate, polystyrene, blends of polycarbonates, or blends of polystyrenes. Other suitable film materials are also acceptable.
FIG. 2 is a cross-sectional view of film 22 fabricated to include structures 30, 32, 34, 36 and holes punched through film 22 to define pockets 40, 42. In one embodiment, a first pocket 40 is punched entirely through film 22 between structure 30 and structure 32, and a second pocket 42 is punched entirely through film 22 between structure 34 and structure 36. Pocket 40 is adjacent to pocket 42 and film 22 includes a first sealing surface 50 opposite a second sealing surface 60.
In one embodiment, film 22 includes a plurality of troughs 62, each trough 62 positioned between adjacent pockets 40, 42 and forming in part the sealing areas 50, 60 on the first and second major surfaces 24, 26.
FIG. 3 is a cross-sectional view of the punched film 22 shown in FIG. 2 including a first cover 70 sealed onto sealing surface 50. In one embodiment, first cover 70 defines a well bottom of pocket 40 and a well bottom of pocket 42.
In one embodiment, first cover 70 includes optically transparent films that are attachable to sealing surface 50. Suitable materials for first cover 70 include adhesively coated films, thermally activated films, or low melting-point temperature films. In one embodiment, one or both of first cover 70 and sealing surface 50 is treated to increase adhesion between first cover 70 and sealing surface 50.
FIG. 4 is a cross-sectional view of a semiconductor package 80 placed in pocket 40 and a semiconductor package 80 placed in pocket 42. In one embodiment, semiconductor packages 80 are “small” semiconductor packages such as thin small leadless packages having a package thickness S of about 0.5 mm. In one embodiment, pockets 40, 42 are formed in film 22 such that the height H of structures 30, 32 is equal to or greater than the package thickness S. In one embodiment, the height H of the structures 30, 32 is approximately equal to the package thickness S, and both H and S are greater than the thickness T of film 22.
In one embodiment, the thickness T of film 22 is less than 0.5 mm. In one embodiment, the thickness T of film 22 is between 0.05-0.4 mm. In one exemplary embodiment, the thickness T of film 22 is 0.2 mm.
In one embodiment, the height H of structures 30, 32 and structures 34, 36 is at least equal to the thickness S of semiconductor packages 80 and is between about 0.2-0.8 mm. In one exemplary embodiment, the height H of structures 30, 32 and structures 34, 36 is about 0.5 mm.
FIG. 5 is a cross-sectional view of a carrier tape assembly 100 according to one embodiment. Carrier tape assembly 100 includes film 22 structured to define pockets 40, 42 having a well bottom defined by first cover 70 and a second cover 90 sealed onto film 22 to define a lid for pockets 40, 42. In one embodiment, second cover 90 is an optically transparent film attached to sealing surface 60 of film 22. In one embodiment, second cover 90 is similar to first cover 70 and includes adhesively coated films and heat activated sealing films.
Carrier tape assembly 100 provides a plurality of pockets 40, 42 configured to retain and transport semiconductor packages 80. In one embodiment, carrier tape assembly 100 is fabricated such that a center-line of pockets 40, 42 is spaced by a pitch P. In one embodiment, the pitch P is between 1-10 mm, preferably the pitch P is between 1-5 mm, and in one exemplary embodiment the pitch P between adjacent semiconductor devices 80 is about 2 mm.
FIG. 6 is a top view of carrier tape assembly 100 according to one embodiment. As a point of reference, the cross-sectional view of FIGS. 1-5 is taken through 5-5 as illustrated in FIG. 6. In one embodiment, carrier tape assembly 100 includes film 22 that defines indexed holes 102 and pockets 40, 44, 46, 48 formed in film 22 between first cover 70 (FIG. 5) and second cover 90. Film 22 includes films unwound from a carrier roll, and in this regard, film 22 can be several hundred feet long. The indexed holes 102 provide openings that can be grasped by a processing device to pull or push carrier tape 20 through various processing stations. In one embodiment, the processing stations includes a station for placing semiconductor packages 80 into pockets 40, 42, 44, 46, 48 and a separate station in which second cover 90 is sealed over film 22.
In one embodiment, second cover 90 is unwound off of a roll and selectively sealed to sealing area 60. In one embodiment, second cover 90 is progressively sealed onto film 22 of carrier tape 20 and includes the portion sealed on sealing surface 60 and an unsealed portion 110 that is downstream of sealing surface 60.
FIG. 7 is a schematic view of a flow chart 120 for a process of fabricating carrier tape assembly 100 according to one embodiment. Flow chart 120 includes providing a film having a thickness that is less than a thickness of a semiconductor package at 122 (e.g., T<S as described above). Flow chart 120 additionally provides structuring into the film a pocket having a depth of at least the thickness of the semiconductor package at 124. Flow chart 120 includes attaching a cover over a first surface of the film to form a well bottom within the pocket at 126. Flow chart 120 includes placing a semiconductor package in the pocket at 128. Flow chart 120 includes attaching another cover over a second surface of the film opposite the well bottom of the pocket to define a carrier tape assembly at 130. The process of flow chart 120 is not limited to first attaching a cover over a first surface of the film to form a well bottom within the pocket. For example, in some embodiments a semiconductor package is placed in the pocket by a guide pin, and the opposing films are sealed to the top and bottom of the carrier tape film, for example at a taping station. In other embodiments, the semiconductor package is placed in the pocket by a guide pin from either the top side or the bottom side prior to sealing cover films over the carrier tape.
FIG. 8 is a side view of a process 140 for fabricating carrier tape 20 suited for transporting semiconductor packages according to one embodiment. Process 140 includes a plurality of stations including a first station 142 and a second station 144. In one embodiment, first station 142 includes platens 152 that are configured to structure film 22 to have a pocket depth H (structure height H) that is greater than the thickness T of film 22. In one embodiment, platens 152 are configured to form structures 30, 32, 34, 36 having a structure height H that is equal to or greater than a thickness S of semiconductor packages 80 (FIG. 4). In one embodiment, station 142 provides an embossing station configured to emboss both the first and second major surfaces 24, 26 of film 22. In another embodiment, station 142 provides embossing rolls 152 configured to form structures 30, 32, 34, 36 as described above.
In one embodiment, station 144 is configured to punch a hole entirely through the thickness T of film 22 to form pocket 40. In one embodiment, pocket 40 is defined by opposing structures 30, 32 fabricated to have a structure height H that is equal to or greater than the thickness S of the semiconductor package and greater than the thickness T of film 22. In one embodiment, station 144 includes a punch 154 configured to punch a hole in film 22 that is free of fibers, lint, or other debris along the perimeter of pockets 40, 42.
Process 140 is configured to minimize or eliminate the generation of dust during the fabrication of carrier tape 20. For example, conventional paper carrier tapes typically generate 60,000-100,000 dust particles having a dust particle size ranging between 0.3 micrometers to 1.0 micrometers or more. One conventional paper carrier tape generates about 70,000 particles having a size of 0.5 micrometers and above and about 90,000 particles having a size of 0.3 micrometers and above.
In contrast, one embodiment of process 140 punches holes into film 22 to form pockets 40, 42 with a dust generation of less than 10,000 particles. For example, the dust generation of particles 0.3 micrometers and above is less than 9,000 particles and the dust generation of particles 0.5 micrometers and above is less than about 2000 particles for process 140.
In one embodiment, process 140 is configured to prevent electrostatic generation of charge. For example, in one embodiment process 140 is configured to provide a carrier tape 20 having reduced or minimized electrostatic voltage in the range of 0-5 volts for cycle times in the range of 0.1 seconds-0.7 seconds. In contrast, conventional paper processing of carrier tapes is associated with an electrostatic voltage of between −30 volts to −5 volts for a cycle times in the range of 0.1 seconds-0.7 seconds.
Embodiments provide a carrier tape including a film having a film thickness that is structured to include pockets having a pocket depth that is greater than the film thickness. In this manner, thin or relatively thin films are employed to fabricate relatively deep pockets, thus providing a process having a controllable pocket depth. The carrier tape and carrier tape assemblies described herein provide a clean mounting process having low cost, low material usage, and low waste. Embodiments of the carrier tape and carrier tape assembly are characterized as having low electrostatic charge generation and low dust generation.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific carrier tapes and carrier tape assemblies as discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.

Claims

1. A carrier tape configured to transport semiconductor packages having a semiconductor package thickness, the carrier tape comprising:

a film comprising a film thickness extending between a first major surface and a second major surface that is less than the semiconductor package thickness, the film structured to define:

at least a first structure and a second structure extending between the first and second major surfaces, the first and second structures each having a structure height that is at least equal to the semiconductor package thickness;

wherein a hole is punched entirely through the film thickness to define a pocket positioned between the first and second structures, the pocket having a depth equal to the structure height.

2. The carrier tape of claim 2, wherein the film is embossed on both of the first and second major surfaces to define the first and second structures.

3. The carrier tape of claim 1, wherein the film comprises a plurality of pockets formed by a plurality of holes punched entirely through the film thickness, each pocket positioned between one of the first structures and one of the second structures.

4. The carrier tape of claim 3, wherein the film comprises a sealing area adjacent to each of the first and second structures on both of the first and second major surfaces.

5. The carrier tape of claim 4, wherein the film comprises a plurality of troughs, each trough positioned between adjacent pockets and comprising in part the sealing areas on the first and second major surfaces.

6. The carrier tape of claim 5, wherein the trough positioned between adjacent pockets comprises a pitch for semiconductor package spacing.

7. The carrier tape of claim 1, wherein the film comprises a plastic film and the hole punched entirely through the film thickness is characterized by an absence of fibers.

8. A carrier tape assembly configured to transport semiconductor packages having a semiconductor package thickness, the carrier tape assembly comprising:

a film comprising a film thickness extending between a first major surface and a second major surface that is less than the semiconductor package thickness, the first and second major surfaces structured to define at least a first structure and a second structure each having a structure height that is at least equal to the semiconductor package thickness, and a hole punched entirely through the film thickness to define a pocket positioned between the first and second structures, the pocket having a depth equal to the structure height;

a first cover sealed to the first major surface to define a well bottom of the pocket; and

a second cover sealed to the second major surface to define a lid for the pocket.

9. The carrier tape assembly of claim 8, wherein the first and second covers are optically transparent.

10. The carrier tape assembly of claim 8, wherein the first structure and a second structure each comprise a first sealing surface and a second sealing surface.

11. The carrier tape assembly of claim 8, wherein the film comprises a plurality of troughs, each trough positioned between adjacent pockets to define a pitch for semiconductor package spacing.

12. The carrier tape assembly of claim 8, wherein the structure height is at least twice the film thickness.

13. A method of fabricating a carrier tape assembly for transporting semiconductor packages having a semiconductor package thickness, the method comprising:

structuring a film having a thickness less than the semiconductor package thickness with a pocket having a depth of at least the semiconductor package thickness;

attaching a cover over a first surface of the film and forming a well bottom within the pocket;

placing a semiconductor package in the pocket; and

attaching another cover over a second surface of the film opposite the well bottom of the pocket.

14. The method of claim 13, wherein structuring a film comprises structuring a pocket having a depth of at least twice the film thickness.

15. The method of claim 13, wherein structuring a film comprises forming structures in the film having a height between major surfaces of the film that is at least equal to the semiconductor package thickness.

16. A method of fabricating a carrier tape assembly for transporting semiconductor packages having a semiconductor package thickness, the method comprising:

punching a hole entirely through a film having a thickness less than the semiconductor package thickness to form a pocket having a depth of at least the semiconductor package thickness, the hole punched between adjacent structures to define the pocket;

placing a semiconductor package in the pocket; and

17. The method of claim 16, wherein punching a hole entirely through a film comprises generating fewer than 10,000 particles having a size range of 0.3 micrometers or more.

18. The method of claim 16, wherein punching a hole entirely through a film comprises generating fewer than 3,000 particles having a size range of 0.5 micrometers or more.

19. The method of claim 16, further comprising:

fabricating a carrier tape having an electrostatic voltage of a magnitude of between 0-5 volts for cycle times of between 0.1-0.7 seconds.

20. A carrier tape configured to transport semiconductor packages having a semiconductor package thickness, the carrier tape comprising:

a film comprising a film thickness extending between major surfaces of the film that is less than the semiconductor package thickness;

means for structuring the film to include at least a first structure and a second structure extending between the major surfaces, the first and second structures each having a structure height that is at least equal to the semiconductor package thickness; and

means for defining a pocket positioned between the first and second structures, the pocket having a depth equal to the structure height.

21. The carrier tape of claim 20, wherein means for defining a pocket comprises punching a hole through the major surfaces of the film.

22. The carrier tape of claim 20, further comprising:

a first cover sealed to a first major surface to define a well bottom of the pocket; and

a second cover sealed to a second major surface to define a lid for the pocket.