US20090146311A1 - Interconnect structure - Google Patents
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- US20090146311A1 US20090146311A1 US12/370,602 US37060209A US2009146311A1 US 20090146311 A1 US20090146311 A1 US 20090146311A1 US 37060209 A US37060209 A US 37060209A US 2009146311 A1 US2009146311 A1 US 2009146311A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1005—Formation and after-treatment of dielectrics
- H01L2221/1042—Formation and after-treatment of dielectrics the dielectric comprising air gaps
- H01L2221/1047—Formation and after-treatment of dielectrics the dielectric comprising air gaps the air gaps being formed by pores in the dielectric
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates to an integrated circuit structure and fabrication thereof. More particularly, the present invention relates to an interconnect structure and a method for fabricating the same.
- the line pitch of interconnect is decreased unceasingly. Because the RC delay effect gets more significant at reduced line pitch, SiO 2 with a dielectric constant near 4.0 cannot be used as an IMD material in the interconnect structure. Therefore, low-k materials are widely used instead of SiO 2 to reduce the parasitic capacitance, so as to inhibit the RC delay effect and the cross-talking effect and improve the operation speed.
- One of current low-k materials is a porous low-k material, which can be treated with UV-curing to improve the physical properties thereof, including modulus, hardness and adhesivity, etc.
- an interconnect structure usually includes multiple dielectric layers, multiple cycles of UV curing must be conducted.
- the porous low-k layers are transparent to UV light, the UV light can pierce the portions of the porous low-k layers not screened by the interconnect structures. Therefore, a lower porous low-k layer is cured more times and receives more UV-irradiation than an upper one, so that the physical properties of the porous low-k layers are not uniform.
- FIGS. 1A-1C show respective variations of increased modulus ( ⁇ M), increased hardness ( ⁇ H), increased dielectric constant ( ⁇ K) and increased stress ( ⁇ S) of a porous low-k material with the UV-curing condition.
- the modulus, hardness, dielectric constant and stress of a porous low-k layer all increase with the number of UV-curing cycles. Accordingly, the physical properties of the porous low-k layers are not uniform in the prior art because the numbers of the UV-curing cycles experienced by them are different.
- this invention provides an interconnect structure to prevent the above-mentioned accumulative effect caused by multiple UV-curing cycles.
- This invention also provides a method for fabricating the interconnect structure of this invention.
- the interconnect structure of this invention is disposed on a substrate with a conductive part thereon, including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connected with the conductive part, a second porous low-k layer over the first porous low-k layer and the damascene structure, and a first UV cutting layer at least between the first and the second porous low-k layers, wherein the first UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.
- the first UV cutting layer may be further disposed between the damascene structure and the second porous low-k layer.
- an etching stop layer may be further disposed between the first UV cutting layer and the second porous low-k layer, or disposed on the first porous low-k layer and the damascene structure but under the first UV cutting layer.
- the etching stop layer may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer.
- the damascene structure is disposed in the first UV cutting layer and the first porous low-k layer, while an etching stop layer may be further disposed on the first UV cutting layer and the damascene structure but under the second porous low-k layer.
- the first UV cutting layer may include a material selected from nitrogen-containing compounds, carbon-containing compounds and oxygen-containing compounds.
- the thickness of the first UV cutting layer may be about 100 ⁇ -1000 ⁇ , and the first UV cutting layer may be a composite layer of a UV reflection film and a UV absorption film.
- the interconnect structure may further includes a second UV cutting layer that is disposed at least between the porous low-k material and the first porous low-k layer.
- a method for fabricating an interconnect structure of this invention is described below.
- a substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted.
- a damascene structure is formed in the first porous low-k layer to electrically connect with the conductive part, and then a first UV cutting layer is formed on the first porous low-k layer and the damascene structure, wherein the first UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.
- a second porous low-k layer is formed on the first UV cutting layer, and a second UV-curing step is conducted.
- an etching stop layer may be further formed on the first UV cutting layer after the first UV cutting layer is formed but before the second porous low-k layer is formed, or formed on the first porous low-k layer and the damascene structure after the damascene structure is formed but before the first UV cutting layer is formed.
- the etching stop layer may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer.
- a second UV cutting layer may be further formed over the substrate before the first porous low-k layer is formed, and the damascene structure is later formed further through the second UV cutting layer to connect the conductive part.
- a substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted.
- a first UV cutting layer is formed on the first porous low-k layer, and a damascene structure is formed in the first UV cutting layer and the first porous low-k layer to electrically connect with the conductive part, wherein the first UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.
- a second porous low-k layer is formed on the first UV cutting layer and the damascene structure, and a second UV-curing step is conducted.
- an etching stop layer may be further formed on the first UV cutting layer and the damascene structure after the damascene structure is formed but before the second porous low-k layer is formed, wherein the etching stop layer may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer.
- the substrate excluding the conductive part includes a porous low-k material
- the substrate may be provided further with a second UV cutting layer thereon, wherein the conductive part is formed in the second UV cutting layer and the substrate.
- a UV cutting layer is disposed between two porous low-k layers in this invention, a lower porous low-k layer is protected from UV irradiation in the UV-curing step done to an upper porous low-k layer. Therefore, by applying this invention to an IC structure, the physical properties of a lower porous low-k layer do not vary with the number of UV-curing cycles, so that the uniformity of the physical properties of the porous low-k layers can be improved.
- FIGS. 1A-1C show respective variations of increased modulus ( ⁇ M), increased hardness ( ⁇ H), increased dielectric constant ( ⁇ K) and increased stress ( ⁇ S) of a porous low-k material with the UV-curing condition.
- FIGS. 2A-2E illustrate five interconnect structures in a cross-sectional view according to different embodiments of this invention.
- FIGS. 3A and 3B show respective variations of absorption index, refraction index and reflectivity of different UV-absorption materials with the wavelength of light.
- FIGS. 4A-4B illustrate a process flow of fabricating an interconnect structure according to a preferred embodiment of this invention.
- FIGS. 5A-5B illustrate two examples of composite UV cutting layer each as a UV reflection/absorption layer according to an embodiment of this invention
- the substrate excluding the conductive part also includes a porous low-k material and requires a UV cutting layer for protection.
- a substrate may be an IMD layer in which an interconnect structure has been formed.
- the substrate is not restricted to be a porous low-k material layer, but can be any film with a conductive part thereon.
- a UV reflection layer means a layer effective in UV reflection only, such as, a UV-SiN layer.
- a UV absorption layer means a layer effective in UV absorption only, such as, a SiON layer.
- a UV reflection-absorption layer means a layer that is effective in both reflection and absorption. The reflectivity of a UV reflection or reflection-absorption layer may be up to 0.5 or higher.
- FIGS. 2A-2E illustrate five interconnect structures in a cross-sectional view according to different embodiments of this invention.
- the substrate 200 has a conductive part 202 thereon, which may be a conductive line.
- a porous low-k layer 204 is disposed on the substrate 200 .
- a damascene structure 206 like a dual-damascene structure is disposed in the porous low-k layer 204 electrically connected with the conductive part 202 , wherein the damascene structure 206 may include metal.
- a UV cutting layer 207 that is a UV reflection layer or a UV reflection-absorption layer is disposed between the substrate 200 and the porous low-k layer 204 .
- another UV cutting layer 210 that is also a UV reflection layer or a UV reflection-absorption layer is disposed on the porous low-k layers 204 and the damascene structure 206 , and another porous low-k layer 208 is disposed on the UV cutting layer 210 .
- the UV cutting layer 207 or 210 may include a material selected from nitrogen-containing compounds, carbon-containing compounds and oxygen-containing compounds.
- the preferred material thereof is UV-SiN.
- the thickness of the UV cutting layer 207 or 210 is preferably about 100 ⁇ -1000 ⁇ .
- the UV cutting layer 210 can absorb the UV light passing the porous low-k layer 208 to prevent the lower porous low-k layer 204 from being further cured. Thereby, the uniformity of the physical properties of the porous low-k layers is improved.
- an etching stop layer 212 is further disposed between the UV cutting layer 210 and the porous low-k layer 208
- another etching stop layer 213 is further disposed between the UV cutting layer 207 and the porous low-k layer 204
- the etching stop layer 212 or 213 may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer.
- the etching stop layer 212 or 213 may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer.
- the etching stop layer 212 is on the porous low-k layer 204 and the damascene structure 206 but under the UV cutting layer 210
- the etching stop layer 213 is disposed on the substrate 200 but under the UV cutting layer 207 .
- the etching stop layer 212 or 213 may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer, but the etching stop layer 212 / 213 with UV cutting effect must have a relatively lower etching selectivity as compared with the UV cutting layer 210 / 207 to serve as the etching stop of the UV cutting layer 210 / 207 disposed thereon.
- the interconnect structure is different from the above mainly in that the conductive part 202 is disposed in the UV cutting layer 207 and the substrate 200 , and the damascene structure 206 is disposed in the UV cutting layer 210 and the porous low-k layer 204 to electrically connect with the conductive part 202 .
- an etching stop layer 213 may be further disposed on the UV cutting layer 207 and the conductive part 202 but under the porous low-k layer 204
- an etching stop layer 212 may be further disposed on the UV cutting layer 210 and the damascene structure 206 but under the porous low-k layer 208 .
- the UV cutting layer 207 or 210 as a UV reflection-absorption layer in any embodiment may be a composite layer, which may include, as shown in FIGS. 5A-5B , a UV reflection film 503 and a UV absorption film 506 to be effective in both of UV reflection and UV absorption.
- the UV reflection film 503 is disposed on the UV absorption film 506 as in FIG. 5A , or the latter is disposed on the former as in FIG. 5B .
- a preferred combination of the UV reflection film 503 and the UV absorption film 506 is the combination of a UV-SiN film effective in UV reflection only and a SiON film effective in UV absorption only, as indicated by FIGS. 3A-3B .
- FIG. 3A plots the variations of absorption index and refraction index of different UV cutting materials with the wavelength of light, wherein five materials including SiN, UV-treated SiN, SiON, nitrogen-doped carbide (NDC) and oxygen-doped carbide (ODC) were tested for their absorption and refraction indexes at different wavelengths.
- SiON is the highest in the absorption index and refraction index at 300-400 nm, and is therefore a preferred material for the UV absorption film of a composite UV cutting layer as mentioned above.
- FIG. 3B plots the variations of reflectivity of the above five UV cutting materials, SiN, UV-SiN, SiON, NDC and ODC, with light wavelength.
- UV-SiN is the highest in the reflectivity at 300-400 nm, which indicates that UV-SiN is a preferred material for a UV reflection layer or the UV reflection film of a composite UV cutting layer as a UV reflection/absorption layer.
- FIGS. 4A-4B illustrate a process flow of fabricating an interconnect structure according to the preferred embodiment of this invention.
- a substrate 400 with a conductive part 402 thereon is provided, wherein the conductive part 402 may be a conductive line.
- a UV cutting layer 407 and an etching stop layer 413 are sequentially formed on the substrate 400 , and a porous low-k layer 404 is formed on the etching stop layer 413 .
- a UV-curing step 405 is then conducted to the porous low-k layer 404 .
- a damascene structure 406 is then formed in the porous low-k layer 404 to electrically connect with the conductive part 402 .
- Another UV cutting layer 410 is formed on the porous dielectric layer 404 and the damascene structure 406 .
- an etching stop layer 412 and a porous low-k layer 408 are sequentially formed on the UV cutting layer 410 , and another UV-curing step 411 is conducted to the porous low-k layer 408 .
- the UV cutting layer 407 or 410 is a UV reflection layer or a UV reflection-absorption layer, and possible materials thereof are the same as above, wherein the UV reflection-absorption layer may be a composite layer including a UV reflection film 503 and a UV absorption film 506 (FIG. 5 A/B).
- the etching stop layer 413 or 412 may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer.
- the etching stop layer 413 is formed on the substrate 400 before the UV cutting layer 407 is formed, and the etching stop layer 412 is formed on the porous low-k layer 404 and the damascene structure 406 before the UV cutting layer 410 is formed.
- the etching stop layer 412 or 413 may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer, but the etching stop layer 412 / 413 with UV cutting effect must have a relatively lower etching selectivity as compared with the UV cutting layer 410 / 407 to serve as the etching stop of the UV cutting layer 410 / 407 disposed thereon.
- the damascene structure 206 is formed in the UV cutting layer 210 and the porous low-k layer 204 after the UV cutting layer 210 is formed, and the conductive part 202 is formed in the UV cutting layer 207 and the substrate 200 after the UV cutting layer 207 is formed.
- an etching stop layer 212 may be further formed on the UV cutting layer 210 and the damascene structure 206 after the damascene structure 206 is formed, and another etching stop layer 213 may be further formed on the UV cutting layer 207 and the conductive part 202 after the conductive part 202 is formed.
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Abstract
An interconnect structure is disposed on a substrate with a conductive part thereon and includes a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer, a second porous low-k layer over the first porous low-k layer and the damascene structure, and a first UV cutting layer at least between the first porous low-k layer and the second porous low-k layer. The damascene structure is electrically connected with the conductive part. The UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.
Description
- This application is a divisional of and claims priority benefit of an application Ser. No. 11/307,161, filed on Jan. 26, 2006, now allowed, which is a continuation-in-part of and claims priority benefit of a prior application of U.S. patent application Ser. No. 11/163,285 filed on Oct. 13, 2005. The entirety of each of the above-mentioned patent applications is hereby incorporated by reference herein and made a part of this specification.
- 1. Field of the Invention
- The present invention relates to an integrated circuit structure and fabrication thereof. More particularly, the present invention relates to an interconnect structure and a method for fabricating the same.
- 2. Description of the Related Art
- With the rapid reduction in dimension of IC device, the line pitch of interconnect is decreased unceasingly. Because the RC delay effect gets more significant at reduced line pitch, SiO2 with a dielectric constant near 4.0 cannot be used as an IMD material in the interconnect structure. Therefore, low-k materials are widely used instead of SiO2 to reduce the parasitic capacitance, so as to inhibit the RC delay effect and the cross-talking effect and improve the operation speed.
- One of current low-k materials is a porous low-k material, which can be treated with UV-curing to improve the physical properties thereof, including modulus, hardness and adhesivity, etc. Since an interconnect structure usually includes multiple dielectric layers, multiple cycles of UV curing must be conducted. However, because the porous low-k layers are transparent to UV light, the UV light can pierce the portions of the porous low-k layers not screened by the interconnect structures. Therefore, a lower porous low-k layer is cured more times and receives more UV-irradiation than an upper one, so that the physical properties of the porous low-k layers are not uniform.
-
FIGS. 1A-1C show respective variations of increased modulus (ΔM), increased hardness (ΔH), increased dielectric constant (ΔK) and increased stress (ΔS) of a porous low-k material with the UV-curing condition. As shown in the figures, the modulus, hardness, dielectric constant and stress of a porous low-k layer all increase with the number of UV-curing cycles. Accordingly, the physical properties of the porous low-k layers are not uniform in the prior art because the numbers of the UV-curing cycles experienced by them are different. - In view of the foregoing, this invention provides an interconnect structure to prevent the above-mentioned accumulative effect caused by multiple UV-curing cycles.
- This invention also provides a method for fabricating the interconnect structure of this invention.
- The interconnect structure of this invention is disposed on a substrate with a conductive part thereon, including a first porous low-k layer on the substrate, a damascene structure in the first porous low-k layer electrically connected with the conductive part, a second porous low-k layer over the first porous low-k layer and the damascene structure, and a first UV cutting layer at least between the first and the second porous low-k layers, wherein the first UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.
- The first UV cutting layer may be further disposed between the damascene structure and the second porous low-k layer. In such cases, an etching stop layer may be further disposed between the first UV cutting layer and the second porous low-k layer, or disposed on the first porous low-k layer and the damascene structure but under the first UV cutting layer. The etching stop layer may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer.
- Alternatively, the damascene structure is disposed in the first UV cutting layer and the first porous low-k layer, while an etching stop layer may be further disposed on the first UV cutting layer and the damascene structure but under the second porous low-k layer.
- The first UV cutting layer may include a material selected from nitrogen-containing compounds, carbon-containing compounds and oxygen-containing compounds. The thickness of the first UV cutting layer may be about 100 Å-1000 Å, and the first UV cutting layer may be a composite layer of a UV reflection film and a UV absorption film. Moreover, when the substrate excluding the conductive part includes a porous low-k material, the interconnect structure may further includes a second UV cutting layer that is disposed at least between the porous low-k material and the first porous low-k layer.
- A method for fabricating an interconnect structure of this invention is described below. A substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted. A damascene structure is formed in the first porous low-k layer to electrically connect with the conductive part, and then a first UV cutting layer is formed on the first porous low-k layer and the damascene structure, wherein the first UV cutting layer is a UV reflection layer or a UV reflection-absorption layer. A second porous low-k layer is formed on the first UV cutting layer, and a second UV-curing step is conducted.
- In the above method, an etching stop layer may be further formed on the first UV cutting layer after the first UV cutting layer is formed but before the second porous low-k layer is formed, or formed on the first porous low-k layer and the damascene structure after the damascene structure is formed but before the first UV cutting layer is formed. The etching stop layer may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer. Moreover, when the substrate excluding the conductive part includes a porous low-k material, a second UV cutting layer may be further formed over the substrate before the first porous low-k layer is formed, and the damascene structure is later formed further through the second UV cutting layer to connect the conductive part.
- Another method for fabricating an interconnect structure of this invention is described below. A substrate with a conductive part thereon is provided, a first porous low-k layer is formed on the substrate, and then a first UV-curing step is conducted. A first UV cutting layer is formed on the first porous low-k layer, and a damascene structure is formed in the first UV cutting layer and the first porous low-k layer to electrically connect with the conductive part, wherein the first UV cutting layer is a UV reflection layer or a UV reflection-absorption layer. A second porous low-k layer is formed on the first UV cutting layer and the damascene structure, and a second UV-curing step is conducted.
- In the above method, an etching stop layer may be further formed on the first UV cutting layer and the damascene structure after the damascene structure is formed but before the second porous low-k layer is formed, wherein the etching stop layer may also be a UV cutting layer like a UV absorption layer, a UV reflection layer or a UV reflection-absorption layer. Moreover, when the substrate excluding the conductive part includes a porous low-k material, the substrate may be provided further with a second UV cutting layer thereon, wherein the conductive part is formed in the second UV cutting layer and the substrate.
- Since a UV cutting layer is disposed between two porous low-k layers in this invention, a lower porous low-k layer is protected from UV irradiation in the UV-curing step done to an upper porous low-k layer. Therefore, by applying this invention to an IC structure, the physical properties of a lower porous low-k layer do not vary with the number of UV-curing cycles, so that the uniformity of the physical properties of the porous low-k layers can be improved.
- It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
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FIGS. 1A-1C show respective variations of increased modulus (ΔM), increased hardness (ΔH), increased dielectric constant (ΔK) and increased stress (ΔS) of a porous low-k material with the UV-curing condition. -
FIGS. 2A-2E illustrate five interconnect structures in a cross-sectional view according to different embodiments of this invention. -
FIGS. 3A and 3B show respective variations of absorption index, refraction index and reflectivity of different UV-absorption materials with the wavelength of light. -
FIGS. 4A-4B illustrate a process flow of fabricating an interconnect structure according to a preferred embodiment of this invention. -
FIGS. 5A-5B illustrate two examples of composite UV cutting layer each as a UV reflection/absorption layer according to an embodiment of this invention - In the embodiments of this invention, the substrate excluding the conductive part also includes a porous low-k material and requires a UV cutting layer for protection. Such a substrate may be an IMD layer in which an interconnect structure has been formed. However, the substrate is not restricted to be a porous low-k material layer, but can be any film with a conductive part thereon.
- It is particularly noted that in this invention, a UV reflection layer means a layer effective in UV reflection only, such as, a UV-SiN layer. A UV absorption layer means a layer effective in UV absorption only, such as, a SiON layer. A UV reflection-absorption layer means a layer that is effective in both reflection and absorption. The reflectivity of a UV reflection or reflection-absorption layer may be up to 0.5 or higher.
-
FIGS. 2A-2E illustrate five interconnect structures in a cross-sectional view according to different embodiments of this invention. Referring toFIG. 2A first, thesubstrate 200 has aconductive part 202 thereon, which may be a conductive line. A porous low-k layer 204 is disposed on thesubstrate 200. Adamascene structure 206 like a dual-damascene structure is disposed in the porous low-k layer 204 electrically connected with theconductive part 202, wherein thedamascene structure 206 may include metal. AUV cutting layer 207 that is a UV reflection layer or a UV reflection-absorption layer is disposed between thesubstrate 200 and the porous low-k layer 204. - Referring to
FIG. 2A again, anotherUV cutting layer 210 that is also a UV reflection layer or a UV reflection-absorption layer is disposed on the porous low-k layers 204 and thedamascene structure 206, and another porous low-k layer 208 is disposed on theUV cutting layer 210. TheUV cutting layer UV cutting layer UV cutting layer - It is noted that during the UV-curing step of the upper porous low-
k layer 208, theUV cutting layer 210 can absorb the UV light passing the porous low-k layer 208 to prevent the lower porous low-k layer 204 from being further cured. Thereby, the uniformity of the physical properties of the porous low-k layers is improved. - Referring to
FIG. 2B , in another embodiment, anetching stop layer 212 is further disposed between theUV cutting layer 210 and the porous low-k layer 208, and anotheretching stop layer 213 is further disposed between theUV cutting layer 207 and the porous low-k layer 204, wherein theetching stop layer FIG. 2C , theetching stop layer 212 is on the porous low-k layer 204 and thedamascene structure 206 but under theUV cutting layer 210, and theetching stop layer 213 is disposed on thesubstrate 200 but under theUV cutting layer 207. In such a case, theetching stop layer etching stop layer 212/213 with UV cutting effect must have a relatively lower etching selectivity as compared with theUV cutting layer 210/207 to serve as the etching stop of theUV cutting layer 210/207 disposed thereon. - Referring to
FIG. 2D , in still another embodiment, the interconnect structure is different from the above mainly in that theconductive part 202 is disposed in theUV cutting layer 207 and thesubstrate 200, and thedamascene structure 206 is disposed in theUV cutting layer 210 and the porous low-k layer 204 to electrically connect with theconductive part 202. Similarly, as shown inFIG. 2E , anetching stop layer 213 may be further disposed on theUV cutting layer 207 and theconductive part 202 but under the porous low-k layer 204, and anetching stop layer 212 may be further disposed on theUV cutting layer 210 and thedamascene structure 206 but under the porous low-k layer 208. - It is also noted that the
UV cutting layer FIGS. 5A-5B , aUV reflection film 503 and aUV absorption film 506 to be effective in both of UV reflection and UV absorption. TheUV reflection film 503 is disposed on theUV absorption film 506 as inFIG. 5A , or the latter is disposed on the former as inFIG. 5B . A preferred combination of theUV reflection film 503 and theUV absorption film 506 is the combination of a UV-SiN film effective in UV reflection only and a SiON film effective in UV absorption only, as indicated byFIGS. 3A-3B . -
FIG. 3A plots the variations of absorption index and refraction index of different UV cutting materials with the wavelength of light, wherein five materials including SiN, UV-treated SiN, SiON, nitrogen-doped carbide (NDC) and oxygen-doped carbide (ODC) were tested for their absorption and refraction indexes at different wavelengths. As shown inFIG. 3A , SiON is the highest in the absorption index and refraction index at 300-400 nm, and is therefore a preferred material for the UV absorption film of a composite UV cutting layer as mentioned above. -
FIG. 3B plots the variations of reflectivity of the above five UV cutting materials, SiN, UV-SiN, SiON, NDC and ODC, with light wavelength. As shown inFIG. 3B , UV-SiN is the highest in the reflectivity at 300-400 nm, which indicates that UV-SiN is a preferred material for a UV reflection layer or the UV reflection film of a composite UV cutting layer as a UV reflection/absorption layer. -
FIGS. 4A-4B illustrate a process flow of fabricating an interconnect structure according to the preferred embodiment of this invention. Referring toFIG. 4A , asubstrate 400 with aconductive part 402 thereon is provided, wherein theconductive part 402 may be a conductive line. AUV cutting layer 407 and anetching stop layer 413 are sequentially formed on thesubstrate 400, and a porous low-k layer 404 is formed on theetching stop layer 413. A UV-curingstep 405 is then conducted to the porous low-k layer 404. - Referring to
FIG. 4B , adamascene structure 406 is then formed in the porous low-k layer 404 to electrically connect with theconductive part 402. AnotherUV cutting layer 410 is formed on theporous dielectric layer 404 and thedamascene structure 406. Then, anetching stop layer 412 and a porous low-k layer 408 are sequentially formed on theUV cutting layer 410, and another UV-curingstep 411 is conducted to the porous low-k layer 408. TheUV cutting layer UV reflection film 503 and a UV absorption film 506 (FIG. 5A/B). Theetching stop layer - Alternatively, in another embodiment, the
etching stop layer 413 is formed on thesubstrate 400 before theUV cutting layer 407 is formed, and theetching stop layer 412 is formed on the porous low-k layer 404 and thedamascene structure 406 before theUV cutting layer 410 is formed. In such a case, theetching stop layer etching stop layer 412/413 with UV cutting effect must have a relatively lower etching selectivity as compared with theUV cutting layer 410/407 to serve as the etching stop of theUV cutting layer 410/407 disposed thereon. - It is noted that since a
UV cutting layer 410 is formed on the porous low-k layer 404, the UV light passing the porous low-k layer 408 is absorbed by theUV cutting layer 410 during the UV-curing of the porous low-k layer 408. Therefore, the porous low-k layer 404 is not cured again by the UV light. Accordingly, by applying the above process to the fabrication of multi-level interconnect structure, it is possible to improve the uniformity of the physical properties of porous low-k layers at different levels. - On the other hand, to form the structure of
FIG. 2D or 2E, thedamascene structure 206 is formed in theUV cutting layer 210 and the porous low-k layer 204 after theUV cutting layer 210 is formed, and theconductive part 202 is formed in theUV cutting layer 207 and thesubstrate 200 after theUV cutting layer 207 is formed. In addition, as shown inFIG. 2E , anetching stop layer 212 may be further formed on theUV cutting layer 210 and thedamascene structure 206 after thedamascene structure 206 is formed, and anotheretching stop layer 213 may be further formed on theUV cutting layer 207 and theconductive part 202 after theconductive part 202 is formed. - It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention covers modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Claims (15)
1. An interconnect structure, disposed on a substrate with a conductive part thereon and comprising:
a first porous low-k layer on the substrate;
a damascene structure in the first porous low-k layer, electrically connected with the conductive part;
a second porous low-k layer over the first porous low-k layer and the damascene structure; and
a first UV cutting layer at least between the first porous low-k layer and the second porous low-k layer, wherein the UV cutting layer is a UV reflection layer or a UV reflection-absorption layer.
2. The interconnect structure of claim 1 , wherein the first UV cutting layer is further disposed between the damascene structure and the second porous low-k layer.
3. The interconnect structure of claim 2 , further comprising an etching stop layer between the first UV cutting layer and the second porous low-k layer.
4. The interconnect structure of claim 3 , wherein the etching stop layer also serves as a UV reflection layer, a UV absorption layer or a UV reflection-absorption layer.
5. The interconnect structure of claim 2 , further comprising an etching stop layer disposed on the first porous low-k layer and the damascene structure and under the first UV cutting layer.
6. The interconnect structure of claim 5 , wherein the etching stop layer also serves as a UV reflection layer, a UV absorption layer or a UV reflection-absorption layer.
7. The interconnect structure of claim 1 , wherein the damascene structure is disposed in the first UV cutting layer and the first porous low-k layer.
8. The interconnect structure of claim 7 , further comprising an etching stop layer disposed on the first UV cutting layer and the damascene structure and under the second porous low-k layer.
9. The interconnect structure of claim 8 , wherein the etching stop layer also serves as a UV reflection layer, a UV absorption layer or a UV reflection-absorption layer.
10. The interconnect structure of claim 1 , wherein the first UV cutting layer comprises a material selected from nitrogen-containing compounds, carbon-containing compounds and oxygen-containing compounds.
11. The interconnect structure of claim 10 , wherein the first UV cutting layer as a UV reflection layer comprises UV-SiN.
12. The interconnect structure of claim 1 , wherein the first UV cutting layer as a UV reflection-absorption layer comprises a composite layer that comprises a UV reflection film and a UV absorption film thereon.
13. The interconnect structure of claim 1 , wherein the first UV cutting layer as a UV reflection-absorption layer comprises a composite layer that comprises a UV absorption film and a UV reflection film thereon.
14. The interconnect structure of claim 1 , wherein the first UV cutting layer has a thickness of about 100 Å to about 1000 Å.
15. The interconnect structure of claim 1 , wherein the substrate excluding the conductive part comprises a porous low-k material, further comprising a second UV cutting layer at least between the porous low-k material and the first porous low-k layer.
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US11/307,161 US7514347B2 (en) | 2005-10-13 | 2006-01-26 | Interconnect structure and fabricating method thereof |
US12/370,602 US20090146311A1 (en) | 2005-10-13 | 2009-02-13 | Interconnect structure |
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US20070218214A1 (en) * | 2006-03-14 | 2007-09-20 | Kuo-Chih Lai | Method of improving adhesion property of dielectric layer and interconnect process |
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DE102006051496B4 (en) * | 2006-10-31 | 2008-09-25 | Advanced Micro Devices, Inc., Sunnyvale | Semiconductor device with a porous material layer stack with small ε with reduced UV sensitivity and method for its preparation |
US8258629B2 (en) | 2008-04-02 | 2012-09-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Curing low-k dielectrics for improving mechanical strength |
US9029265B2 (en) | 2013-10-15 | 2015-05-12 | United Microelectronics Corp. | Method for forming semiconductor structure |
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US20060160352A1 (en) * | 2004-12-09 | 2006-07-20 | Asm Japan K.K. | Method of forming interconnection in semiconductor device |
US7091088B1 (en) * | 2004-06-03 | 2006-08-15 | Spansion Llc | UV-blocking etch stop layer for reducing UV-induced charging of charge storage layer in memory devices in BEOL processing |
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US7199046B2 (en) * | 2003-11-14 | 2007-04-03 | Tokyo Electron Ltd. | Structure comprising tunable anti-reflective coating and method of forming thereof |
US7166531B1 (en) * | 2005-01-31 | 2007-01-23 | Novellus Systems, Inc. | VLSI fabrication processes for introducing pores into dielectric materials |
US20070085208A1 (en) * | 2005-10-13 | 2007-04-19 | Feng-Yu Hsu | Interconnect structure |
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US7091088B1 (en) * | 2004-06-03 | 2006-08-15 | Spansion Llc | UV-blocking etch stop layer for reducing UV-induced charging of charge storage layer in memory devices in BEOL processing |
US20060160352A1 (en) * | 2004-12-09 | 2006-07-20 | Asm Japan K.K. | Method of forming interconnection in semiconductor device |
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