US20080073321A1 - Method of patterning an anti-reflective coating by partial etching - Google Patents
Method of patterning an anti-reflective coating by partial etching Download PDFInfo
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- US20080073321A1 US20080073321A1 US11/534,420 US53442006A US2008073321A1 US 20080073321 A1 US20080073321 A1 US 20080073321A1 US 53442006 A US53442006 A US 53442006A US 2008073321 A1 US2008073321 A1 US 2008073321A1
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- 238000000034 method Methods 0.000 title claims abstract description 94
- 238000005530 etching Methods 0.000 title claims abstract description 22
- 238000000059 patterning Methods 0.000 title claims abstract description 21
- 239000010409 thin film Substances 0.000 claims abstract description 51
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Images
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/091—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
Definitions
- the present invention relates to a method for patterning a thin film on a substrate, and more particularly to a method for patterning a thin film on a substrate using a partially etched anti-reflective coating (ARC) layer.
- ARC anti-reflective coating
- the present invention relates to a method for patterning a thin film on a substrate.
- a method of patterning a thin film on a substrate, and a computer readable medium for patterning comprising: preparing a film stack on the substrate, the film stack comprising the thin film formed on the substrate, an anti-reflective coating (ARC) layer formed on the thin film, and a mask layer formed on the ARC layer; forming a pattern in the mask layer; partially transferring the pattern to the ARC layer by transferring the pattern to a depth less than the thickness of the ARC layer; removing a remainder of the mask layer following the partial transfer of the pattern to the ARC layer; completing the transferring of the pattern to the ARC layer by etching the ARC layer; and transferring the pattern to the thin film while substantially consuming the ARC layer.
- ARC anti-reflective coating
- FIGS. 2A through 2K illustrate schematically a method for patterning a thin film on a substrate according to an embodiment of the invention.
- FIG. 3 illustrates a flow chart of a method for patterning a thin film on a substrate according to an embodiment of the invention.
- a lithographic structure 100 comprises a film stack formed on substrate 110 .
- the film stack comprises a thin film 120 , such as a dielectric layer, formed on substrate 110 , an organic planarization layer (OPL) 130 formed on the thin film 120 , an anti-reflective coating (ARC) layer 140 formed on the OPL 130 , and a layer of photo-resist 150 formed on the ARC layer 140 .
- OPL organic planarization layer
- ARC anti-reflective coating
- the photo-resist layer 150 is exposed to a first image pattern 152 using a photo-lithography system, and thereafter in FIG. 1C , the first image pattern 152 is developed in a developing solvent to form a first pattern 154 in the photo-resist layer 150 .
- the first pattern 154 in the photo-resist layer 150 is transferred to the underlying ARC layer 140 using a dry etching process to form a first ARC pattern 142 as shown in FIG. 1D .
- photo-resist layer 150 is removed, and a second photo-resist layer 160 is applied to the ARC layer 140 .
- the second photo-resist layer 160 is exposed to a second image pattern 162 , as shown in FIG. 1F , using a photo-lithography system, and thereafter in FIG. 1G , the second image pattern 162 is developed in a developing solvent to form a second pattern 164 in the second photo-resist layer 160 .
- the second pattern 164 in the second photo-resist layer 160 is transferred to the underlying ARC layer 140 using an etching process to form a second ARC pattern 144 as shown in FIG. 1H .
- the second layer of photo-resist 160 is removed, and the first and second ARC patterns 142 and 144 are transferred to the underlying OPL 1 30 and the thin film 120 to form a first feature pattern 122 and a second feature pattern 124 using one or more etching processes.
- the ARC layer 140 is only partially consumed, thus, leaving material, in addition to the remaining OPL, to be removed.
- the inventors have observed that the process, such as a flash etch, required to remove the remaining ARC layer is detrimental to the material properties of the underlying thin film 120 .
- the thin film 120 may comprise a low dielectric constant (low-k, or ultra-low-k) dielectric film that may be used in back-end-of-line (BEOL) metallization schemes for electronic devices.
- low dielectric constant (low-k, or ultra-low-k) dielectric film that may be used in back-end-of-line (BEOL) metallization schemes for electronic devices.
- BEOL back-end-of-line
- Such materials which may include non-porous low-k dielectrics as well as porous low-k dielectrics, are susceptible to damage, e.g., degradation of dielectric constant, water absorption, residue formation, etc., when exposed to the chemistries necessary for removal of the ARC layer 140 .
- the thickness of the ARC layer 140 is dictated by the requirements set forth for providing anti-reflective properties during the patterning of the layer of photo-resist.
- the thickness ( ⁇ ) of the ARC layer 140 should be chosen to be a quarter wavelength (i.e., ⁇ ⁇ /4, 3 ⁇ /4, 5 ⁇ /4, etc.) of the incident EM radiation during the imaging of the layer of photo-resist.
- the thickness ( ⁇ ) of the ARC layer 140 should be chosen to be sufficiently thick to permit absorption of the incident EM radiation.
- the inventors have observed for current geometries that the minimum thickness required to provide anti-reflective properties still leads to an only partially consumed ARC layer following the transfer of the pattern to the underlying thin film.
- a method of patterning a substrate is illustrated in FIGS. 2A through 2K , and FIG. 3 .
- the method is illustrated in a flow chart 500 , and begins in 510 with forming a lithographic structure 200 comprising a film stack formed on substrate 210 .
- the film stack comprises a thin film 220 formed on substrate 210 , an optional organic planarization layer (OPL) 230 formed on the thin film 220 , an anti-reflective coating (ARC) layer 240 formed on the optional OPL 230 (or on the thin film 220 if there is no OPL 230 ), and a layer of photo-resist 250 formed on the ARC layer 240 .
- OPL organic planarization layer
- ARC anti-reflective coating
- the film stack is shown to be formed directly upon substrate 210 , there may exist additional layers between the film stack and the substrate 210 .
- the film stack may facilitate the formation of one interconnect level, and this interconnect level may be formed upon another interconnect level on substrate 210 .
- the thin film 220 may include a single material layer, or a plurality of material layers.
- the thin film 220 may comprise a bulk material layer having a capping layer.
- the thin film 220 may comprise a conductive layer, a non-conductive layer, or a semi-conductive layer.
- the thin film 220 may include a material layer comprising a metal, metal oxide, metal nitride, metal oxynitride, metal silicate, metal silicide, silicon, poly-crystalline silicon (poly-silicon), doped silicon, silicon dioxide, silicon nitride, silicon carbide, silicon oxynitride, etc.
- the thin film 220 may comprise a low dielectric constant (i.e., low-k) or ultra-low dielectric constant (i.e., ultra-low-k) dielectric layer having a nominal dielectric constant value less than the dielectric constant of SiO 2 , which is approximately 4 (e.g., the dielectric constant for thermal silicon dioxide can range from 3.8 to 3.9). More specifically, the thin film 220 may have a dielectric constant of 3.7 or less, such as a dielectric constant ranging from 1.6 to 3.7.
- These dielectric layers may include at least one of an organic, inorganic, or inorganic-organic hybrid material. Additionally, these dielectric layers may be porous or non-porous. For example, these dielectric layers may include an inorganic, silicate-based material, such as carbon doped silicon oxide (or organo siloxane), deposited using CVD techniques. Examples of such films include Black Diamonds CVD organosilicate glass (OSG) films commercially available from Applied Materials, Inc., or Corals CVD films commercially available from Novellus Systems, Inc.
- OSG Black Diamonds CVD organosilicate glass
- these dielectric layers may include porous inorganic-organic hybrid films comprised of a single-phase, such as a silicon oxide-based matrix having CH 3 bonds that hinder full densification of the film during a curing or deposition process to create small voids (or pores).
- these dielectric layers may include porous inorganic-organic hybrid films comprised of at least two phases, such as a carbon-doped silicon oxide-based matrix having pores of organic material (e.g., porogen) that is decomposed and evaporated during a curing process.
- these dielectric layers may include an inorganic, silicate-based material, such as hydrogen silsesquioxane (HSQ) or methyl silsesquioxane (MSQ), deposited using SOD (spin-on dielectric) techniques.
- examples of such films include FOx® HSQ commercially available from Dow Corning, XLK porous HSQ commercially available from Dow Corning, and JSR LKD-5109 commercially available from JSR Microelectronics.
- these dielectric layers can comprise an organic material deposited using SOD techniques.
- Such films include SiLK-I, SiLK-J, SiLK-H, SiLK-D, and porous SiLK® semiconductor dielectric resins commercially available from Dow Chemical, and GX-3TM, and GX- 3 PTM semiconductor dielectric resins commercially available from Honeywell.
- the thin film 220 can be formed using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or a spin-on technique, such as those offered in the Clean Track ACT 8 SOD (spin-on dielectric), ACT 12 SOD, and Lithius coating systems commercially available from Tokyo Electron Limited (TEL).
- the Clean Track ACT 8 (200 mm), ACT 12 (300 mm), and Lithius (300 mm) coating systems provide coat, bake, and cure tools for SOD materials.
- the track system can be configured for processing substrate sizes of 100 mm, 200 mm, 300 mm, and greater. Other systems and methods for forming a thin film on a substrate are well known to those skilled in the art of both spin-on technology and vapor deposition technology.
- the optional OPL 230 can include a photo-sensitive organic polymer or an etch type organic compound.
- the photo-sensitive organic polymer may be polyacrylate resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylenether resin, polyphenylenesulfide resin, or benzocyclobutene (BCB). These materials may be formed using spin-on techniques.
- the ARC layer 240 possesses material properties suitable for use as an anti-reflective coating.
- the ARC layer 240 may include an organic material or an inorganic material.
- the ARC layer 240 may include amorphous carbon (a-C), a-FC, or a material having a structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti, and combinations thereof, and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F.
- the ARC layer 240 can be fabricated to demonstrate an optical range for index of refraction of approximately 1.40 ⁇ n ⁇ 2.60, and for extinction coefficient of approximately 0.01 ⁇ k ⁇ 0.78.
- At least one of the index of refraction and the extinction can be graded (or varied) along a thickness of the ARC layer 240 . Additional details are provided in U.S. Pat. No. 6,316,167, entitled “TUNABLE VAPOR DEPOSITED MATERIALS AS ANTIREFLECTIVE COATINGS, HARDMASKS AND AS COMBINED ANTIREFLECTIVE COATING/HARDMASKS AND METHODS OF FABRICATION THEREOF AND APPLICATION THEREOF,” assigned to International Business Machines Corporation, and the entire content of which is incorporated by reference herein in its entirety.
- the ARC layer 240 can be formed using vapor deposition techniques including chemical vapor deposition (CVD) and plasma enhanced CVD (PECVD).
- CVD chemical vapor deposition
- PECVD plasma enhanced CVD
- the ARC layer 240 can be formed using PECVD, as described in greater detail in pending U.S. patent application Ser. No. 10/644,958, entitled “METHOD AND APPARATUS FOR DEPOSITING MATERIALS WITH TUNABLE OPTICAL PROPERTIES AND ETCHING CHARACTERISTICS,” filed on Aug. 21, 2003, the entire content of which is incorporated herein in its entirety.
- the optical properties of the ARC layer 240 such as the index of refraction, can be selected so as to substantially match the optical properties of the underlying layer, or layers.
- underlying layers such as non-porous dielectric films can require achieving an index of refraction in the range of 1.4 ⁇ n ⁇ 2.6; and underlying layers such as porous dielectric films can require achieving an index of refraction in the range of 1.2 ⁇ n ⁇ 2.6.
- the photo-resist layer 250 may comprise 248 nm (nanometer) resists, 193 nm resists, 157 nm resists, or EUV (extreme ultraviolet) resists.
- the photo-resist layer 250 can be formed using a track system.
- the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL).
- TEL Tokyo Electron Limited
- Other systems and methods for forming a photo-resist film on a substrate are well known to those skilled in the art of spin-on resist technology.
- the photo-resist layer 250 is patterned and developed. As shown in FIG. 2B , the photo-resist layer 250 is imaged with an image pattern 252 using a photo-lithography system. The exposure to EM radiation through a reticle is performed in a dry or wet photo-lithography system.
- the image pattern can be formed using any suitable conventional stepping lithographic system, or scanning lithographic system.
- the photo-lithographic system may be commercially available from ASML Netherlands B.V. (De Run 6501, 5504 DR Veldhoven, The Netherlands), or Canon USA, Inc., Semiconductor Equipment Division (3300 North First Street, San Jose, Calif. 95134).
- the exposed photo-resist layer 250 is subjected to a developing process to remove the image pattern 252 , and form a mask pattern 254 in the photo-resist layer 250 .
- the developing process can include exposing the substrate to a developing solvent in a developing system, such as a track system.
- the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL).
- the mask pattern 254 is partially transferred to the underlying ARC layer 240 to form an ARC pattern 242 .
- the ARC pattern 242 extends to a depth less than the thickness of the ARC layer 240 .
- the mask pattern 254 may be partially transferred to the underlying ARC layer 240 using an etching process, such as a dry etching process or a wet etching process.
- the mask pattern 254 may be partially transferred to the underlying ARC layer 240 using a dry plasma etching process or a dry non-plasma etching process.
- the mask pattern 254 may be partially transferred to the underlying ARC layer 240 using an anisotropic dry etching process, a reactive ion etching process, a laser-assisted etching process, an ion milling process, or an imprinting process, or a combination of two or more thereof.
- the layer of photo-resist 250 is removed.
- the photo-resist layer 250 may be removed using a wet stripping process, a dry plasma ashing process, or a dry non-plasma ashing process.
- an optional second photo-resist layer 260 is formed on the ARC layer 240 .
- the optional second photo-resist layer 260 may comprise 248 nm (nanometer) resists, 193 nm resists, 157 nm resists, or EUV (extreme ultraviolet) resists.
- the optional second photo-resist layer 260 can be formed using a track system.
- the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL).
- TEL Tokyo Electron Limited
- Other systems and methods for forming a photo-resist film on a substrate are well known to those skilled in the art of spin-on resist technology.
- the optional second photo-resist layer 260 is imaged with an optional second image pattern 262 , and the exposed optional second photo-resist layer 260 is subjected to a developing process to remove the optional second image pattern region and form an optional second mask pattern 264 in the optional second photo-resist layer 260 .
- the optional second mask pattern 264 is partially transferred to the underlying ARC layer 240 to form an optional second ARC pattern 244 .
- the optional second ARC pattern 244 extends to a depth less than the thickness of the ARC layer 240 .
- the optional second layer of photo-resist 260 is removed.
- ARC layer 240 may be double pattern, or multi-pattern, ARC layer 240 using a single layer of photo-resist.
- the single layer of photo-resist may be double imaged, and then removed following the partial transfer of the double pattern to the underlying ARC layer.
- the single layer of photo-resist may be imaged and developed, and these two steps may be repeated with the same layer of photo-resist. Thereafter, the layer of photo-resist may be removed following the partial transfer of the double pattern to the underlying ARC layer.
- the ARC pattern 242 and the optional second ARC pattern 244 are transferred to the underlying OPL 230 , if present, and to the thin film 220 to form a feature pattern 222 and an optional second feature pattern 224 using one or more etching processes.
- the ARC layer 240 is substantially consumed as illustrated in FIG. 2K .
- the one or more etching processes may include any combination of wet or dry etching processes.
- the dry etching processes may include dry plasma etching processes or dry non-plasma etching processes.
- the OPL 230 if present, may be removed.
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Abstract
A method of patterning a thin film is described. The method comprises forming a thin film to be patterned on a substrate, forming an anti-reflective coating (ARC) layer on the thin film, and forming a mask layer on the ARC layer. Thereafter, the mask layer is patterned to form a pattern therein, and the pattern is partially transferred to the ARC layer using a transfer process, such as an etching process. Once the mask layer is removed, the pattern is completely transferred to the ARC layer using an etching process, and the pattern in the ARC layer is transferred to the underlying thin film using another etching process.
Description
- This application is related to co-pending U.S. patent application Ser. No. 11/534,261, entitled “METHOD FOR DOUBLE IMAGING A DEVELOPABLE ANTI-REFLECTIVE COATING” (TTCA-157), filed on even date herewith; co-pending U.S. patent application Ser. No. 11/534,365, entitled “METHOD FOR DOUBLE PATTERNING A DEVELOPABLE ANTI-REFLECTIVE COATING” (TTCA-158), filed on even date herewith; co-pending U.S. patent application Ser. No. 11/XXX,XXX, entitled “METHOD OF PATTERNING A DEVELOPABLE ANTI-REFLECTIVE COATING BY PARTIAL DEVELOPING” (TTCA-160), filed on even date herewith; and co-pending U.S. patent application Ser. No. 11/XXX,XXX, entitled “METHOD FOR DOUBLE PATTERNING A THIN FILM” (TTCA-161), filed on even date herewith. The entire contents of these applications are herein incorporated by reference in their entirety.
- 1. Field of the Invention
- The present invention relates to a method for patterning a thin film on a substrate, and more particularly to a method for patterning a thin film on a substrate using a partially etched anti-reflective coating (ARC) layer.
- 2. Description of Related Ar
- In material processing methodologies, pattern etching comprises the application of a thin layer of light-sensitive material, such as photo-resist, to an upper surface of a substrate that is subsequently patterned in order to provide a mask for transferring this pattern to the underlying thin film on a substrate during etching. The patterning of the light-sensitive material generally involves exposure by a radiation source through a reticle (and associated optics) of the light-sensitive material using, for example, a photo-lithography system, followed by the removal of the irradiated regions of the light-sensitive material (as in the case of positive photoresist), or non-irradiated regions (as in the case of negative resist) using a developing solvent. Moreover, this mask layer may comprise multiple sub-layers.
- Once the pattern is transferred to the underlying thin film, it is essential to remove the mask layer while not damaging the material properties of the underlying thin film. For example, the thin film may comprise a low dielectric constant (low-k, or ultra-low-k) dielectric film that may be used in back-end-of-line (BEOL) metallization schemes for electronic devices. Such materials, which may include non-porous low-k dielectrics as well as porous low-k dielectrics, are susceptible to damage, e.g., degradation of dielectric constant, water absorption, residue formation, etc., when exposed to the chemistries necessary for removal of the mask layer and its sub-layers. Therefore, it is important to establish pattern transfer schemes that reduce the potential for damaging the underlying thin film when forming such a pattern and removing the necessary mask layer(s).
- The present invention relates to a method for patterning a thin film on a substrate.
- According to one embodiment, a method of patterning a thin film using an anti-reflective coating (ARC) layer is described. A pattern, formed in a mask layer overlying the ARC layer, is partially transferred to the ARC layer, and then the mask layer is removed. Thereafter, the pattern is completely transferred to the ARC layer using an etching process.
- According to another embodiment, a method of patterning a thin film on a substrate, and a computer readable medium for patterning, are described, comprising: preparing a film stack on the substrate, the film stack comprising the thin film formed on the substrate, an anti-reflective coating (ARC) layer formed on the thin film, and a mask layer formed on the ARC layer; forming a pattern in the mask layer; partially transferring the pattern to the ARC layer by transferring the pattern to a depth less than the thickness of the ARC layer; removing a remainder of the mask layer following the partial transfer of the pattern to the ARC layer; completing the transferring of the pattern to the ARC layer by etching the ARC layer; and transferring the pattern to the thin film while substantially consuming the ARC layer.
- In the accompanying drawings:
-
FIGS. 1A through 1J illustrate schematically a known method for patterning a thin film on a substrate; -
FIGS. 2A through 2K illustrate schematically a method for patterning a thin film on a substrate according to an embodiment of the invention; and -
FIG. 3 illustrates a flow chart of a method for patterning a thin film on a substrate according to an embodiment of the invention. - In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular processes and patterning systems. However, it should be understood that the invention may be practiced in other embodiments that depart from these specific details.
- Referring now to the drawings wherein like reference numerals designate identical or corresponding parts throughout the several views,
FIGS. 1A through 1J schematically illustrate a method of patterning a substrate according to the prior art. As illustrated inFIG. 1A , alithographic structure 100 comprises a film stack formed onsubstrate 110. The film stack comprises athin film 120, such as a dielectric layer, formed onsubstrate 110, an organic planarization layer (OPL) 130 formed on thethin film 120, an anti-reflective coating (ARC)layer 140 formed on theOPL 130, and a layer of photo-resist 150 formed on theARC layer 140. - As shown in
FIG. 1B , the photo-resist layer 150 is exposed to afirst image pattern 152 using a photo-lithography system, and thereafter inFIG. 1C , thefirst image pattern 152 is developed in a developing solvent to form afirst pattern 154 in the photo-resist layer 150. Thefirst pattern 154 in the photo-resist layer 150 is transferred to theunderlying ARC layer 140 using a dry etching process to form afirst ARC pattern 142 as shown inFIG. 1D . - Now, as shown in
FIG. 1E , photo-resist layer 150 is removed, and a second photo-resist layer 160 is applied to theARC layer 140. The second photo-resist layer 160 is exposed to asecond image pattern 162, as shown inFIG. 1F , using a photo-lithography system, and thereafter inFIG. 1G , thesecond image pattern 162 is developed in a developing solvent to form asecond pattern 164 in the second photo-resist layer 160. Thesecond pattern 164 in the second photo-resist layer 160 is transferred to theunderlying ARC layer 140 using an etching process to form asecond ARC pattern 144 as shown inFIG. 1H . - As illustrated in
FIGS. 11 and 1J , respectively, the second layer of photo-resist 160 is removed, and the first andsecond ARC patterns thin film 120 to form afirst feature pattern 122 and asecond feature pattern 124 using one or more etching processes. However, as shown inFIG. 1J , once the pattern transfer tothin film 120 is complete, theARC layer 140 is only partially consumed, thus, leaving material, in addition to the remaining OPL, to be removed. The inventors have observed that the process, such as a flash etch, required to remove the remaining ARC layer is detrimental to the material properties of the underlyingthin film 120. - For example, the
thin film 120 may comprise a low dielectric constant (low-k, or ultra-low-k) dielectric film that may be used in back-end-of-line (BEOL) metallization schemes for electronic devices. Such materials, which may include non-porous low-k dielectrics as well as porous low-k dielectrics, are susceptible to damage, e.g., degradation of dielectric constant, water absorption, residue formation, etc., when exposed to the chemistries necessary for removal of theARC layer 140. - One option is to reduce the thickness of the
ARC layer 140, such that it is substantially consumed during the transfer of the pattern to thethin film 120. However, the thickness of theARC layer 140 is dictated by the requirements set forth for providing anti-reflective properties during the patterning of the layer of photo-resist. For instance, when the ARC layer is configured to cause destructive interference between incident electromagnetic (EM) radiation and reflected EM radiation, the thickness (τ) of theARC layer 140 should be chosen to be a quarter wavelength (i.e., τ˜λ/4, 3 λ/4, 5 λ/4, etc.) of the incident EM radiation during the imaging of the layer of photo-resist. Alternatively, for instance, when the ARC layer is configured to absorb the incident EM radiation, the thickness (τ) of theARC layer 140 should be chosen to be sufficiently thick to permit absorption of the incident EM radiation. In either case, the inventors have observed for current geometries that the minimum thickness required to provide anti-reflective properties still leads to an only partially consumed ARC layer following the transfer of the pattern to the underlying thin film. - Therefore, according to an embodiment of the invention, a method of patterning a substrate is illustrated in
FIGS. 2A through 2K , andFIG. 3 . The method is illustrated in aflow chart 500, and begins in 510 with forming alithographic structure 200 comprising a film stack formed onsubstrate 210. The film stack comprises athin film 220 formed onsubstrate 210, an optional organic planarization layer (OPL) 230 formed on thethin film 220, an anti-reflective coating (ARC)layer 240 formed on the optional OPL 230 (or on thethin film 220 if there is no OPL 230), and a layer of photo-resist 250 formed on theARC layer 240. Although the film stack is shown to be formed directly uponsubstrate 210, there may exist additional layers between the film stack and thesubstrate 210. For example, in a semiconductor device, the film stack may facilitate the formation of one interconnect level, and this interconnect level may be formed upon another interconnect level onsubstrate 210. Additionally, thethin film 220 may include a single material layer, or a plurality of material layers. For example, thethin film 220 may comprise a bulk material layer having a capping layer. - The
thin film 220 may comprise a conductive layer, a non-conductive layer, or a semi-conductive layer. For instance, thethin film 220 may include a material layer comprising a metal, metal oxide, metal nitride, metal oxynitride, metal silicate, metal silicide, silicon, poly-crystalline silicon (poly-silicon), doped silicon, silicon dioxide, silicon nitride, silicon carbide, silicon oxynitride, etc. Additionally, for instance, thethin film 220 may comprise a low dielectric constant (i.e., low-k) or ultra-low dielectric constant (i.e., ultra-low-k) dielectric layer having a nominal dielectric constant value less than the dielectric constant of SiO2, which is approximately 4 (e.g., the dielectric constant for thermal silicon dioxide can range from 3.8 to 3.9). More specifically, thethin film 220 may have a dielectric constant of 3.7 or less, such as a dielectric constant ranging from 1.6 to 3.7. - These dielectric layers may include at least one of an organic, inorganic, or inorganic-organic hybrid material. Additionally, these dielectric layers may be porous or non-porous. For example, these dielectric layers may include an inorganic, silicate-based material, such as carbon doped silicon oxide (or organo siloxane), deposited using CVD techniques. Examples of such films include Black Diamonds CVD organosilicate glass (OSG) films commercially available from Applied Materials, Inc., or Corals CVD films commercially available from Novellus Systems, Inc. Alternatively, these dielectric layers may include porous inorganic-organic hybrid films comprised of a single-phase, such as a silicon oxide-based matrix having CH3 bonds that hinder full densification of the film during a curing or deposition process to create small voids (or pores). Still alternatively, these dielectric layers may include porous inorganic-organic hybrid films comprised of at least two phases, such as a carbon-doped silicon oxide-based matrix having pores of organic material (e.g., porogen) that is decomposed and evaporated during a curing process. Still alternatively, these dielectric layers may include an inorganic, silicate-based material, such as hydrogen silsesquioxane (HSQ) or methyl silsesquioxane (MSQ), deposited using SOD (spin-on dielectric) techniques. Examples of such films include FOx® HSQ commercially available from Dow Corning, XLK porous HSQ commercially available from Dow Corning, and JSR LKD-5109 commercially available from JSR Microelectronics. Still alternatively, these dielectric layers can comprise an organic material deposited using SOD techniques. Examples of such films include SiLK-I, SiLK-J, SiLK-H, SiLK-D, and porous SiLK® semiconductor dielectric resins commercially available from Dow Chemical, and GX-3TM, and GX-3PTM semiconductor dielectric resins commercially available from Honeywell.
- The
thin film 220 can be formed using a vapor deposition technique, such as chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), atomic layer deposition (ALD), plasma enhanced ALD (PEALD), physical vapor deposition (PVD), or ionized PVD (iPVD), or a spin-on technique, such as those offered in the Clean Track ACT 8 SOD (spin-on dielectric), ACT 12 SOD, and Lithius coating systems commercially available from Tokyo Electron Limited (TEL). The Clean Track ACT 8 (200 mm), ACT 12 (300 mm), and Lithius (300 mm) coating systems provide coat, bake, and cure tools for SOD materials. The track system can be configured for processing substrate sizes of 100 mm, 200 mm, 300 mm, and greater. Other systems and methods for forming a thin film on a substrate are well known to those skilled in the art of both spin-on technology and vapor deposition technology. - The
optional OPL 230 can include a photo-sensitive organic polymer or an etch type organic compound. For instance, the photo-sensitive organic polymer may be polyacrylate resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylenether resin, polyphenylenesulfide resin, or benzocyclobutene (BCB). These materials may be formed using spin-on techniques. - The
ARC layer 240 possesses material properties suitable for use as an anti-reflective coating. TheARC layer 240 may include an organic material or an inorganic material. For example, theARC layer 240 may include amorphous carbon (a-C), a-FC, or a material having a structural formula R:C:H:X, wherein R is selected from the group consisting of Si, Ge, B, Sn, Fe, Ti, and combinations thereof, and wherein X is not present or is selected from the group consisting of one or more of O, N, S, and F. TheARC layer 240 can be fabricated to demonstrate an optical range for index of refraction of approximately 1.40<n<2.60, and for extinction coefficient of approximately 0.01<k<0.78. Alternately, at least one of the index of refraction and the extinction can be graded (or varied) along a thickness of theARC layer 240. Additional details are provided in U.S. Pat. No. 6,316,167, entitled “TUNABLE VAPOR DEPOSITED MATERIALS AS ANTIREFLECTIVE COATINGS, HARDMASKS AND AS COMBINED ANTIREFLECTIVE COATING/HARDMASKS AND METHODS OF FABRICATION THEREOF AND APPLICATION THEREOF,” assigned to International Business Machines Corporation, and the entire content of which is incorporated by reference herein in its entirety. - Furthermore, the
ARC layer 240 can be formed using vapor deposition techniques including chemical vapor deposition (CVD) and plasma enhanced CVD (PECVD). For example, theARC layer 240 can be formed using PECVD, as described in greater detail in pending U.S. patent application Ser. No. 10/644,958, entitled “METHOD AND APPARATUS FOR DEPOSITING MATERIALS WITH TUNABLE OPTICAL PROPERTIES AND ETCHING CHARACTERISTICS,” filed on Aug. 21, 2003, the entire content of which is incorporated herein in its entirety. The optical properties of theARC layer 240, such as the index of refraction, can be selected so as to substantially match the optical properties of the underlying layer, or layers. For example, underlying layers such as non-porous dielectric films can require achieving an index of refraction in the range of 1.4<n<2.6; and underlying layers such as porous dielectric films can require achieving an index of refraction in the range of 1.2<n<2.6. - The photo-resist
layer 250 may comprise 248 nm (nanometer) resists, 193 nm resists, 157 nm resists, or EUV (extreme ultraviolet) resists. The photo-resistlayer 250 can be formed using a track system. For example, the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL). Other systems and methods for forming a photo-resist film on a substrate are well known to those skilled in the art of spin-on resist technology. - In 520 and as shown in
FIGS. 2B and 2C , respectively, the photo-resistlayer 250 is patterned and developed. As shown inFIG. 2B , the photo-resistlayer 250 is imaged with animage pattern 252 using a photo-lithography system. The exposure to EM radiation through a reticle is performed in a dry or wet photo-lithography system. The image pattern can be formed using any suitable conventional stepping lithographic system, or scanning lithographic system. For example, the photo-lithographic system may be commercially available from ASML Netherlands B.V. (De Run 6501, 5504 DR Veldhoven, The Netherlands), or Canon USA, Inc., Semiconductor Equipment Division (3300 North First Street, San Jose, Calif. 95134). - As shown in
FIG. 2C , the exposed photo-resistlayer 250 is subjected to a developing process to remove theimage pattern 252, and form amask pattern 254 in the photo-resistlayer 250. The developing process can include exposing the substrate to a developing solvent in a developing system, such as a track system. For example, the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL). - In 530 and as shown in
FIG. 2D , themask pattern 254 is partially transferred to theunderlying ARC layer 240 to form anARC pattern 242. TheARC pattern 242 extends to a depth less than the thickness of theARC layer 240. For example, themask pattern 254 may be partially transferred to theunderlying ARC layer 240 using an etching process, such as a dry etching process or a wet etching process. Alternatively, for example, themask pattern 254 may be partially transferred to theunderlying ARC layer 240 using a dry plasma etching process or a dry non-plasma etching process. Alternatively yet, for example, themask pattern 254 may be partially transferred to theunderlying ARC layer 240 using an anisotropic dry etching process, a reactive ion etching process, a laser-assisted etching process, an ion milling process, or an imprinting process, or a combination of two or more thereof. - In 540, the layer of photo-resist 250 is removed. For example, the photo-resist
layer 250 may be removed using a wet stripping process, a dry plasma ashing process, or a dry non-plasma ashing process. Thereafter, as shown inFIG. 2E , an optional second photo-resistlayer 260 is formed on theARC layer 240. - The optional second photo-resist
layer 260 may comprise 248 nm (nanometer) resists, 193 nm resists, 157 nm resists, or EUV (extreme ultraviolet) resists. The optional second photo-resistlayer 260 can be formed using a track system. For example, the track system can comprise a Clean Track ACT 8, ACT 12, or Lithius resist coating and developing system commercially available from Tokyo Electron Limited (TEL). Other systems and methods for forming a photo-resist film on a substrate are well known to those skilled in the art of spin-on resist technology. - As shown in
FIGS. 2F and 2G , respectively, the optional second photo-resistlayer 260 is imaged with an optionalsecond image pattern 262, and the exposed optional second photo-resistlayer 260 is subjected to a developing process to remove the optional second image pattern region and form an optionalsecond mask pattern 264 in the optional second photo-resistlayer 260. - As shown in
FIG. 2H , the optionalsecond mask pattern 264 is partially transferred to theunderlying ARC layer 240 to form an optionalsecond ARC pattern 244. The optionalsecond ARC pattern 244 extends to a depth less than the thickness of theARC layer 240. Thereafter, as shown inFIG. 21 , the optional second layer of photo-resist 260 is removed. - Other techniques may be utilized to double pattern, or multi-pattern,
ARC layer 240 using a single layer of photo-resist. For example, the single layer of photo-resist may be double imaged, and then removed following the partial transfer of the double pattern to the underlying ARC layer. Alternatively, for example, the single layer of photo-resist may be imaged and developed, and these two steps may be repeated with the same layer of photo-resist. Thereafter, the layer of photo-resist may be removed following the partial transfer of the double pattern to the underlying ARC layer. - In 550 and as shown in
FIG. 2J , the transfer of theARC pattern 242 and the optionalsecond ARC pattern 244 toARC layer 240 is completed, while thinning theARC layer 240. For example, theARC pattern 242 and the optionalsecond ARC pattern 244 may be substantially transferred through the thickness of theARC layer 240 using an etching process, such as a dry etching process or a wet etching process. Alternatively, for example, the etching process may comprise a dry plasma etching process or a dry non-plasma etching process. During the transfer of theARC pattern 242 and the optionalsecond ARC pattern 244 substantially through theARC layer 240, the flat-field 246 is etched and the thickness of theARC layer 240 is reduced. - In 560 and as shown in
FIG. 2K , theARC pattern 242 and the optionalsecond ARC pattern 244 are transferred to theunderlying OPL 230, if present, and to thethin film 220 to form a feature pattern 222 and an optional second feature pattern 224 using one or more etching processes. During the one or more etching processes, theARC layer 240 is substantially consumed as illustrated inFIG. 2K . The one or more etching processes may include any combination of wet or dry etching processes. The dry etching processes may include dry plasma etching processes or dry non-plasma etching processes. Thereafter, theOPL 230, if present, may be removed. - Although only certain embodiments of this invention have been described in detail above, those skilled in the art will readily appreciate that many modifications are possible in the embodiments without materially departing from the novel teachings and advantages of this invention. For example, several embodiments illustrate the use of positive tone developable resists and developable ARC layers; however, other embodiments are contemplated that utilize negative tone developable resists and developable ARC layers. Accordingly, all such modifications are intended to be included within the scope of this invention.
Claims (16)
1. A method of patterning a thin film on a substrate, comprising:
preparing a film stack on said substrate, said film stack comprising said thin film formed on said substrate, an anti-reflective coating (ARC) layer formed on said thin film, and a mask layer formed on said ARC layer;
forming a pattern in said mask layer;
partially transferring said pattern to said ARC layer by transferring said pattern to a depth less than the thickness of said ARC layer;
removing a remainder of said mask layer following said partial transfer of said pattern to said ARC layer;
completing said transferring of said pattern to said ARC layer by etching said ARC layer; and
transferring said pattern to said thin film while substantially consuming said ARC layer.
2. The method of claim 1 , wherein said forming a pattern in said mask layer comprises forming a pattern in a layer of photo-resist.
3. The method of claim 2 , wherein said forming a pattern in said mask layer comprises:
imaging said layer of photo-resist with an image pattern using a photo-lithography system; and
developing said layer of photo-resist in order to form said image pattern in said layer of photo-resist.
4. The method of claim 1 , wherein said partially transferring said pattern to said ARC layer comprises performing at least one of dry etching, or wet etching, or a combination thereof.
5. The method of claim 4 , wherein said partially transferring said pattern to said ARC layer comprises performing dry plasma etching, dry non-plasma etching, or a combination thereof.
6. The method of claim 4 , wherein said partially transferring said pattern to said ARC layer comprises performing an anisotropic dry etching process, a reactive ion etching process, a laser-assisted etching process, an ion milling process, or an imprinting process, or a combination of two or more thereof.
7. The method of claim 1 , wherein said completing said transferring of said pattern to said ARC layer comprises performing a wet etching process, or a dry etching process, or a combination thereof.
8. The method of claim 1 , wherein said forming said mask layer comprises forming a 248 nm resist, a 193 nm resist, a 157 nm resist, or an EUV resist, or a combination of two or more thereof on said ARC layer.
9. The method of claim 1 , wherein said forming said film stack further comprises forming an organic planarization layer (OPL) on said thin film and forming said ARC layer on said OPL.
10. The method of claim 9 , wherein said forming said OPL comprises forming a polyacrylate resin, an epoxy resin, a phenol resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylenether resin, a polyphenylenesulfide resin, or benzocyclobutene (BCB), or a combination of two or more thereof.
11. The method of claim 9 , further comprising:
transferring said pattern in said ARC layer to said OPL prior to said transferring said pattern to said thin film.
12. The method of claim 11 , wherein said transferring said pattern in said ARC layer to said OPL comprises etching said pattern into said OPL.
13. The method of claim 9 , further comprising:
removing said OPL following said transferring said pattern to said thin film.
14. The method of claim 9 , wherein said transferring said pattern in said ARC layer to said OPL substantially consumes said ARC layer.
15. The method of claim 1 , wherein said forming said ARC layer comprises forming an organic layer, an inorganic layer, or both.
16. A computer readable medium containing program instructions for execution on a control system, which when executed by the control system, cause a patterning system to perform the steps of:
preparing a film stack on a substrate, said film stack comprising a thin film formed on said substrate, an anti-reflective coating (ARC) layer formed on said thin film, and a mask layer formed on said ARC layer;
forming a pattern in said mask layer;
partially transferring said pattern to said ARC layer by transferring said pattern to a depth less than the thickness of said ARC layer;
removing a remainder of said mask layer following said partial transfer of said pattern to said ARC layer;
completing said transferring of said pattern to said ARC layer by etching said ARC layer; and
transferring said pattern to said thin film while substantially consuming said ARC layer.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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US11/534,420 US20080073321A1 (en) | 2006-09-22 | 2006-09-22 | Method of patterning an anti-reflective coating by partial etching |
TW096133830A TW200818261A (en) | 2006-09-22 | 2007-09-11 | Method of patterning an anti-reflective coating by partial etching |
JP2007238098A JP2008078649A (en) | 2006-09-22 | 2007-09-13 | Method of patterning anti-reflective coating by partial etching |
KR1020070096502A KR20080027200A (en) | 2006-09-22 | 2007-09-21 | Method of patterning an anti-reflective coating by partial etching |
CNA2007101513029A CN101150052A (en) | 2006-09-22 | 2007-09-24 | Method of patterning an anti-reflective coating by partial etching |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US11/534,420 US20080073321A1 (en) | 2006-09-22 | 2006-09-22 | Method of patterning an anti-reflective coating by partial etching |
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US8153351B2 (en) * | 2008-10-21 | 2012-04-10 | Advanced Micro Devices, Inc. | Methods for performing photolithography using BARCs having graded optical properties |
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US20080206999A1 (en) * | 2007-02-22 | 2008-08-28 | Fujitsu Limited | Method for wet etching while forming interconnect trench in insulating film |
US8449787B2 (en) * | 2007-02-22 | 2013-05-28 | Fujitsu Limited | Method for wet etching while forming interconnect trench in insulating film |
US20130186389A1 (en) * | 2009-12-01 | 2013-07-25 | Menashe Barkai | Heat receiver tube, method for manufacturing the heat receiver tube, parabolic trough collector with the receiver tube and use of the parabolic trough collector |
US9857098B2 (en) * | 2009-12-01 | 2018-01-02 | Siemens Concentrated Solar Power Ltd. | Heat receiver tube, method for manufacturing the heat receiver tube, parabolic trough collector with the receiver tube and use of the parabolic trough collector |
US20160033856A1 (en) * | 2013-04-17 | 2016-02-04 | Fujifilm Corporation | Resist removing liquid, resist removal method using same and method for producing photomask |
US9588428B2 (en) * | 2013-04-17 | 2017-03-07 | Fujifilm Corporation | Resist removing liquid, resist removal method using same and method for producing photomask |
Also Published As
Publication number | Publication date |
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CN101150052A (en) | 2008-03-26 |
JP2008078649A (en) | 2008-04-03 |
TW200818261A (en) | 2008-04-16 |
KR20080027200A (en) | 2008-03-26 |
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