CN101150052A - Method of patterning an anti-reflective coating by partial etching - Google Patents

Method of patterning an anti-reflective coating by partial etching Download PDF

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Publication number
CN101150052A
CN101150052A CNA2007101513029A CN200710151302A CN101150052A CN 101150052 A CN101150052 A CN 101150052A CN A2007101513029 A CNA2007101513029 A CN A2007101513029A CN 200710151302 A CN200710151302 A CN 200710151302A CN 101150052 A CN101150052 A CN 101150052A
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layer
reflective coating
pattern
film
photoresist
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桑德拉·海岚德
香农·迪恩
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • H01L21/0276Photolithographic processes using an anti-reflective coating
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/091Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

A method of patterning a thin film is described. The method comprises forming a thin film to be patterned on a substrate, forming an anti-reflective coating (ARC) layer on the thin film, and forming a mask layer on the ARC layer. Thereafter, the mask layer is patterned to form a pattern therein, and the pattern is partially transferred to the ARC layer using a transfer process, such as an etching process. Once the mask layer is removed, the pattern is completely transferred to the ARC layer using an etching process, and the pattern in the ARC layer is transferred to the underlying thin film using another etching process.

Description

By partial etching patterning anti-reflective coating method layer by layer
The cross reference of related application
This application is relevant with following application: with the unsettled U.S. Patent application No.11/534 that is entitled as " METHOD FORDOUBLE IMAGING A DEVELOPABLE ANTI-REFLECTIVE COATING " that the application submits on the same day, 261 (TTCA-157); With the unsettled U.S. Patent application No.11/534 that is entitled as " METHOD FOR DOUBLE PATTERNING A DEVELOPABLE ANTI-REFLECTIVE COATING " that the application submits on the same day, 365 (TTCA-158); With the unsettled U.S. Patent application No.11/XXX that is entitled as " METHOD OF PATTERNING ADEVELOPABLE ANTI-REFLECTIVE COATING BY PARTIALDEVELOPING " that the application submits on the same day, XXX (TTCA-160); And the unsettled U.S. Patent application No.11/XXX that is entitled as " METHOD FOR DOUBLE PATTERNING ATHIN FILM " that submits on the same day with the application, XXX (TTCA-161).The full content of these applications integral body by reference is incorporated into this.
Technical field
The present invention relates to be used for the method for the film on the patterned substrate, more specifically relate to antireflecting coating (ARC) layer method of coming the film on the patterned substrate of utilizing partial etching.
Background technology
In material processing method, pattern etch comprises that the upper surface to substrate applies the photosensitive material such as photoresist of skim, subsequently to the thin layer of photosensitive material carry out patterning be provided for during the etching with the mask of the lower film of this design transfer to the substrate.The patterning of photosensitive material relates generally to utilize etching system for example to be exposed by radiation source by the light shield (with related optical element) of photosensitive material, then utilizes developer solution to remove radiation areas (under the situation of positive photoresist) or non-radiative zone (under the situation of negative photoresist) of photosensitive material.And this mask layer can comprise a plurality of sublayers.
In case pattern is transferred to the film of lower floor, just be necessary under the situation of the material property that does not damage lower film, to remove mask layer.For example, film can comprise low-k (low k or the ultralow k) dielectric film that can be used on production line end (BEOL) metallization scheme that is used for electronic device.This material can comprise non-porous low K dielectrics and porous low k dielectric, and is vulnerable to damage when being exposed to when being used to remove mask layer and its sublayer necessary chemical substance, and for example, the decline of dielectric constant, water absorption, residue form or the like.Therefore, it is very important setting up such design transfer scheme: this design transfer scheme has reduced the possibility of damage lower film when forming this pattern and removing necessary (one or more layers) mask layer.
Summary of the invention
The present invention relates to be used for the method for the film on the patterned substrate.
According to an embodiment, a kind of method of utilizing antireflecting coating (ARC) layer pattern film has been described.The pattern that is formed in the mask layer that overlies the ARC layer is partly transferred to the ARC layer, and mask layer is removed then.Thereafter, pattern utilizes etching technics to be transferred to the ARC layer fully.
According to another embodiment, method and a kind of computer-readable medium that is used for patterning of the film on a kind of patterned substrate have been described, comprise: prepare the film lamination on substrate, this film lamination comprises the film that is formed on the substrate, be formed on antireflecting coating (ARC) layer on the film and be formed on mask layer on the ARC layer; In mask layer, form pattern; By design transfer is transferred to the ARC layer to a certain degree of depth less than the thickness of ARC layer with pattern part; After being transferred to the ARC layer, removes pattern part the remainder of mask layer; Finish the transfer of pattern by etching ARC layer to the ARC layer; And with design transfer to film, the basic simultaneously light ARC layer that consumes.
Description of drawings
In the accompanying drawings:
Figure 1A to 1J schematically illustrates the known method that is used for the film on the patterned substrate;
Fig. 2 A to 2K schematically illustrates the method that is used for the film on the patterned substrate according to the embodiment of the invention; And
Fig. 3 illustrates the flow chart according to the method that is used for the film on the patterned substrate of the embodiment of the invention.
Embodiment
In the following description, the purpose for explanation rather than restriction has provided specific details, for example concrete technology and patterning system.Yet, should be appreciated that in other embodiment that break away from these specific detail and also can put into practice the present invention.
With reference now to accompanying drawing,, wherein similar label refers to identical or corresponding parts all the time in a plurality of accompanying drawings, and Figure 1A to 1J schematically illustrates the method according to the patterned substrate of prior art.Shown in Figure 1A, photolithographic structures 100 comprises the film lamination that is formed on the substrate 110.The film lamination comprises the film such as dielectric layer 120 that is formed on the substrate 110, be formed on organic planarization layer (OPL) 130 on the film 120, be formed on antireflecting coating (ARC) layer 140 on the OPL 130 and be formed on photoresist layer 150 on the ARC layer 140.
Shown in Figure 1B, utilize etching system that photoresist layer 150 is exposed to first picture pattern 152, in Fig. 1 C, in developer solution, first picture pattern 152 is developed to form first pattern 154 in photoresist layer 150 thereafter.Utilize dry etch process that first pattern 1 54 in the photoresist layer 150 is transferred to the ARC layer 140 of lower floor to form an ARC pattern 142, shown in Fig. 1 D.
Now, shown in Fig. 1 E, remove photoresist layer 150, and apply second photoresist layer 160 to ARC layer MR head unit 140.Utilize etching system that second photoresist layer 160 is exposed to second picture pattern 162, shown in Fig. 1 F, in Fig. 1 G, in developer solution, second picture pattern 162 is developed to form second pattern 164 in second photoresist layer 160 thereafter.Utilize etching technics that second pattern 164 in second photoresist layer 160 is transferred to the ARC layer 140 of lower floor to form the 2nd ARC pattern 144, shown in Fig. 1 H.
Respectively shown in Fig. 1 I and 1J, remove second photoresist layer 160, and utilize one or more etching technics that the first and second ARC patterns 142 and 144 are transferred to the OPL 130 of lower floor and film 120 to form first characteristic pattern 122 and second characteristic pattern 124.Yet shown in Fig. 1 J, when the design transfer of film 120 is finished, 140 on ARC layer is partially consumed, thereby has also stayed the material that will remove except remaining OPL.The inventor observes, and removing the required technology such as quick etching (flash etch) of residual A RC layer is prejudicial for the material property of the film 120 of lower floor.
For example, film 120 can comprise low-k (low k or the ultralow k) dielectric film that can be used on production line end (BEOL) metallization scheme that is used for electronic device.This material can comprise non-porous low K dielectrics and porous low k dielectric, and is vulnerable to damage when being used to remove ARC layer 140 necessary chemical substance when being exposed to, for example, and decline dielectric constant, adsorbed water, formation residue or the like.
A kind of option is the thickness that reduces ARC layer 140, so that it is consumed light at the transfer pattern substantially during film 120.Yet, the antireflective property given demand regulation of the thickness of ARC layer 140 during by the patterning that is used to provide photoresist layer.For example, when the ARC layer is configured to cause destructive interference between (EM) radiation of incident electromagnetism and the reflection EM radiation, the thickness of ARC layer 140 (τ) should be chosen as the quarter-wave (that is, τ~λ/4,3 λ/4,5 λ/4 etc.) of incident EM radiation during the imaging of photoresist layer.Perhaps, for example, when the ARC layer was configured to absorb incident EM radiation, the thickness of ARC layer 140 (τ) should be chosen as enough thick in to allow the absorption of incident EM radiation.In either case, all observe, provide the required minimum thickness of antireflective property still to cause design transfer ARC layer after the film of lower floor being had only part be consumed for current geometry inventor.
Therefore, according to embodiments of the invention, in Fig. 2 A to 2K and Fig. 3, illustrate a kind of method of patterned substrate.This method is shown in the flow chart 500, and starts from 510, forms photolithographic structures 200 in 510, and photolithographic structures 200 comprises the film lamination that is formed on the substrate 210.Antireflecting coating (ARC) layer 240 that the film lamination comprises the film 220 that is formed on the substrate 210, be formed on optional organic planarization layer (OPL) 230 on the film 220, be formed on the optional OPL 230 (if perhaps do not have OPL 230 then be formed on the film 220) and be formed on photoresist layer 250 on the ARC layer 240.Although the film lamination is illustrated as being formed directly on the substrate 210, between film lamination and substrate 210, can there be extra layer.For example, in semiconductor device, the film lamination goes for the formation of an interconnection level, and this interconnection level can be formed on another interconnection level on the substrate 210.In addition, film 220 can comprise single material layer or various material layers of planting.For example, film 220 can comprise the body material layer with capping layer.
Film 220 can comprise conductive layer, non-conductive layer or semi-conductive layer.For example, film 220 can comprise the material layer that comprises metal, metal oxide, metal nitride, metal oxynitrides, metal silicate, metal silicide, silicon, polysilicon, doped silicon, silicon dioxide, silicon nitride, carborundum, silicon oxynitride or the like.In addition, for example, film 220 can comprise having less than SiO 2The low-k (promptly low k) or ultralow dielectric (the being ultralow k) dielectric layer of nominal dielectric constant value of dielectric constant, SiO 2Dielectric constant be approximately 4 (for example, the dielectric constant of thermal silicon dioxide can from 3.8 to 3.9).More specifically, film 220 can have 3.7 or littler dielectric constant, for example from 1.6 to 3.7 dielectric constant.
At least a in these dielectric layers can comprise organic and inorganic or inorganic-organic hybrid materials.In addition, these dielectric layers can be porous or non-porous.For example, that these dielectric layers can comprise is inorganic, based on the material of silicate, for example utilizes the carbon doped silicon oxide (or organic metal siloxanes) of CVD deposition techniques.The example of this film comprises the Black Diamond that can buy from Applied Materials Inc. The Coral that CVD organic silicate glass (OSG) film maybe can be buied from NovellusSystems Inc. Cvd film.Perhaps, these dielectric layers can comprise by the single-phase porous, inorganic of forming-organic hybrid films for example having CH 3The matrix based on silica of key, this CH 3The complete densification of film produces little cavity (or hole) during curing or the depositing operation thereby key has hindered.Or these dielectric layers can comprise the porous, inorganic-organic hybrid films that consists of at least two phases, and for example have the matrix based on carbon-doped silicon oxide of organic material hole (for example hole green material), and this organic material decomposes during curing process and evaporates.Or that these dielectric layers can comprise is inorganic, based on the material of silicate, for example utilize the hydrogen silsesquioxane (HSQ) or the methyl silsesquioxane (MSQ) of SOD (spin-on dielectric) deposition techniques.The example of this film comprises the FOx that can buy from Dow Corning HSQ, the XLK porous HSQ that can buy from Dow Corning and the JSR LKD-5109 that can buy from JSR Microelectronics.Or these dielectric layers can comprise the organic material that utilizes the SOD deposition techniques.The example of this film comprises SiLK-I, SiLK-J, SiLK-H, SiLK-D and the porous SiLK that can buy from Dow Chemical Semiconductor dielectric resin and the GX-3 that can buy from Honeywell TMAnd GX-3P TMThe semiconductor dielectric resin.
Film 220 can utilize gas phase deposition technology or spin coating technique to form, gas phase deposition technology for example is chemical vapor deposition (CVD), plasma enhanced CVD (PECVD), ald (ALD), plasma enhancing ALD (PEALD), physical vapor deposition (PVD) or ionization PVD (iPVD), and spin coating technique is the spin coating technique for providing Clean Track ACT 8 SOD (spin-on dielectric), ACT 12 SOD that can buy from Tokyo Electron Limited (TEL) and Lithius application system for example.Clean Track ACT 8 (200mm), ACT12 (300mm) and Lithius (300mm) application system provide the coating that is used for the SOD material, have cured and tools of solidifying.Gluing toning system (track system) can be arranged to handles 100mm, 200mm, 300mm and bigger substrate dimension.Being used on substrate film forming other system and method is known for the technical staff in spin coating technique and gas phase deposition technology field.
Optionally OPL 230 can comprise the organic compound of light sensitivity organic polymer or etching type.For example, the light sensitivity organic polymer can be polyacrylate resin, epoxy resin, phenol resin, polyamide, polyimide resin, unsaturated polyester resin, polyphenylene oxide resin, polyphenylene sulfide or benzocyclobutane olefine resin (BCB).These materials can utilize spin coating technique to form.
ARC layer 240 has the material property that is suitable for as antireflecting coating.ARC layer 240 can comprise organic material or inorganic material.For example, ARC layer 240 can comprise amorphous carbon (a-C), a-FC or have formula R: the material of C:H:X, wherein R is selected from by Si, Ge, B, Sn, Fe, Ti and the group that constitutes thereof, and X does not exist or is selected from by one or more groups that constitute among O, N, S and the F.ARC layer 240 can be manufactured to and show such optical range: refractive index is about 1.40<n<2.60 and Bees Wax is approximately 0.01<k<0.78.Perhaps, at least one in refractive index and the extinction coefficient can be along the gradient thickness (or variation) of ARC layer 240.In the U.S. Patent No. 6 that is entitled as " TUNABLE VAPOR DEPOSITED MATERIALS AS ANTIREFLECTIVECOATINGS; HARDMARKS AND AS COMBINED ANTIREFLECTIVECOATING/HARDMARKS AND METHODS OF FABRICATION THEREOFAND APPLICATION THEREOF ", 316, extra details is provided in 167, this patent is transferred to IBM Corporation, and the full content of this patent by reference integral body be incorporated into this.
In addition, ARC layer 240 can utilize the gas phase deposition technology that comprises chemical vapor deposition (CVD) and plasma enhanced CVD (PECVD) to form.For example, ARC layer 240 can utilize PECVD to form, as the unsettled U.S. Patent application No.10/644 that is entitled as " METHOD AND APPARATUSFOR DEPOSITING MATERIALS WITH TUNABLE OPTICALPROPERTIES AND ETCHING CHARACTERISTICS " that submits on August 21st, 2003, describe in more detail in 958, the full content of this application integral body by reference is incorporated into this.One or more layers the optical property that the optical property of ARC layer 240 (for example refractive index) may be selected basic and below is complementary.For example, the refractive index in the realistic possibly existing 1.4<n of the below layer such as non-porous dielectric film<2.6 scopes; And the refractive index in the realistic possibly existing 1.2<n of the below layer such as the porous dielectric film<2.6 scopes.
Photoresist layer 250 can comprise 248nm (nanometer) photoresist, 193nm photoresist, 157nm photoresist or EUV (extreme ultraviolet) photoresist.Photoresist layer 250 can utilize the gluing toning system to form.For example, the gluing toning system can comprise and can apply and toning system from Clean Track ACT 8, ACT 12 or the Lithius photoresist that Tokyo Electron Limited (TEL) buys.The other system and the method that are used for formation photoresist film on substrate are known for spin coating photoresist those skilled in the art.
In 520 and respectively shown in Fig. 2 B and 2C, to photoresist layer 250 patternings and development.Shown in Fig. 2 B, utilize etching system to pass through 252 pairs of photoresist layer 250 imagings of picture pattern.In dry method or wet method etching system, carry out the operation that is exposed to the EM radiation by light shield.Picture pattern can utilize any suitable traditional stepper lithography system or scanning photoetching system to form.For example, etching system can be from (the 3300 North FirstStreet of semiconductor equipment branch of ASML Netherlands B.V. (De Run 6501,5504 DR Veldhoven, The Netherlands) or Canon USA Inc., San Jose, CA 95134) buy.
Shown in Fig. 2 C, removing picture pattern 252, and in photoresist layer 250, form mask pattern 254 through the photoresist layer 250 experience developing process of overexposure.Developing process can be included in the toning system (for example gluing toning system) substrate is exposed to developer solution.For example, the gluing toning system can comprise and can apply and toning system from Clean Track ACT8, ACT 12 or the Lithius photoresist that Tokyo Electron Limited (TEL) buys.
In 530 and shown in Fig. 2 D, the ARC layer 240 of mask pattern 254 parts being transferred to lower floor is to form ARC pattern 242.ARC pattern 242 extends to a certain degree of depth less than the thickness of ARC layer 240.For example, mask pattern 254 can utilize etching technics such as dry etch process or wet-etching technology partly to transfer to the ARC layer 240 of lower floor.Perhaps, for example, mask pattern 254 can utilize dry plasma technology or dry, non-plasma etching technics partly to transfer to the ARC layer 240 of lower floor.Or, for example, mask pattern 254 can utilize anisotropic dry etch process, rie process, laser assisted etch process, ion grinding technics or typography or wherein both or more persons' built-up section transfer to the ARC layer 240 of lower floor.
In 540, remove photoresist layer 250.For example, photoresist layer 250 can utilize wet method stripping technology, dry plasma cineration technics or dry, non-plasma cineration technics to remove.As Fig. 2 E shown in, in ARC layer 240 form optional second photoresist layer 260 thereafter.
Optional second photoresist layer 260 can comprise 248nm (nanometer) photoresist, 193nm photoresist, 157nm photoresist or EUV (extreme ultraviolet) photoresist.Optional second photoresist layer 260 can utilize the gluing toning system to form.For example, the gluing toning system can comprise and can apply and toning system from Clean Track ACT 8, ACT 12 or the Lithius photoresist that TokyoElectron Limited (TEL) buys.The other system and the method that are used for formation photoresist film on substrate are known for spin coating photoresist those skilled in the art.
Respectively shown in Fig. 2 F and 2G, utilize 260 imagings of 262 pairs of optional second photoresist layers of optional second picture pattern, and removing the optional second picture pattern zone, and in optional second photoresist layer 260, form optional second mask pattern 264 through the optional second photoresist layer 260 experience developing process of exposure.
Shown in Fig. 2 H, optional second mask pattern 264 is partly transferred to the ARC layer 240 of lower floor to form optional the 2nd ARC pattern 244.Optional the 2nd ARC pattern 244 extends to a certain degree of depth less than the thickness of ARC layer 240.As Fig. 2 I shown in, remove optional second photoresist layer 260 thereafter.
Other technologies can be used for utilizing single-layer lithography glue that ARC layer 240 is carried out double patterning or patterning repeatedly.For example, single-layer lithography glue can be by twice imaging, removes after the ARC layer of twice pattern part being transferred to lower floor then.Perhaps, for example, the photoresist of individual layer can be by imaging and development, and this two step can utilize same layer photoetching glue to carry out repetition.Twice pattern part transferred to the ARC layer of lower floor after, can remove photoresist layer thereafter.
In 550 and shown in Fig. 2 J, the transfer of ARC pattern 242 and optional the 2nd ARC pattern 244 to ARC layers 240 is finished, simultaneously to ARC layer 240 attenuate.For example, ARC pattern 242 and optional the 2nd ARC pattern 244 can utilize etching technics such as dry etch process or wet-etching technology to shift the thickness of ARC layer 240 substantially.Perhaps, for example, etching technics can comprise dry plasma technology or dry, non-plasma etching technics.During the transfer of basic ARC pattern 242 that carries out through ARC layer 240 and optional the 2nd ARC pattern 244, flat site (flat-field) 246 is carried out etching and reduces the thickness of ARC layer 240.
In 560 and shown in Fig. 2 K, ARC pattern 242 and optional the 2nd ARC pattern 244 utilize one or more etching technics to transfer to the OPL 230 (if present) of lower floor and transfer to film 220, to form characteristic pattern 222 and optional second characteristic pattern 224.During one or more etching technics, ARC layer 240 is consumed light substantially, shown in Fig. 2 K.These one or more etching technics can comprise the combination in any of wet method or dry etch process.Dry etch process can comprise dry plasma technology or dry, non-plasma etching technics.Can remove OPL 230 (if present) thereafter.
Although above is described in detail some embodiment of the present invention, those skilled in the art will be easy to recognize, can carry out many modifications in an embodiment, and not break away from novel teachings of the present invention and advantage in fact.For example, some embodiment have illustrated eurymeric can develop photoresist and the use of ARC layer of can developing; Yet, can expect and adopt can develop other embodiment of the photoresist and the ARC layer that can develop of minus.Therefore, all such modifications all are intended to be included in the scope of the present invention.

Claims (16)

1. the method for the film on the patterned substrate comprises:
On described substrate, prepare the film lamination, described film lamination comprises the described film that is formed on the described substrate, be formed on the described film anti-reflective coating layer by layer and be formed on the mask layer that described anti-reflective coating is gone up layer by layer;
In described mask layer, form pattern;
By described design transfer being arrived a certain degree of depth, described pattern part is transferred to described anti-reflective coating layer by layer less than described anti-reflective coating thickness layer by layer;
Described pattern part is being transferred to described anti-reflective coating is removed described mask layer layer by layer remainder;
Finish described pattern layer by layer to the transfer layer by layer of described anti-reflective coating by the described anti-reflective coating of etching; And
To described film, the described anti-reflective coating of basic simultaneously consumption light layer by layer with described design transfer.
2. the method for claim 1, the wherein said step that forms pattern in described mask layer is included in and forms pattern in the photoresist layer.
3. method as claimed in claim 2, the wherein said step that forms pattern in described mask layer comprises:
Utilize etching system to adopt picture pattern to described photoresist layer imaging; And
Described photoresist layer is developed to form described picture pattern in described photoresist layer.
4. the method for claim 1 is wherein saidly transferred to described anti-reflective coating step layer by layer with described pattern part and is comprised and carry out at least a in dry etching or wet etching or its combination.
5. method as claimed in claim 4 is wherein saidly transferred to described anti-reflective coating step layer by layer with described pattern part and is comprised and carry out dry plasma, dry, non-plasma etching or its combination.
6. method as claimed in claim 4 is wherein saidly transferred to described anti-reflective coating step layer by layer with described pattern part and is comprised and carry out anisotropic dry etch process, rie process, laser assisted etch process, ion grinding technics or typography or wherein both or more persons' combination.
7. the method for claim 1 is wherein saidly finished described pattern and is comprised to the step of described anti-reflective coating transfer layer by layer and carry out wet-etching technology or dry etch process or its combination.
8. the method for claim 1, the step of the described mask layer of wherein said formation are included in described anti-reflective coating and go up layer by layer and form 248nm photoresist, 193nm photoresist, 157nm photoresist or extreme ultraviolet photolithographic glue or wherein both or more persons' combination.
9. the method for claim 1, the step of the described film lamination of wherein said formation also are included in and form organic planarization layer on the described film and form described anti-reflective coating layer by layer on described organic planarization layer.
10. method as claimed in claim 9, the step of the described organic planarization layer of wherein said formation comprise and form polyacrylate resin, epoxy resin, phenol resin, polyamide, polyimide resin, unsaturated polyester resin, polyphenylene oxide resin, polyphenylene sulfide or benzocyclobutane olefine resin or wherein both or more persons' combination.
11. method as claimed in claim 9 also comprises:
With the described design transfer of described anti-reflective coating in layer by layer before the described film with described design transfer to described organic planarization layer.
12. method as claimed in claim 11 wherein comprises the step of the described design transfer of described anti-reflective coating in layer by layer to described organic planarization layer with described pattern etch in described organic planarization layer.
13. method as claimed in claim 9 also comprises:
Described design transfer is being removed described organic planarization layer after described film.
14. method as claimed in claim 9 wherein consumes the described anti-reflective coating of light layer by layer with the described design transfer of described anti-reflective coating in layer by layer to the step of described organic planarization layer substantially.
15. comprising, the method for claim 1, the described anti-reflective coating of wherein said formation step layer by layer form organic layer, inorganic layer or the two.
16. a computer-readable medium that comprises the program command that is used for carrying out on control system, described program command make patterning system carry out following steps when being carried out by described control system:
On described substrate, prepare the film lamination, described film lamination comprises the film that is formed on the described substrate, be formed on the described film anti-reflective coating layer by layer and be formed on the mask layer that described anti-reflective coating is gone up layer by layer;
In described mask layer, form pattern;
By with described design transfer to described pattern part being transferred to described anti-reflective coating layer by layer less than a certain degree of depth of described anti-reflective coating thickness layer by layer;
Described pattern part is being transferred to described anti-reflective coating is removed described mask layer layer by layer remainder;
Finish described pattern layer by layer to the described transfer layer by layer of described anti-reflective coating by the described anti-reflective coating of etching; And
To described film, the described anti-reflective coating of basic simultaneously consumption light layer by layer with described design transfer.
CNA2007101513029A 2006-09-22 2007-09-24 Method of patterning an anti-reflective coating by partial etching Pending CN101150052A (en)

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US11/534,420 US20080073321A1 (en) 2006-09-22 2006-09-22 Method of patterning an anti-reflective coating by partial etching
US11/534,420 2006-09-22

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CN101150052A true CN101150052A (en) 2008-03-26

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102054684B (en) * 2009-11-10 2012-10-03 中芯国际集成电路制造(上海)有限公司 Method for forming semiconductor structure
CN111727490A (en) * 2018-03-02 2020-09-29 东京毅力科创株式会社 Method for transferring a pattern to a layer

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4930095B2 (en) * 2007-02-22 2012-05-09 富士通株式会社 Wet etching method and semiconductor device manufacturing method
US8153351B2 (en) * 2008-10-21 2012-04-10 Advanced Micro Devices, Inc. Methods for performing photolithography using BARCs having graded optical properties
WO2011067294A2 (en) * 2009-12-01 2011-06-09 Siemens Concentrated Solar Power Ltd. Heat receiver tube, method for manufacturing the heat receiver tube, parabolic trough collector with the receiver tube and use of the parabolic trough collector
JP6040089B2 (en) * 2013-04-17 2016-12-07 富士フイルム株式会社 Resist removing liquid, resist removing method using the same, and photomask manufacturing method

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5753417A (en) * 1996-06-10 1998-05-19 Sharp Microelectronics Technology, Inc. Multiple exposure masking system for forming multi-level resist profiles
US6844131B2 (en) * 2002-01-09 2005-01-18 Clariant Finance (Bvi) Limited Positive-working photoimageable bottom antireflective coating
US7037639B2 (en) * 2002-05-01 2006-05-02 Molecular Imprints, Inc. Methods of manufacturing a lithography template
US7364832B2 (en) * 2003-06-11 2008-04-29 Brewer Science Inc. Wet developable hard mask in conjunction with thin photoresist for micro photolithography
KR100611151B1 (en) * 2003-11-27 2006-08-09 삼성에스디아이 주식회사 Thin Film Transistors and method of manufacturing thereof
US7265056B2 (en) * 2004-01-09 2007-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming novel BARC open for precision critical dimension control
US7064078B2 (en) * 2004-01-30 2006-06-20 Applied Materials Techniques for the use of amorphous carbon (APF) for various etch and litho integration scheme
KR100598105B1 (en) * 2004-06-17 2006-07-07 삼성전자주식회사 Method of forming semiconductor patterns
US7271108B2 (en) * 2005-06-28 2007-09-18 Lam Research Corporation Multiple mask process with etch mask stack
US7579137B2 (en) * 2005-12-24 2009-08-25 International Business Machines Corporation Method for fabricating dual damascene structures
US20070166648A1 (en) * 2006-01-17 2007-07-19 International Business Machines Corporation Integrated lithography and etch for dual damascene structures
US20080020327A1 (en) * 2006-07-19 2008-01-24 International Business Machines Corporation Method of formation of a damascene structure
US7432191B1 (en) * 2007-03-30 2008-10-07 Tokyo Electron Limited Method of forming a dual damascene structure utilizing a developable anti-reflective coating

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102054684B (en) * 2009-11-10 2012-10-03 中芯国际集成电路制造(上海)有限公司 Method for forming semiconductor structure
CN111727490A (en) * 2018-03-02 2020-09-29 东京毅力科创株式会社 Method for transferring a pattern to a layer

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