US20070029268A1 - Wafer cassette used in high temperature baking process - Google Patents

Wafer cassette used in high temperature baking process Download PDF

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Publication number
US20070029268A1
US20070029268A1 US11/196,880 US19688005A US2007029268A1 US 20070029268 A1 US20070029268 A1 US 20070029268A1 US 19688005 A US19688005 A US 19688005A US 2007029268 A1 US2007029268 A1 US 2007029268A1
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US
United States
Prior art keywords
wafer cassette
wafer
high temperature
end member
temperature baking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/196,880
Inventor
Johnny Dai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
King Yuan Electronics Co Ltd
Original Assignee
King Yuan Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by King Yuan Electronics Co Ltd filed Critical King Yuan Electronics Co Ltd
Priority to US11/196,880 priority Critical patent/US20070029268A1/en
Assigned to KING YUAN ELECTRONICS CO., LTD reassignment KING YUAN ELECTRONICS CO., LTD ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: DAI, JOHNNY
Publication of US20070029268A1 publication Critical patent/US20070029268A1/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67326—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
    • H01L21/67326—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls
    • H01L21/6733—Horizontal carrier comprising wall type elements whereby the substrates are vertically supported, e.g. comprising sidewalls characterized by a material, a roughness, a coating or the like

Definitions

  • the present invention relates to a wafer cassette. More particularly, the present invention relates to a wafer cassette used in high temperature baking process.
  • the wafer processing into IC (integrated circuit) chips often includes several steps where the wafers are repeatedly processed, test, stored and transported. Due to the delicate nature of the wafers and their extreme value, it is vital that they are properly protected throughout this procedure. One of the purposes of the wafer cassette is to provide this protection.
  • a wafer cassette which is made by metal and can stand heat up to three hundred centigrade degrees, is used.
  • the wafer is easy to have some damages in the edge of the wafer or the wafer can be broken when the wafer cassette is in process.
  • FIG. 1 it is a perspective view drawing of the wafer cassette according to one embodiment of the prior art.
  • a wafer cassette 100 is used to transport and store the wafers.
  • the wafer cassette 100 includes one front end member 110 , two sidewall plates 120 , one back end member 130 , a plurality of fixture slots 140 , two cylindrical sticks 150 and two supporting rods 160 .
  • the sidewall plates 120 are respectively fixed between the front end member 110 and the back end member 130 .
  • a plurality of fixture slots 140 are disposed in each of the sidewall plates 120 .
  • the two cylindrical sticks 150 are respectively disposed at the bottom of each sidewall plates.
  • the supporting rods 160 are fixed between the sidewall plates 120 and the cylindrical sticks 150 .
  • the front end member 110 and the back end member 130 are used to protect the wafer.
  • a plurality of fixture slots 140 are used to hold the wafers.
  • the cylindrical stick 150 is used to support the wafer and is made by glass. And because the contact area of the cylindrical stick 150 with the wafer is small, it is difficult to enhance the cushion when the cylindrical stick 150 contacts with the wafer and the wafer is easy to have some damages in the edge of the wafer or the wafer will be broken.
  • the wafer cassette used in high temperature baking process where the wafer is easy to be collided with the cylindrical stick. Therefore, a resilient sheet is provided to reduce the degree of the collision. The probability to have some damages in the wafer is reduced.
  • One aspect of the present invention is to provide a wafer cassette with a structure that prevents the wafer from colliding. Another aspect of the present invention is that the material of the substrate must be able to stand heat at less three hundred centigrade degrees, because the wafer cassette is used in high temperature baking process.
  • a wafer cassette is used in high temperature baking process.
  • the wafer cassette includes one front end member, two sidewall plates, one back end member, a plurality of fixture slots, two resilient sheets and two supporting rods.
  • FIG. 1 is a perspective view of a wafer cassette according to one embodiment in the prior art.
  • FIG. 2 is a perspective view of a wafer cassette according to one preferred embodiment of the present invention.
  • the present invention is to provide an improved structure of the wafer cassette in high temperature baking process.
  • FIG. 2 it is a perspective view of the wafer cassette according to one preferred embodiment of the present invention.
  • a wafer cassette 200 is used to transport and store the wafers.
  • the wafer cassette 200 includes one front end member 210 , two sidewall plates 220 , one back end member 230 , a plurality of fixture slots 240 , two resilient sheets 250 and two supporting rods 260 .
  • the sidewall plates 220 are respectively fixed between two ends of the front end member 210 and two ends of the back end member 230 .
  • a plurality of fixture slots 240 are disposed in each of the sidewall plates 220 .
  • the resilient sheets 250 are respectively disposed at the bottom of each sidewall plates.
  • the supporting rods 260 are fixed between the sidewall plates 220 and the resilient sheets 250 ..
  • the resilient sheets 250 of the present invention are used to protect the wafer.
  • the material of resilient sheets is metal and can stand heat up to three hundred centigrade degrees.
  • the metal of the resilient sheet cannot be electroplated because it would pollute the wafer.
  • the sheets can be the material can stand heat up to three hundred centigrade degrees without melting.
  • the resilient sheets have a ramp to increase the contact area with the wafer and enhance the cushion when the resilient sheet is contacted with the wafer.
  • the resilient sheets 250 could be various shapes with springiness to avoid hitting against the wafers in high temperature baking process.
  • the areas of the edge of the wafers are directly contacted with the resilient sheets. As long as more areas directly contacted with the resilient sheets, the opportunity of the wafers' damages is reduced.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

A wafer cassette for consolidation in process of high temperature baking is provided. The wafer cassette includes one front end member, two sidewall plates, one back end member, a plurality of fixture slots, two resilient sheets and two supporting rods. By using this wafer cassette in high temperature baking process, the chance of having the wafer damage is minimized.

Description

    FIELD OF THE INVENTION
  • The present invention relates to a wafer cassette. More particularly, the present invention relates to a wafer cassette used in high temperature baking process.
    • DESCRIPTION OF THE PRIOR ART
  • In the semiconductor fabrication industry, the wafer processing into IC (integrated circuit) chips often includes several steps where the wafers are repeatedly processed, test, stored and transported. Due to the delicate nature of the wafers and their extreme value, it is vital that they are properly protected throughout this procedure. One of the purposes of the wafer cassette is to provide this protection.
  • In high temperature baking process, a wafer cassette, which is made by metal and can stand heat up to three hundred centigrade degrees, is used. However, during the baking process, the wafer is easy to have some damages in the edge of the wafer or the wafer can be broken when the wafer cassette is in process.
  • Referring to FIG. 1, it is a perspective view drawing of the wafer cassette according to one embodiment of the prior art. A wafer cassette 100 is used to transport and store the wafers. The wafer cassette 100 includes one front end member 110, two sidewall plates 120, one back end member 130, a plurality of fixture slots 140, two cylindrical sticks 150 and two supporting rods 160. The sidewall plates 120 are respectively fixed between the front end member 110 and the back end member 130. A plurality of fixture slots 140 are disposed in each of the sidewall plates 120. The two cylindrical sticks 150 are respectively disposed at the bottom of each sidewall plates. And the supporting rods 160 are fixed between the sidewall plates 120 and the cylindrical sticks 150.
  • The front end member 110 and the back end member 130 are used to protect the wafer. A plurality of fixture slots 140 are used to hold the wafers. The cylindrical stick 150 is used to support the wafer and is made by glass. And because the contact area of the cylindrical stick 150 with the wafer is small, it is difficult to enhance the cushion when the cylindrical stick 150 contacts with the wafer and the wafer is easy to have some damages in the edge of the wafer or the wafer will be broken.
    • SUMMARY OF THE INVENTION
  • According to the description of the prior art, the wafer cassette used in high temperature baking process where the wafer is easy to be collided with the cylindrical stick. Therefore, a resilient sheet is provided to reduce the degree of the collision. The probability to have some damages in the wafer is reduced.
  • One aspect of the present invention is to provide a wafer cassette with a structure that prevents the wafer from colliding. Another aspect of the present invention is that the material of the substrate must be able to stand heat at less three hundred centigrade degrees, because the wafer cassette is used in high temperature baking process.
  • In one embodiment, a wafer cassette is used in high temperature baking process. The wafer cassette includes one front end member, two sidewall plates, one back end member, a plurality of fixture slots, two resilient sheets and two supporting rods.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The accompany drawings incorporated in and forming a part of the specification illustrate several aspects of the present invention, and together with the description serve to explain the principles of the invention. In the drawings:
  • FIG. 1 is a perspective view of a wafer cassette according to one embodiment in the prior art.
  • FIG. 2 is a perspective view of a wafer cassette according to one preferred embodiment of the present invention.
    • DESCRIPTION OF THE PREFERRED EMBODIMENT
  • The following is the detailed description of the present invention, which describes the wafer cassette used in high temperature baking process, but the detailed structure composition and the operating theory are not discussed. The portions relating to the conventional techniques are briefly described, and the parts of the drawings are not proportionally drafted. While embodiments are discussed, it is not intended to limit the scope of the present invention. Except expressly restricting the amount of the components, it is appreciated that the quantity of the disclosed components may be greater than that disclosed.
  • When the wafer had been tested, it is necessary to put the wafer in the furnace to dry the inks, which are the marks for error chips. However, the wafer would have some damages in the edge of the wafer or the wafer would be broken during the high temperature baking process. The present invention is to provide an improved structure of the wafer cassette in high temperature baking process.
  • Referring to FIG. 2, it is a perspective view of the wafer cassette according to one preferred embodiment of the present invention. A wafer cassette 200 is used to transport and store the wafers. The wafer cassette 200 includes one front end member 210, two sidewall plates 220, one back end member 230, a plurality of fixture slots 240, two resilient sheets 250 and two supporting rods 260. The sidewall plates 220 are respectively fixed between two ends of the front end member 210 and two ends of the back end member 230. A plurality of fixture slots 240 are disposed in each of the sidewall plates 220. The resilient sheets 250 are respectively disposed at the bottom of each sidewall plates. And the supporting rods 260 are fixed between the sidewall plates 220 and the resilient sheets 250..
  • Still referring to FIG. 2, the resilient sheets 250 of the present invention are used to protect the wafer. The material of resilient sheets is metal and can stand heat up to three hundred centigrade degrees. In addition, the metal of the resilient sheet cannot be electroplated because it would pollute the wafer. On the other hand, the sheets can be the material can stand heat up to three hundred centigrade degrees without melting. The resilient sheets have a ramp to increase the contact area with the wafer and enhance the cushion when the resilient sheet is contacted with the wafer.
  • The resilient sheets 250 could be various shapes with springiness to avoid hitting against the wafers in high temperature baking process. The areas of the edge of the wafers are directly contacted with the resilient sheets. As long as more areas directly contacted with the resilient sheets, the opportunity of the wafers' damages is reduced.
  • The foregoing description is not intended to be exhaustive or to limit the invention to the precise forms disclosed. Obvious modifications or variations are possible in light of the above teachings. In this regard, the embodiment or embodiments discussed were chosen and described to provide the best illustration of the principles of the invention and its practical application to thereby enable one of ordinary skill in the art to utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. All such modifications and variations are within the scope of the invention as determined by the appended claims when interpreted in accordance with the breadth to which they are fairly and legally entitled.

Claims (9)

1. A wafer cassette used in high temperature baking process, comprising:
a front end member;
two sidewall plates oppositely disposed at two ends of said front end member;
a back end member disposed between said two sidewall plates; and
two resilient sheets with curved portion oppositely disposed at the bottom of said two sidewall plates.
2. The wafer cassette of claim 1, wherein each of said sidewall plates has a plurality of vertical slots and an horizontal supporting rod.
3. The wafer cassette of claim 1, wherein said resilient sheet is disposed at the bottom of said sidewall plate.
4. The wafer cassette of claim 1, wherein said resilient sheet is connected to said supporting rod.
5. The wafer cassette of claim 1, wherein said sidewall plate includes a plurality of fixture slots.
6. The wafer cassette of claim 5, wherein said fixture slot is used to dispose the wafer.
7. The wafer cassette of claim 1, wherein said resilient sheets is made of metal.
8. The wafer cassette of claim 7, wherein said resilient sheets can stand heat up to three hundred centigrade degrees.
9. The wafer cassette of claim 1, wherein said resilient sheets has a ramp to increase the contact area in the wafer.
US11/196,880 2005-08-04 2005-08-04 Wafer cassette used in high temperature baking process Abandoned US20070029268A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US11/196,880 US20070029268A1 (en) 2005-08-04 2005-08-04 Wafer cassette used in high temperature baking process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/196,880 US20070029268A1 (en) 2005-08-04 2005-08-04 Wafer cassette used in high temperature baking process

Publications (1)

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US20070029268A1 true US20070029268A1 (en) 2007-02-08

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106252271A (en) * 2016-09-05 2016-12-21 江苏纳沛斯半导体有限公司 Wafer casket

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5577621A (en) * 1994-05-31 1996-11-26 Electronics & Telecommunications Research Institute Wafer installing cassette for semiconductor manufacturing apparatus
US5657879A (en) * 1996-02-05 1997-08-19 Seh America, Inc. Combination wafer carrier and storage device
US5704494A (en) * 1995-06-16 1998-01-06 Nihon Plast Co., Ltd. Disc holder
US6039186A (en) * 1997-04-16 2000-03-21 Fluoroware, Inc. Composite transport carrier
US6216874B1 (en) * 1998-07-10 2001-04-17 Fluoroware, Inc. Wafer carrier having a low tolerance build-up
US6287112B1 (en) * 2000-03-30 2001-09-11 Asm International, N.V. Wafer boat
US6488497B1 (en) * 2001-07-12 2002-12-03 Saint-Gobain Ceramics & Plastics, Inc. Wafer boat with arcuate wafer support arms
US20030010672A1 (en) * 2001-07-12 2003-01-16 Anthony Simpson Thin wafer carrier
US20030121870A1 (en) * 2001-12-28 2003-07-03 Microtool, Inc. Semiconductor cassette reducer
US20050006325A1 (en) * 2003-07-09 2005-01-13 Chartered Semiconductor Manufacturing Ltd. Wafer protective cassette
US20050263462A1 (en) * 2004-03-26 2005-12-01 Johnson Michael L Disk cassette system
US7160514B2 (en) * 2001-12-18 2007-01-09 Erie Scientific Company Slide case with removable rack

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5577621A (en) * 1994-05-31 1996-11-26 Electronics & Telecommunications Research Institute Wafer installing cassette for semiconductor manufacturing apparatus
US5704494A (en) * 1995-06-16 1998-01-06 Nihon Plast Co., Ltd. Disc holder
US5657879A (en) * 1996-02-05 1997-08-19 Seh America, Inc. Combination wafer carrier and storage device
US6039186A (en) * 1997-04-16 2000-03-21 Fluoroware, Inc. Composite transport carrier
US6216874B1 (en) * 1998-07-10 2001-04-17 Fluoroware, Inc. Wafer carrier having a low tolerance build-up
US6287112B1 (en) * 2000-03-30 2001-09-11 Asm International, N.V. Wafer boat
US6488497B1 (en) * 2001-07-12 2002-12-03 Saint-Gobain Ceramics & Plastics, Inc. Wafer boat with arcuate wafer support arms
US20030010672A1 (en) * 2001-07-12 2003-01-16 Anthony Simpson Thin wafer carrier
US7160514B2 (en) * 2001-12-18 2007-01-09 Erie Scientific Company Slide case with removable rack
US20030121870A1 (en) * 2001-12-28 2003-07-03 Microtool, Inc. Semiconductor cassette reducer
US7121414B2 (en) * 2001-12-28 2006-10-17 Brooks Automation, Inc. Semiconductor cassette reducer
US20050006325A1 (en) * 2003-07-09 2005-01-13 Chartered Semiconductor Manufacturing Ltd. Wafer protective cassette
US7017758B2 (en) * 2003-07-09 2006-03-28 Chartered Semiconductor Manufacturing Ltd. Wafer protective cassette
US20050263462A1 (en) * 2004-03-26 2005-12-01 Johnson Michael L Disk cassette system
US7252199B2 (en) * 2004-03-26 2007-08-07 Entegris, Inc. Disk cassette system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106252271A (en) * 2016-09-05 2016-12-21 江苏纳沛斯半导体有限公司 Wafer casket

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Legal Events

Date Code Title Description
AS Assignment

Owner name: KING YUAN ELECTRONICS CO., LTD, TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:DAI, JOHNNY;REEL/FRAME:016867/0280

Effective date: 20050714

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION