US20060226521A1 - Semiconductor Package Having Integrated Metal Parts for Thermal Enhancement - Google Patents
Semiconductor Package Having Integrated Metal Parts for Thermal Enhancement Download PDFInfo
- Publication number
- US20060226521A1 US20060226521A1 US11/426,166 US42616606A US2006226521A1 US 20060226521 A1 US20060226521 A1 US 20060226521A1 US 42616606 A US42616606 A US 42616606A US 2006226521 A1 US2006226521 A1 US 2006226521A1
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- Prior art keywords
- leadframe
- chip
- spreader
- heat spreader
- pad
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
Definitions
- the present invention is related in general to the field of electrical systems and semiconductor devices and more specifically to thermally enhanced semiconductor devices having integrated metallic chip support and heat spreader.
- Removing the thermal heat generated by active components belongs to the most fundamental challenges in integrated circuit technology. Coupled with the ever shrinking component feature sizes and increasing density of device integration is an ever increasing density of power and thermal energy generation. However, in order to keep the active components at their low operating temperatures and high speed, this heat must continuously be dissipated and removed to outside heat sinks. This effort becomes increasingly harder, the higher the energy density becomes.
- Another approach of known technology specifically for ball-grid array devices without leadframes, employs a heat spreader spaced in proximity of the active surface of the semiconductor chip, at a safe distance from the electrical connections of the active surface.
- the heat has to spread first through the macroscopic thickness of the molding material (typically an epoxy filled with inorganic particles, a mediocre thermal conductor) and only then into a metallic heat spreader.
- the spreader is positioned on the surface of the molded package; in other devices, it is embedded in the molded package, as described in U.S. Pat. No. 6,552,428, issued on Apr. 22, 2003 (Huang et al., “Semiconductor Package having an Exposed Heat Spreader”).
- a general semiconductor package structure is needed which based on fundamental physics and design concepts flexible enough to be applied for different semiconductor product families and a wide spectrum of design and assembly variations. It should not only meet high thermal and electrical performance requirements, but should also achieve improvements towards the goals of enhanced process yields and device reliability.
- One embodiment of the invention is a semiconductor device comprising a metallic leadframe with a first surface and a second surface.
- the leadframe includes a chip pad and a plurality of segments; the chip pad is held by a plurality of straps, wherein each strap has a groove.
- a chip is mounted on the chip pad and electrically connected to the segments.
- a heat spreader is disposed on the first surface of the leadframe; the heat spreader has its central portion spaced above the chip connections, and also has positioning members extending outwardly from the edges of the central portion so that they rest in the grooves of the straps.
- Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.
- the base metal for both the leadframe and the heat spreader is preferably copper.
- the preferred thickness range for leadframe as well as spreader is between about 300 and 150 ⁇ m.
- the depth of the grooves in the chip pad straps are preferably about half the leadframe thickness.
- the heat spreader has a three-dimensional dome-like shape to approximate, together with the metallic chip pad, an almost closed thermally conductive shell surrounding the chip. Further, the heat spreader has preferably at least one groove formed so that it enhances the adhesion to the encapsulation material.
- a heat sink is in contact with the central spreader portion. In yet another embodiment of the invention, another heat sink is in contact with the second surface of the leadframe.
- FIG. 1 is a schematic X-ray view of a packaged semiconductor device illustrating an embodiment of the invention.
- the X-ray view of FIG. 1 includes a cross section along line A-A′ in FIG. 2 .
- FIG. 2 is a schematic top view of the semiconductor device shown in FIG. 1 , illustrating an embodiment of the invention.
- FIG. 3 is a schematic X-ray view and cross section of a semiconductor device illustrating another embodiment of the invention.
- the present invention is related to U.S. Pat. No. 6,597,065, issued on Jul. 22, 2003 (Efland, “Thermally Enhanced Semiconductor Chip having Integrated Bonds over Active Circuits”).
- FIG. 1 is a schematic X-ray view of a packaged semiconductor device, generally designated 100 , illustrating an embodiment of the invention.
- Chip 101 is mounted by an adhesive chip attach material 102 onto the first surface 103 a of a metallic leadframe 103 .
- Attach adhesive 102 is thermally conductive; preferably, it is a silver-filled epoxy.
- the semiconductor material of chip 101 is preferably silicon; alternatively, chip 101 may comprise silicon germanium, gallium arsenide, or any other semiconductor material used for device fabrication.
- Chip 101 has an active surface 101 a , which comprises components such as integrated circuits, discrete transistors and diodes, and also passive parts including capacitors and resistors. Active surface 101 a generates the thermal energy/heat during device operation, which needs to be transported away in order to maintain the preferred operation temperatures and to prevent overheating of the active components.
- Q is the vector (in magnitude and direction) of thermal flux
- ⁇ is the thermal conductivity, a materials characteristic.
- the thermal flux is in the direction of the temperature difference and is proportional to the magnitude of that difference.
- Leadframe 103 is made of a base metal, preferably copper or a copper alloy.
- Alternative base metals include brass, aluminum, iron-nickel alloys (such as “Alloy 42”), and invar.
- the base metal is fully covered with a plated layer; as an example, the copper base metal may be plated with a nickel layer.
- the starting material of the leadframe is called the “base metal”, indicating the type of metal. Consequently, the term “base metal” is not to be construed in an electrochemical sense (as in opposition to ‘noble metal’) or in a structural sense.]
- the base metal of leadframe 103 originates with a metal sheet in the preferred thickness range from 100 to 300 ⁇ m; thinner sheets are possible.
- the ductility in this thickness range provides the 5 to 15% elongation that facilitates the segment bending and forming operation.
- the leadframe is stamped or etched from the starting metal sheet.
- the base metal of leadframe 103 may often be plated, for instance with a nickel layer.
- the plated layer is preferably rough, non-reflective nickel having a thickness between 0.2 and 1.0 ⁇ m, preferably 0.5 ⁇ 25 ⁇ m.
- Nickel is the preferred metal because, positioned under the tin-based solder of contemporary devices, it reduces the propensity for tin whiskers.
- the plated nickel layer is ductile for the leadframe bending and forming process.
- the X-ray view of FIG. 1 includes a cross section along line A-A′ of the device depicted in FIG. 2 . Consequently, the material of leadframe 103 appears continuous in FIG. 1 , but actually includes the chip pad 104 and a plurality of straps 105 , which hold the chip pad 104 .
- Each strap 105 has a groove 106 (see FIG. 2 ) of depth 106 a and width 106 b .
- the depth 106 a of the strap groove is approximately one half of the thickness of the leadframe material, resulting in a depth of about 50 to 150 ⁇ m.
- the plurality of leadframe segments 107 are, however, clearly represented in FIG. 2 ).
- the semiconductor chip 101 is electrically connected the leadframe segments; as an example, FIG. 1 depicts a couple of wire bonds 108 serving as chip connections between the chip contact pads and the leadframe segments (not shown).
- FIG. 1 further shows a heat spreader 110 , which is disposed on the first surface 103 a of the leadframe.
- Heat spreader 110 has a central portion 110 a spaced above chip 101 and the chip connections 107 .
- heat spreader 110 has a plurality of positioning members 110 b , which extend outwardly from the edges of the central portion 110 a and rest in the grooves 106 of the leadframe straps 105 .
- the heat spreader is preferably made of copper in a thickness range comparable to the metal of the leadframe 100 to 300 ⁇ m).
- the heat spreader is stamped and formed form sheet metal; in this process, the positioning members 110 b obtain a configuration, which provides strong anchoring of the encapsulation material onto the heat spreader.
- An example of suitably formed members with at least one curving for encapsulation adhesion is schematically illustrated in FIG. 1 ; this FIG. further shows the manner, in which the tips 111 of the members are positioned in the strap grooves 106 . Using the depth of the grooves, this positioning secures a strong enough anchoring of the heat spreader to withstand any pressure of the molding compound during the transfer molding process.
- the heat spreader 110 comprises a three-dimensional bell-shaped metal part. Together with the metallic chip pad 104 of the leadframe, the bell-shaped heat spreader approximates for the device 100 an integrated, thermally strong conductive shell surrounding chip 101 .
- Device 100 is packaged by encapsulation material 120 , which surrounds chip 101 , the electrical connections 108 , and the spreader positioning members 110 b .
- the encapsulation material fills the space between spreader 110 and chip 101 , but leaves the second leadframe surface 103 b and the central spreader portion 110 exposed.
- the preferred encapsulation material is a molding compound containing thermally conductive fillers.
- FIG. 1 The cross section of FIG. 1 is taken along line A-A′ of FIG. 2 ;
- FIG. 2 itself is a schematic top view of an embodiment of the present invention, wherein dashed lines indicate device features inside the plastic encapsulation.
- 110 a outlines the central portion of the heat spreader.
- the four positioning members 110 b extend outwardly from the edges of the central portion to rest in the grooves 106 of the straps 105 of the leadframe chip pad.
- the chip 101 mounted on the pad 103 , has a plurality of contact pads 201 , of which only four pads are shown in FIG. 2 for clarity. Bonding wires 108 connect the chip pads 201 to the leadframe segments 107 ; for clarity, only four bonding wire connections out of the plurality of segments are shown in FIG. 2 .
- FIG. 3 depicts two heat sinks, but for some applications, one sink is sufficient.
- the first heat sink 301 is mounted, by means of attach material 302 , on the device surface having the exposed central portion 110 a of heat spreader 110 .
- the second heat sink 303 is mounted, by means of attach material 304 , on the leadframe surface having the exposed surface 103 b of chip pad 104 .
- Heat sinks 301 and/or 303 provide a steep temperature gradient (grad T) for enhancing the thermal flux away from the heat-generating active components on the active chip surface 101 a .
- grad T steep temperature gradient
- the invention covers integrated circuits made in substrates of silicon, silicon germanium, gallium arsenide, or any other semiconductor material used in integrated circuit manufacture.
- the invention covers generally a heat-generating semiconductor unit.
- This concept thus includes single-chip as well as multi-chip devices. Further, the concept includes devices employing wire-bonded assembly as well as flip-chip assembly.
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
A semiconductor device comprising a metallic leadframe (103) with a first surface (103 a) and a second surface (103 b). The leadframe includes a chip pad (104) and a plurality of segments (107); the chip pad is held by a plurality of straps (105), wherein each strap has a groove (106). A chip (101) is mounted on the chip pad and electrically connected to the segments. A heat spreader (110) is disposed on the first surface of the leadframe; the heat spreader has its central portion (110 a) spaced above the chip connections (108), and also has positioning members (110 b) extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.
Description
- The present invention is related in general to the field of electrical systems and semiconductor devices and more specifically to thermally enhanced semiconductor devices having integrated metallic chip support and heat spreader.
- Removing the thermal heat generated by active components belongs to the most fundamental challenges in integrated circuit technology. Coupled with the ever shrinking component feature sizes and increasing density of device integration is an ever increasing density of power and thermal energy generation. However, in order to keep the active components at their low operating temperatures and high speed, this heat must continuously be dissipated and removed to outside heat sinks. This effort becomes increasingly harder, the higher the energy density becomes.
- In known technology, one approach to heat removal, specifically for devices with metallic leads, focuses on thermal transport through the thickness of the semiconductor chip from the active surface to the passive surface. The passive surface, in turn, is attached to the chip mount pad of a metallic leadframe so that the thermal energy can flow into the chip mount pad of the metallic leadframe. The layer of the typical polymer attach material represents a thermal barrier. When properly formed, the leadframe can act as a heat spreader to an outside heat sink. In many semiconductor package designs, this implies a leadframe with a portion formed such that this portion protrudes from the plastic device encapsulation; it can thus be directly attached to the outside heat sink. Examples are described in U.S. Pat. No. 5,594,234, issued on Jan. 14, 1997 (Carter et al., “Downset Exposed Die Mount Pad Leadframe and Package”) and U.S. Pat. No. 6,072,230, issued on Jun. 6, 2000 (Carter et al., “Bending and Forming Method of Fabricating Exposed Leadframes for Semiconductor Devices”).
- Another approach of known technology, specifically for ball-grid array devices without leadframes, employs a heat spreader spaced in proximity of the active surface of the semiconductor chip, at a safe distance from the electrical connections of the active surface. In this approach, the heat has to spread first through the macroscopic thickness of the molding material (typically an epoxy filled with inorganic particles, a mediocre thermal conductor) and only then into a metallic heat spreader. Frequently, the spreader is positioned on the surface of the molded package; in other devices, it is embedded in the molded package, as described in U.S. Pat. No. 6,552,428, issued on Apr. 22, 2003 (Huang et al., “Semiconductor Package having an Exposed Heat Spreader”).
- For leadless devices with small outlines (both relative to area consumption and device height), the application of any one of these thermal approaches is aggravated by the need for robustness during the encapsulation process, especially in transfer molding or injection molding methods. Any thermal advancement has to be low-cost, since cost-adding technical proposals are contrary to the strong market emphasis on total semiconductor device package cost reduction.
- A need has therefore arisen to for a concept of a low-cost, thermally improved and electrically high performance leadless structure. In addition, a general semiconductor package structure is needed which based on fundamental physics and design concepts flexible enough to be applied for different semiconductor product families and a wide spectrum of design and assembly variations. It should not only meet high thermal and electrical performance requirements, but should also achieve improvements towards the goals of enhanced process yields and device reliability.
- The present invention provides improved thermal performance of integrated circuits, especially of the SON, SOIC, SOP, and PDIP families, solving one of the most intractable limitations of semiconductor technology. One embodiment of the invention is a semiconductor device comprising a metallic leadframe with a first surface and a second surface. The leadframe includes a chip pad and a plurality of segments; the chip pad is held by a plurality of straps, wherein each strap has a groove. A chip is mounted on the chip pad and electrically connected to the segments. A heat spreader is disposed on the first surface of the leadframe; the heat spreader has its central portion spaced above the chip connections, and also has positioning members extending outwardly from the edges of the central portion so that they rest in the grooves of the straps. Encapsulation material surrounds the chip, the electrical connections, and the spreader positioning members, and fills the space between the spreader and the chip, while leaving the second leadframe surface and the central spreader portion exposed.
- The base metal for both the leadframe and the heat spreader is preferably copper. The preferred thickness range for leadframe as well as spreader is between about 300 and 150 μm. The depth of the grooves in the chip pad straps are preferably about half the leadframe thickness.
- Preferably, the heat spreader has a three-dimensional dome-like shape to approximate, together with the metallic chip pad, an almost closed thermally conductive shell surrounding the chip. Further, the heat spreader has preferably at least one groove formed so that it enhances the adhesion to the encapsulation material.
- In another embodiment of the invention, a heat sink is in contact with the central spreader portion. In yet another embodiment of the invention, another heat sink is in contact with the second surface of the leadframe.
- It is a technical advantage of the invention that it offers low-cost design and structure options for semiconductor packages to create short paths of steepened temperature gradient in order to dissipate the heat flux away from high-temperature IC portions to (outside) heat sinks.
- It is another technical advantage that the innovation of the invention is accomplished using the installed equipment base so that no investment in new manufacturing machines is needed.
- The technical advances represented by the invention, as well as the objects thereof, will become apparent from the following description of the preferred embodiments of the invention, when considered in conjunction with the accompanying drawings and the novel features set forth in the appended claims.
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FIG. 1 is a schematic X-ray view of a packaged semiconductor device illustrating an embodiment of the invention. The X-ray view ofFIG. 1 includes a cross section along line A-A′ inFIG. 2 . -
FIG. 2 is a schematic top view of the semiconductor device shown inFIG. 1 , illustrating an embodiment of the invention. -
FIG. 3 is a schematic X-ray view and cross section of a semiconductor device illustrating another embodiment of the invention. - The present invention is related to U.S. Pat. No. 6,597,065, issued on Jul. 22, 2003 (Efland, “Thermally Enhanced Semiconductor Chip having Integrated Bonds over Active Circuits”).
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FIG. 1 is a schematic X-ray view of a packaged semiconductor device, generally designated 100, illustrating an embodiment of the invention.Chip 101 is mounted by an adhesivechip attach material 102 onto thefirst surface 103 a of ametallic leadframe 103. Attach adhesive 102 is thermally conductive; preferably, it is a silver-filled epoxy. The semiconductor material ofchip 101 is preferably silicon; alternatively,chip 101 may comprise silicon germanium, gallium arsenide, or any other semiconductor material used for device fabrication. -
Chip 101 has anactive surface 101 a, which comprises components such as integrated circuits, discrete transistors and diodes, and also passive parts including capacitors and resistors.Active surface 101 a generates the thermal energy/heat during device operation, which needs to be transported away in order to maintain the preferred operation temperatures and to prevent overheating of the active components. - The most effective way of removing thermal energy is by conduction; less effective, but nevertheless welcome mechanisms include thermal transport by convection and by radiation. In quantitative terms, the energy transport by thermal conductance is expressed by a differential equation, which expresses, following FOURIER's approach, the thermal flux Q per unit of time as being the product of thermal conductivity λ multiplied by the gradient of temperature T, in the direction of decreasing temperature, and by the area q perpendicular to the temperature gradient:
dQ/dt=−λ·(grad T)·q.
In this equation, Q is the vector (in magnitude and direction) of thermal flux, and λ is the thermal conductivity, a materials characteristic. The thermal flux is in the direction of the temperature difference and is proportional to the magnitude of that difference. - When, over the length 1, the temperature drop is steady and uniform from the high temperature T2 to the low temperature T1, then (grad T) reduces to (T2−T1)/l:
dQ/dt=−λ·(q/l)·(T2−T1).
λ·(q/l) is called the thermal conductance, and the inverse value l/(λ·q) is called thermal resistance (in analogy to OHM's law). - In the present invention, improvements of both λ·q and (grad T) are simultaneously provided to enhance the thermal flux vertically away from the heat-generating active components on the
active surface 101 a of thesemiconductor chip 101. - In addition to this enhanced thermal flux vertically away from the active chip surface, there is the traditional possibility of conducting thermal energy in the opposite direction through the
semiconductor material chip 101 to itspassive surface 101 b and beyond intoleadframe 103. Through thesecond surface 103 b ofleadframe 103, the thermal flux can enter the ambient or an attached substrate. -
Leadframe 103 is made of a base metal, preferably copper or a copper alloy. Alternative base metals include brass, aluminum, iron-nickel alloys (such as “Alloy 42”), and invar. Frequently, the base metal is fully covered with a plated layer; as an example, the copper base metal may be plated with a nickel layer. - [As defined herein, the starting material of the leadframe is called the “base metal”, indicating the type of metal. Consequently, the term “base metal” is not to be construed in an electrochemical sense (as in opposition to ‘noble metal’) or in a structural sense.]
- The base metal of
leadframe 103 originates with a metal sheet in the preferred thickness range from 100 to 300 μm; thinner sheets are possible. The ductility in this thickness range provides the 5 to 15% elongation that facilitates the segment bending and forming operation. The leadframe is stamped or etched from the starting metal sheet. - As stated above, the base metal of
leadframe 103 may often be plated, for instance with a nickel layer. The plated layer is preferably rough, non-reflective nickel having a thickness between 0.2 and 1.0 μm, preferably 0.5±25 μm. Nickel is the preferred metal because, positioned under the tin-based solder of contemporary devices, it reduces the propensity for tin whiskers. The plated nickel layer is ductile for the leadframe bending and forming process. - The X-ray view of
FIG. 1 includes a cross section along line A-A′ of the device depicted inFIG. 2 . Consequently, the material ofleadframe 103 appears continuous inFIG. 1 , but actually includes thechip pad 104 and a plurality ofstraps 105, which hold thechip pad 104. Eachstrap 105 has a groove 106 (seeFIG. 2 ) ofdepth 106 a andwidth 106 b. Preferably, thedepth 106 a of the strap groove is approximately one half of the thickness of the leadframe material, resulting in a depth of about 50 to 150 μm. Not shown inFIG. 1 is the plurality of leadframe segments 107 (they are, however, clearly represented inFIG. 2 ). Thesemiconductor chip 101 is electrically connected the leadframe segments; as an example,FIG. 1 depicts a couple ofwire bonds 108 serving as chip connections between the chip contact pads and the leadframe segments (not shown). -
FIG. 1 further shows aheat spreader 110, which is disposed on thefirst surface 103 a of the leadframe.Heat spreader 110 has acentral portion 110 a spaced abovechip 101 and thechip connections 107. Further,heat spreader 110 has a plurality ofpositioning members 110 b, which extend outwardly from the edges of thecentral portion 110 a and rest in thegrooves 106 of the leadframe straps 105. The heat spreader is preferably made of copper in a thickness range comparable to the metal of theleadframe 100 to 300 μm). - Typically, the heat spreader is stamped and formed form sheet metal; in this process, the
positioning members 110 b obtain a configuration, which provides strong anchoring of the encapsulation material onto the heat spreader. An example of suitably formed members with at least one curving for encapsulation adhesion is schematically illustrated inFIG. 1 ; this FIG. further shows the manner, in which thetips 111 of the members are positioned in thestrap grooves 106. Using the depth of the grooves, this positioning secures a strong enough anchoring of the heat spreader to withstand any pressure of the molding compound during the transfer molding process. - In its final form, the
heat spreader 110 comprises a three-dimensional bell-shaped metal part. Together with themetallic chip pad 104 of the leadframe, the bell-shaped heat spreader approximates for thedevice 100 an integrated, thermally strong conductiveshell surrounding chip 101. -
Device 100 is packaged byencapsulation material 120, which surroundschip 101, theelectrical connections 108, and thespreader positioning members 110 b. The encapsulation material fills the space betweenspreader 110 andchip 101, but leaves thesecond leadframe surface 103 b and thecentral spreader portion 110 exposed. The preferred encapsulation material is a molding compound containing thermally conductive fillers. - The cross section of
FIG. 1 is taken along line A-A′ ofFIG. 2 ;FIG. 2 itself is a schematic top view of an embodiment of the present invention, wherein dashed lines indicate device features inside the plastic encapsulation. 110 a outlines the central portion of the heat spreader. The fourpositioning members 110 b extend outwardly from the edges of the central portion to rest in thegrooves 106 of thestraps 105 of the leadframe chip pad. Thechip 101, mounted on thepad 103, has a plurality ofcontact pads 201, of which only four pads are shown inFIG. 2 for clarity.Bonding wires 108 connect thechip pads 201 to theleadframe segments 107; for clarity, only four bonding wire connections out of the plurality of segments are shown inFIG. 2 . - In the schematic cross section of
FIG. 3 , thedevice 100 ofFIG. 1 is shown with heat sinks attached, actually,FIG. 3 depicts two heat sinks, but for some applications, one sink is sufficient. Thefirst heat sink 301 is mounted, by means of attachmaterial 302, on the device surface having the exposedcentral portion 110 a ofheat spreader 110. Thesecond heat sink 303 is mounted, by means of attachmaterial 304, on the leadframe surface having the exposedsurface 103 b ofchip pad 104. Heat sinks 301 and/or 303 provide a steep temperature gradient (grad T) for enhancing the thermal flux away from the heat-generating active components on theactive chip surface 101 a. At the same time, the combination of metallic leadframe and metallic heat spreader with their high thermal conductivity ? and large area q perpendicular to the temperature gradient, improves the product ?·q. - While this invention has been described in reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description.
- As an example, the invention covers integrated circuits made in substrates of silicon, silicon germanium, gallium arsenide, or any other semiconductor material used in integrated circuit manufacture.
- As another example, the invention covers generally a heat-generating semiconductor unit. This concept thus includes single-chip as well as multi-chip devices. Further, the concept includes devices employing wire-bonded assembly as well as flip-chip assembly.
- It is therefore intended that the appended claims encompass any such modifications or embodiments.
Claims (17)
1. A semiconductor device comprising:
a metallic leadframe having a first surface and a second surface, said leadframe including a chip pad and a plurality of segments;
a plurality of straps holding said chip pad, each strap having a groove;
a semiconductor chip mounted on said chip pad and electrically connected to said segments;
a heat spreader disposed on said first surface of said leadframe, said heat spreader comprising a central portion spaced above said chip connections, and positioning members outwardly extending from edges of said central portion to rest in said grooves of said straps; and
encapsulation material surrounding said chip, electrical connections, and spreader members, filling said space between said spreader and chip, while leaving said second leadframe surface and said central spreader portion exposed.
2. The device according to claim 1 wherein said heat spreader further comprises a three-dimensional bell shape to approximate, together with said metallic chip pad, a closed, thermally conductive shell surrounding said chip.
3. The device according to claim 1 wherein said heat spreader further comprises at least one curving to enhance adhesion to said encapsulation material.
4. The device according to claim 1 further including a first heat sink in contact with said central spreader portion.
5. The device according to claim 1 further including a second heat sink in contact with said second surface of said leadframe.
6. The device according to claim 1 wherein said leadframe is made of copper or copper alloy.
7. The device according to claim 1 where said leadframe material is selected from a group consisting of brass, aluminum, iron-nickel alloys, and invar.
8. The device according to claim 1 wherein said leadframe has a thickness in the range from about 100 to 300 μm.
9. The device according to claim 1 wherein said chip pad has four straps.
10. The device according to claim 1 wherein said strap grooves have a depth approximately one half of the thickness of the leadframe material.
11. The device according to claim 1 wherein said heat spreader is made of copper.
12. The device according to claim 1 wherein said heat spreader material has a thickness in the range from about 100 to 300 μm.
13. The device according to claim 1 wherein said heat spreader has four positioning members.
14. The device according to claim 1 wherein said chip is mounted on said chip pad by means of a thermally conductive adhesive.
15. The device according to claim 1 wherein said encapsulation material is a molding compound having thermally conductive filler material.
16. (canceled)
17. An apparatus comprising:
a metallic leadframe having a first surface and a second surface, said leadframe including a pad for mounting a heat-generating object; a plurality of segments operable to anchor connections to said object;
a plurality of straps holding said pad, each strap having a groove; and
a heat spreader disposed on said first surface of said leadframe, said heat spreader comprising a portion spaced above said pad, and positioning members outwardly extending from edges of said portion to rest in said grooves of said straps.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/426,166 US20060226521A1 (en) | 2004-06-18 | 2006-06-23 | Semiconductor Package Having Integrated Metal Parts for Thermal Enhancement |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/871,645 US7084494B2 (en) | 2004-06-18 | 2004-06-18 | Semiconductor package having integrated metal parts for thermal enhancement |
US11/426,166 US20060226521A1 (en) | 2004-06-18 | 2006-06-23 | Semiconductor Package Having Integrated Metal Parts for Thermal Enhancement |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US10/871,645 Continuation US7084494B2 (en) | 2004-06-18 | 2004-06-18 | Semiconductor package having integrated metal parts for thermal enhancement |
Publications (1)
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US20060226521A1 true US20060226521A1 (en) | 2006-10-12 |
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ID=35479780
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Application Number | Title | Priority Date | Filing Date |
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US10/871,645 Expired - Fee Related US7084494B2 (en) | 2004-06-18 | 2004-06-18 | Semiconductor package having integrated metal parts for thermal enhancement |
US11/426,166 Abandoned US20060226521A1 (en) | 2004-06-18 | 2006-06-23 | Semiconductor Package Having Integrated Metal Parts for Thermal Enhancement |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
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US10/871,645 Expired - Fee Related US7084494B2 (en) | 2004-06-18 | 2004-06-18 | Semiconductor package having integrated metal parts for thermal enhancement |
Country Status (6)
Country | Link |
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US (2) | US7084494B2 (en) |
EP (1) | EP1769538A4 (en) |
JP (1) | JP2008503881A (en) |
KR (1) | KR100917065B1 (en) |
CN (1) | CN1961428A (en) |
WO (1) | WO2006002158A2 (en) |
Cited By (5)
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US20060043579A1 (en) * | 2004-08-31 | 2006-03-02 | Jun He | Transistor performance enhancement using engineered strains |
US20080052945A1 (en) * | 2006-09-06 | 2008-03-06 | Michael Matas | Portable Electronic Device for Photo Management |
US20090027857A1 (en) * | 2004-03-30 | 2009-01-29 | Dean Nancy F | Heat spreader constructions, intergrated circuitry, methods of forming heat spreader constructions, and methods of forming integrated circuitry |
US20110045634A1 (en) * | 2009-08-21 | 2011-02-24 | Stats Chippac, Ltd. | Semiconductor Device and Method of Forming Dual-Active Sided Semiconductor Die in Fan-Out Wafer Level Chip Scale Package |
US20150076680A1 (en) * | 2013-09-17 | 2015-03-19 | Ruzaini B. Ibrahim | Heat spreader for integrated circuit device |
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US20080280040A1 (en) * | 2007-03-28 | 2008-11-13 | Jeffery Barrall | Gasket Formed From Various Materials And Methods Of Making Same |
US20080290481A1 (en) * | 2007-05-25 | 2008-11-27 | Takahiko Kudoh | Semiconductor Device Package Leadframe |
US8017451B2 (en) | 2008-04-04 | 2011-09-13 | The Charles Stark Draper Laboratory, Inc. | Electronic modules and methods for forming the same |
US8273603B2 (en) * | 2008-04-04 | 2012-09-25 | The Charles Stark Draper Laboratory, Inc. | Interposers, electronic modules, and methods for forming the same |
CN104392968B (en) * | 2008-11-21 | 2018-05-18 | 先进封装技术私人有限公司 | Semiconductor substrate |
TWI529893B (en) * | 2012-09-01 | 2016-04-11 | 萬國半導體股份有限公司 | An assembly method of die with thick metal |
CN104766853B (en) * | 2015-04-15 | 2017-11-07 | 苏州聚达晟芯微电子有限公司 | A kind of semiconductor chip package of impact resistance |
JP6617655B2 (en) * | 2016-07-19 | 2019-12-11 | 三菱電機株式会社 | Semiconductor device |
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US20090027857A1 (en) * | 2004-03-30 | 2009-01-29 | Dean Nancy F | Heat spreader constructions, intergrated circuitry, methods of forming heat spreader constructions, and methods of forming integrated circuitry |
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Also Published As
Publication number | Publication date |
---|---|
JP2008503881A (en) | 2008-02-07 |
EP1769538A2 (en) | 2007-04-04 |
WO2006002158A2 (en) | 2006-01-05 |
KR20070027588A (en) | 2007-03-09 |
WO2006002158A3 (en) | 2006-07-13 |
US7084494B2 (en) | 2006-08-01 |
CN1961428A (en) | 2007-05-09 |
KR100917065B1 (en) | 2009-09-15 |
US20050280124A1 (en) | 2005-12-22 |
EP1769538A4 (en) | 2009-01-07 |
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