US20050221200A1 - Photomask features with chromeless nonprinting phase shifting window - Google Patents

Photomask features with chromeless nonprinting phase shifting window Download PDF

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Publication number
US20050221200A1
US20050221200A1 US10/815,312 US81531204A US2005221200A1 US 20050221200 A1 US20050221200 A1 US 20050221200A1 US 81531204 A US81531204 A US 81531204A US 2005221200 A1 US2005221200 A1 US 2005221200A1
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photomask
transmitting
phase
area
photoresist
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US10/815,312
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Yung-Tin Chen
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SanDisk Technologies LLC
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Matrix Semiconductor Inc
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Priority to US11/559,620 priority patent/US7494765B2/en
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Assigned to SANDISK TECHNOLOGIES INC. reassignment SANDISK TECHNOLOGIES INC. CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT LISTED PATENT NUMBER 8853569 TO THE CORRECT PATENT NUMBER 8883569 PREVIOUSLY RECORDED ON REEL 038300 FRAME 0665. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Assignors: SANDISK 3D LLC
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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/26Phase shift masks [PSM]; PSM blanks; Preparation thereof
    • G03F1/34Phase-edge PSM, e.g. chromeless PSM; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes

Definitions

  • the invention relates to a method for patterning fine features for semiconductor devices using a phase shifting mask with no blocking material separating the opposite phases.
  • Patterned features making up integrated circuits are conventionally formed using photolithography and etch techniques.
  • a photomask which transmits light in some areas and blocks it in others, is formed, the blocking areas corresponding to the pattern to be formed on the wafer surface (or its inverse.)
  • the surface to be patterned for example a semiconductor or dielectric layer, is covered with a layer of photoresist, a photoreactive material.
  • Light is projected onto the photoresist surface using the photomask, selectively exposing areas of photoresist.
  • the wafer is then subjected to a developing process, in which exposed photoresist (or unexposed photoresist, in the case of negative photoresist) is removed, leaving patterned photoresist behind.
  • the remaining patterned photoresist then typically serves to protect underlying material during a subsequent etch process, creating features in the same pattern as the remaining photoresist.
  • phase shifters which invert the phase of light in some areas of the photomask, increasing contrast in light intensity at the photoresist surface, are a powerful tool to improve resolution and sharpen edges.
  • alternating phase shifters in photomasks, however, has disadvantages.
  • alternating phase shifters projected light is either incident, in what will be called zero degree phase, or inverted, in what will be called 180 degree phase (this is sometimes also called ⁇ phase.)
  • 180 degree phase this is sometimes also called ⁇ phase.
  • phase conflicts in which rules dictate that the same area must see light of opposite phases. To date, this has meant that use of alternating phase shifters has been limited to only certain types of patterns.
  • the present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims.
  • the invention is directed to an improved method for using phase shifters in a photomask for photolithography.
  • a first aspect of the invention provides for a phase shifting photomask comprising a plurality of transmitting nonprinting windows transmitting light in a first phase; a transmitting area transmitting light in a second phase, each transmitting window substantially entirely surrounded by and in contact with the transmitting area with no blocking material intervening, wherein the second phase is substantially opposite the first phase, and wherein a first width of unbroken transmitting area surrounds each transmitting window on all sides, the first width sufficient for the unbroken transmitting area to print when the photomask is used to expose photoresist.
  • phase shifting photomask comprising a transmitting nonprinting window transmitting light in a first phase; and a transmitting area substantially entirely surrounding and in contact with the transmitting window on all sides with no blocking material intervening, wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase, and wherein, when used to pattern photoresist, the transmitting area is printing on all sides of the transmitting window.
  • An embodiment of the invention provides for a phase shifting photomask comprising a plurality of spatially separate transmitting nonprinting windows transmitting light in a first phase; a transmitting area transmitting light in a second phase, the second phase substantially opposite the first, the transmitting area entirely surrounding and in contact with each of the transmitting windows of the first plurality; wherein each transmitting window is separated from its nearest neighbor in the plurality by an unbroken length of transmitting area having at least a first dimension, and wherein the smallest dimension of each window is no more than about 160 percent of the first dimension.
  • Yet another embodiment of the invention provides for a phase shifting photomask comprising a transmitting nonprinting window having a first shifting degree; a second transmitting area having a second shifting degree, the second transmitting area entirely surrounding and in contact with the first transmitting window, wherein the second transmitting area is printing on all sides of the transmitting window; and wherein the second shifting degree is substantially opposite the first shifting degree.
  • Another aspect of the invention provides for a method for forming a patterned feature on a wafer surface, the method comprising transmitting light through a phase shifting photomask onto photoresist covering the wafer surface; forming an isolated first residual photoresist feature between a first wafer area exposed to light in a first phase and a second wafer area exposed to light in a second phase, wherein the first phase is substantially opposite the second phase, and wherein the second wafer area entirely surrounds the first wafer area in the plane of the wafer; and forming the patterned feature from the photoresist feature.
  • Still another aspect of the invention provides for a method for forming photoresist features on a wafer surface using a photomask, the method comprising transmitting light through a first mask area onto a first wafer area, the first mask area having a first shifting degree; transmitting light through a second mask area onto a second wafer area, the second mask area having a second shifting degree, wherein the second mask area entirely surrounds and is on all sides in contact with the first mask area, and the first shifting degree is substantially opposite the second shifting degree; and developing photoresist, wherein, after the developing step, a closed residual photoresist feature remains between the first wafer area and the second wafer area, and wherein the closed residual photoresist feature is isolated and not merged with any adjacent photoresist feature.
  • a monolithic three dimensional memory array comprising a plurality of patterned features, the plurality of patterned features patterned using a photomask comprising: a plurality of spatially separate first transmitting windows, wherein the transmitting windows transmit light in a first phase; and a transmitting area of the photomask, each transmitting window substantially surrounded by and in contact with the transmitting area, wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase.
  • FIG. 1 a is a cross section of a portion of a conventional binary photomask.
  • FIG. 1 b shows the electrical field in the plane of the photomask for the photomask of FIG. 1 a.
  • FIG. 1 c shows the light intensity at the surface of the photoresist for light projected through the photomask of FIG. 1 a.
  • FIG. 2 a is a cross section of a portion of a conventional alternating phase shifting photomask.
  • FIG. 2 b shows the electrical field in the plane of the photomask for the photomask of FIG. 2 a.
  • FIG. 2 c shows the light intensity at the surface of the photoresist for light projected through the photomask of FIG. 2 a.
  • FIG. 3 illustrates phase assignment for a line-and-space pattern using an alternating phase shifting mask.
  • FIG. 4 illustrates phase conflict for rectangular shapes arranged in a grid using an alternating phase shifting mask.
  • FIG. 5 shows the electrical field in the plane of the photomask when an unshifted region is immediately adjacent a shifted region.
  • FIG. 6 illustrates a masked feature having an interior nonprinting window surrounded by blocking material.
  • FIG. 7 shows successful phase assignment for rectangular shapes arranged in a grid pattern using nonprinting interior alternating phase shifters.
  • FIG. 8 shows a prior art phase shifting mask and the residual photoresist features created by it.
  • FIG. 9 illustrates adjacent shifting areas separated by very thin, nonprinting transmitting areas according to a prior art photomask.
  • FIG. 10 a shows a photomask according to the present invention in plan view.
  • FIG. 10 b shows a photomask according to the present invention in cross section.
  • FIG. 10 c shows the electrical field in the plane of the photomask for the photomask of FIG. 9 a.
  • FIG. 10 d shows the light intensity at the surface of the photoresist for light projected through the photomask of FIG. 9 a.
  • FIG. 10 e shows, in cross section, residual photoresist features formed on the wafer surface using the photomask of FIG. 9 a.
  • FIGS. 11 a through 11 d illustrate formation of a photomask having masked features with interior nonprinting windows.
  • FIGS. 12 a through 12d illustrate formation of a photomask formed according to the present invention.
  • FIGS. 13 a and 13 b show, in cross section, two projected photoresist features formed using the same photomask with different exposure dose.
  • FIGS. 14 a - 14 d show different illumination apertures.
  • FIG. 15 shows a photomask according to the present invention in plan view.
  • FIG. 16 a shows, in plan view, a transmitting window surrounded by a first width of unbroken transmitting area according to the present invention.
  • FIG. 16 b shows, in plan view, a transmitting window not surrounded by a first width of unbroken transmitting area.
  • a masked feature referred to a feature in a photomask, for example a line, a rectangle, or any other shape.
  • a masked feature in a photomask substantially entirely or partially obscures light, so that when light is projected through the photomask, a corresponding feature in the photoresist is shielded from light, while the area outside of the obscured area is exposed.
  • This corresponding feature in photoresist will be called a projected photoresist feature.
  • the projected photoresist feature will be roughly the same shape as the masked feature, though corners on projected photoresist features tend to be rounded.
  • a linear dimension in a masked feature is four or five times the size of the corresponding dimension in the projected photoresist feature, depending on the stepper used.
  • a photomask feature will refer to a feature in a photomask, which may be a line, a rectangle, or any other shape. This is a broader term than masked feature, in that a photomask feature may not include any blocking material.
  • a photomask feature in a photomask does not transmit sufficient light for the corresponding area on the photoresist surface to be fully exposed, and the wafer surface beneath it will not be exposed after development of the photoresist. The area outside of the projection of the photomask feature is exposed, creating a photoresist feature.
  • a photoresist feature is a discrete feature formed by exposing and developing photoresist. Such a photoresist feature is surrounded by exposed wafer surface after development of photoresist. This term is broader than the term “projected photoresist feature” because it may be formed by projection, as is the case for a projected photoresist feature, or, as will be seen, by residual photoresist features formed at phase transition boundaries.
  • the simplest photomask is a binary photomask 10 , shown in FIG. 1 a.
  • a plate of a transmitting material 12 makes up the bulk of the photomask.
  • a blocking material 14 typically chromium, is formed in areas where light is to be obscured.
  • FIG. 1 b shows the electrical field in the plane of the photomask. The electrical field is either positive (1.0), non-existent (0), or negative ( ⁇ 1.0). Where light is transmitted it is in a first phase, here referred to as zero degree phase. Where light is blocked, there is no electrical field. (In FIGS. 1 b and 1 c , the X-axis is horizontal position, corresponding with horizontal position across the section of photomask shown in FIG. 1 a .)
  • FIG. 1 c shows the actual intensity distribution of light at the photoresist surface. It will be seen that, due to interference effects, the edges of lighter and darker areas are not perfectly defined, and even in the center of the obscured area, the light intensity at the photoresist surface is not zero. (A value of zero on the Y-axis of FIG. 1 c indicates zero intensity. The value of 1.0 is unitless and arbitrarily assigned, and the other values assigned relative to it. This is a standard representation of image intensity, as will be known to those skilled in the art.)
  • FIG. 2 a illustrates a conventional alternating phase shifting photomask 16 .
  • This photomask is also made up of a plate of transmitting material 12 , with regions of blocking material 14 .
  • region 18 light is transmitted as in the binary mask.
  • region 20 the transmitting material 12 is etched such that light passing through it is shifted 180 degrees.
  • An area of a photomask which inverts the phase of incident light, such as transmitting area 12 will be called a phase shifter.
  • FIG. 2 b shows the electrical field in the plane of the photomask: Where light is transmitted with no phase shifting, it is in the first phase, zero degree phase. Where light is blocked, there is no electrical field. Where light is transmitted with phase shifting, it is in 180 degree phase, opposite the first phase. It will be understood that while light in 180 degree phase is perfectly opposite light in zero degree phase, some small deviation can be tolerated; for example light can be in 179 or 183 degree phase rather than 180 degree phase and have substantially the same effect. For purposes of this description, within ten degrees of 180 degrees will be considered to be substantially opposite zero degrees. Similarly, within ten degrees of zero degrees will be considered to be substantially opposite 180 degrees. (In FIGS. 2 b and 2 c , the X-axis is horizontal position, corresponding with horizontal position across the section of photomask shown in FIG. 2 a .)
  • FIG. 2 c shows the intensity distribution of light at the photoresist surface. While the electrical field shown in FIGS. 1 b and 2 b can be either positive or negative, light intensity at the photoresist surface is only zero or positive, since the exposure intensity is proportional to the square of the electric field. The transition from a positive to a negative electrical field in the photomask creates a forced zero of light intensity reaching the photoresist surface, effectively causing dark areas to appear “darker”, and making edges sharper.
  • phase assignment the process of determining which phase is to be used in which transmitting area of the photomask—is straightforward for some patterns, such as the alternating line-and-space pattern pictured in FIG. 3 .
  • Zero degree phase is assigned to the left of line A, 180 degrees between lines A and B, zero degrees between lines B and C, etc.
  • FIG. 4 shows a photomask including rectangular masked features arranged in a grid pattern.
  • all areas between rectangles in row A′ and in row B′ are assigned to 180 degree phase, and all areas between rectangles in row B′ and in row C′ are assigned to 0 degree phase.
  • all areas between rectangles in column A and in column B are assigned to 180 degree phase, and all areas between rectangles in column B and in column C are assigned to 0 degree phase.
  • either phase could be appropriate, depending on whether the row rule or the column rule is followed. If either phase is assigned, a region of zero degree phase will be immediately adjacent a region of 180 degree phase. In the transition from zero degree phase to 180 degree phase, the electrical field must pass through zero, as shown in FIG. 5 . (The X-axis on this figure again corresponds to horizontal position across the photomask.) Where the electrical field is zero, the light intensity at the photoresist surface will be zero, unintentionally creating a region of unexposed photoresist, leading to creation of a residual photoresist feature after development of the photoresist. In this case, the residual photoresist feature is unwanted.
  • the '436 application solved this problem by teaching masked features like the one shown in FIG. 6 , each including an interior nonprinting window.
  • light transmitted through the nonprinting window 22 is in a first phase, while light transmitted through a transmitting area 24 outside the masked feature is in a second phase opposite the first phase.
  • the window may be a phase shifter, such that light transmitted through the masked feature is in 180 degree phase, while the transmitting area 24 outside the window 22 is in zero degree phase.
  • the window 22 may transmit light in zero degree phase, while the transmitting area outside the masked feature 24 is in 180 degree phase.
  • the window is described as “nonprinting” because its dimensions are selected so that it will not print, i.e.
  • the interior nonprinting window 22 was substantially surrounded by blocking material 26 .
  • a blocking material is one that transmits 15 percent or less of incident light, for example chromium or molybdenum silicide.
  • Each masked feature F of FIG. 7 includes a window W, the window W comprising a phase shifter.
  • the windows W are assigned 180 degree phase.
  • the transmitting area 34 commonly and substantially entirely surrounding the masked features F is assigned zero degree phase.
  • the phases could be inverted if desired.
  • the techniques of the '436 application provide a powerful tool to pattern very fine features.
  • the photomask used in the '436 application is relatively complex and expensive to make.
  • the present invention uses similar concepts, but omits the surrounding blocking material (blocking material 26 , shown in FIG. 6 ) used in the '436 application, resulting in a photomask which is simpler and cheaper to make.
  • FIG. 8 a photomask is shown consisting of parallel lines, where the lines are alternately shifting regions 30 and nonshifting regions 32 , each having a width 34 .
  • Each of the shifting and nonshifting regions is printing, exposing a corresponding area on the photoresist surface.
  • FIG. 8 further shows, below the photomask in cross-section, the wafer and photoresist surface after developing. It will be seen that residual photoresist lines 36 form on the wafer surface 38 at the phase transition boundaries, creating patterned lines after etch. (Dotted lines relate the phase transition in the photomask with the resulting residual photoresist feature.)
  • the transmitting area between the phase shifting areas 60 of the '555 patent has width 62 .
  • This width 62 is so small that the residual photoresist features created by adjacent shifting areas 60 merge, forming a single, large photoresist feature.
  • the transmitting area between phase shifters is nonprinting.
  • the present invention is a photomask comprising nonprinting transmitting windows transmitting light in a first phase entirely surrounded by a printing transmitting area transmitting light in a second phase opposite the first phase, with no blocking material intervening.
  • the transition between the phases causes a closed residual photoresist feature to be formed at the perimeter of such a nonprinting transmitting window.
  • the dimensions of the nonprinting transmitting window are chosen such that opposite sides of the residual photoresist feature merge, so that, during normal use of the photomask, photoresist in the interior of the feature is not exposed sufficiently to expose the wafer surface after the photoresist is developed.
  • a patterned feature can be created from each residual photoresist feature.
  • a photomask comprises shifting areas immediately adjacent to nonshifting areas, with no blocking material intervening (unlike the '436 application).
  • either the shifting area or the nonshifting area is nonprinting, so that opposite sides of a single closed residual photoresist feature formed by the nonprinting area merge (unlike the alternating shifting and non-shifting stripe photomask described in Lee et al.).
  • the nonprinting area is entirely surrounded by an area that is printing (unlike the '555 patent.) and creates a photoresist feature that does not merge with an adjacent photoresist feature.
  • 10 a shows a plan view of a section of a photomask formed according to the present invention.
  • the areas labeled 180° are shifting, while the area labeled 0° is nonshifting.
  • the phases could be inverted if desired.
  • an examplary photomask comprises a transmitting nonprinting window transmitting light in a first phase; and a transmitting area substantially entirely surrounding and in contact with the transmitting window on all sides with no blocking material intervening, wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase, and wherein, when used to pattern photoresist, the transmitting area is printing on all sides of the transmitting window.
  • a transmitting window is a continuous area of a photomask which transmits light and includes no blocking material which is surrounded on all sides by some other material.
  • FIG. 10 b shows the same section of photomask in cross section, the cross section taken along line L-L′. Shifting areas have been thinned to shift incident light by about 180 degrees, while nonshifting areas do not shift incident light. No blocking material separates shifting areas from nonshifting areas.
  • FIG. 10 c shows the electric field in the plane of the photomask
  • FIG. 10 d shows the light intensity at the photoresist surface
  • FIG. 10 e illustrates (in cross-section) residual photoresist features formed on the wafer surface after developing the photoresist. It will be seen that, if the dimensions of the shifting area and the nonshifting areas are chosen appropriately, the opposite sides of a single residual photoresist features formed at the phase transition perimeter are so close together that they are in contact, and merge.
  • a patterned feature can be formed by transmitting light through a phase shifting photomask onto photoresist covering the wafer surface; forming an isolated first residual photoresist feature between a first wafer area exposed to light in a first phase and a second wafer area exposed to light in a second phase, wherein the first phase is substantially opposite the second phase, and wherein the second wafer area entirely surrounds the first wafer area in the plane of the wafer; and forming the patterned feature from the photoresist feature.
  • the isolated first photoresist feature defines a closed shape having a perimeter, and, after the developing step and before the etching step, no portion of the wafer surface is exposed within the perimeter.
  • the photoresist feature is described as isolated because it is not merged with an adjacent photoresist feature.
  • Such a photomask is relatively simple to make, compared to the photomask used in the '436 application.
  • the photomask of the '436 application requires two patterning steps, one to pattern the blocking material, the second to etch the quartz to form the shifting area.
  • patterning begins with quartz layer 40 coated with a layer of blocking material (typically chromium) 42 .
  • Photoresist 44 is deposited on chromium layer 42 , then patterned in the shape of the blocking material defining masked features with interior nonprinting windows, like the photomask shown in FIG. 7 .
  • FIG. 11 b shows the photomask after etch of chromium layer 42 and removal of photoresist.
  • photoresist is again applied and patterned, this time exposing only the interior windows of the masked features, as shown in FIG. 11 c.
  • An etch step thins quartz layer 40 , creating shifting areas 46 , as shown in FIG. 11 d, which shows the completed photomask.
  • Both photolithography steps performed to create the photomask of the '436 application present challenges; the first includes patterning of complex shapes, while the second requires precise alignment.
  • FIG. 12 a patterning again begins with quartz layer 40 coated with chromium layer 42 .
  • Photoresist 44 is deposited on chromium layer 42 , then patterned to excavate rectangular holes in the photoresist.
  • FIG. 12 b shows patterned chromium remaining after the etch step. In this example, a continuous area of chromium remains with rectangular holes etched in the chromium, the surface of quartz layer 40 exposed in the holes.
  • a second etch step follows, in which the remaining chromium 42 serves as a hard mask while the quartz layer 40 is etched to produce rectangular shifting areas 46 shown in FIG. 12 c .
  • FIG. 12 d shows the completed photomask after the chromium layer 42 has been stripped.
  • Stepper magnification is typically 4 or 5; i.e. a linear dimension of a chromium area in a photomask is typically about four or five times larger than the size of the same feature as projected onto the photoresist surface.
  • a photomask feature dimension will be described as “ ⁇ S”, or multiplied by a projection scaling factor S.
  • the projection scaling factor S is the stepper magnification.
  • the stepper magnification and the projection scaling factor is four. If the actual physical dimension of a photomask feature in a photomask is, for example, 1000 nm, the dimension of the photomask feature will be described as 250 nm ⁇ S. For a stepper magnification and projection scaling factor S of five, and an actual physical dimension of 1000 nm of a photomask feature will be described as 200 nm ⁇ S.
  • Stepper magnification is determined by optics, and is the single most important factor controlling the relationship between the size of a photomask feature and the size of the resulting projected photoresist feature. It is not, however, the only factor. As is well known in the art, varying exposure dose also changes the size of projected photoresist features. Longer exposure results in more light energy reaching the photoresist surface, and more thorough exposure of photoresist. When the photoresist is developed, more photoresist is removed; thus for larger exposure dose, dimensions of the eventual etched features are smaller.
  • FIG. 13 a and FIG. 13 b show projected photoresist features 47 after development.
  • the photoresist feature 47 of FIGS. 13 a and 13 b could be formed from the same photomask feature in the same photomask during separate photolithography operations.
  • the narrower photoresist feature 47 of FIG. 13 b is created when a higher exposure dose is applied.
  • residual photoresist features are formed using a photomask fabricated according to the present invention, having first transmitting windows transmitting light in a first phase surrounded by a second transmitting area transmitting light in a second phase, the second phase substantially opposite the first phase.
  • the size of the first transmitting windows are selected such that the opposite sides of a single residual photoresist feature formed at the perimeter of a window merge.
  • the residual photoresist feature forms at the transition between opposite phases; ie. at the border between the projection of a first transmitting window and the second transmitting area surrounding it, and not entirely within the boundaries of the first transmitting window.
  • a linear dimension of a photoresist feature defined by merged residual photoresist lines may be larger than the linear dimension ⁇ S of the photomask feature used to create it.
  • the size of the window is proportional to the wavelength of incident light, and is inversely proportional to numerical aperture.
  • the shortest dimension for a transmitting window to be nonprinting is also affected by the aperture of the condensing lens.
  • This value can either be a single aperture radius ⁇ , or can be an inner aperture radius ⁇ i and an outer aperture radius ⁇ o .
  • FIG. 14 a shows a conventional aperture which has a single aperture radius ⁇ .
  • An annular aperture is shown in FIG. 14 b, in which the center area is obscured and light is transmitted through an annulus having an outer aperture radius ⁇ o and an inner aperture radius ⁇ i .
  • a quadrupole aperture, shown in FIG. 14 c, is obscured except for four holes arranged as shown.
  • the outer aperture radius ⁇ o is the distance to the outside edge of each hole, while the inner aperture radius ⁇ i is the distance to the inside edge of each hole.
  • a dipole aperture, shown in FIG. 14 d, is obscured except for two holes arranged as shown.
  • the outer aperture radius ⁇ o is the distance to the outside edge of each hole, while the inner aperture radius ⁇ i is the distance to the inside edge of each hole.
  • Aperture radius is generally unitless, and is expressed as a proportion of the entire lens. For example, for a conventional aperture, ⁇ is typically about 0.7.
  • D represents the size the shortest dimension of a transmitting window must have in order to be nonprinting
  • is the wavelength of incident light
  • ⁇ i is the inner aperture radius and ⁇ o is the outer aperture radius
  • NA is the numerical aperture.
  • D is proportional to wavelength ⁇ , and is inversely proportional to aperture radius ⁇ (or inner aperture radius ⁇ i and outer aperture radius ⁇ o ) and numerical aperture NA.
  • a window having a shortest dimension smaller than about 50 nm will be ineffective; preferably the window of the present invention should have no dimension less than about 60 nm.
  • FIG. 15 is a plan view of an exemplary photomask formed according to the present invention.
  • the photomask comprises a plurality of transmitting nonprinting windows 50 transmitting light in a first phase; a transmitting area 52 transmitting light in a second phase, each transmitting window 50 substantially entirely surrounded by and in contact with the transmitting area 52 with no blocking material intervening, wherein the second phase is substantially opposite the first phase, and wherein a first width of unbroken transmitting area 52 surrounds each transmitting window on all sides, the first width sufficient for the unbroken transmitting area 52 to print when the photomask is used to expose photoresist.
  • windows 50 have linear dimension D 1 , and are separated by distance D 2 .
  • D 1 is chosen so that opposite sides of a single residual photoresist feature formed on the photoresist surface at the projected perimeter of a window merge, and the window 50 is nonprinting.
  • D 2 is chosen so that the space between the windows prints, that is, so that the photoresist in this area is exposed sufficiently that it is removed during developing. Because the window 50 is a closed feature, its interior receives less overall light than does the transmitting area 52 between windows. For this reason dimension D 1 can be larger than first dimension D 2 while window 50 is nonprinting and transmitting area 52 is printing. The exposure dose must be selected so that the windows 50 are nonprinting. (This example shows windows 50 square and uniformly spaced. Clearly many other arrangements are possible. Transmitting windows 50 can be rectangular but not square, or any other shape. Transmitting windows 50 can be randomly spaced.)
  • Describing the transmitting area surrounding a transmitting window on all sides as “unbroken” for a first width means that within that width only the transmitting area exists, and that no other material, such as blocking material or another transmitting window transmitting light in a different phase, is present.
  • transmitting window 50 which transmits light in a first phase
  • first width D 3 of unbroken transmitting area 52 which transmits light in a second phase substantially opposite the first phase.
  • the boundary of first width D 3 is denoted by the dotted-line frame 51 . No other material exists within first width D 3 of transmitting window 50 .
  • the first width D 3 is sufficient for the unbroken transmitting area 52 to print when the photomask is used to expose photoresist; in preferred embodiments, the first width D 3 is at least 100 nm ⁇ S.
  • transmitting window 54 which in this example transmits light in the first phase, is less than a first width D 3 from transmitting window 50 , and thus transmitting window 50 in FIG. 16 b is not surrounded on all sides by first width D 3 of unbroken transmitting area 52 .
  • An example of such a configuration appears in the '555 patent, in which the width of the transmitting area separating adjacent transmitting shifting windows is not sufficient for the transmitting area between those windows to print when the photomask is used to expose photoresist.
  • FIG. 15 shows a section of a photomask.
  • the photomask comprises a plurality of spatially separate transmitting nonprinting windows 50 transmitting light in a first phase; a transmitting area 52 transmitting light in a second phase, the second phase substantially opposite the first, the transmitting area 52 entirely surrounding and in contact with each of the transmitting windows 50 of the first plurality; wherein each transmitting window is separated from its nearest neighbor in the plurality by an unbroken length of transmitting area having at least a first dimension D 2 , and wherein the smallest dimension D 1 of each window is no more than about 160 percent of the first dimension D 2 .
  • the window 50 is a closed feature, its interior receives less overall light than does the transmitting area 52 between windows. For this reason dimension D 1 can be larger than first dimension D 2 while window 50 is nonprinting and transmitting area 52 is printing. It will be evident that the smallest dimension D 1 of each window is measured in a plane parallel to the plane of the photomask.
  • Monolithic three dimensional memory arrays such as the one taught in Herner et al., U.S. patent application Ser. No. 10/326470, “An Improved Method for Making High Density Nonvolatile Memory,” filed Dec. 19, 2002, hereby incorporated by reference, include a plurality of substantially evenly spaced pillars. These pillars can comprise polycrystalline silicon, called polysilicon. The pillars are portions of memory cells, and the memory cells formed in the same patterning steps generally form a portion of a memory level at a first height above a substrate. Such a monolithic three dimensional memory array further comprises at least a second memory level formed at a second height above the substrate, the second height different from the first height.
  • the substantially evenly spaced pillars of Herner et al. have a pitch of between about 220 nm and 280 nm, preferably about 260 nm, and are patterned, for example, using light having a wavelength of 248 nm.
  • a photomask according to the present invention paired with a quadrupole aperture is highly effective for patterning regularly spaced pillars.
  • Pillars for example the pillars of Herner et al., are the patterned features created from the photomask features 50 of FIG. 15 .
  • photomask feature dimension D 1 is between about 50 nm ⁇ S and about 160 nm ⁇ S, preferably between about 90 nm ⁇ S and about 140 nm ⁇ S, most preferably between about 130 and 140 nm ⁇ S.
  • the shortest dimension of the transmitting window 50 is no more than about 160 nm ⁇ S.
  • Photomask feature dimension D 2 is between about 210 nm ⁇ S and about 100 nm ⁇ S, preferably between about 170 nm ⁇ S and about 120 nm ⁇ S, most preferably between about 130 nm ⁇ S and 120 nm ⁇ S.
  • these photomask dimensions should produce photoresist features having a width of about 130 nm and separated by a gap of about 130 nm. Dose varies from design to design, photomask to photomask, and machine to machine, and it is routine to for some experimentation to be required to identy optimum dose.
  • the width of the photoresist features is no more than about 150 nm, and the gap is no less than about 110 nm.
  • the photoresist features are then etched to form the patterned features, which will be pillars, as described in Herner et al. As noted in Herner et al., while the masked feature is rectangular, the cross-section of the patterned feature will tend to be substantially cylindrical. The dimensions given here assume that the light has a wavelength of 248 nm.
  • photoresist feature dimensions may not be the same as actual patterned feature dimensions. It is routine to adjust exposure dose and etch processes to achieve optimum results.
  • Monolithic three dimensional memory arrays are described in Johnson et al., U.S. Pat. No. 6,034,882, “Vertically stacked field programmable nonvolatile memory and method of fabrication”; Johnson, U.S. Pat. No. 6,525,953, “Vertically stacked field programmable nonvolatile memory and method of fabrication”; Knall et al., U.S. Pat. No. 6,420,215, “Three Dimensional Memory Array and Method of Fabrication”; Lee et al., U.S. patent application Ser. No. 09/927648, “Dense Arrays and Charge Storage Devices, and Methods for Making Same,” filed Aug. 13, 2001; Herner, U.S. application Ser. No.
  • a monolithic three dimensional memory array is one in which multiple memory levels are formed above a single substrate, such as a wafer, with no intervening substrates.
  • the layers forming one memory level are deposited or grown directly over the layers of an existing level or levels.
  • stacked memories have been constructed by forming memory levels on separate substrates and adhering the memory levels atop each other, as in Leedy, U.S. Pat. No. 5,915,167, “Three dimensional structure memory.”
  • the substrates may be thinned or removed from the memory levels before bonding, but as the memory levels are initially formed over separate substrates, such memories are not true monolithic three dimensional memory arrays.
  • photomasks made according to the present invention can advantageously be used to pattern any of the lines, pillars, or other tightly-packed structures formed at any level of these arrays.
  • An area of a photomask can be described as having a shifting degree.
  • a shifting degree describes the shifting characteristics of a transmitting area of a photomask. If light transmitted through an area of a photomask is not phase shifted, for example, that area has a shifting degree of about zero degrees. If light transmitted through an area of a photomask is phase shifted to the opposite phase, that area has a shifting degree of about 180 degrees.
  • FIG. 15 shows a phase shifting photomask comprising a transmitting nonprinting window 50 having a first shifting degree; a second transmitting area 52 having a second shifting degree, the second transmitting area 52 entirely surrounding and in contact with the first transmitting window 50 , wherein the second transmitting area 52 is printing on all sides of the transmitting window 50 ; and wherein the second shifting degree is substantially opposite the first shifting degree.
  • Photomasks formed according to the present invention have been described which include first transmitting windows transmitting light in a first phase surrounded by a second transmitting area transmitting light in a second phase, the second phase substantially opposite the first phase.
  • no blocking material separated the first transmitting windows from the second transmitting area.
  • photomask features with no blocking material formed according to the present invention can be combined in a single photomask with conventional photomask features that include blocking material. More specifically, the presence of blocking material in any part of a photomask does not preclude it from falling within the scope of the invention.

Abstract

Aspects of the present invention provide for a novel photomask for patterning features for an integrated circuit, the photomask including a first area transmitting light in a first phase surrounded by second area, the second area transmitting light in a second phase, the second phase opposite the first phase. No blocking material separates the first area from the second area. After development of photoresist, the transition between the first and second area causes formation of a residual photoresist feature on the photoresist surface due to phase canceling of light. If the first area is small enough, it is nonprinting, ie., the opposite sides of the residual photoresist feature formed at its perimeter merge, forming a contiguous photoresist feature, and thus a corresponding patterned feature after etch.

Description

    BACKGROUND OF THE INVENTION
  • The invention relates to a method for patterning fine features for semiconductor devices using a phase shifting mask with no blocking material separating the opposite phases.
  • Patterned features making up integrated circuits are conventionally formed using photolithography and etch techniques. A photomask, which transmits light in some areas and blocks it in others, is formed, the blocking areas corresponding to the pattern to be formed on the wafer surface (or its inverse.) The surface to be patterned, for example a semiconductor or dielectric layer, is covered with a layer of photoresist, a photoreactive material. Light is projected onto the photoresist surface using the photomask, selectively exposing areas of photoresist. The wafer is then subjected to a developing process, in which exposed photoresist (or unexposed photoresist, in the case of negative photoresist) is removed, leaving patterned photoresist behind.
  • The remaining patterned photoresist then typically serves to protect underlying material during a subsequent etch process, creating features in the same pattern as the remaining photoresist.
  • Over the years integrated circuits have become denser and patterned features smaller. As projected features become smaller, the limits of resolution are reached and it becomes more difficult to project patterns with sharp edges. Poor resolution can lead to incomplete patterning and to incomplete etching or overetching, causing device flaws.
  • Alternating phase shifters, which invert the phase of light in some areas of the photomask, increasing contrast in light intensity at the photoresist surface, are a powerful tool to improve resolution and sharpen edges.
  • The use of alternating phase shifters in photomasks, however, has disadvantages. When alternating phase shifters are used, projected light is either incident, in what will be called zero degree phase, or inverted, in what will be called 180 degree phase (this is sometimes also called π phase.) As will be more fully described, as conventionally used, light in opposite phases is transmitted on opposite sides of an obscured area. The configuration of some patterns leads to phase conflicts, in which rules dictate that the same area must see light of opposite phases. To date, this has meant that use of alternating phase shifters has been limited to only certain types of patterns.
  • There is a need, therefore, for increased flexibility of phase shifting photomasks.
  • SUMMARY OF THE INVENTION
  • The present invention is defined by the following claims, and nothing in this section should be taken as a limitation on those claims. In general, the invention is directed to an improved method for using phase shifters in a photomask for photolithography.
  • A first aspect of the invention provides for a phase shifting photomask comprising a plurality of transmitting nonprinting windows transmitting light in a first phase; a transmitting area transmitting light in a second phase, each transmitting window substantially entirely surrounded by and in contact with the transmitting area with no blocking material intervening, wherein the second phase is substantially opposite the first phase, and wherein a first width of unbroken transmitting area surrounds each transmitting window on all sides, the first width sufficient for the unbroken transmitting area to print when the photomask is used to expose photoresist.
  • Another aspect of the invention provides for a phase shifting photomask comprising a transmitting nonprinting window transmitting light in a first phase; and a transmitting area substantially entirely surrounding and in contact with the transmitting window on all sides with no blocking material intervening, wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase, and wherein, when used to pattern photoresist, the transmitting area is printing on all sides of the transmitting window.
  • An embodiment of the invention provides for a phase shifting photomask comprising a plurality of spatially separate transmitting nonprinting windows transmitting light in a first phase; a transmitting area transmitting light in a second phase, the second phase substantially opposite the first, the transmitting area entirely surrounding and in contact with each of the transmitting windows of the first plurality; wherein each transmitting window is separated from its nearest neighbor in the plurality by an unbroken length of transmitting area having at least a first dimension, and wherein the smallest dimension of each window is no more than about 160 percent of the first dimension.
  • Yet another embodiment of the invention provides for a phase shifting photomask comprising a transmitting nonprinting window having a first shifting degree; a second transmitting area having a second shifting degree, the second transmitting area entirely surrounding and in contact with the first transmitting window, wherein the second transmitting area is printing on all sides of the transmitting window; and wherein the second shifting degree is substantially opposite the first shifting degree.
  • Another aspect of the invention provides for a method for forming a patterned feature on a wafer surface, the method comprising transmitting light through a phase shifting photomask onto photoresist covering the wafer surface; forming an isolated first residual photoresist feature between a first wafer area exposed to light in a first phase and a second wafer area exposed to light in a second phase, wherein the first phase is substantially opposite the second phase, and wherein the second wafer area entirely surrounds the first wafer area in the plane of the wafer; and forming the patterned feature from the photoresist feature.
  • Still another aspect of the invention provides for a method for forming photoresist features on a wafer surface using a photomask, the method comprising transmitting light through a first mask area onto a first wafer area, the first mask area having a first shifting degree; transmitting light through a second mask area onto a second wafer area, the second mask area having a second shifting degree, wherein the second mask area entirely surrounds and is on all sides in contact with the first mask area, and the first shifting degree is substantially opposite the second shifting degree; and developing photoresist, wherein, after the developing step, a closed residual photoresist feature remains between the first wafer area and the second wafer area, and wherein the closed residual photoresist feature is isolated and not merged with any adjacent photoresist feature.
  • Another aspect of the invention provides for a monolithic three dimensional memory array comprising a plurality of patterned features, the plurality of patterned features patterned using a photomask comprising: a plurality of spatially separate first transmitting windows, wherein the transmitting windows transmit light in a first phase; and a transmitting area of the photomask, each transmitting window substantially surrounded by and in contact with the transmitting area, wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase.
  • Each of the aspects and embodiments of the invention can be used alone or in combination with one another.
  • The preferred aspects and embodiments will now be described with reference to the attached drawings.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 a is a cross section of a portion of a conventional binary photomask.
  • FIG. 1 b shows the electrical field in the plane of the photomask for the photomask of FIG. 1 a.
  • FIG. 1 c shows the light intensity at the surface of the photoresist for light projected through the photomask of FIG. 1 a.
  • FIG. 2 a is a cross section of a portion of a conventional alternating phase shifting photomask.
  • FIG. 2 b shows the electrical field in the plane of the photomask for the photomask of FIG. 2 a.
  • FIG. 2 c shows the light intensity at the surface of the photoresist for light projected through the photomask of FIG. 2 a.
  • FIG. 3 illustrates phase assignment for a line-and-space pattern using an alternating phase shifting mask.
  • FIG. 4 illustrates phase conflict for rectangular shapes arranged in a grid using an alternating phase shifting mask.
  • FIG. 5 shows the electrical field in the plane of the photomask when an unshifted region is immediately adjacent a shifted region.
  • FIG. 6 illustrates a masked feature having an interior nonprinting window surrounded by blocking material.
  • FIG. 7 shows successful phase assignment for rectangular shapes arranged in a grid pattern using nonprinting interior alternating phase shifters.
  • FIG. 8 shows a prior art phase shifting mask and the residual photoresist features created by it.
  • FIG. 9 illustrates adjacent shifting areas separated by very thin, nonprinting transmitting areas according to a prior art photomask.
  • FIG. 10 a shows a photomask according to the present invention in plan view.
  • FIG. 10 b shows a photomask according to the present invention in cross section.
  • FIG. 10 c shows the electrical field in the plane of the photomask for the photomask of FIG. 9 a.
  • FIG. 10 d shows the light intensity at the surface of the photoresist for light projected through the photomask of FIG. 9 a.
  • FIG. 10 e shows, in cross section, residual photoresist features formed on the wafer surface using the photomask of FIG. 9 a.
  • FIGS. 11 a through 11 d illustrate formation of a photomask having masked features with interior nonprinting windows.
  • FIGS. 12 a through 12d illustrate formation of a photomask formed according to the present invention.
  • FIGS. 13 a and 13 b show, in cross section, two projected photoresist features formed using the same photomask with different exposure dose.
  • FIGS. 14 a-14 d show different illumination apertures.
  • FIG. 15 shows a photomask according to the present invention in plan view.
  • FIG. 16 a shows, in plan view, a transmitting window surrounded by a first width of unbroken transmitting area according to the present invention.
  • FIG. 16 b shows, in plan view, a transmitting window not surrounded by a first width of unbroken transmitting area.
  • DETAILED DESCRIPTION OF THE INVENTION
  • One approach to allow alternating phase shifting photomasks to be used to pattern a wider variety of shapes is taught in Chen, U.S. patent application Ser. No. 10/728,436, filed Dec. 5, 2003, hereinafter the '436 application. The '436 application is the work of the same inventor as the present invention, is owned by the assignee of the present invention, and is hereby incorporated by reference. The present invention is an improved method to solve the same problem.
  • The problem addressed by both the present invention and the '436 application will be described.
  • The '436 application used the term maskedfeature. A masked feature referred to a feature in a photomask, for example a line, a rectangle, or any other shape. A masked feature in a photomask substantially entirely or partially obscures light, so that when light is projected through the photomask, a corresponding feature in the photoresist is shielded from light, while the area outside of the obscured area is exposed. This corresponding feature in photoresist will be called a projected photoresist feature. The projected photoresist feature will be roughly the same shape as the masked feature, though corners on projected photoresist features tend to be rounded. Typically a linear dimension in a masked feature is four or five times the size of the corresponding dimension in the projected photoresist feature, depending on the stepper used.
  • In this description, a photomask feature will refer to a feature in a photomask, which may be a line, a rectangle, or any other shape. This is a broader term than masked feature, in that a photomask feature may not include any blocking material. A photomask feature in a photomask does not transmit sufficient light for the corresponding area on the photoresist surface to be fully exposed, and the wafer surface beneath it will not be exposed after development of the photoresist. The area outside of the projection of the photomask feature is exposed, creating a photoresist feature.
  • A photoresist feature is a discrete feature formed by exposing and developing photoresist. Such a photoresist feature is surrounded by exposed wafer surface after development of photoresist. This term is broader than the term “projected photoresist feature” because it may be formed by projection, as is the case for a projected photoresist feature, or, as will be seen, by residual photoresist features formed at phase transition boundaries.
  • The simplest photomask is a binary photomask 10, shown in FIG. 1 a. A plate of a transmitting material 12, for example quartz, makes up the bulk of the photomask. A blocking material 14, typically chromium, is formed in areas where light is to be obscured. FIG. 1 b shows the electrical field in the plane of the photomask. The electrical field is either positive (1.0), non-existent (0), or negative (−1.0). Where light is transmitted it is in a first phase, here referred to as zero degree phase. Where light is blocked, there is no electrical field. (In FIGS. 1 b and 1 c, the X-axis is horizontal position, corresponding with horizontal position across the section of photomask shown in FIG. 1 a.)
  • FIG. 1 c shows the actual intensity distribution of light at the photoresist surface. It will be seen that, due to interference effects, the edges of lighter and darker areas are not perfectly defined, and even in the center of the obscured area, the light intensity at the photoresist surface is not zero. (A value of zero on the Y-axis of FIG. 1 c indicates zero intensity. The value of 1.0 is unitless and arbitrarily assigned, and the other values assigned relative to it. This is a standard representation of image intensity, as will be known to those skilled in the art.)
  • FIG. 2 a illustrates a conventional alternating phase shifting photomask 16. This photomask is also made up of a plate of transmitting material 12, with regions of blocking material 14. In region 18, light is transmitted as in the binary mask. In region 20, however, the transmitting material 12 is etched such that light passing through it is shifted 180 degrees. An area of a photomask which inverts the phase of incident light, such as transmitting area 12, will be called a phase shifter.
  • FIG. 2 b shows the electrical field in the plane of the photomask: Where light is transmitted with no phase shifting, it is in the first phase, zero degree phase. Where light is blocked, there is no electrical field. Where light is transmitted with phase shifting, it is in 180 degree phase, opposite the first phase. It will be understood that while light in 180 degree phase is perfectly opposite light in zero degree phase, some small deviation can be tolerated; for example light can be in 179 or 183 degree phase rather than 180 degree phase and have substantially the same effect. For purposes of this description, within ten degrees of 180 degrees will be considered to be substantially opposite zero degrees. Similarly, within ten degrees of zero degrees will be considered to be substantially opposite 180 degrees. (In FIGS. 2 b and 2 c, the X-axis is horizontal position, corresponding with horizontal position across the section of photomask shown in FIG. 2 a.)
  • FIG. 2 c shows the intensity distribution of light at the photoresist surface. While the electrical field shown in FIGS. 1 b and 2 b can be either positive or negative, light intensity at the photoresist surface is only zero or positive, since the exposure intensity is proportional to the square of the electric field. The transition from a positive to a negative electrical field in the photomask creates a forced zero of light intensity reaching the photoresist surface, effectively causing dark areas to appear “darker”, and making edges sharper.
  • It will be seen that for a conventional alternating phase shifting mask, opposite phases are used on opposite sides of an obscured region. Phase assignment—the process of determining which phase is to be used in which transmitting area of the photomask—is straightforward for some patterns, such as the alternating line-and-space pattern pictured in FIG. 3. Zero degree phase is assigned to the left of line A, 180 degrees between lines A and B, zero degrees between lines B and C, etc.
  • Other patterns present difficulties, however. FIG. 4 shows a photomask including rectangular masked features arranged in a grid pattern. Suppose all areas between rectangles in row A′ and in row B′ are assigned to 180 degree phase, and all areas between rectangles in row B′ and in row C′ are assigned to 0 degree phase. Suppose further that all areas between rectangles in column A and in column B are assigned to 180 degree phase, and all areas between rectangles in column B and in column C are assigned to 0 degree phase.
  • It will be seen that in framed areas marked with a question mark (“?”), either phase could be appropriate, depending on whether the row rule or the column rule is followed. If either phase is assigned, a region of zero degree phase will be immediately adjacent a region of 180 degree phase. In the transition from zero degree phase to 180 degree phase, the electrical field must pass through zero, as shown in FIG. 5. (The X-axis on this figure again corresponds to horizontal position across the photomask.) Where the electrical field is zero, the light intensity at the photoresist surface will be zero, unintentionally creating a region of unexposed photoresist, leading to creation of a residual photoresist feature after development of the photoresist. In this case, the residual photoresist feature is unwanted.
  • The '436 application solved this problem by teaching masked features like the one shown in FIG. 6, each including an interior nonprinting window. For such a feature, light transmitted through the nonprinting window 22 is in a first phase, while light transmitted through a transmitting area 24 outside the masked feature is in a second phase opposite the first phase. For example, the window may be a phase shifter, such that light transmitted through the masked feature is in 180 degree phase, while the transmitting area 24 outside the window 22 is in zero degree phase. Alternatively, the window 22 may transmit light in zero degree phase, while the transmitting area outside the masked feature 24 is in 180 degree phase. The window is described as “nonprinting” because its dimensions are selected so that it will not print, i.e. such that light transmitted through it will not expose photoresist within the perimeter of the corresponding photoresist feature enough for the wafer surface within the feature to be exposed after development of photoresist. In the '436 application, the interior nonprinting window 22 was substantially surrounded by blocking material 26. A blocking material is one that transmits 15 percent or less of incident light, for example chromium or molybdenum silicide.
  • Turning to FIG. 7, it will be seen that masked features with interior nonprinting windows, as taught in the '436 application, transmitting light in one phase inside the masked feature and light in an opposite phase outside the masked feature, can be printed with no phase conflict. Each masked feature F of FIG. 7 includes a window W, the window W comprising a phase shifter. Thus the windows W are assigned 180 degree phase. The transmitting area 34 commonly and substantially entirely surrounding the masked features F is assigned zero degree phase. Clearly the phases could be inverted if desired.
  • The techniques of the '436 application provide a powerful tool to pattern very fine features. The photomask used in the '436 application, however, is relatively complex and expensive to make. The present invention uses similar concepts, but omits the surrounding blocking material (blocking material 26, shown in FIG. 6) used in the '436 application, resulting in a photomask which is simpler and cheaper to make.
  • It has been described that when a nonshifting area and a shifting area in a photomask are immediately adjacent, at the transition from zero degree phase to 180 degree phase, the electrical field must pass through zero, as shown in FIG. 5. The light intensity at the corresponding point on the photoresist surface is also zero, so a residual photoresist feature remains on the wafer surface after the photoresist is developed.
  • Prior art chromeless phase edge techniques have made use of this residual photoresist feature. Turning to FIG. 8, a photomask is shown consisting of parallel lines, where the lines are alternately shifting regions 30 and nonshifting regions 32, each having a width 34. Such an arrangement is described in prior art which is mentioned in Lee et al., U.S. Pat. No. 5,240,796. Each of the shifting and nonshifting regions is printing, exposing a corresponding area on the photoresist surface. FIG. 8 further shows, below the photomask in cross-section, the wafer and photoresist surface after developing. It will be seen that residual photoresist lines 36 form on the wafer surface 38 at the phase transition boundaries, creating patterned lines after etch. (Dotted lines relate the phase transition in the photomask with the resulting residual photoresist feature.)
  • In other prior art, for example Chen et al., U.S. Pat. No. 6,482,555 (hereinafter the '555 patent), several phase shifting windows are placed in close proximity to each other, with no blocking material used, as in FIG. 5 b or FIG. 7 of that patent, and as shown in FIG. 9. Turning to FIG. 9, the transmitting area between the phase shifting areas 60 of the '555 patent has width 62. This width 62 is so small that the residual photoresist features created by adjacent shifting areas 60 merge, forming a single, large photoresist feature. Thus the transmitting area between phase shifters is nonprinting.
  • The present invention is a photomask comprising nonprinting transmitting windows transmitting light in a first phase entirely surrounded by a printing transmitting area transmitting light in a second phase opposite the first phase, with no blocking material intervening. The transition between the phases causes a closed residual photoresist feature to be formed at the perimeter of such a nonprinting transmitting window. The dimensions of the nonprinting transmitting window are chosen such that opposite sides of the residual photoresist feature merge, so that, during normal use of the photomask, photoresist in the interior of the feature is not exposed sufficiently to expose the wafer surface after the photoresist is developed. A patterned feature can be created from each residual photoresist feature.
  • To contrast with other photomasks mentioned herein: In the present invention, a photomask comprises shifting areas immediately adjacent to nonshifting areas, with no blocking material intervening (unlike the '436 application). In aspects of the present invention, either the shifting area or the nonshifting area is nonprinting, so that opposite sides of a single closed residual photoresist feature formed by the nonprinting area merge (unlike the alternating shifting and non-shifting stripe photomask described in Lee et al.). The nonprinting area is entirely surrounded by an area that is printing (unlike the '555 patent.) and creates a photoresist feature that does not merge with an adjacent photoresist feature. FIG. 10 a, for example, shows a plan view of a section of a photomask formed according to the present invention. The areas labeled 180° are shifting, while the area labeled 0° is nonshifting. Clearly, the phases could be inverted if desired.
  • To summarize, an examplary photomask according to the present invention comprises a transmitting nonprinting window transmitting light in a first phase; and a transmitting area substantially entirely surrounding and in contact with the transmitting window on all sides with no blocking material intervening, wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase, and wherein, when used to pattern photoresist, the transmitting area is printing on all sides of the transmitting window. A transmitting window is a continuous area of a photomask which transmits light and includes no blocking material which is surrounded on all sides by some other material.
  • FIG. 10 b shows the same section of photomask in cross section, the cross section taken along line L-L′. Shifting areas have been thinned to shift incident light by about 180 degrees, while nonshifting areas do not shift incident light. No blocking material separates shifting areas from nonshifting areas.
  • FIG. 10 c shows the electric field in the plane of the photomask, and FIG. 10 d shows the light intensity at the photoresist surface. FIG. 10 e illustrates (in cross-section) residual photoresist features formed on the wafer surface after developing the photoresist. It will be seen that, if the dimensions of the shifting area and the nonshifting areas are chosen appropriately, the opposite sides of a single residual photoresist features formed at the phase transition perimeter are so close together that they are in contact, and merge.
  • Thus, using such a photomask, a patterned feature can be formed by transmitting light through a phase shifting photomask onto photoresist covering the wafer surface; forming an isolated first residual photoresist feature between a first wafer area exposed to light in a first phase and a second wafer area exposed to light in a second phase, wherein the first phase is substantially opposite the second phase, and wherein the second wafer area entirely surrounds the first wafer area in the plane of the wafer; and forming the patterned feature from the photoresist feature. In this case the isolated first photoresist feature defines a closed shape having a perimeter, and, after the developing step and before the etching step, no portion of the wafer surface is exposed within the perimeter. The photoresist feature is described as isolated because it is not merged with an adjacent photoresist feature.
  • Such a photomask is relatively simple to make, compared to the photomask used in the '436 application.
  • The photomask of the '436 application requires two patterning steps, one to pattern the blocking material, the second to etch the quartz to form the shifting area. Turning to FIG. 11 a, patterning begins with quartz layer 40 coated with a layer of blocking material (typically chromium) 42. Photoresist 44 is deposited on chromium layer 42, then patterned in the shape of the blocking material defining masked features with interior nonprinting windows, like the photomask shown in FIG. 7. FIG. 11 b shows the photomask after etch of chromium layer 42 and removal of photoresist. (It will be noted that in cross-sectional figures representing patterning of a photomask, the photomask appears upside down relative to its presentation in figures representing the photomask in use; in FIG. 2 a, for example, where the blocking material appears below the photomask, as opposed to FIG. 11 a, where it is shown above. This represents the orientation of the photomask during these respective activities.)
  • For the second patterning step, photoresist is again applied and patterned, this time exposing only the interior windows of the masked features, as shown in FIG. 11 c. An etch step thins quartz layer 40, creating shifting areas 46, as shown in FIG. 11 d, which shows the completed photomask.
  • Both photolithography steps performed to create the photomask of the '436 application present challenges; the first includes patterning of complex shapes, while the second requires precise alignment.
  • Forming the photomask according in the present invention, for example the photomask shown in FIG. 10 a, is significantly simpler. Turning to FIG. 12 a, patterning again begins with quartz layer 40 coated with chromium layer 42. Photoresist 44 is deposited on chromium layer 42, then patterned to excavate rectangular holes in the photoresist. FIG. 12 b shows patterned chromium remaining after the etch step. In this example, a continuous area of chromium remains with rectangular holes etched in the chromium, the surface of quartz layer 40 exposed in the holes. A second etch step follows, in which the remaining chromium 42 serves as a hard mask while the quartz layer 40 is etched to produce rectangular shifting areas 46 shown in FIG. 12 c. FIG. 12 d shows the completed photomask after the chromium layer 42 has been stripped.
  • Only a single, relatively simple patterning step is required to make this photomask. It will be noted that none of chromium layer 42 remained in the completed photomask shown in FIG. 12 d. It was included in this description because standard photomask blanks as purchased normally include this layer. If quartz or some other suitable photomask substrate with no chromium layer was used as the starting point, then photoresist could be deposited directly on the quartz, the photoresist patterned and the quartz etched, without the intermediate chromium etch.
  • For clarity, an example has been provided of how to make a photomask according to the present invention. Many variations will be readily apparent to those skilled in the art. This example described a photomask having shifting transmitting areas surrounded by a nonshifting transmitting area; clearly the phases could be inverted. Negative photoresist is also well known in the art. When developed, the exposed areas of negative photoresist remain, while the obscured areas are removed. For brevity, the present application describes the use of positive photoresist. Those skilled in the art will appreciate that negative photoresist could be used either in formation of the photomask or when patterning the wafer surface. A regular rectangular pattern was described; clearly other patterns can be envisioned.
  • When describing dimensions in a photomask, it is usual to speak of those dimensions in terms of projected dimensions; i.e. rather than describing the actual size of a photomask feature in the photomask, one describes the size of the photomask feature multiplied by the stepper magnification. Stepper magnification is typically 4 or 5; i.e. a linear dimension of a chromium area in a photomask is typically about four or five times larger than the size of the same feature as projected onto the photoresist surface.
  • This description will follow this convention. A photomask feature dimension will be described as “×S”, or multiplied by a projection scaling factor S. The projection scaling factor S is the stepper magnification. Suppose, for example, the stepper magnification and the projection scaling factor is four. If the actual physical dimension of a photomask feature in a photomask is, for example, 1000 nm, the dimension of the photomask feature will be described as 250 nm×S. For a stepper magnification and projection scaling factor S of five, and an actual physical dimension of 1000 nm of a photomask feature will be described as 200 nm×S.
  • Stepper magnification is determined by optics, and is the single most important factor controlling the relationship between the size of a photomask feature and the size of the resulting projected photoresist feature. It is not, however, the only factor. As is well known in the art, varying exposure dose also changes the size of projected photoresist features. Longer exposure results in more light energy reaching the photoresist surface, and more thorough exposure of photoresist. When the photoresist is developed, more photoresist is removed; thus for larger exposure dose, dimensions of the eventual etched features are smaller. FIG. 13 a and FIG. 13 b, for example, show projected photoresist features 47 after development. The photoresist feature 47 of FIGS. 13 a and 13 b could be formed from the same photomask feature in the same photomask during separate photolithography operations. The narrower photoresist feature 47 of FIG. 13 b is created when a higher exposure dose is applied.
  • It will be recalled that in aspects of the present invention, residual photoresist features are formed using a photomask fabricated according to the present invention, having first transmitting windows transmitting light in a first phase surrounded by a second transmitting area transmitting light in a second phase, the second phase substantially opposite the first phase. The size of the first transmitting windows are selected such that the opposite sides of a single residual photoresist feature formed at the perimeter of a window merge. The residual photoresist feature forms at the transition between opposite phases; ie. at the border between the projection of a first transmitting window and the second transmitting area surrounding it, and not entirely within the boundaries of the first transmitting window. Thus a linear dimension of a photoresist feature defined by merged residual photoresist lines may be larger than the linear dimension ×S of the photomask feature used to create it.
  • Many interrelated factors determine the actual dimension a transmitting window must have in its shortest dimension to be nonprinting, according to the present invention. In general, the size of the window is proportional to the wavelength of incident light, and is inversely proportional to numerical aperture.
  • The shortest dimension for a transmitting window to be nonprinting is also affected by the aperture of the condensing lens. This value can either be a single aperture radius σ, or can be an inner aperture radius σi and an outer aperture radius σo. FIG. 14 a shows a conventional aperture which has a single aperture radius σ. An annular aperture is shown in FIG. 14 b, in which the center area is obscured and light is transmitted through an annulus having an outer aperture radius σo and an inner aperture radius σi.
  • A quadrupole aperture, shown in FIG. 14 c, is obscured except for four holes arranged as shown. The outer aperture radius σo is the distance to the outside edge of each hole, while the inner aperture radius σi is the distance to the inside edge of each hole. A dipole aperture, shown in FIG. 14 d, is obscured except for two holes arranged as shown. The outer aperture radius σo is the distance to the outside edge of each hole, while the inner aperture radius σi is the distance to the inside edge of each hole. Aperture radius is generally unitless, and is expressed as a proportion of the entire lens. For example, for a conventional aperture, σ is typically about 0.7.
  • The relationship of all of these factors can be summarized as follows: D λ ( 1 + σ i + σ o 2 ) NA
  • In this equation, D represents the size the shortest dimension of a transmitting window must have in order to be nonprinting; λ is the wavelength of incident light, σi is the inner aperture radius and σo is the outer aperture radius; and NA is the numerical aperture. Thus D is proportional to wavelength λ, and is inversely proportional to aperture radius σ (or inner aperture radius σi and outer aperture radius σo) and numerical aperture NA.
  • Conventionally, light of two wavelengths are in general use: 248 nm (KrF) and 193 nm (ArF).
  • In general, for 248 nm photolithography, at any point at which a transmitting window has a dimension no more than about 160 nm×S, it will be nonprinting. Similarly, for 193 nm photolithography, at any point at which a transmitting window has a dimension no more than about 120 nm×S, it will be nonprinting.
  • In practical terms a window having a shortest dimension smaller than about 50 nm will be ineffective; preferably the window of the present invention should have no dimension less than about 60 nm.
  • FIG. 15 is a plan view of an exemplary photomask formed according to the present invention. The photomask comprises a plurality of transmitting nonprinting windows 50 transmitting light in a first phase; a transmitting area 52 transmitting light in a second phase, each transmitting window 50 substantially entirely surrounded by and in contact with the transmitting area 52 with no blocking material intervening, wherein the second phase is substantially opposite the first phase, and wherein a first width of unbroken transmitting area 52 surrounds each transmitting window on all sides, the first width sufficient for the unbroken transmitting area 52 to print when the photomask is used to expose photoresist.
  • In this example, windows 50 have linear dimension D1, and are separated by distance D2. D1 is chosen so that opposite sides of a single residual photoresist feature formed on the photoresist surface at the projected perimeter of a window merge, and the window 50 is nonprinting. D2 is chosen so that the space between the windows prints, that is, so that the photoresist in this area is exposed sufficiently that it is removed during developing. Because the window 50 is a closed feature, its interior receives less overall light than does the transmitting area 52 between windows. For this reason dimension D1 can be larger than first dimension D2 while window 50 is nonprinting and transmitting area 52 is printing. The exposure dose must be selected so that the windows 50 are nonprinting. (This example shows windows 50 square and uniformly spaced. Clearly many other arrangements are possible. Transmitting windows 50 can be rectangular but not square, or any other shape. Transmitting windows 50 can be randomly spaced.)
  • Describing the transmitting area surrounding a transmitting window on all sides as “unbroken” for a first width means that within that width only the transmitting area exists, and that no other material, such as blocking material or another transmitting window transmitting light in a different phase, is present. For example, turning to FIG. 16 a, transmitting window 50, which transmits light in a first phase, is surrounded on all sides by a first width D3 of unbroken transmitting area 52, which transmits light in a second phase substantially opposite the first phase. The boundary of first width D3 is denoted by the dotted-line frame 51. No other material exists within first width D3 of transmitting window 50. The first width D3 is sufficient for the unbroken transmitting area 52 to print when the photomask is used to expose photoresist; in preferred embodiments, the first width D3 is at least 100 nm×S.
  • In contrast, in FIG. 16 b, transmitting window 54, which in this example transmits light in the first phase, is less than a first width D3 from transmitting window 50, and thus transmitting window 50 in FIG. 16 b is not surrounded on all sides by first width D3 of unbroken transmitting area 52. An example of such a configuration appears in the '555 patent, in which the width of the transmitting area separating adjacent transmitting shifting windows is not sufficient for the transmitting area between those windows to print when the photomask is used to expose photoresist.
  • In other words, FIG. 15 shows a section of a photomask. The photomask comprises a plurality of spatially separate transmitting nonprinting windows 50 transmitting light in a first phase; a transmitting area 52 transmitting light in a second phase, the second phase substantially opposite the first, the transmitting area 52 entirely surrounding and in contact with each of the transmitting windows 50 of the first plurality; wherein each transmitting window is separated from its nearest neighbor in the plurality by an unbroken length of transmitting area having at least a first dimension D2, and wherein the smallest dimension D1 of each window is no more than about 160 percent of the first dimension D2. As described earlier, because the window 50 is a closed feature, its interior receives less overall light than does the transmitting area 52 between windows. For this reason dimension D1 can be larger than first dimension D2 while window 50 is nonprinting and transmitting area 52 is printing. It will be evident that the smallest dimension D1 of each window is measured in a plane parallel to the plane of the photomask.
  • Monolithic three dimensional memory arrays such as the one taught in Herner et al., U.S. patent application Ser. No. 10/326470, “An Improved Method for Making High Density Nonvolatile Memory,” filed Dec. 19, 2002, hereby incorporated by reference, include a plurality of substantially evenly spaced pillars. These pillars can comprise polycrystalline silicon, called polysilicon. The pillars are portions of memory cells, and the memory cells formed in the same patterning steps generally form a portion of a memory level at a first height above a substrate. Such a monolithic three dimensional memory array further comprises at least a second memory level formed at a second height above the substrate, the second height different from the first height.
  • The substantially evenly spaced pillars of Herner et al. have a pitch of between about 220 nm and 280 nm, preferably about 260 nm, and are patterned, for example, using light having a wavelength of 248 nm. A photomask according to the present invention paired with a quadrupole aperture is highly effective for patterning regularly spaced pillars.
  • It will be recalled that light is projected through a photomask having a photomask feature to create a corresponding photoresist feature. The photoresist feature is then processed, typically by etching, to create a patterned feature. Pillars, for example the pillars of Herner et al., are the patterned features created from the photomask features 50 of FIG. 15.
  • The photomask of FIG. 15 can advantageously be used to pattern the pillars of Herner et al. When used for this purpose, referring to FIG. 15, photomask feature dimension D1 is between about 50 nm×S and about 160 nm×S, preferably between about 90 nm×S and about 140 nm×S, most preferably between about 130 and 140 nm×S. The shortest dimension of the transmitting window 50 is no more than about 160 nm×S. Photomask feature dimension D2, then, is between about 210 nm×S and about 100 nm×S, preferably between about 170 nm×S and about 120 nm×S, most preferably between about 130 nm×S and 120 nm×S. With proper exposure dose, these photomask dimensions should produce photoresist features having a width of about 130 nm and separated by a gap of about 130 nm. Dose varies from design to design, photomask to photomask, and machine to machine, and it is routine to for some experimentation to be required to identy optimum dose. Preferably the width of the photoresist features is no more than about 150 nm, and the gap is no less than about 110 nm. The photoresist features are then etched to form the patterned features, which will be pillars, as described in Herner et al. As noted in Herner et al., while the masked feature is rectangular, the cross-section of the patterned feature will tend to be substantially cylindrical. The dimensions given here assume that the light has a wavelength of 248 nm.
  • It will also be understood by those skilled in the art that, depending on the materials etched and the etch processes used, photoresist feature dimensions may not be the same as actual patterned feature dimensions. It is routine to adjust exposure dose and etch processes to achieve optimum results.
  • Monolithic three dimensional memory arrays are described in Johnson et al., U.S. Pat. No. 6,034,882, “Vertically stacked field programmable nonvolatile memory and method of fabrication”; Johnson, U.S. Pat. No. 6,525,953, “Vertically stacked field programmable nonvolatile memory and method of fabrication”; Knall et al., U.S. Pat. No. 6,420,215, “Three Dimensional Memory Array and Method of Fabrication”; Lee et al., U.S. patent application Ser. No. 09/927648, “Dense Arrays and Charge Storage Devices, and Methods for Making Same,” filed Aug. 13, 2001; Herner, U.S. application Ser. No. 10/095962, “Silicide-Silicon Oxide-Semiconductor Antifuse Device and Method of Making,” filed Mar. 13, 2002; Vyvoda et al., U.S. patent application Ser. No. 10/185507, “Electrically Isolated Pillars in Active Devices,” filed Jun. 27, 2002; Walker et al., U.S. application Ser. No. 10/335089, “Method for Fabricating Programmable Memory Array Structures Incorporating Series-Connected Transistor Strings,” filed Dec. 31, 2002; Scheuerlein et al., U.S. application Ser. No. 10/335078, “Programmable Memory Array Structure Incorporating Series-Connected Transistor Strings and Methods for Fabrication and Operation of Same,” filed Dec. 31, 2002; Vyvoda, U.S. patent application Ser. No. 10/440882, “Rail Schottky Device and Method of Making”, filed May 19, 2003; and Cleeves et al., “Optimization of Critical Dimensions and Pitch of Patterned Features in and Above a Substrate,” U.S. patent application Ser. No. 10/728,451, filed Dec. 5, 2003, all assigned to the assignee of the present invention and hereby incorporated by reference.
  • A monolithic three dimensional memory array is one in which multiple memory levels are formed above a single substrate, such as a wafer, with no intervening substrates. The layers forming one memory level are deposited or grown directly over the layers of an existing level or levels. In contrast, stacked memories have been constructed by forming memory levels on separate substrates and adhering the memory levels atop each other, as in Leedy, U.S. Pat. No. 5,915,167, “Three dimensional structure memory.” The substrates may be thinned or removed from the memory levels before bonding, but as the memory levels are initially formed over separate substrates, such memories are not true monolithic three dimensional memory arrays.
  • These monolithic three dimensional memory arrays are highly dense structures. Thus photomasks made according to the present invention can advantageously be used to pattern any of the lines, pillars, or other tightly-packed structures formed at any level of these arrays.
  • It will be evident, however, that the techniques described herein are in no way limited to three dimensional memory arrays, and can be used to pattern any fine features, including conventional two-dimensional and non-memory devices.
  • The examples provided in this description of photomasks formed according to the present invention have largely depicted regular patterns, for example evenly spaced rectangles of uniform size. Regular patterns offer the advantage that it is simpler to determine exactly what size photomask feature and exposure dose are required to create a patterned feature of a desired size; once the determination is made, it applies to all of the elements in the pattern. Nonetheless, the methods and photomasks of the present invention can be applied to features of any shape, and the patterned features need not be uniformly sized or spaced.
  • An area of a photomask can be described as having a shifting degree. A shifting degree describes the shifting characteristics of a transmitting area of a photomask. If light transmitted through an area of a photomask is not phase shifted, for example, that area has a shifting degree of about zero degrees. If light transmitted through an area of a photomask is phase shifted to the opposite phase, that area has a shifting degree of about 180 degrees.
  • To summarize, FIG. 15 shows a phase shifting photomask comprising a transmitting nonprinting window 50 having a first shifting degree; a second transmitting area 52 having a second shifting degree, the second transmitting area 52 entirely surrounding and in contact with the first transmitting window 50, wherein the second transmitting area 52 is printing on all sides of the transmitting window 50; and wherein the second shifting degree is substantially opposite the first shifting degree.
  • Photomasks formed according to the present invention have been described which include first transmitting windows transmitting light in a first phase surrounded by a second transmitting area transmitting light in a second phase, the second phase substantially opposite the first phase. In the examples provided, no blocking material separated the first transmitting windows from the second transmitting area. It should be noted, however, that photomask features with no blocking material formed according to the present invention can be combined in a single photomask with conventional photomask features that include blocking material. More specifically, the presence of blocking material in any part of a photomask does not preclude it from falling within the scope of the invention.
  • The foregoing detailed description has described only a few of the many forms that this invention can take. For this reason, this detailed description is intended by way of illustration, and not by way of limitation. It is only the following claims, including all equivalents, which are intended to define the scope of this invention.

Claims (69)

1. A phase shifting photomask comprising:
a plurality of transmitting nonprinting windows transmitting light in a first phase;
a transmitting area transmitting light in a second phase, each transmitting window substantially entirely surrounded by and in contact with the transmitting area with no blocking material intervening,
wherein the second phase is substantially opposite the first phase, and
wherein a first width of unbroken transmitting area surrounds each transmitting window on all sides, the first width sufficient for the unbroken transmitting area to print when the photomask is used to expose photoresist.
2. The photomask of claim 1 wherein the first phase is about 180 degrees and the second phase is about 0 degrees.
3. The photomask of claim 2 wherein the shortest dimension of any of the plurality of nonprinting transmitting windows parallel to the plane of the photomask is no more than about 160 nm×S.
4. The photomask of claim 3 wherein the shortest dimension of any of the plurality of nonprinting transmitting windows parallel to the plane of the photomask is no more than about 120 nm×S.
5. The photomask of claim 3 wherein at least one of the plurality of transmitting windows is rectangular.
6. The photomask of claim 5 wherein all of the transmitting windows are rectangular.
7. The photomask of claim 3 wherein the transmitting windows are uniformly spaced.
8. The photomask of claim 2 wherein the first width of unbroken transmitting area is at least 100 nm×S.
9. The photomask of claim 3 wherein the first phase is about 0 degrees and the second phase is about 180 degrees.
10. The photomask of claim 9 wherein the shortest dimension of any of the plurality of nonprinting transmitting windows in the plane of the photomask is no more than about 160 nm×S.
11. The photomask of claim 10 wherein the shortest dimension of any of the plurality of nonprinting transmitting windows in the plane of the photomask is no more than about 120 nm×S.
12. The photomask of claim 9 wherein at least one of the plurality of transmitting windows is rectangular.
13. The photomask of claim 12 wherein all of the transmitting windows are rectangular.
14. The photomask of claim 9 wherein the transmitting windows are uniformly spaced.
15. The photomask of claim 9 wherein the first width of unbroken transmitting area is at least 100 nm×S.
16. A phase shifting photomask comprising:
a transmitting nonprinting window transmitting light in a first phase; and
a transmitting area substantially entirely surrounding and in contact with the transmitting window on all sides with no blocking material intervening,
wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase, and
wherein, when used to pattern photoresist, the transmitting area is printing on all sides of the transmitting window.
17. The photomask of claim 16 wherein the first phase is about zero degrees and the second phase is about 180 degrees.
18. The photomask of claim 17 wherein a shortest dimension of the first nonprinting transmitting window parallel to the plane of the photomask is no more than about 160 nm×S.
19. The photomask of claim 17 wherein a shortest dimension of the nonprinting transmitting window parallel to the plane of the photomask is no more than about 120 nm×S.
20. The photomask of claim 17 wherein a width of the transmitting area on all sides of the transmitting window is at least 100 nm×S.
21. The photomask of claim 16 wherein the first phase is about 180 degrees and the second phase is about zero degrees.
22. The photomask of claim 21 wherein the shortest dimension of the nonprinting transmitting window parallel to the plane of the photomask is no more than about 160 nm×S.
23. The photomask of claim 21 wherein the shortest dimension of the nonprinting transmitting window parallel to the plane of the photomask is no more than about 120 nm×S.
24. The photomask of claim 21 wherein a width of the transmitting area on all sides of the transmitting window is at least 100 nm×S.
25. A phase shifting photomask comprising:
a plurality of spatially separate transmitting nonprinting windows transmitting light in a first phase; and
a transmitting area transmitting light in a second phase, the second phase substantially opposite the first, the transmitting area entirely surrounding and in contact with each of the transmitting windows of the first plurality;
wherein each transmitting window is separated from its nearest neighbor in the plurality by an unbroken length of transmitting area having at least a first dimension, and
wherein the smallest dimension of each window is no more than about 160 percent of the first dimension.
26. The photomask of claim 25 wherein the first phase is about zero degrees and the second phase is about 180 degrees.
27. The photomask of claim 26 wherein the first dimension is at least about 100 nm×S.
28. The photomask of claim 27 wherein the smallest dimension of each window is less than about 160 nm×S.
29. The photomask of claim 26 wherein the plurality of transmitting nonprinting windows are arranged in a grid pattern.
30. The photomask of claim 25 wherein the first phase is about 180 degrees and the second phase is about zero degrees.
31. The photomask of claim 30 wherein the first dimension is at least about 100 nm×S.
32. The photomask of claim 31 wherein the smallest dimension of each window is less than about 160 nm×S.
33. The photomask of claim 30 wherein the plurality of transmitting nonprinting windows are arranged in a grid pattern.
34. A phase shifting photomask comprising:
a transmitting nonprinting window having a first shifting degree;
a second transmitting area having a second shifting degree, the second transmitting area entirely surrounding and in contact with the first transmitting window, wherein the second transmitting area is printing on all sides of the transmitting window; and
wherein the second shifting degree is substantially opposite the first shifting degree.
35. The photomask of claim 34 wherein the first shifting degree is about zero degrees and the second shifting degree is about 180 degrees.
36. The photomask of claim 35 wherein the shortest dimension of the second transmitting area in the plane of the photomask is no more than about 160 nm×S.
37. The photomask of claim 36 wherein the shortest dimension of the second transmitting area in the plane of the photomask is no more than about 120 nm×S.
38. The photomask of claim 22 wherein the second transmitting area has a rectangular shape.
39. The photomask of claim 34 wherein the first shifting degree is about 180 degrees and the second shifting degree is about zero degrees.
40. The photomask of claim 39 wherein the shortest dimension of the second transmitting area in the plane of the photomask is no more than about 160 nm×S.
41. The photomask of claim 40 wherein the shortest dimension of the second transmitting area in the plane of the photomask is no more than about 120 nm×S.
42. The photomask of claim 39 wherein the second transmitting area has a rectangular shape.
43. A method for forming a patterned feature on a wafer surface, the method comprising:
transmitting light through a phase shifting photomask onto photoresist covering the wafer surface;
forming an isolated first residual photoresist feature between a first wafer area exposed to light in a first phase and a second wafer area exposed to light in a second phase, wherein the first phase is substantially opposite the second phase, and
wherein the second wafer area entirely surrounds the first wafer area in the plane of the wafer; and
forming the patterned feature from the photoresist feature.
44. The method of claim 43 wherein the first phase is about zero degrees and the second phase is about 180 degrees.
45. The method of claim 44 wherein:
the step of forming an isolated photoresist feature comprises developing photoresist, and
the step of forming the patterned feature comprises etching, and
the first residual photoresist feature defines a closed shape having a perimeter, and,
after the developing step and before the etching step, no portion of the wafer surface is exposed within the perimeter.
46. The method of claim 45 wherein the shortest dimension of the photoresist feature measured in the plane of the wafer surface is no greater than about 150 nm.
47. The method of claim 44 further comprising forming a plurality of residual photoresist features,
wherein each photoresist feature of the plurality is exposed to light in the first phase, and
each photoresist feature of the plurality is entirely surrounded by the second wafer area.
48. The method of claim 47 wherein each of the plurality of photoresist features defines a closed shape having a perimeter, and, after the developing step and before the etching step, no portion of the wafer surface is exposed within the perimeter.
49. The method of claim 48 wherein the plurality of photoresist features is uniformly spaced.
50. The method of claim 48 wherein the plurality of photoresist features is randomly spaced.
51. The method of claim 48 wherein a patterned feature is formed on the wafer surface from each of the plurality of photoresist features, and wherein the patterned features are portions of memory cells forming a first memory level in a memory array, the first memory level formed at a first height above a substrate.
52. The method of claim 51 wherein the memory array is a monolithic three dimensional memory array, the array further comprising at least a second memory level formed at a second height above the substrate, the second height different from the first height.
53. The method of claim 43 wherein the first phase is about 180 degrees and the second phase is about zero degrees.
54. The method of claim 53 wherein:
the step of forming an isolated photoresist feature comprises developing photoresist, and
the step of forming the patterned feature comprises etching, and
the first residual photoresist feature defines a closed shape having a perimeter, and,
after the developing step and before the etching step, no portion of the wafer surface is exposed within the perimeter.
55. The method of claim 54 wherein the shortest dimension of the photoresist feature measured in the plane of the wafer surface is no greater than about 150 nm.
56. The method of claim 55 further comprising forming a plurality of residual photoresist features,
wherein each photoresist feature of the plurality is exposed to light in the first phase, and
each photoresist feature of the plurality is entirely surrounded by the second wafer area.
57. The method of claim 56 wherein each of the plurality of photoresist features defines a closed shape having a perimeter, and, after the developing step and before the etching step, no portion of the wafer surface is exposed within the perimeter.
58. The method of claim 57 wherein the plurality of photoresist features is uniformly spaced.
59. The method of claim 57 wherein the plurality of photoresist features is randomly spaced.
60. The method of claim 57 wherein a patterned feature is formed on the wafer surface from each of the plurality of photoresist features, and wherein the patterned features are portions of memory cells forming a first memory level in a memory array, the first memory level formed at a first height above a substrate.
61. The method of claim 60 wherein the memory array is a monolithic three dimensional memory array, the array further comprising at least a second memory level formed at a second height above the substrate, the second height different from the first height.
62. A method for forming photoresist features on a wafer surface using a photomask, the method comprising:
transmitting light through a first mask area onto a first wafer area, the first mask area having a first shifting degree;
transmitting light through a second mask area onto a second wafer area, the second mask area having a second shifting degree,
wherein the second mask area entirely surrounds and is on all sides in contact with the first mask area, and the first shifting degree is substantially opposite the second shifting degree; and
developing photoresist, wherein, after the developing step, a closed residual photoresist feature remains between the first wafer area and the second wafer area, and wherein the closed residual photoresist feature is isolated and not merged with any adjacent photoresist feature.
63. The method of claim 62 wherein the first shifting degree is about zero degrees and the second shifting degree is about 180 degrees.
64. The method of claim 63 wherein, after the developing step, no wafer surface is exposed within the first wafer area.
65. The method of claim 62 wherein the first shifting degree is about 180 degrees and the second shifting degree is about zero degrees.
66. The method of claim 65 wherein, after the developing step, no wafer surface is exposed within the first wafer area.
67. A monolithic three dimensional memory array comprising:
a plurality of patterned features, the plurality of patterned features patterned using a photomask comprising:
a plurality of spatially separate first transmitting windows, wherein the transmitting windows transmit light in a first phase; and
a transmitting area of the photomask, each transmitting window substantially surrounded by and in contact with the transmitting area,
wherein the transmitting area transmits light in a second phase, the second phase substantially opposite the first phase.
68. The monolithic three dimensional memory array of claim 67, wherein the patterned features comprise substantially coplanar pillars.
69. The monolithic three dimensional memory array of claim 68 wherein the pillars have a diameter no more than about 150 nm.
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Cited By (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050052915A1 (en) * 2002-12-19 2005-03-10 Matrix Semiconductor, Inc. Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states
US20050226067A1 (en) * 2002-12-19 2005-10-13 Matrix Semiconductor, Inc. Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
US20060067117A1 (en) * 2004-09-29 2006-03-30 Matrix Semiconductor, Inc. Fuse memory cell comprising a diode, the diode serving as the fuse element
US20060249753A1 (en) * 2005-05-09 2006-11-09 Matrix Semiconductor, Inc. High-density nonvolatile memory array fabricated at low temperature comprising semiconductor diodes
US20060250837A1 (en) * 2005-05-09 2006-11-09 Sandisk 3D, Llc Nonvolatile memory cell comprising a diode and a resistance-switching material
US20070008773A1 (en) * 2005-07-11 2007-01-11 Matrix Semiconductor, Inc. Nonvolatile memory cell comprising switchable resistor and transistor
US20070070690A1 (en) * 2005-09-28 2007-03-29 Scheuerlein Roy E Method for using a multi-use memory cell and memory array
US20070069217A1 (en) * 2003-12-03 2007-03-29 Herner S B P-i-n diode crystallized adjacent to a silicide in series with a dielectric anitfuse
US20070104746A1 (en) * 2005-07-29 2007-05-10 Seishiro Fujii Methods and compositions for reducing skin damage
US20070105284A1 (en) * 2003-12-03 2007-05-10 Herner S B Method for forming a memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
US20070114508A1 (en) * 2005-11-23 2007-05-24 Matrix Semiconductor, Inc. Reversible resistivity-switching metal oxide or nitride layer with added metal
US20070114509A1 (en) * 2005-11-23 2007-05-24 Sandisk 3D Llc Memory cell comprising nickel-cobalt oxide switching element
US20070190722A1 (en) * 2002-12-19 2007-08-16 Herner S B Method to form upward pointing p-i-n diodes having large and uniform current
US20070192757A1 (en) * 2006-02-14 2007-08-16 Nuflare Technology, Inc. Pattern generation method and charged particle beam writing apparatus
US20070228354A1 (en) * 2006-03-31 2007-10-04 Sandisk 3D, Llc Nonvolatile rewritable memory cell comprising a resistivity-switching oxide or nitride and an antifuse
US20070228414A1 (en) * 2006-03-31 2007-10-04 Sandisk 3D, Llc Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
US20070236981A1 (en) * 2006-03-31 2007-10-11 Sandisk 3D, Llc Multilevel nonvolatile memory cell comprising a resistivity-switching oxide or nitride and an antifuse
US20070272913A1 (en) * 2005-01-19 2007-11-29 Scheuerlein Roy E Forming nonvolatile phase change memory cell having a reduced thermal contact area
US20080003793A1 (en) * 2006-06-30 2008-01-03 Sandisk 3D Llc Ultrashallow semiconductor contact by outdiffusion from a solid source
US20080023790A1 (en) * 2006-07-31 2008-01-31 Scheuerlein Roy E Mixed-use memory array
US20080025118A1 (en) * 2006-07-31 2008-01-31 Scheuerlein Roy E Method for using a mixed-use memory array
US20080025062A1 (en) * 2006-07-31 2008-01-31 Scheuerlein Roy E Method for using a mixed-use memory array with different data states
US20080057409A1 (en) * 2006-09-06 2008-03-06 Sandisk Corporation Method of Mask Making to Prevent Phase Edge and Overlay Shift For Chrome-Less Phase Shifting Mask
US20080145994A1 (en) * 2006-12-13 2008-06-19 Herner S Brad Method for isotropic doping of a non-planar surface exposed in a void
US20080160423A1 (en) * 2006-12-30 2008-07-03 Yung-Tin Chen Imaging post structures using x and y dipole optics and a single mask
US20080237599A1 (en) * 2007-03-27 2008-10-02 Herner S Brad Memory cell comprising a carbon nanotube fabric element and a steering element
US20080254615A1 (en) * 2005-03-25 2008-10-16 Dunton Samuel V Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
US20080253168A1 (en) * 2007-04-13 2008-10-16 Philippe Blanchard Integrated circuit, resistivity changing memory device, memory module, and method of fabricating an integrated circuit
WO2009002475A1 (en) 2007-06-25 2008-12-31 Sandisk 3D Llc Programming methods of a diode using forward bias
US20090085154A1 (en) * 2007-09-28 2009-04-02 Herner S Brad Vertical diode based memory cells having a lowered programming voltage and methods of forming the same
US20090086521A1 (en) * 2007-09-28 2009-04-02 Herner S Brad Multiple antifuse memory cells and methods to form, program, and sense the same
US20090104756A1 (en) * 2007-06-29 2009-04-23 Tanmay Kumar Method to form a rewriteable memory cell comprising a diode and a resistivity-switching grown oxide
US20090142921A1 (en) * 2005-03-25 2009-06-04 Sandisk 3D Llc Method for reducing dielectric overetch when making contact to conductive features
US20090166610A1 (en) * 2007-12-31 2009-07-02 April Schricker Memory cell with planarized carbon nanotube layer and methods of forming the same
US20090168492A1 (en) * 2007-12-28 2009-07-02 Sandisk 3D Llc Two terminal nonvolatile memory using gate controlled diode elements
US20090173985A1 (en) * 2000-08-14 2009-07-09 Sandisk 3D Llc Dense arrays and charge storage devices
US20090224244A1 (en) * 2005-02-17 2009-09-10 Sandisk 3D Llc Patterning of submicron pillars in a memory array
US20090257265A1 (en) * 2008-04-11 2009-10-15 Sandisk 3D Llc Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same
US20090256129A1 (en) * 2008-04-11 2009-10-15 Sandisk 3D Llc Sidewall structured switchable resistor cell
US20090273022A1 (en) * 2006-05-31 2009-11-05 Sandisk 3D Llc Conductive hard mask to protect patterned features during trench etch
US20090316468A1 (en) * 2007-03-27 2009-12-24 Sandisk 3D Llc Large array of upward pointing p-i-n diodes having large and uniform current
US20100136751A1 (en) * 2003-12-03 2010-06-03 Herner S Brad Method for making a p-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse
US20100142255A1 (en) * 2007-03-27 2010-06-10 Herner S Brad Method to program a memory cell comprising a carbon nanotube fabric element and a steering element
US20100163831A1 (en) * 2004-09-29 2010-07-01 Sandisk 3D Llc Deposited semiconductor structure to minimize n-type dopant diffusion and method of making
US20100181657A1 (en) * 2002-12-19 2010-07-22 Sandisk 3D Llc Nonvolatile memory cell comprising a reduced height vertical diode
US20100283053A1 (en) * 2009-05-11 2010-11-11 Sandisk 3D Llc Nonvolatile memory array comprising silicon-based diodes fabricated at low temperature
US20110110149A1 (en) * 2005-01-19 2011-05-12 Scheuerlein Roy E Structure and method for biasing phase change memory array for reliable writing
US8004033B2 (en) 2002-12-19 2011-08-23 Sandisk 3D Llc High-density nonvolatile memory
CN102967992A (en) * 2012-11-15 2013-03-13 京东方科技集团股份有限公司 Array substrate, mask plate and manufacturings method thereof, as well as display device
US8637413B2 (en) 2011-12-02 2014-01-28 Sandisk 3D Llc Nonvolatile resistive memory element with a passivated switching layer
US8659001B2 (en) 2011-09-01 2014-02-25 Sandisk 3D Llc Defect gradient to boost nonvolatile memory performance
US8686386B2 (en) 2012-02-17 2014-04-01 Sandisk 3D Llc Nonvolatile memory device using a varistor as a current limiter element
US8698119B2 (en) 2012-01-19 2014-04-15 Sandisk 3D Llc Nonvolatile memory device using a tunnel oxide as a current limiter element
US8866121B2 (en) 2011-07-29 2014-10-21 Sandisk 3D Llc Current-limiting layer and a current-reducing layer in a memory device
US9472301B2 (en) 2013-02-28 2016-10-18 Sandisk Technologies Llc Dielectric-based memory cells having multi-level one-time programmable and bi-level rewriteable operating modes and methods of forming the same
US9806256B1 (en) 2016-10-21 2017-10-31 Sandisk Technologies Llc Resistive memory device having sidewall spacer electrode and method of making thereof

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5240796A (en) * 1991-07-09 1993-08-31 Micron Technology, Inc. Method of fabricating a chromeless phase shift reticle
US6057063A (en) * 1997-04-14 2000-05-02 International Business Machines Corporation Phase shifted mask design system, phase shifted mask and VLSI circuit devices manufactured therewith
US20020140920A1 (en) * 2001-01-29 2002-10-03 International Business Machines Corporation, System and method for printing semiconductor patterns using an optimized illumination and reticle
US6461774B1 (en) * 1998-08-27 2002-10-08 Micron Technology, Inc. Apparatus and method for forming features on a substrate
US6482555B2 (en) * 1998-03-17 2002-11-19 Asml Masktools Netherlands B.V. Method of patterning sub-0.25λ line features with high transmission, “attenuated” phase shift masks
US20030022074A1 (en) * 2001-07-25 2003-01-30 Christoph Nolscher Photolithographic mask
US6523165B2 (en) * 2001-07-13 2003-02-18 Numerical Technologies, Inc. Alternating phase shift mask design conflict resolution
US6541165B1 (en) * 2000-07-05 2003-04-01 Numerical Technologies, Inc. Phase shift mask sub-resolution assist features
US6551750B2 (en) * 2001-03-16 2003-04-22 Numerical Technologies, Inc. Self-aligned fabrication technique for tri-tone attenuated phase-shifting masks
US6569583B2 (en) * 2001-05-04 2003-05-27 Numerical Technologies, Inc. Method and apparatus for using phase shifter cutbacks to resolve phase shifter conflicts
US20040101764A1 (en) * 2002-11-25 2004-05-27 Paul Nyhus Use of chromeless phase shift masks to pattern contacts
US20050123837A1 (en) * 2003-12-05 2005-06-09 Matrix Semiconductor, Inc. Photomask features with interior nonprinting window using alternating phase shifting

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5667940A (en) * 1994-05-11 1997-09-16 United Microelectronics Corporation Process for creating high density integrated circuits utilizing double coating photoresist mask

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5240796A (en) * 1991-07-09 1993-08-31 Micron Technology, Inc. Method of fabricating a chromeless phase shift reticle
US6057063A (en) * 1997-04-14 2000-05-02 International Business Machines Corporation Phase shifted mask design system, phase shifted mask and VLSI circuit devices manufactured therewith
US6482555B2 (en) * 1998-03-17 2002-11-19 Asml Masktools Netherlands B.V. Method of patterning sub-0.25λ line features with high transmission, “attenuated” phase shift masks
US6461774B1 (en) * 1998-08-27 2002-10-08 Micron Technology, Inc. Apparatus and method for forming features on a substrate
US6541165B1 (en) * 2000-07-05 2003-04-01 Numerical Technologies, Inc. Phase shift mask sub-resolution assist features
US20020140920A1 (en) * 2001-01-29 2002-10-03 International Business Machines Corporation, System and method for printing semiconductor patterns using an optimized illumination and reticle
US6551750B2 (en) * 2001-03-16 2003-04-22 Numerical Technologies, Inc. Self-aligned fabrication technique for tri-tone attenuated phase-shifting masks
US6569583B2 (en) * 2001-05-04 2003-05-27 Numerical Technologies, Inc. Method and apparatus for using phase shifter cutbacks to resolve phase shifter conflicts
US6523165B2 (en) * 2001-07-13 2003-02-18 Numerical Technologies, Inc. Alternating phase shift mask design conflict resolution
US20030022074A1 (en) * 2001-07-25 2003-01-30 Christoph Nolscher Photolithographic mask
US20040101764A1 (en) * 2002-11-25 2004-05-27 Paul Nyhus Use of chromeless phase shift masks to pattern contacts
US20050123837A1 (en) * 2003-12-05 2005-06-09 Matrix Semiconductor, Inc. Photomask features with interior nonprinting window using alternating phase shifting

Cited By (129)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7825455B2 (en) 2000-08-14 2010-11-02 Sandisk 3D Llc Three terminal nonvolatile memory device with vertical gated diode
US20090173985A1 (en) * 2000-08-14 2009-07-09 Sandisk 3D Llc Dense arrays and charge storage devices
US8252644B2 (en) 2002-12-19 2012-08-28 Sandisk 3D Llc Method for forming a nonvolatile memory cell comprising a reduced height vertical diode
US8004033B2 (en) 2002-12-19 2011-08-23 Sandisk 3D Llc High-density nonvolatile memory
US8018025B2 (en) 2002-12-19 2011-09-13 Sandisk 3D Llc Nonvolatile memory cell comprising a reduced height vertical diode
US7767499B2 (en) 2002-12-19 2010-08-03 Sandisk 3D Llc Method to form upward pointing p-i-n diodes having large and uniform current
US20050052915A1 (en) * 2002-12-19 2005-03-10 Matrix Semiconductor, Inc. Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states
US8951861B2 (en) 2002-12-19 2015-02-10 Sandisk 3D Llc Methods of making a high-density nonvolatile memory
US8243509B2 (en) 2002-12-19 2012-08-14 Sandisk 3D Llc Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
US20100181657A1 (en) * 2002-12-19 2010-07-22 Sandisk 3D Llc Nonvolatile memory cell comprising a reduced height vertical diode
US8383478B2 (en) 2002-12-19 2013-02-26 Sandisk 3D Llc High-density nonvolatile memory and methods of making the same
US20050226067A1 (en) * 2002-12-19 2005-10-13 Matrix Semiconductor, Inc. Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
US8482973B2 (en) 2002-12-19 2013-07-09 Sandisk 3D Llc Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
US20070190722A1 (en) * 2002-12-19 2007-08-16 Herner S B Method to form upward pointing p-i-n diodes having large and uniform current
US9246089B2 (en) 2002-12-19 2016-01-26 Sandisk 3D Llc Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states
US8730720B2 (en) 2002-12-19 2014-05-20 Sandisk 3D Llc Nonvolatile memory cell operating by increasing order in polycrystalline semiconductor material
US20100288996A1 (en) * 2002-12-19 2010-11-18 Herner S Brad Memory arrays including memory levels that share conductors, and methods of forming such memory arrays
US8637366B2 (en) 2002-12-19 2014-01-28 Sandisk 3D Llc Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states
US8018024B2 (en) 2003-12-03 2011-09-13 Sandisk 3D Llc P-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse
US8003477B2 (en) 2003-12-03 2011-08-23 Sandisk 3D Llc Method for making a P-I-N diode crystallized adjacent to a silicide in series with a dielectric antifuse
US20070069217A1 (en) * 2003-12-03 2007-03-29 Herner S B P-i-n diode crystallized adjacent to a silicide in series with a dielectric anitfuse
US8633567B2 (en) 2003-12-03 2014-01-21 Sandisk 3D Llc Devices including a P-I-N diode disposed adjacent a silicide in series with a dielectric material
US20070105284A1 (en) * 2003-12-03 2007-05-10 Herner S B Method for forming a memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
US7833843B2 (en) 2003-12-03 2010-11-16 Sandisk 3D Llc Method for forming a memory cell comprising a semiconductor junction diode crystallized adjacent to a silicide
US8330250B2 (en) 2003-12-03 2012-12-11 Sandisk 3D Llc P-I-N diode crystallized adjacent to a silicide in series with a dielectric material
US20100136751A1 (en) * 2003-12-03 2010-06-03 Herner S Brad Method for making a p-i-n diode crystallized adjacent to a silicide in series with a dielectric antifuse
US8766414B2 (en) 2004-09-29 2014-07-01 Sandisk 3D Llc Deposited semiconductor structure to minimize N-type dopant diffusion and method of making
US20100163831A1 (en) * 2004-09-29 2010-07-01 Sandisk 3D Llc Deposited semiconductor structure to minimize n-type dopant diffusion and method of making
US8314477B2 (en) 2004-09-29 2012-11-20 Sandisk 3D Llc Deposited semiconductor structure to minimize N-type dopant diffusion and method of making
US8030740B2 (en) 2004-09-29 2011-10-04 Sandisk 3D Llc Deposited semiconductor structure to minimize N-type dopant diffusion and method of making
US20060067117A1 (en) * 2004-09-29 2006-03-30 Matrix Semiconductor, Inc. Fuse memory cell comprising a diode, the diode serving as the fuse element
US7351992B2 (en) 2005-01-19 2008-04-01 Sandisk Corporation Forming nonvolatile phase change memory cell having a reduced thermal contact area
US20110110149A1 (en) * 2005-01-19 2011-05-12 Scheuerlein Roy E Structure and method for biasing phase change memory array for reliable writing
US8102698B2 (en) 2005-01-19 2012-01-24 Sandisk 3D Llc Structure and method for biasing phase change memory array for reliable writing
US20070272913A1 (en) * 2005-01-19 2007-11-29 Scheuerlein Roy E Forming nonvolatile phase change memory cell having a reduced thermal contact area
US8385141B2 (en) 2005-01-19 2013-02-26 Sandisk 3D Llc Structure and method for biasing phase change memory array for reliable writing
US8759176B2 (en) 2005-02-17 2014-06-24 Sandisk 3D Llc Patterning of submicron pillars in a memory array
US20090224244A1 (en) * 2005-02-17 2009-09-10 Sandisk 3D Llc Patterning of submicron pillars in a memory array
US8741768B2 (en) 2005-03-25 2014-06-03 Sandisk 3D Llc Method for reducing dielectric overetch when making contact to conductive features
US20080254615A1 (en) * 2005-03-25 2008-10-16 Dunton Samuel V Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
US20110189840A1 (en) * 2005-03-25 2011-08-04 Petti Christopher J Method for reducing dielectric overetch when making contact to conductive features
US20090142921A1 (en) * 2005-03-25 2009-06-04 Sandisk 3D Llc Method for reducing dielectric overetch when making contact to conductive features
US8008187B2 (en) 2005-03-25 2011-08-30 Sandisk 3D Llc Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
US7928007B2 (en) 2005-03-25 2011-04-19 Sandisk 3D Llc Method for reducing dielectric overetch when making contact to conductive features
US8497204B2 (en) 2005-03-25 2013-07-30 Sandisk 3D Llc Method for reducing dielectric overetch when making contact to conductive features
US20100297834A1 (en) * 2005-03-25 2010-11-25 Dunton Samuel V Method for reducing dielectric overetch using a dielectric etch stop at a planar surface
US7812404B2 (en) 2005-05-09 2010-10-12 Sandisk 3D Llc Nonvolatile memory cell comprising a diode and a resistance-switching material
US8687410B2 (en) 2005-05-09 2014-04-01 Sandisk 3D Llc Nonvolatile memory cell comprising a diode and a resistance-switching material
US20060250837A1 (en) * 2005-05-09 2006-11-09 Sandisk 3D, Llc Nonvolatile memory cell comprising a diode and a resistance-switching material
US20060249753A1 (en) * 2005-05-09 2006-11-09 Matrix Semiconductor, Inc. High-density nonvolatile memory array fabricated at low temperature comprising semiconductor diodes
US7426128B2 (en) * 2005-07-11 2008-09-16 Sandisk 3D Llc Switchable resistive memory with opposite polarity write pulses
US20070008773A1 (en) * 2005-07-11 2007-01-11 Matrix Semiconductor, Inc. Nonvolatile memory cell comprising switchable resistor and transistor
US20070104746A1 (en) * 2005-07-29 2007-05-10 Seishiro Fujii Methods and compositions for reducing skin damage
US7447056B2 (en) 2005-09-28 2008-11-04 Sandisk 3D Llc Method for using a multi-use memory cell and memory array
US20070070690A1 (en) * 2005-09-28 2007-03-29 Scheuerlein Roy E Method for using a multi-use memory cell and memory array
US20070069276A1 (en) * 2005-09-28 2007-03-29 Scheuerlein Roy E Multi-use memory cell and memory array
US20070114508A1 (en) * 2005-11-23 2007-05-24 Matrix Semiconductor, Inc. Reversible resistivity-switching metal oxide or nitride layer with added metal
US7834338B2 (en) 2005-11-23 2010-11-16 Sandisk 3D Llc Memory cell comprising nickel-cobalt oxide switching element
US20070114509A1 (en) * 2005-11-23 2007-05-24 Sandisk 3D Llc Memory cell comprising nickel-cobalt oxide switching element
US7816659B2 (en) 2005-11-23 2010-10-19 Sandisk 3D Llc Devices having reversible resistivity-switching metal oxide or nitride layer with added metal
US20070192757A1 (en) * 2006-02-14 2007-08-16 Nuflare Technology, Inc. Pattern generation method and charged particle beam writing apparatus
US7669174B2 (en) * 2006-02-14 2010-02-23 Nuflare Technology, Inc. Pattern generation method and charged particle beam writing apparatus
US20070236981A1 (en) * 2006-03-31 2007-10-11 Sandisk 3D, Llc Multilevel nonvolatile memory cell comprising a resistivity-switching oxide or nitride and an antifuse
US7829875B2 (en) 2006-03-31 2010-11-09 Sandisk 3D Llc Nonvolatile rewritable memory cell comprising a resistivity-switching oxide or nitride and an antifuse
US20070228414A1 (en) * 2006-03-31 2007-10-04 Sandisk 3D, Llc Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
US20110114913A1 (en) * 2006-03-31 2011-05-19 Tanmay Kumar Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
US8592792B2 (en) 2006-03-31 2013-11-26 Sandisk 3D Llc Heterojunction device comprising a semiconductor oxide and a resistivity-switching oxide or nitride
US8227787B2 (en) 2006-03-31 2012-07-24 Sandisk 3D Llc Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
US20070228354A1 (en) * 2006-03-31 2007-10-04 Sandisk 3D, Llc Nonvolatile rewritable memory cell comprising a resistivity-switching oxide or nitride and an antifuse
US7808810B2 (en) 2006-03-31 2010-10-05 Sandisk 3D Llc Multilevel nonvolatile memory cell comprising a resistivity-switching oxide or nitride and an antifuse
US7875871B2 (en) 2006-03-31 2011-01-25 Sandisk 3D Llc Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
US8722518B2 (en) 2006-05-31 2014-05-13 Sandisk 3D Llc Methods for protecting patterned features during trench etch
US20090273022A1 (en) * 2006-05-31 2009-11-05 Sandisk 3D Llc Conductive hard mask to protect patterned features during trench etch
US7754605B2 (en) 2006-06-30 2010-07-13 Sandisk 3D Llc Ultrashallow semiconductor contact by outdiffusion from a solid source
US20080003793A1 (en) * 2006-06-30 2008-01-03 Sandisk 3D Llc Ultrashallow semiconductor contact by outdiffusion from a solid source
US7486537B2 (en) 2006-07-31 2009-02-03 Sandisk 3D Llc Method for using a mixed-use memory array with different data states
US20080025062A1 (en) * 2006-07-31 2008-01-31 Scheuerlein Roy E Method for using a mixed-use memory array with different data states
US20080025118A1 (en) * 2006-07-31 2008-01-31 Scheuerlein Roy E Method for using a mixed-use memory array
US7450414B2 (en) 2006-07-31 2008-11-11 Sandisk 3D Llc Method for using a mixed-use memory array
US20080023790A1 (en) * 2006-07-31 2008-01-31 Scheuerlein Roy E Mixed-use memory array
US20080057409A1 (en) * 2006-09-06 2008-03-06 Sandisk Corporation Method of Mask Making to Prevent Phase Edge and Overlay Shift For Chrome-Less Phase Shifting Mask
WO2008030950A2 (en) * 2006-09-06 2008-03-13 Sandisk Corporation Method of mask making to prevent phase edge and overlay shift for chrome-less phase shifting mask
WO2008030950A3 (en) * 2006-09-06 2008-08-14 Sandisk Corp Method of mask making to prevent phase edge and overlay shift for chrome-less phase shifting mask
US7662521B2 (en) 2006-09-06 2010-02-16 Sandisk 3D, Llc Method of mask making to prevent phase edge and overlay shift for chrome-less phase shifting mask
US20080145994A1 (en) * 2006-12-13 2008-06-19 Herner S Brad Method for isotropic doping of a non-planar surface exposed in a void
US7811916B2 (en) 2006-12-13 2010-10-12 Sandisk 3D Llc Method for isotropic doping of a non-planar surface exposed in a void
US20080160423A1 (en) * 2006-12-30 2008-07-03 Yung-Tin Chen Imaging post structures using x and y dipole optics and a single mask
US7794921B2 (en) 2006-12-30 2010-09-14 Sandisk Corporation Imaging post structures using x and y dipole optics and a single mask
US20100243602A1 (en) * 2006-12-30 2010-09-30 Yung-Tin Chen Imaging post structures using x and y dipole optics and a single mask
US7968277B2 (en) 2006-12-30 2011-06-28 Sandisk 3D Llc Imaging post structures using X and Y dipole optics and a single mask
US20090316468A1 (en) * 2007-03-27 2009-12-24 Sandisk 3D Llc Large array of upward pointing p-i-n diodes having large and uniform current
US20110049466A1 (en) * 2007-03-27 2011-03-03 Herner S Brad Large array of upward pointing p-i-n diodes having large and uniform current
US8203864B2 (en) 2007-03-27 2012-06-19 Sandisk 3D Llc Memory cell and methods of forming a memory cell comprising a carbon nanotube fabric element and a steering element
US20100142255A1 (en) * 2007-03-27 2010-06-10 Herner S Brad Method to program a memory cell comprising a carbon nanotube fabric element and a steering element
US7982209B2 (en) 2007-03-27 2011-07-19 Sandisk 3D Llc Memory cell comprising a carbon nanotube fabric element and a steering element
US20080237599A1 (en) * 2007-03-27 2008-10-02 Herner S Brad Memory cell comprising a carbon nanotube fabric element and a steering element
US8059444B2 (en) 2007-03-27 2011-11-15 Sandisk 3D Llc Large array of upward pointing P-I-N diodes having large and uniform current
US8737110B2 (en) 2007-03-27 2014-05-27 Sandisk 3D Llc Large array of upward pointing P-I-N diodes having large and uniform current
US9025372B2 (en) 2007-03-27 2015-05-05 Sandisk 3D Llc Large array of upward pointing p-i-n diodes having large and uniform current
US7830694B2 (en) 2007-03-27 2010-11-09 Sandisk 3D Llc Large array of upward pointing p-i-n diodes having large and uniform current
US7924602B2 (en) 2007-03-27 2011-04-12 Sandisk 3D Llc Method to program a memory cell comprising a carbon nanotube fabric element and a steering element
US8847200B2 (en) 2007-03-27 2014-09-30 Sandisk 3D Llc Memory cell comprising a carbon nanotube fabric element and a steering element
US8427858B2 (en) 2007-03-27 2013-04-23 Sandisk 3D Llc Large array of upward pointinig p-i-n diodes having large and uniform current
US8178379B2 (en) * 2007-04-13 2012-05-15 Qimonda Ag Integrated circuit, resistivity changing memory device, memory module, and method of fabricating an integrated circuit
US20080253168A1 (en) * 2007-04-13 2008-10-16 Philippe Blanchard Integrated circuit, resistivity changing memory device, memory module, and method of fabricating an integrated circuit
WO2009002475A1 (en) 2007-06-25 2008-12-31 Sandisk 3D Llc Programming methods of a diode using forward bias
US20090104756A1 (en) * 2007-06-29 2009-04-23 Tanmay Kumar Method to form a rewriteable memory cell comprising a diode and a resistivity-switching grown oxide
US8349663B2 (en) 2007-09-28 2013-01-08 Sandisk 3D Llc Vertical diode based memory cells having a lowered programming voltage and methods of forming the same
US20090085154A1 (en) * 2007-09-28 2009-04-02 Herner S Brad Vertical diode based memory cells having a lowered programming voltage and methods of forming the same
US20090086521A1 (en) * 2007-09-28 2009-04-02 Herner S Brad Multiple antifuse memory cells and methods to form, program, and sense the same
US20090168492A1 (en) * 2007-12-28 2009-07-02 Sandisk 3D Llc Two terminal nonvolatile memory using gate controlled diode elements
US7764534B2 (en) 2007-12-28 2010-07-27 Sandisk 3D Llc Two terminal nonvolatile memory using gate controlled diode elements
US20090166610A1 (en) * 2007-12-31 2009-07-02 April Schricker Memory cell with planarized carbon nanotube layer and methods of forming the same
US20090256129A1 (en) * 2008-04-11 2009-10-15 Sandisk 3D Llc Sidewall structured switchable resistor cell
US20090257265A1 (en) * 2008-04-11 2009-10-15 Sandisk 3D Llc Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same
US7812335B2 (en) 2008-04-11 2010-10-12 Sandisk 3D Llc Sidewall structured switchable resistor cell
US7830698B2 (en) 2008-04-11 2010-11-09 Sandisk 3D Llc Multilevel nonvolatile memory device containing a carbon storage material and methods of making and using same
US20100283053A1 (en) * 2009-05-11 2010-11-11 Sandisk 3D Llc Nonvolatile memory array comprising silicon-based diodes fabricated at low temperature
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CN102967992A (en) * 2012-11-15 2013-03-13 京东方科技集团股份有限公司 Array substrate, mask plate and manufacturings method thereof, as well as display device
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