US20020180489A1 - Low voltage current sense amplifier circuit - Google Patents
Low voltage current sense amplifier circuit Download PDFInfo
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- US20020180489A1 US20020180489A1 US10/034,393 US3439301A US2002180489A1 US 20020180489 A1 US20020180489 A1 US 20020180489A1 US 3439301 A US3439301 A US 3439301A US 2002180489 A1 US2002180489 A1 US 2002180489A1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/22—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/22—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
- H03F1/223—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively with MOSFET's
Definitions
- the present invention relates to the field of current sense amplifiers.
- FIG. 1 wherein there is shown a schematic diagram of a typical implementation for a current sense amplifier 10.
- a current (referred to as I load ) to be sensed flows through a sense resistor (R sense ) from a first sensing node (R s+ ) to a second sensing node (R ⁇ ).
- the first sensing node (R s+ ) is connected to a first input (+) of an operational amplifier 12 through a resistor R 1 .
- the second sensing node (R s ⁇ ) is connected to a second input ( ⁇ ) of the operational amplifier 12 through a resistor R 2 .
- the output of the operational amplifier 12 is connected to the base of a transistor 14 whose collector is connected to the first input (+).
- a current (referred to as I ref ) flows through the connection between the first input (+) and the collector of the transistor 14 .
- An emitter of the transmitter 14 generates an input current (referred to as I in ) and, is connected to an input of a 1:n current mirror 16 .
- Vcc is connected to an output of the current mirror 16 through a load resistor R 3 for the generation of an output current (referred to as I out ).
- the second input ( ⁇ ) of the operational amplifier 12 presents a relatively high impedance. Neglecting the presence of any input bias current at the second input ( ⁇ ), it is recognized that no current flows through the second resistor R 2 from the second sensing node (R s ⁇ ). The voltage at both the first input (+) and second input ( ⁇ ) is therefore equal to the voltage at the second sensing node (R s ⁇ ). The voltage drop across the resistor R 1 is accordingly equal to the product of I load and R sense , The input current I in thus equals the current I ref , and ideally then:
- I ref I load ⁇ ( R sense /R 1);
- ⁇ is the current gain of the transistor 14 .
- FIG. 2 wherein there is shown a schematic diagram of the 1:n current mirror 16 .
- This current mirror has a conventional configuration that is well known to those skilled in the art. A detailed description of the components, interconnection and operation of the current mirror 16 is accordingly not required.
- I o ⁇ ⁇ u ⁇ ⁇ t I i ⁇ ⁇ n ⁇ n ⁇ ⁇ 2 + n ⁇ ⁇ + ⁇ ⁇ 2 + ( n + 1 ) ⁇ ⁇ + n + 1 ( 5 )
- ⁇ is the current gain of the matched transistors within the current mirror 16 .
- I o ⁇ ⁇ u ⁇ ⁇ t n ⁇ I l ⁇ ⁇ o ⁇ ⁇ a ⁇ ⁇ d ⁇ ( R s ⁇ ⁇ e ⁇ ⁇ n ⁇ ⁇ s ⁇ ⁇ e R1 ) ⁇ ( 1 - ( n - 1 n - 1 ) ⁇ ⁇ + ( n - 1 n ) ⁇ 2 + ( n + 1 ) ⁇ ⁇ + n + 1 ) . ( 7 )
- Equation 7 the actual output current (see, Equation 7) of the current mirror 16 and the current n ⁇ I ref that should preferably (and ideally) be output from the current mirror approximately differ from each other by a factor (shown inside the parenthetical of Equation 7) on the order of: ( n - 1 n - 1 ) / ⁇ .
- a transconductance amplifier measures a current passing through a sense resistor to generate a reference current indicative of the measured current.
- a current mirror circuit connected to the transconductance amplifier amplifies the reference current to generate an amplified output current.
- a cascode circuit is connected between the current mirror circuit and output of the generated amplified output current.
- FIG. 1 previously described, is a schematic diagram of a typical implementation for a current sense amplifier
- FIG. 2 previously described, is a schematic diagram of a conventional current mirror for use in the amplifier circuit of FIG. 1;
- FIG. 3 is a schematic diagram of a sinking current, bipolar transistor, embodiment of a current sense amplifier in accordance with the present invention
- FIG. 4 is a schematic diagram of a sourcing current, bipolar transistor, embodiment of a current sense amplifier in accordance with the present invention
- FIG. 5 is a schematic diagram of a sinking current, MOS transistor, embodiment of a current sense amplifier in accordance with the present invention.
- FIG. 6 is a schematic diagram of a sourcing current, MOS transistor, embodiment of a current sense amplifier in accordance with the present invention.
- FIG. 7 is a graph illustrating a comparison in the DC operating characteristics between the amplifiers of FIGS. 1 and 3.
- FIG. 3 a schematic diagram of a sinking current, bipolar transistor, embodiment of a current sense amplifier 100 in accordance with the present invention.
- a current (referred to as I load ) to be sensed flows through a sense resistor (R sense ) from a first sensing node (R s+ ) to a second sensing node (R s ⁇ ).
- the first sensing node (R s+ ) is connected to a first input (+) of an operational amplifier 102 through a resistor R 1 .
- the second sensing node (R s ⁇ ) is connected to a second input ( ⁇ ) of the operational amplifier 102 through a resistor R 2 .
- the amplifier 102 is accordingly set to operate in differential mode.
- the output of the operational amplifier 102 is connected to the commonly connected bases of a pair of matched NPN transistors 104 a and 104 b having a 1:n gain ratio.
- the emitters of transistors 104 a and 104 b are connected to each other and to ground.
- the operational amplifier 102 and first transistor 104 a form a basic transconductance amplifier 105 .
- the pair of transistors 104 a and 104 b form a current mirror circuit 106 .
- the output of the operational amplifier 102 is used to drive the base current (I b ) of the current mirror 106 .
- V bias A voltage bias signal (V bias ) is applied to the commonly connected bases of another pair of matched NPN transistors 108 a and 108 b that also have a 1:n gain ratio. These matched transistors 108 a and 108 b form a cascode circuit 110 .
- the value for the signal V bias is preferably set at about ground plus two times the base-emitter voltage of the transistors 108 and may provided by connecting two serially connected (matched) NPN transistors 114 in diode configuration between V bias and ground, with the bias currrent for these transistors provided from a current source (I bias ).
- the transistors of the cascode circuit 110 and the transistors of the current mirror circuit 106 are connected in serial fashion to effectively boost the output impedance of the amplifier 100 (at output 112 ). More specifically, the emitter of the first transistor 108 a of the cascode circuit 110 is connected to the collector of the first transistor 104 a of the current mirror circuit 106 . Similarly, the emitter of the second transistor 108 b of the cascode circuit 110 is connected to the collector of the second transistor 104 b of the current mirror circuit 106 . The first input (+) of the operational amplifier is connected to the collector of the first transistor 108 a of the cascode circuit 110 . A current (referred to as I ref ) flows through the connection between the first input (+) and the collector of the first transistor 108 a .
- I ref A current flows through the connection between the first input (+) and the collector of the first transistor 108 a .
- Vcc is connected to the collector of the second transistor 108 b through a load resistor R 3 (at output 112 ) for the generation of an output current (referred to as I out )
- the components of the current sense amplifier 100 may be discretely assembled, but are preferably implemented on an monolithic integrated circuit chip 116 (perhaps with other components—not explicitly shown—performing other functions).
- the transistors 104 and 108 can operate in the saturation region to allow the circuit 100 to provide a wide output voltage range from Vcc to near ground. Furthermore, the circuit 100 is capable of operation at a relatively low Vcc of about 2.0V.
- the current in the collector of transistor 108 a i.e., the current I ref ) is:
- I ref I load ⁇ ( R sense /R 1)
- the current in the collector of the transistor 108 b (i.e., the current I out ) is accordingly:
- I out n ⁇ I ref ;
- I out n ⁇ I load ⁇ ( R sense /R 1)
- I c(104 b ) n ⁇ I c(104a) ;
- I e ( 108 b ) n ⁇ I e(108a) .
- the gain of the device 100 may be very accurately set through proper selection of the resistance values for the resistors R 1 and R 3 .
- FIG. 4 wherein there is shown a schematic diagram of a sourcing current, bipolar transistor, embodiment of a current sense amplifier 100 ′ in accordance with the present invention. Like or similar components in amplifier 100 ′ have the same reference numbers as for the amplifier 100 of FIG. 3. Noted differences between the circuits of FIGS. 4 and 3 include, with respect to the amplifier 100 ′:
- FIG. 5 a schematic diagram of a sinking current, MOS transistor, embodiment of a current sense amplifier 200 in accordance with the present invention.
- a current (referred to as I load ) to be sensed flows through a sense resistor (R sense ) from a first sensing node (R s+ ) to a second sensing node (R s ⁇ ).
- the first sensing node (R s+ ) is connected to a first input (+) of an operational amplifier 202 through a resistor R 1 .
- the second sensing node (R s ⁇ ) is connected to a second input ( ⁇ ) of the operational amplifier 202 through a resistor R 2 .
- the amplifier 202 is accordingly configured to operate in differential mode.
- the output of the operational amplifier 202 is connected to the commonly connected gates of a pair of matched NMOS transistors 204 a and 204 b having a 1:n gain ratio.
- the sources of transistors 204 a and 204 b are connected to each other and to ground.
- the operational amplifier 202 and first transistor 204 a form a basic transconductance amplifier 205 .
- the pair of transistors 204 a and 204 b form a current mirror circuit 206 .
- the output of the operational amplifier 202 is used to drive the gate current (I b ) of the current mirror 206 .
- V bias A voltage bias signal (V bias ) is applied to the commonly connected bases of another pair of matched NMOS transistors 208 a and 208 b that also have a 1:n gain ratio. These matched transistors 208 a and 208 b form a cascode circuit 210 .
- the value for the signal V bias is preferably set at about ground plus two times the base-emitter voltage of the transistors 208 and may provided by connecting two serially connected (matched) NMOS transistors 114 in diode configuration between V bias and ground, with the bias currrent for these transistors provided from a current source (I bias ).
- the transistors of the cascode circuit 210 and the transistors of the current mirror circuit 206 are connected in serial fashion to boost the output impedance of the amplifier 200 (at output 212 ). More specifically, the source of the first transistor 208 a of the cascode circuit 210 is connected to the drain of the first transistor 204 a of the current mirror circuit 206 . Similarly, the source of the second transistor 208 b of the cascode circuit 210 is connected to the drain of the second transistor 204 b of the current mirror circuit 206 . The first input (+) of the operational amplifier is connected to the drain of the first transistor 208 a of the cascode circuit 210 . A current (referred to as I ref ) flows through the connection between the first input (+) and the drain of the first transistor 208 a .
- I ref A current flows through the connection between the first input (+) and the drain of the first transistor 208 a .
- Vcc is connected to the drain of the second transistor 208 b through a load resistor R 3 (at output 212 ) for the generation of an output current (referred to as I out )
- the components of the current sense amplifier 200 may be discretely assembled, but are preferably implemented on a monolithic integrated circuit chip 216 (perhaps with other components—not explicitly shown—performing other functions).
- the transistors 204 and 208 can operate in the triode region to allow the circuit 200 to provide a wide output voltage range from Vcc to near ground. Furthermore, the circuit 200 is capable of operation at a relatively low Vcc at about 2.0V.
- the current in the drain of transistor 208 a i.e., the current I ref ) is:
- I ref I load ( R sense /R 1)
- I out n ⁇ I ref ;
- I out n ⁇ I load ⁇ ( R sense /R 1)
- the gain of the device 200 may be very accurately set through proper selection of the resistance values for the resistors R 1 and R 3 .
- FIG. 6 wherein there is shown a schematic diagram of a sourcing current, MOS transistor, embodiment of a current sense amplifier 200 ′ in accordance with the present invention. Like or similar components in amplifier 200 ′ have the same reference numbers as for the amplifier 200 of FIG. 5. Noted differences between the circuits of FIGS. 6 and 5 include, with respect to the amplifier 200 ′:
- FIG. 7 a graph illustrating a comparison in the DC operating characteristics between the amplifiers of FIGS. 1 and 3.
- the x-axis plots the sensed current (I load ) while the y-axis plots the ratio of the output current (I out ) to the reference current I ref (which in the ideal case is the gain/amplification value n of the current sense amplifier).
- I load the sensed current
- I ref the reference current
- n 20;
- Curve 300 provides the DC characteristics of the amplifier 10 of FIG. 1 with Vcc set at 5V
- curve 302 provides the DC characteristics of the amplifier 10 of FIG. 1 with Vcc set at 2V.
- the curves 300 and 302 Two important things are noticed with respect to the curves 300 and 302 .
- the curves 300 and 302 while having substantially the same shape, have different magnitudes resulting from a change in the value of Vcc. Operation of the amplifier 10 is accordingly not operationally stable with respect to changes in operating voltage.
- the similar shape of the curves is noticeably sloped with an increase in the measured ratio of the output current (I out ) to the reference current I ref experienced as the sensed current (I load ) increases.
- the gain of the amplifier changes with changes in the measured load current. It was noted above that a concern with the operation of the amplifier 10 of FIG. 1 was that the actual output current and the current n.I ref differ from each other by a factor on the order of: ( n - 1 n - 1 ) / ⁇ .
- Curve 304 provides the DC characteristics of the amplifier 100 of FIG. 3 with Vcc set at either 2V or 5V. In comparison to the curves 300 and 302 , what is significantly noted about curve 304 is that it is not only identical for both 2V and 5V operation, but it is also substantially constant (no slope) with respect to changes in the measured load current. The amplifier 100 of FIG. 3 accordingly provides for substantially improved performance over the prior art circuit and is well suited to use in generating a precision current amplifier output. Curve 304 is also representative of the operation of amplifiers 100 ′, 200 and 200 ′ illustrated in FIGS. 4, 5 and 6 , respectively.
- the amplifier of the present invention provides a circuit having: a simple configuration, good power supply rejection ratio, accurate current gain setting through resistor ratio; a large amplification factor (for example, at or exceeding twenty); a wide range of output voltage; and support of low Vcc values.
Abstract
Description
- 1. Technical Field of the Invention
- The present invention relates to the field of current sense amplifiers.
- 2. Description of Related Art
- Current sense amplifiers are typically used to measure the amount of current supplied by and to a device or component in various types of electronic equipment. Reference is now made to FIG. 1 wherein there is shown a schematic diagram of a typical implementation for a
current sense amplifier 10. A current (referred to as Iload) to be sensed flows through a sense resistor (Rsense) from a first sensing node (Rs+) to a second sensing node (R−). The first sensing node (Rs+) is connected to a first input (+) of anoperational amplifier 12 through a resistor R1. The second sensing node (Rs−) is connected to a second input (−) of theoperational amplifier 12 through a resistor R2. The output of theoperational amplifier 12 is connected to the base of atransistor 14 whose collector is connected to the first input (+). A current (referred to as Iref) flows through the connection between the first input (+) and the collector of thetransistor 14. An emitter of thetransmitter 14, generates an input current (referred to as Iin) and, is connected to an input of a 1:ncurrent mirror 16. Vcc is connected to an output of thecurrent mirror 16 through a load resistor R3 for the generation of an output current (referred to as Iout). - The second input (−) of the
operational amplifier 12 presents a relatively high impedance. Neglecting the presence of any input bias current at the second input (−), it is recognized that no current flows through the second resistor R2 from the second sensing node (Rs−). The voltage at both the first input (+) and second input (−) is therefore equal to the voltage at the second sensing node (Rs−). The voltage drop across the resistor R1 is accordingly equal to the product of Iload and Rsense, The input current Iin thus equals the current Iref, and ideally then: - I ref =I load·(R sense /R1); and (1)
- I out =n·I in; and (2)
- I out =n·I load·(R sense /R1) (3)
- In practice, however, the value of base current at the
transistor 14 cannot be neglected as it is also multiplied by a factor of n in thecurrent mirror 16 and alters the value of the output current Iout (of Equation 3) away from ideal. Still further, it is recognized that acurrent mirror 16 possessing a large factor (for example, n equals approximately twenty for a Wilson current mirror) is not particularly accurate. The value of the input current is actually set as follows: - I in =I ref·(1+1/β) (4)
- wherein: β is the current gain of the
transistor 14. - Reference is now made to FIG. 2 wherein there is shown a schematic diagram of the 1:n
current mirror 16. This current mirror has a conventional configuration that is well known to those skilled in the art. A detailed description of the components, interconnection and operation of thecurrent mirror 16 is accordingly not required. Continuing with the foregoing analysis, and specifically with respect to thecurrent mirror 16, the relationship between the input current Iin and the output current Iout is given by the following: - wherein: β is the current gain of the matched transistors within the
current mirror 16. -
-
- Now, from a comparison of the foregoing Equations, it is recognized that the actual output current (see, Equation 7) of the
current mirror 16 and the current n·Iref that should preferably (and ideally) be output from the current mirror approximately differ from each other by a factor (shown inside the parenthetical of Equation 7) on the order of: - Given a scenario where n is relatively large (for example, greater than or about ten) and β is relatively small (for example, less than or about sixty), this factor can present a significant difference in measured current. In this configuration, the current sense amplifier circuit of FIG. 1 cannot be used for generating a precision current amplifier output.
- A transconductance amplifier measures a current passing through a sense resistor to generate a reference current indicative of the measured current. A current mirror circuit connected to the transconductance amplifier amplifies the reference current to generate an amplified output current. A cascode circuit is connected between the current mirror circuit and output of the generated amplified output current.
- A more complete understanding of the method and apparatus of the present invention may be acquired by reference to the following Detailed Description when taken in conjunction with the accompanying Drawings wherein:
- FIG. 1, previously described, is a schematic diagram of a typical implementation for a current sense amplifier;
- FIG. 2, previously described, is a schematic diagram of a conventional current mirror for use in the amplifier circuit of FIG. 1;
- FIG. 3 is a schematic diagram of a sinking current, bipolar transistor, embodiment of a current sense amplifier in accordance with the present invention;
- FIG. 4 is a schematic diagram of a sourcing current, bipolar transistor, embodiment of a current sense amplifier in accordance with the present invention;
- FIG. 5 is a schematic diagram of a sinking current, MOS transistor, embodiment of a current sense amplifier in accordance with the present invention; and
- FIG. 6 is a schematic diagram of a sourcing current, MOS transistor, embodiment of a current sense amplifier in accordance with the present invention; and
- FIG. 7 is a graph illustrating a comparison in the DC operating characteristics between the amplifiers of FIGS. 1 and 3.
- Reference is now made to FIG. 3 wherein there is shown a schematic diagram of a sinking current, bipolar transistor, embodiment of a
current sense amplifier 100 in accordance with the present invention. A current (referred to as Iload) to be sensed flows through a sense resistor (Rsense) from a first sensing node (Rs+) to a second sensing node (Rs−). The first sensing node (Rs+) is connected to a first input (+) of anoperational amplifier 102 through a resistor R1. The second sensing node (Rs−) is connected to a second input (−) of theoperational amplifier 102 through a resistor R2. Theamplifier 102 is accordingly set to operate in differential mode. The output of theoperational amplifier 102 is connected to the commonly connected bases of a pair of matchedNPN transistors transistors operational amplifier 102 andfirst transistor 104 a form abasic transconductance amplifier 105. The pair oftransistors current mirror circuit 106. Importantly, the output of theoperational amplifier 102 is used to drive the base current (Ib) of thecurrent mirror 106. A voltage bias signal (Vbias) is applied to the commonly connected bases of another pair of matchedNPN transistors transistors cascode circuit 110. The value for the signal Vbias is preferably set at about ground plus two times the base-emitter voltage of the transistors 108 and may provided by connecting two serially connected (matched)NPN transistors 114 in diode configuration between Vbias and ground, with the bias currrent for these transistors provided from a current source (Ibias). The transistors of thecascode circuit 110 and the transistors of thecurrent mirror circuit 106 are connected in serial fashion to effectively boost the output impedance of the amplifier 100 (at output 112). More specifically, the emitter of thefirst transistor 108 a of thecascode circuit 110 is connected to the collector of thefirst transistor 104 a of thecurrent mirror circuit 106. Similarly, the emitter of thesecond transistor 108 b of thecascode circuit 110 is connected to the collector of thesecond transistor 104 b of thecurrent mirror circuit 106. The first input (+) of the operational amplifier is connected to the collector of thefirst transistor 108 a of thecascode circuit 110. A current (referred to as Iref) flows through the connection between the first input (+) and the collector of thefirst transistor 108 a. Vcc is connected to the collector of thesecond transistor 108 b through a load resistor R3 (at output 112) for the generation of an output current (referred to as Iout) The components of thecurrent sense amplifier 100 may be discretely assembled, but are preferably implemented on an monolithic integrated circuit chip 116 (perhaps with other components—not explicitly shown—performing other functions). - In operation, the transistors104 and 108 can operate in the saturation region to allow the
circuit 100 to provide a wide output voltage range from Vcc to near ground. Furthermore, thecircuit 100 is capable of operation at a relatively low Vcc of about 2.0V. The current in the collector oftransistor 108 a (i.e., the current Iref) is: - I ref =I load·(R sense /R1)
- The current in the collector of the
transistor 108 b (i.e., the current Iout) is accordingly: - I out =n·I ref; or
- I out=n·Iload·(R sense /R1)
- if one neglects the affects of the input bias current to the
operational amplifier 102. In this circuit configuration, one can ignore the effect of the base current for transistors 104 of thecurrent mirror 106 because the base current is provided by the output of operational amplifier 102 (as opposed to being self-generated as with the current mirror (FIG. 2)_of the prior art circuit (FIG. 1)). Thus, the collector current for thetransistor 104 b and the emitter current for thetransistor 108 b are very accurately set and given by the following: - I c(104 b)=n·I c(104a); and
- I e(108 b)=n·I e(108a).
-
- Accordingly, the gain of the
device 100 may be very accurately set through proper selection of the resistance values for the resistors R1 and R3. - Reference is now made to FIG. 4 wherein there is shown a schematic diagram of a sourcing current, bipolar transistor, embodiment of a
current sense amplifier 100′ in accordance with the present invention. Like or similar components inamplifier 100′ have the same reference numbers as for theamplifier 100 of FIG. 3. Noted differences between the circuits of FIGS. 4 and 3 include, with respect to theamplifier 100′: - (a) having the matched transistors comprise PNP bipolar transistors;
- (b) having the first sensing node (Rs+) be connected to the second input (−) of the
operational amplifier 102 through the resistor R1, and having the second sensing node (Rs−) be connected to the first input (+) of theoperational amplifier 102 through the resistor R2; - (c) having Vcc be connected to both emitters of the
transistors - (d) having ground be connected through resistor R3 and
output 112 to the collector oftransistor 108 b. Operation of theamplifier 100′ is substantially similar to that described above with respect to theamplifier 100 of FIG. 3. In view of the foregoing, additional detailed description of FIG. 4 beyond what has been provided in connection with FIG. 3 is not deemed necessary. - Reference is now made to FIG. 5 wherein there is shown a schematic diagram of a sinking current, MOS transistor, embodiment of a
current sense amplifier 200 in accordance with the present invention. A current (referred to as Iload) to be sensed flows through a sense resistor (Rsense) from a first sensing node (Rs+) to a second sensing node (Rs−). The first sensing node (Rs+) is connected to a first input (+) of anoperational amplifier 202 through a resistor R1. The second sensing node (Rs−) is connected to a second input (−) of theoperational amplifier 202 through a resistor R2. Theamplifier 202 is accordingly configured to operate in differential mode. The output of theoperational amplifier 202 is connected to the commonly connected gates of a pair of matchedNMOS transistors transistors operational amplifier 202 andfirst transistor 204 a form abasic transconductance amplifier 205. The pair oftransistors current mirror circuit 206. Importantly, the output of theoperational amplifier 202 is used to drive the gate current (Ib) of thecurrent mirror 206. A voltage bias signal (Vbias) is applied to the commonly connected bases of another pair of matchedNMOS transistors transistors cascode circuit 210. The value for the signal Vbias is preferably set at about ground plus two times the base-emitter voltage of the transistors 208 and may provided by connecting two serially connected (matched)NMOS transistors 114 in diode configuration between Vbias and ground, with the bias currrent for these transistors provided from a current source (Ibias). The transistors of thecascode circuit 210 and the transistors of thecurrent mirror circuit 206 are connected in serial fashion to boost the output impedance of the amplifier 200 (at output 212). More specifically, the source of thefirst transistor 208 a of thecascode circuit 210 is connected to the drain of thefirst transistor 204 a of thecurrent mirror circuit 206. Similarly, the source of thesecond transistor 208 b of thecascode circuit 210 is connected to the drain of thesecond transistor 204 b of thecurrent mirror circuit 206. The first input (+) of the operational amplifier is connected to the drain of thefirst transistor 208 a of thecascode circuit 210. A current (referred to as Iref) flows through the connection between the first input (+) and the drain of thefirst transistor 208 a. Vcc is connected to the drain of thesecond transistor 208 b through a load resistor R3 (at output 212) for the generation of an output current (referred to as Iout) The components of thecurrent sense amplifier 200 may be discretely assembled, but are preferably implemented on a monolithic integrated circuit chip 216 (perhaps with other components—not explicitly shown—performing other functions). - In operation, the transistors204 and 208 can operate in the triode region to allow the
circuit 200 to provide a wide output voltage range from Vcc to near ground. Furthermore, thecircuit 200 is capable of operation at a relatively low Vcc at about 2.0V. The current in the drain oftransistor 208 a (i.e., the current Iref) is: - I ref =I load(R sense /R1)
- The current in the drain of the
transistor 208 b (i.e., the current Iout) is accordingly: - I out =n·I ref; or
- I out =n·I load·(R sense /R1),
- if one neglects the affects of the input bias current to the
operational amplifier 202. The effect of the gate current fortransistor 204 a of thecurrent mirror 206 can be ignored here for the same reasons as recited above with respect to the base current in thecurrent mirror 106 of FIGS. 3 and 4. The gain (G) of thedevice 200 is given by: - Accordingly, the gain of the
device 200 may be very accurately set through proper selection of the resistance values for the resistors R1 and R3. - Reference is now made to FIG. 6 wherein there is shown a schematic diagram of a sourcing current, MOS transistor, embodiment of a
current sense amplifier 200′ in accordance with the present invention. Like or similar components inamplifier 200′ have the same reference numbers as for theamplifier 200 of FIG. 5. Noted differences between the circuits of FIGS. 6 and 5 include, with respect to theamplifier 200′: - (a) having the matched transistors comprise PMOS transistors;
- (b) having the first sensing node (Rs+) be connected to the second input (−) of the
operational amplifier 202 through the resistor R1, and having the second sensing node (Rs−) be connected to the first input (+) of theoperational amplifier 202 through the resistor R2; - (c) having Vcc be connected to both sources of the
transistors - (d) having ground be connected through resistor R3 and output 212 to the drain of
transistor 208 b. - Operation of the
amplifier 200′ is substantially similar to that described above with respect to theamplifier 200 of FIG. 5. In view of the foregoing, additional detailed description of FIG. 6 beyond what has been provided in connection with FIG. 5 is not deemed necessary. - Reference is now made to FIG. 7 wherein there is shown a graph illustrating a comparison in the DC operating characteristics between the amplifiers of FIGS. 1 and 3. The x-axis plots the sensed current (Iload) while the y-axis plots the ratio of the output current (Iout) to the reference current Iref (which in the ideal case is the gain/amplification value n of the current sense amplifier). For each plotted curve shown in FIG. 7, some assumptions are made with respect to the configuration of the
amplifiers - Rsense=10 mΩ;
- R1=R2=R3=2kΩ;
- n=20;
- I bias=40 uA; and
- β=60.
-
Curve 300 provides the DC characteristics of theamplifier 10 of FIG. 1 with Vcc set at 5V, andcurve 302 provides the DC characteristics of theamplifier 10 of FIG. 1 with Vcc set at 2V. Two important things are noticed with respect to thecurves curves amplifier 10 is accordingly not operationally stable with respect to changes in operating voltage. Second, the similar shape of the curves is noticeably sloped with an increase in the measured ratio of the output current (Iout) to the reference current Iref experienced as the sensed current (Iload) increases. Put another way, the gain of the amplifier changes with changes in the measured load current. It was noted above that a concern with the operation of theamplifier 10 of FIG. 1 was that the actual output current and the current n.Iref differ from each other by a factor on the order of: - This difference is illustrated by the slope of the
curves -
Curve 304, on the other hand, provides the DC characteristics of theamplifier 100 of FIG. 3 with Vcc set at either 2V or 5V. In comparison to thecurves curve 304 is that it is not only identical for both 2V and 5V operation, but it is also substantially constant (no slope) with respect to changes in the measured load current. Theamplifier 100 of FIG. 3 accordingly provides for substantially improved performance over the prior art circuit and is well suited to use in generating a precision current amplifier output.Curve 304 is also representative of the operation ofamplifiers 100′, 200 and 200′ illustrated in FIGS. 4, 5 and 6, respectively. - It is accordingly suggested that the amplifier of the present invention provides a circuit having: a simple configuration, good power supply rejection ratio, accurate current gain setting through resistor ratio; a large amplification factor (for example, at or exceeding twenty); a wide range of output voltage; and support of low Vcc values.
- Although preferred embodiments of the method and apparatus of the present invention have been illustrated in the accompanying Drawings and described in the foregoing Detailed Description, it will be understood that the invention is not limited to the embodiments disclosed, but is capable of numerous rearrangements, modifications and substitutions without departing from the spirit of the invention as set forth and defined by the following claims.
Claims (28)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
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CN01116261.9A CN1252480C (en) | 2001-04-05 | 2001-04-05 | Amplifier circuit for low voltage current detection |
CN01116261A | 2001-04-05 | ||
CN01116261.9 | 2001-04-05 |
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US20020180489A1 true US20020180489A1 (en) | 2002-12-05 |
US6492845B1 US6492845B1 (en) | 2002-12-10 |
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US10/034,393 Expired - Lifetime US6492845B1 (en) | 2001-04-05 | 2001-12-27 | Low voltage current sense amplifier circuit |
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CN (1) | CN1252480C (en) |
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WO2007023403A2 (en) * | 2005-08-24 | 2007-03-01 | Nxp B.V. | Linear transconductor for a one-cycle controller, notably for a dc-dc switching converter |
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US20090039704A1 (en) * | 2007-08-10 | 2009-02-12 | Chen Isaac Y | Simple circuit and method for improving current balance accuracy of a power converter system |
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Also Published As
Publication number | Publication date |
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CN1378086A (en) | 2002-11-06 |
CN1252480C (en) | 2006-04-19 |
US6492845B1 (en) | 2002-12-10 |
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