US20020179585A1 - Temperature-controlled chuck and method for controlling the temperature of a substantially flat object - Google Patents
Temperature-controlled chuck and method for controlling the temperature of a substantially flat object Download PDFInfo
- Publication number
- US20020179585A1 US20020179585A1 US09/871,854 US87185401A US2002179585A1 US 20020179585 A1 US20020179585 A1 US 20020179585A1 US 87185401 A US87185401 A US 87185401A US 2002179585 A1 US2002179585 A1 US 2002179585A1
- Authority
- US
- United States
- Prior art keywords
- temperature
- wafer
- elements
- backside
- chuck
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67103—Apparatus for thermal treatment mainly by conduction
Definitions
- the present invention generally relates to controlling the temperature of partial areas of a substantially flat object. More particularly, the present invention relates to a temperature-controlled chuck to hold a substantially flat object. With such a temperature-controlled chuck the temperature distribution of the substantially flat object can be sensed or measured, and due to temperature influencing elements the temperature of partial areas of said object's back side can be altered to obtain a more uniform temperature distribution. Furthermore, the present invention relates also to a temperature-controlled wafer chuck and a method for controlling the temperature of a substantially flat object such as a wafer.
- the invention relates also to a pre-align station of an exposure tool for wafers comprising a temperature-controlled wafer chuck, and relates to an exposure wafer chuck in an exposure tool for wafers comprising a wafer chuck with which the temperature of a wafer can be measured and influenced as desired.
- Integrated circuits are typically constructed by depositing a series of individual layers of predetermined materials on a wafer-shaped semi-conductor substrate, or “wafer”.
- the individual layers of the integrated circuit are in turn produced by a series of manufacturing steps. For example, in forming an individual circuit layer on a wafer containing a previously formed circuit layer, an oxide such as silicon dioxide is deposited over the previously formed circuit layer to provide an insulating layer for the circuit. A pattern for the next circuit layer is then formed on the wafer using a radiation alterable material, known as photoresist.
- Photoresist materials are generally composed of a mixture of organic resins, sensitizers and solvents.
- Sensitizers are compounds such as diazonaphthaquinones, that under go a chemical change upon exposure to radiant energy, such as visible and ultraviolet light.
- the irradiated sensitizer material has different solution characteristics with respect to various solvents than the non-irradiated material allowing for selective removal of the photoresist.
- Resins are used to provide mechanical strength to the photoresist and the solvents serve to lower the viscosity of the photoresist so that it can be uniformly applied to the surface of the wafers.
- a photoresist layer is applied to the wafer surface, the solvents are evaporated and the photoresist layer is hardened, usually by heat treating the wafer.
- the photoresist layer is then selectively irradiated through the use of a radiation opaque mask.
- the mask contains transparent portions that define the pattern for the next circuit layer.
- the mask is placed over the photoresist layer and the photoresist covered by the transparent portion is irradiated.
- the wafer is removed and the photoresist layer is exposed to a process liquid, known as developer.
- the developer selectively solubilizes and removes either the irradiated or the nonirradiated photoresist exposing portions of the underlying insulating layer.
- the exposed portions of the insulating layer can be selectively removed using an etchant to expose corresponding sections of the underlying circuit layer.
- the photoresist should be more resistant to the etchant than the insulating layer to limit the attack of the etchant to only the exposed portions of the insulating layer.
- the exposed underlying layer(s) can be implanted with ions which do not penetrate the photoresist layer thereby selectively penetrating only those portions of the underlying layer not covered by the photoresist.
- the remaining photoresist is then stripped using either a solvent, or a strong oxidizer in the form of a liquid or a gas in the plasma state.
- the next layer is then deposited and the process is repeated until fabrication of the semiconductor device is complete.
- Thermal gradients in wafers during lithography exposure create linear pattern transfer effects due to expansion or contraction. Wafers can have temperature instability due to previous processing from a photoresist track hot plate. If this bake is non-uniform or the cooling prior to wafer transfer into the exposure tool is not complete, non-linear effects will occur. During the transfer from the track to the exposure tool there may not be adequate time for the wafer to thermally stabilize prior to exposure. This effect causes pattern transfer errors, seen as overlay or grid distortion and chip magnification errors. Other sources of non-linear errors can occur outside of lithography processing. These sources include rapid thermal processing such as anneal (RTA), film deposition processing (such as diffusion or chemical vapor deposition-CVD), and chemical mechanical polishing (CMP). These non-linear errors are variable across the wafer and are difficult to correct when severe.
- RTA anneal
- CVD chemical vapor deposition-CVD
- CMP chemical mechanical polishing
- a temperature difference as small as 0.1° C. can affect overlay. Wafers can only equilibrate through conduction with the exposure tool environment or contact with non-temperature regulated surfaces, so-called chucks.
- chucks There are defects during lithography processing known as “banana effect” problems due to wafer contact non-uniformity on the track hotplate that cause significant temperature gradients over the wafer that result in overlay issues in these areas. Banana effect non-linear errors typically occur on the edge regions of the wafer in a semicircle pattern that resembles a banana shape. The magnitude of these non-linear errors varies significantly across the effected region, and therefore are difficult to correct using normal lithography processing.
- the above objects and others are accomplished by a temperature-controlled chuck and a method for controlling the temperature of a substantially flat object such as a semiconductor wafer, in accordance with the present invention.
- the temperature-controlled chuck according to the invention comprises a chuck body having an object support side and a back side, said object support side holding a substantially flat object having a front side and a back side on said back side of said object.
- a plurality of temperature sensing elements is distributed on said object support side to measure the temperature distribution of said object.
- a plurality of individual temperature influencing elements is distributed on said object support side to face said back side of said flat object, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said object's back side as desired.
- a temperature-controlled chuck provides the possibility to influence the temperature of a wafer, particularly the back side of a wafer, in a partial area in a manner as desired.
- the temperature can be varied precisely in tenths of a degree centigrade and be controlled overall to ⁇ 1° C. Hence, a good temperature uniformity across the whole wafer would be provided. It is also possible to provide local modification to correct process distortions on a wafer. If, for example, the temperature in partial areas of the wafer can be precisely controlled, then it is also possible to use a variation of the chuck temperature to adjust for chip magnification error, instead of changing lens, housing pressure or having an extra field lens for magnification adjustment.
- a preferred embodiment of an inventive temperature-controlled chuck comprises a plurality of piezoelectric elements, each piezoelectric element being individually controllable, such that each piezoelectric element is able to influence a localized area or a partial area of the object's back side. Due to a variation of the current and/or the voltage applied to the piezoelectric elements, the temperature of the object's back side can be controlled in a desired manner.
- a further embodiment of an inventive temperature-controlled chuck comprises the above-mentioned temperature influencing piezoelectric elements. At least some of these piezoelectric elements are arranged such that they are able to contact the back side of a flat object such as a wafer. Due to the contact of the piezoelectric elements with said back side of said flat object, influencing of the temperature of the back side of said flat object is improved.
- a plurality of support pin elements are distributed on said object support side and arranged to contact said back side of said flat object.
- the wafer is held on the support pin elements and piezoelectric elements also distributed between the support pin elements serve to measure or sense the temperature and serve to influence the temperature in a desired manner.
- Another embodiment of the invention comprises individual fiber optics being illuminated with infrared radiation to influence the temperature of localized areas of the object's back side.
- the tops of these temperature influencing fiber optics are arranged such that they are spaced from the object's back side.
- a further preferred embodiment of the invention comprises a plurality of fiber optics illuminated with infrared radiation and a plurality of piezoelectric elements as temperature influencing elements. Due to the combination of fiber optics and piezoelectric elements a better temperature distribution of the object's back side and a better influence of the temperature distribution can be achieved.
- An alternative embodiment of the invention comprises also heat sink pins and heating elements as temperature influencing elements. Hence, in such an embodiment localized areas of the object's back side can not only be heated but also be cooled.
- Another embodiment of the invention comprises a temperature controller connected to that plurality of individual temperature influencing elements to control the temperature distribution of said flat object in a desired manner.
- a preferred embodiment of the invention refers to a temperature-controlled wafer chuck comprising a chuck body having a wafer support side and a back side opposing said wafer support side, said wafer support side being adapted to hold a wafer having a front side and a back side on the object's back side.
- a plurality of temperature sensing elements is distributed on said wafer support side, each of said temperature sensing elements being arranged to sense the temperature of a partial area of said wafer back side.
- a plurality of individual temperature influencing elements is distributed on said wafer support surface, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said wafer back side.
- a temperature controller is connected to said plurality of temperature sensing elements and said plurality of individual temperature influencing elements to control and/or regulate the temperature distribution of said flat object in a desired manner.
- a preferred embodiment of such a temperature-controlled wafer chuck comprises a temperature controller including at least one temperature detector and a control unit connected with said at least one temperature detector and controlling said temperature influencing elements.
- a preferred inventive method for controlling the temperature of a substantially flat object having a front side and a back side and being supported on said back side comprises the method steps of sensing the temperature of partial areas of the back side of said flat object, determining the object's temperature distribution on the basis of the temperatures measured in said temperature sensing step, and changing the temperature in at least some of said partial areas of said back side of said flat object in a desired manner.
- the method is particularly for controlling the temperature of a wafer held on a wafer chuck.
- the temperature of a partial area of said flat object is measured by a temperature sensing element of a plurality of temperature sensing elements distributed over the back side of said flat object.
- these temperature sensing elements consist of a piezoelectric element.
- the temperature of a partial area of said flat object is influenced by a temperature influencing element of a plurality of temperature influencing elements distributed over the back side of said flat object.
- each temperature influencing element is an IR-optical fiber.
- each temperature influencing element is a heat sink pin.
- a piezoelectric element is used as a temperature influencing element.
- Another embodiment of the inventive method includes IR-optical fibers and piezoelectric elements and heat sink pins as temperature influencing elements.
- a preferred embodiment of a pre-align station of an exposure tool for wafers comprises:
- a chuck body having a wafer support side and a back side opposing said wafer support side, said wafer support side being adapted to hold a wafer having a front side and a back side on the object's back side.
- a plurality of temperature sensing elements is distributed on said wafer support side, each of said temperature sensing elements being arranged to sense the temperature of a partial area of said wafer back side.
- a plurality of individual temperature influencing elements is distributed on said wafer support surface, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said wafer back side.
- a temperature controller is connected to said plurality of temperature sensing elements and said plurality of individual temperature influencing elements to control the temperature distribution of said flat object as desired.
- a preferred embodiment of an exposure chuck in an exposure tool for wafers comprises
- a chuck body having a wafer support side and a back side opposing said wafer support side, said wafer support side being adapted to hold a wafer having a front side and a back side on the object's back side.
- a plurality of temperature sensing elements is distributed on said wafer support side, each of said temperature sensing elements being arranged to sense the temperature of a partial area of said wafer back side.
- a plurality of individual temperature influencing elements is distributed on said wafer support surface, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said wafer back side.
- a temperature controller is connected to said plurality of temperature sensing elements and said plurality of individual temperature influencing elements to control the temperature distribution of said flat object as desired.
- FIG. 1 is a schematic side view of a wafer chuck according to a first embodiment of the present invention
- FIG. 2 is a schematic top plan view of the wafer chuck in FIG. 1 showing the distribution of piezoelectric elements and IR-fiber optics;
- FIG. 3 is a schematic side view of a second embodiment of a wafer chuck according to the present invention.
- FIG. 4 is a schematic top plan view of the second embodiment of the wafer chuck of FIG. 3;
- FIG. 5 is a schematic side view of a third embodiment of a wafer chuck according to the invention.
- FIG. 6 is a schematic top plan view of the third embodiment of the wafer chuck according to the invention.
- FIG. 7 is a schematic side view of a fourth embodiment of the wafer chuck according to the invention.
- FIG. 8 is a schematic top plan view of the fourth embodiment of the wafer chuck of FIG. 7;
- FIG. 9 is a schematic top plan view of the back side of a wafer having a localized area with a localized area having a temperature lower than the average temperature of the wafer's back side;
- FIG. 10 is a schematic flow diagram of a preferred embodiment of the method according to the invention.
- the present invention provides an improved wafer chuck, especially an improved lithography wafer chuck, that is especially useful for holding small as well as large wafers, such as having a diameter of, for example, 300 mm.
- FIG. 1 illustrates simplified a side view of a wafer chuck body 20 having a wafer support side 21 and a back side 22 opposing said wafer support side.
- a wafer support side 21 On the wafer support side 21 a plurality of piezoelectric pin elements 4 are distributed. These piezoelectric pins 4 have a top surface 5 arranged to support a back side 3 of a wafer 1 .
- the wafer 1 has also a front side 2 opposing the wafer's back side 3 , which will be exposed in an exposure tool.
- Each piezoelectric pin 4 projects from the wafer support side 21 of the wafer chuck body 20 and are evenly distributed on the wafer support side 21 , as illustrated in FIG. 2. If preferred, the piezoelectric elements 4 can also be unevenly distributed. Between the piezoelectric elements IR-fiber optics 6 are arranged. These fiber optics 6 project from the wafer support side 21 of the chuck body 20 , but the tops of these fiber optics are not as high as the tops of the piezoelectric elements 4 . Hence, the tops of the fiber optics 6 do not contact the wafer's back side 3 . As shown in FIG. 1, a temperature controller 30 is connected with each piezoelectric element 4 and each IR-fiber optic 6 via a lead 31 .
- FIG. 2 a partial area of the wafer chuck body 20 is shown in a top plan view.
- FIGS. 1 and 2 The operation of a wafer chuck shown in FIGS. 1 and 2 is as follows:
- a wafer 1 is laid down on the top surface 5 of the piezoelectric pins 4 such that the wafer 1 lies on the top surface 5 of the piezoelectric pins 4 with the wafer's back side 3 .
- a ⁇ V (voltage difference) of each piezoelectric pin 4 a ⁇ T on the wafer's back side is measured.
- the temperature distribution on the wafer's back side 3 is available.
- the temperature is now adjusted by using the IR-fiber optics 6 .
- each IR-fiber optic such that the temperature of a partial area of the wafer's back side 3 can be influenced in a desired manner, that means here the temperature can be increased.
- the temperature increase of the partial area accompanying a fiber optic 6 can be achieved by varying the pulse and intensity of the IR radiation.
- the wafer distribution is measured by the piezoelectric elements 4 .
- one or more fiber optics 6 are activated as necessary to achieve a temperature distribution within a desired temperature range, for example, 0.1° C.
- FIGS. 3 and 4 The second embodiment of the wafer chuck according to the invention is shown in FIGS. 3 and 4.
- the IR-fiber optics 8 are arranged in the center of the piezoelectric pins 4 .
- the distribution of the piezoelectric pins 4 and the centered IR-fiber optics 8 is illustrated in FIG. 4. With such an arrangement a higher density of piezoelectric elements and temperature influencing fiber optics 8 is achievable. Hence, the temperature distribution of the wafer's back side 3 can be measured in a higher number of partial areas of the wafer's back side 3 .
- FIGS. 5 and 6 A third embodiment of the wafer chuck according to the invention is shown in FIGS. 5 and 6. Contrary to the second embodiment shown in FIGS. 3 and 4, here heat sink pins 9 are distributed between the piezoelectric pins 4 having in the center a fiber optic 8 . Again, the distribution of these elements mentioned above is shown in FIG. 6 in a schematic manner.
- the temperature of a partial area of the wafer's back side 3 can be influenced such that the temperature can be increased or decreased.
- the temperature of a partial area of the wafer's back side 3 can now be increased or decreased by activating one or more fiber optic elements 8 and heat sink pins 9 , respectively.
- a temperature controller is arranged to control the heat sink pins 9 , the IR-fiber optic elements 8 and the piezoelectric elements 4 .
- top surfaces 10 of the heat sink pins 9 do not contact the wafer's back side 3 . If desired, it is also possible that these surfaces 10 contact the wafer's back side 3 to carry off heat from the wafer's back side 3 .
- the fiber optics 8 are not arranged in the center of the piezoelectric elements 4 , but are separate elements. All other features are similar to the embodiments shown in FIGS. 5 and 6.
- FIG. 8 the distribution of the piezoelectric elements 4 , the heat sink pins 9 and the IR-fiber optic elements 8 is illustrated schematically.
- a wafer's back side 3 has a localized area 11 with a temperature lower than the average temperature of the wafer 1 , these temperature influencing elements 4 , 8 , 9 facing this localized area 11 of the wafer 1 can be activated such that a more even temperature distribution of the wafer's back side 3 is achievable.
- a method step S 1 the temperature difference AT on the wafer's back side is measured. If necessary, to obtain a more even temperature distribution of the wafer in a method step S 2 the temperature is adjusted by activating one or more IR fiber optics or heat sinks or a combination of IR fiber optics and heat sinks or of piezo electric elements. If ⁇ T is equal or less than ⁇ T max then the wafer is exposed in a method step S 4 . If ⁇ T is greater than ⁇ T max again the temperature difference ⁇ T on the wafer's back side is measured and in a method step S 2 the temperature is adjusted.
- ⁇ T max is about 0.1° C. or within the range of 0.1° C. and 1° C.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Control Of Temperature (AREA)
- Physical Vapour Deposition (AREA)
Abstract
Description
- The present invention generally relates to controlling the temperature of partial areas of a substantially flat object. More particularly, the present invention relates to a temperature-controlled chuck to hold a substantially flat object. With such a temperature-controlled chuck the temperature distribution of the substantially flat object can be sensed or measured, and due to temperature influencing elements the temperature of partial areas of said object's back side can be altered to obtain a more uniform temperature distribution. Furthermore, the present invention relates also to a temperature-controlled wafer chuck and a method for controlling the temperature of a substantially flat object such as a wafer. Finally, the invention relates also to a pre-align station of an exposure tool for wafers comprising a temperature-controlled wafer chuck, and relates to an exposure wafer chuck in an exposure tool for wafers comprising a wafer chuck with which the temperature of a wafer can be measured and influenced as desired.
- Integrated circuits are typically constructed by depositing a series of individual layers of predetermined materials on a wafer-shaped semi-conductor substrate, or “wafer”. The individual layers of the integrated circuit are in turn produced by a series of manufacturing steps. For example, in forming an individual circuit layer on a wafer containing a previously formed circuit layer, an oxide such as silicon dioxide is deposited over the previously formed circuit layer to provide an insulating layer for the circuit. A pattern for the next circuit layer is then formed on the wafer using a radiation alterable material, known as photoresist.
- Photoresist materials are generally composed of a mixture of organic resins, sensitizers and solvents. Sensitizers are compounds such as diazonaphthaquinones, that under go a chemical change upon exposure to radiant energy, such as visible and ultraviolet light. The irradiated sensitizer material has different solution characteristics with respect to various solvents than the non-irradiated material allowing for selective removal of the photoresist. Resins are used to provide mechanical strength to the photoresist and the solvents serve to lower the viscosity of the photoresist so that it can be uniformly applied to the surface of the wafers.
- After a photoresist layer is applied to the wafer surface, the solvents are evaporated and the photoresist layer is hardened, usually by heat treating the wafer. The photoresist layer is then selectively irradiated through the use of a radiation opaque mask. The mask contains transparent portions that define the pattern for the next circuit layer. The mask is placed over the photoresist layer and the photoresist covered by the transparent portion is irradiated. The wafer is removed and the photoresist layer is exposed to a process liquid, known as developer. The developer selectively solubilizes and removes either the irradiated or the nonirradiated photoresist exposing portions of the underlying insulating layer.
- The exposed portions of the insulating layer can be selectively removed using an etchant to expose corresponding sections of the underlying circuit layer. In this process, the photoresist should be more resistant to the etchant than the insulating layer to limit the attack of the etchant to only the exposed portions of the insulating layer. Alternatively, the exposed underlying layer(s) can be implanted with ions which do not penetrate the photoresist layer thereby selectively penetrating only those portions of the underlying layer not covered by the photoresist. The remaining photoresist is then stripped using either a solvent, or a strong oxidizer in the form of a liquid or a gas in the plasma state. The next layer is then deposited and the process is repeated until fabrication of the semiconductor device is complete.
- Thermal gradients in wafers during lithography exposure create linear pattern transfer effects due to expansion or contraction. Wafers can have temperature instability due to previous processing from a photoresist track hot plate. If this bake is non-uniform or the cooling prior to wafer transfer into the exposure tool is not complete, non-linear effects will occur. During the transfer from the track to the exposure tool there may not be adequate time for the wafer to thermally stabilize prior to exposure. This effect causes pattern transfer errors, seen as overlay or grid distortion and chip magnification errors. Other sources of non-linear errors can occur outside of lithography processing. These sources include rapid thermal processing such as anneal (RTA), film deposition processing (such as diffusion or chemical vapor deposition-CVD), and chemical mechanical polishing (CMP). These non-linear errors are variable across the wafer and are difficult to correct when severe.
- A temperature difference as small as 0.1° C. can affect overlay. Wafers can only equilibrate through conduction with the exposure tool environment or contact with non-temperature regulated surfaces, so-called chucks. There are defects during lithography processing known as “banana effect” problems due to wafer contact non-uniformity on the track hotplate that cause significant temperature gradients over the wafer that result in overlay issues in these areas. Banana effect non-linear errors typically occur on the edge regions of the wafer in a semicircle pattern that resembles a banana shape. The magnitude of these non-linear errors varies significantly across the effected region, and therefore are difficult to correct using normal lithography processing.
- Thus, it is apparent that a need exists for an improved chuck to hold a substantially flat object such as a wafer and a method for controlling the temperature of a wafer in a pre-align station or an exposure tool, which overcomes, among other things, the above-discussed problems to produce a more uniform temperature distribution over the surface of the wafer.
- Furthermore, it is an object to provide an improved chuck with which the temperature of localized areas of a generally flat object, particularly a wafer, can be influenced in a desired manner to reduce significant temperature gradients over the wafer or to use defined temperature peaks or temperature depths in localized areas of a wafer to reduce or eliminate distortions of the wafer grid.
- The above objects and others are accomplished by a temperature-controlled chuck and a method for controlling the temperature of a substantially flat object such as a semiconductor wafer, in accordance with the present invention. The temperature-controlled chuck according to the invention comprises a chuck body having an object support side and a back side, said object support side holding a substantially flat object having a front side and a back side on said back side of said object. A plurality of temperature sensing elements is distributed on said object support side to measure the temperature distribution of said object. A plurality of individual temperature influencing elements is distributed on said object support side to face said back side of said flat object, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said object's back side as desired.
- A temperature-controlled chuck according to the invention provides the possibility to influence the temperature of a wafer, particularly the back side of a wafer, in a partial area in a manner as desired. For example, by use of an inventive temperature-controlled chuck the temperature can be varied precisely in tenths of a degree centigrade and be controlled overall to ±1° C. Hence, a good temperature uniformity across the whole wafer would be provided. It is also possible to provide local modification to correct process distortions on a wafer. If, for example, the temperature in partial areas of the wafer can be precisely controlled, then it is also possible to use a variation of the chuck temperature to adjust for chip magnification error, instead of changing lens, housing pressure or having an extra field lens for magnification adjustment. It could also be used in conjunction with current lens magnification correction systems, so that a coarse chip mag correction would be done using temperature adjustment while the fine correction will be still done as of today. With such a preferred embodiment of the invention, a simpler lens design for an exposure tool is possible, and hence such an exposure tool can be constructed more cheaply.
- A preferred embodiment of an inventive temperature-controlled chuck comprises a plurality of piezoelectric elements, each piezoelectric element being individually controllable, such that each piezoelectric element is able to influence a localized area or a partial area of the object's back side. Due to a variation of the current and/or the voltage applied to the piezoelectric elements, the temperature of the object's back side can be controlled in a desired manner.
- A further embodiment of an inventive temperature-controlled chuck comprises the above-mentioned temperature influencing piezoelectric elements. At least some of these piezoelectric elements are arranged such that they are able to contact the back side of a flat object such as a wafer. Due to the contact of the piezoelectric elements with said back side of said flat object, influencing of the temperature of the back side of said flat object is improved.
- In an alternate embodiment of the invention a plurality of support pin elements are distributed on said object support side and arranged to contact said back side of said flat object. In such an embodiment of the invention, the wafer is held on the support pin elements and piezoelectric elements also distributed between the support pin elements serve to measure or sense the temperature and serve to influence the temperature in a desired manner.
- Another embodiment of the invention comprises individual fiber optics being illuminated with infrared radiation to influence the temperature of localized areas of the object's back side.
- If fiber optics as mentioned above are used to influence the temperature of localized areas of the object's back side, in a preferred embodiment of the invention the tops of these temperature influencing fiber optics are arranged such that they are spaced from the object's back side.
- A further preferred embodiment of the invention comprises a plurality of fiber optics illuminated with infrared radiation and a plurality of piezoelectric elements as temperature influencing elements. Due to the combination of fiber optics and piezoelectric elements a better temperature distribution of the object's back side and a better influence of the temperature distribution can be achieved.
- An alternative embodiment of the invention comprises also heat sink pins and heating elements as temperature influencing elements. Hence, in such an embodiment localized areas of the object's back side can not only be heated but also be cooled.
- Due to the use of temperature influencing elements which are selectively movable in close proximity with and away from said back side of said flat object, a better influence of the temperature of a localized area of the object's back side is achievable.
- Another embodiment of the invention comprises a temperature controller connected to that plurality of individual temperature influencing elements to control the temperature distribution of said flat object in a desired manner.
- A preferred embodiment of the invention refers to a temperature-controlled wafer chuck comprising a chuck body having a wafer support side and a back side opposing said wafer support side, said wafer support side being adapted to hold a wafer having a front side and a back side on the object's back side. A plurality of temperature sensing elements is distributed on said wafer support side, each of said temperature sensing elements being arranged to sense the temperature of a partial area of said wafer back side. A plurality of individual temperature influencing elements is distributed on said wafer support surface, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said wafer back side. A temperature controller is connected to said plurality of temperature sensing elements and said plurality of individual temperature influencing elements to control and/or regulate the temperature distribution of said flat object in a desired manner.
- A preferred embodiment of such a temperature-controlled wafer chuck comprises a temperature controller including at least one temperature detector and a control unit connected with said at least one temperature detector and controlling said temperature influencing elements.
- A preferred inventive method for controlling the temperature of a substantially flat object having a front side and a back side and being supported on said back side comprises the method steps of sensing the temperature of partial areas of the back side of said flat object, determining the object's temperature distribution on the basis of the temperatures measured in said temperature sensing step, and changing the temperature in at least some of said partial areas of said back side of said flat object in a desired manner.
- The method is particularly for controlling the temperature of a wafer held on a wafer chuck.
- In a preferred method according to the invention, the temperature of a partial area of said flat object is measured by a temperature sensing element of a plurality of temperature sensing elements distributed over the back side of said flat object.
- In a preferred embodiment these temperature sensing elements consist of a piezoelectric element.
- In a preferred method according to the invention the temperature of a partial area of said flat object is influenced by a temperature influencing element of a plurality of temperature influencing elements distributed over the back side of said flat object.
- In a preferred embodiment each temperature influencing element is an IR-optical fiber.
- In another preferred embodiment of the inventive method each temperature influencing element is a heat sink pin.
- In an alternative embodiment of the inventive method a piezoelectric element is used as a temperature influencing element.
- Another embodiment of the inventive method includes IR-optical fibers and piezoelectric elements and heat sink pins as temperature influencing elements.
- A preferred embodiment of a pre-align station of an exposure tool for wafers comprises:
- a chuck body having a wafer support side and a back side opposing said wafer support side, said wafer support side being adapted to hold a wafer having a front side and a back side on the object's back side. A plurality of temperature sensing elements is distributed on said wafer support side, each of said temperature sensing elements being arranged to sense the temperature of a partial area of said wafer back side. A plurality of individual temperature influencing elements is distributed on said wafer support surface, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said wafer back side. A temperature controller is connected to said plurality of temperature sensing elements and said plurality of individual temperature influencing elements to control the temperature distribution of said flat object as desired.
- A preferred embodiment of an exposure chuck in an exposure tool for wafers comprises
- a chuck body having a wafer support side and a back side opposing said wafer support side, said wafer support side being adapted to hold a wafer having a front side and a back side on the object's back side. A plurality of temperature sensing elements is distributed on said wafer support side, each of said temperature sensing elements being arranged to sense the temperature of a partial area of said wafer back side. A plurality of individual temperature influencing elements is distributed on said wafer support surface, each of said temperature influencing elements being arranged to influence the temperature of a partial area of said wafer back side. A temperature controller is connected to said plurality of temperature sensing elements and said plurality of individual temperature influencing elements to control the temperature distribution of said flat object as desired.
- Preferred embodiments of the present invention will be described in greater detail with reference to the accompanying drawings, wherein like members bear like reference numerals and wherein:
- FIG. 1 is a schematic side view of a wafer chuck according to a first embodiment of the present invention;
- FIG. 2 is a schematic top plan view of the wafer chuck in FIG. 1 showing the distribution of piezoelectric elements and IR-fiber optics;
- FIG. 3 is a schematic side view of a second embodiment of a wafer chuck according to the present invention;
- FIG. 4 is a schematic top plan view of the second embodiment of the wafer chuck of FIG. 3;
- FIG. 5 is a schematic side view of a third embodiment of a wafer chuck according to the invention;
- FIG. 6 is a schematic top plan view of the third embodiment of the wafer chuck according to the invention;
- FIG. 7 is a schematic side view of a fourth embodiment of the wafer chuck according to the invention;
- FIG. 8 is a schematic top plan view of the fourth embodiment of the wafer chuck of FIG. 7;
- FIG. 9 is a schematic top plan view of the back side of a wafer having a localized area with a localized area having a temperature lower than the average temperature of the wafer's back side; and
- FIG. 10 is a schematic flow diagram of a preferred embodiment of the method according to the invention.
- The present invention provides an improved wafer chuck, especially an improved lithography wafer chuck, that is especially useful for holding small as well as large wafers, such as having a diameter of, for example, 300 mm.
- FIG. 1 illustrates simplified a side view of a
wafer chuck body 20 having awafer support side 21 and aback side 22 opposing said wafer support side. On the wafer support side 21 a plurality ofpiezoelectric pin elements 4 are distributed. Thesepiezoelectric pins 4 have atop surface 5 arranged to support aback side 3 of awafer 1. Thewafer 1 has also afront side 2 opposing the wafer'sback side 3, which will be exposed in an exposure tool. - Each
piezoelectric pin 4 projects from thewafer support side 21 of thewafer chuck body 20 and are evenly distributed on thewafer support side 21, as illustrated in FIG. 2. If preferred, thepiezoelectric elements 4 can also be unevenly distributed. Between the piezoelectric elements IR-fiber optics 6 are arranged. Thesefiber optics 6 project from thewafer support side 21 of thechuck body 20, but the tops of these fiber optics are not as high as the tops of thepiezoelectric elements 4. Hence, the tops of thefiber optics 6 do not contact the wafer'sback side 3. As shown in FIG. 1, atemperature controller 30 is connected with eachpiezoelectric element 4 and each IR-fiber optic 6 via alead 31. - Referring to FIG. 2, a partial area of the
wafer chuck body 20 is shown in a top plan view. - Here, the tops of the piezo
electric elements 4 and the IR-fiber optics 6 are illustrated. The operation of a wafer chuck shown in FIGS. 1 and 2 is as follows: - A
wafer 1 is laid down on thetop surface 5 of thepiezoelectric pins 4 such that thewafer 1 lies on thetop surface 5 of thepiezoelectric pins 4 with the wafer'sback side 3. Now, by sensing or measuring a ΔV (voltage difference) of each piezoelectric pin 4 a ΔT on the wafer's back side is measured. Hence, the temperature distribution on the wafer'sback side 3 is available. In the preferred embodiment according to FIGS. 1 and 2 the temperature is now adjusted by using the IR-fiber optics 6. Due to thetemperature controller 30 it is possible to control each IR-fiber optic such that the temperature of a partial area of the wafer'sback side 3 can be influenced in a desired manner, that means here the temperature can be increased. The temperature increase of the partial area accompanying afiber optic 6 can be achieved by varying the pulse and intensity of the IR radiation. - Then again, the wafer distribution is measured by the
piezoelectric elements 4. Again, if necessary, one ormore fiber optics 6 are activated as necessary to achieve a temperature distribution within a desired temperature range, for example, 0.1° C. - It is to be noted that it is also possible to use holding pins instead of piezoelectric pins. The temperature is in such an embodiment measured by normal temperature sensing elements. The second embodiment of the wafer chuck according to the invention is shown in FIGS. 3 and 4. Here, contrary to the first embodiment of FIGS. 1 and 2, the IR-
fiber optics 8 are arranged in the center of the piezoelectric pins 4. The distribution of thepiezoelectric pins 4 and the centered IR-fiber optics 8 is illustrated in FIG. 4. With such an arrangement a higher density of piezoelectric elements and temperature influencingfiber optics 8 is achievable. Hence, the temperature distribution of the wafer'sback side 3 can be measured in a higher number of partial areas of the wafer'sback side 3. - The operation of the second embodiment according to FIGS. 3 and 4 is similar to the operation of the first embodiment.
- A third embodiment of the wafer chuck according to the invention is shown in FIGS. 5 and 6. Contrary to the second embodiment shown in FIGS. 3 and 4, here heat sink pins9 are distributed between the
piezoelectric pins 4 having in the center afiber optic 8. Again, the distribution of these elements mentioned above is shown in FIG. 6 in a schematic manner. - Here, the temperature of a partial area of the wafer's
back side 3 can be influenced such that the temperature can be increased or decreased. The temperature of a partial area of the wafer'sback side 3 can now be increased or decreased by activating one or more fiberoptic elements 8 and heat sink pins 9, respectively. Again, a temperature controller is arranged to control the heat sink pins 9, the IR-fiber optic elements 8 and thepiezoelectric elements 4. - It is to be noted that the
top surfaces 10 of the heat sink pins 9 do not contact the wafer'sback side 3. If desired, it is also possible that thesesurfaces 10 contact the wafer'sback side 3 to carry off heat from the wafer'sback side 3. - In a further preferred embodiment according to FIGS. 7 and 8, the
fiber optics 8 are not arranged in the center of thepiezoelectric elements 4, but are separate elements. All other features are similar to the embodiments shown in FIGS. 5 and 6. In FIG. 8 the distribution of thepiezoelectric elements 4, the heat sink pins 9 and the IR-fiber optic elements 8 is illustrated schematically. - If, as for example shown in FIG. 9, a wafer's
back side 3 has a localizedarea 11 with a temperature lower than the average temperature of thewafer 1, thesetemperature influencing elements area 11 of thewafer 1 can be activated such that a more even temperature distribution of the wafer'sback side 3 is achievable. - In the flow diagram of FIG. 10 the various method steps of the method according to the invention are shown. In a method step S1 the temperature difference AT on the wafer's back side is measured. If necessary, to obtain a more even temperature distribution of the wafer in a method step S2 the temperature is adjusted by activating one or more IR fiber optics or heat sinks or a combination of IR fiber optics and heat sinks or of piezo electric elements. If ΔT is equal or less than ΔTmax then the wafer is exposed in a method step S4. If ΔT is greater than ΔTmax again the temperature difference ΔT on the wafer's back side is measured and in a method step S2 the temperature is adjusted. Here, ΔTmax is about 0.1° C. or within the range of 0.1° C. and 1° C.
Claims (26)
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/871,854 US6495802B1 (en) | 2001-05-31 | 2001-05-31 | Temperature-controlled chuck and method for controlling the temperature of a substantially flat object |
PCT/US2002/013170 WO2002099853A2 (en) | 2001-05-31 | 2002-04-24 | Temperature-controlled chuck and method for controlling the temperature of a substantially flat object |
CNB028109473A CN1291448C (en) | 2001-05-31 | 2002-04-24 | Temperature-controlled chuck and method for controlling temperature of substantially flat object |
KR1020037015617A KR100890874B1 (en) | 2001-05-31 | 2002-04-24 | Temperature-controlled chuck and method for controlling the temperature of a substantially flat object |
JP2003502868A JP4476622B2 (en) | 2001-05-31 | 2002-04-24 | Temperature control chuck |
TW091109337A TWI233174B (en) | 2001-05-31 | 2002-05-06 | Temperature-controlled chuck and method for controlling the temperature of a substantially flat object |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/871,854 US6495802B1 (en) | 2001-05-31 | 2001-05-31 | Temperature-controlled chuck and method for controlling the temperature of a substantially flat object |
Publications (2)
Publication Number | Publication Date |
---|---|
US20020179585A1 true US20020179585A1 (en) | 2002-12-05 |
US6495802B1 US6495802B1 (en) | 2002-12-17 |
Family
ID=25358296
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/871,854 Expired - Fee Related US6495802B1 (en) | 2001-05-31 | 2001-05-31 | Temperature-controlled chuck and method for controlling the temperature of a substantially flat object |
Country Status (6)
Country | Link |
---|---|
US (1) | US6495802B1 (en) |
JP (1) | JP4476622B2 (en) |
KR (1) | KR100890874B1 (en) |
CN (1) | CN1291448C (en) |
TW (1) | TWI233174B (en) |
WO (1) | WO2002099853A2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005033801A2 (en) * | 2003-09-12 | 2005-04-14 | Asml Holding N.V. | Adaptive thermal control of lithographic chemical processes |
US8908143B2 (en) | 2011-12-27 | 2014-12-09 | Asml Netherlands B.V. | Substrate holder, lithographic apparatus, and device manufacturing method involving a heater and/or temperature sensor |
US10345723B2 (en) | 2016-02-24 | 2019-07-09 | Asml Netherlands B.V. | Substrate handling system and lithographic apparatus |
US10736182B2 (en) * | 2014-07-02 | 2020-08-04 | Applied Materials, Inc. | Apparatus, systems, and methods for temperature control of substrates using embedded fiber optics and epoxy optical diffusers |
US10973088B2 (en) | 2016-04-18 | 2021-04-06 | Applied Materials, Inc. | Optically heated substrate support assembly with removable optical fibers |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7161121B1 (en) * | 2001-04-30 | 2007-01-09 | Lam Research Corporation | Electrostatic chuck having radial temperature control capability |
TWI260691B (en) * | 2003-03-06 | 2006-08-21 | Toshiba Corp | Pattern forming method and method of manufacturing semiconductor device using the same |
CN100444308C (en) * | 2003-05-07 | 2008-12-17 | 亚舍立技术公司 | Wide temperature range chuck system |
US20050156353A1 (en) * | 2004-01-15 | 2005-07-21 | Watts Michael P. | Method to improve the flow rate of imprinting material |
US20050158419A1 (en) * | 2004-01-15 | 2005-07-21 | Watts Michael P. | Thermal processing system for imprint lithography |
JP4765328B2 (en) * | 2004-04-16 | 2011-09-07 | 東京エレクトロン株式会社 | Processing device for workpiece |
EP2490073B1 (en) | 2011-02-18 | 2015-09-23 | ASML Netherlands BV | Substrate holder, lithographic apparatus, and method of manufacturing a substrate holder |
JP6085616B2 (en) | 2012-02-03 | 2017-02-22 | エーエスエムエル ネザーランズ ビー.ブイ. | Substrate holder, lithographic apparatus, device manufacturing method, and substrate holder manufacturing method |
KR101370049B1 (en) * | 2012-12-21 | 2014-03-06 | 주식회사 나래나노텍 | Device and method of measuring substrate temperature, and heat treatment chamber and apparatus of substrate having the same |
US9224583B2 (en) * | 2013-03-15 | 2015-12-29 | Lam Research Corporation | System and method for heating plasma exposed surfaces |
KR102423818B1 (en) | 2015-12-18 | 2022-07-21 | 삼성전자주식회사 | A electrostatic chuck assembly, a semiconductor manufacturing apparatus having the same, and a temperature mesuring method for electrostatic chuck |
CN113432737A (en) * | 2020-03-19 | 2021-09-24 | 长鑫存储技术有限公司 | Method for measuring and calibrating temperature of wafer chuck and temperature measuring system |
CN112405333B (en) * | 2020-12-04 | 2022-08-16 | 华海清科(北京)科技有限公司 | Chemical mechanical polishing device and polishing method |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5220171A (en) * | 1990-11-01 | 1993-06-15 | Canon Kabushiki Kaisha | Wafer holding device in an exposure apparatus |
KR920012893A (en) * | 1990-12-28 | 1992-07-28 | 이헌조 | Temperature measuring sensor |
EP0633608B1 (en) * | 1993-07-08 | 2000-10-11 | Sumitomo Metal Industries, Ltd. | Process for producing a pin-finned heat sink |
WO1995028002A1 (en) * | 1994-04-08 | 1995-10-19 | Hitachi, Ltd. | Method and device for processing semiconductor wafer |
JPH07283095A (en) * | 1994-04-08 | 1995-10-27 | Hitachi Ltd | Method and system for processing semiconductor substrate |
WO1998005060A1 (en) * | 1996-07-31 | 1998-02-05 | The Board Of Trustees Of The Leland Stanford Junior University | Multizone bake/chill thermal cycling module |
JP3379394B2 (en) * | 1997-07-28 | 2003-02-24 | 松下電器産業株式会社 | Plasma processing method and apparatus |
JP3246891B2 (en) * | 1998-02-03 | 2002-01-15 | 東京エレクトロン株式会社 | Heat treatment equipment |
WO2000031777A1 (en) * | 1998-11-20 | 2000-06-02 | Steag Rtp Systems, Inc. | Fast heating and cooling apparatus for semiconductor wafers |
-
2001
- 2001-05-31 US US09/871,854 patent/US6495802B1/en not_active Expired - Fee Related
-
2002
- 2002-04-24 JP JP2003502868A patent/JP4476622B2/en not_active Expired - Fee Related
- 2002-04-24 KR KR1020037015617A patent/KR100890874B1/en not_active IP Right Cessation
- 2002-04-24 CN CNB028109473A patent/CN1291448C/en not_active Expired - Fee Related
- 2002-04-24 WO PCT/US2002/013170 patent/WO2002099853A2/en active Application Filing
- 2002-05-06 TW TW091109337A patent/TWI233174B/en not_active IP Right Cessation
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2005033801A2 (en) * | 2003-09-12 | 2005-04-14 | Asml Holding N.V. | Adaptive thermal control of lithographic chemical processes |
WO2005033801A3 (en) * | 2003-09-12 | 2005-10-27 | Asml Holding Nv | Adaptive thermal control of lithographic chemical processes |
US8908143B2 (en) | 2011-12-27 | 2014-12-09 | Asml Netherlands B.V. | Substrate holder, lithographic apparatus, and device manufacturing method involving a heater and/or temperature sensor |
US9298104B2 (en) | 2011-12-27 | 2016-03-29 | Asml Netherlands B.V. | Substrate holder, lithographic apparatus, and device manufacturing method |
US10736182B2 (en) * | 2014-07-02 | 2020-08-04 | Applied Materials, Inc. | Apparatus, systems, and methods for temperature control of substrates using embedded fiber optics and epoxy optical diffusers |
US10345723B2 (en) | 2016-02-24 | 2019-07-09 | Asml Netherlands B.V. | Substrate handling system and lithographic apparatus |
US10973088B2 (en) | 2016-04-18 | 2021-04-06 | Applied Materials, Inc. | Optically heated substrate support assembly with removable optical fibers |
Also Published As
Publication number | Publication date |
---|---|
WO2002099853A2 (en) | 2002-12-12 |
TWI233174B (en) | 2005-05-21 |
KR20040007622A (en) | 2004-01-24 |
WO2002099853B1 (en) | 2003-11-20 |
JP4476622B2 (en) | 2010-06-09 |
CN1537320A (en) | 2004-10-13 |
US6495802B1 (en) | 2002-12-17 |
WO2002099853A3 (en) | 2003-02-20 |
CN1291448C (en) | 2006-12-20 |
JP2004531067A (en) | 2004-10-07 |
KR100890874B1 (en) | 2009-03-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6495802B1 (en) | Temperature-controlled chuck and method for controlling the temperature of a substantially flat object | |
EP1599891B1 (en) | Critical dimension variation compensation across a wafer by means of local wafer temperature control | |
US7156924B2 (en) | System and method for heating and cooling wafer at accelerated rates | |
JP3764278B2 (en) | Substrate heating apparatus, substrate heating method, and substrate processing method | |
KR860002082B1 (en) | Forming method and apparatus of resistor pattern | |
US7831135B2 (en) | Method and system for controlling bake plate temperature in a semiconductor processing chamber | |
US6303526B1 (en) | Temperature controlled spin chuck | |
US5336641A (en) | Rapid thermal annealing using thermally conductive overcoat | |
EP1119028B1 (en) | Apparatus for curing resist | |
KR20050121913A (en) | Apparatus for baking | |
JPH11168056A (en) | Wafer-holding device | |
US20100112468A1 (en) | Self-correcting substrate support system for focus control in exposure systems | |
TW201110194A (en) | Semiconductor manufacturing process and apparatus for the same | |
KR100532397B1 (en) | Plate for controlling a substrate temperature and method for fabricating the same | |
US20020092839A1 (en) | Method of making an integrated circuit | |
JP3626284B2 (en) | Heat treatment method and apparatus for mask substrate | |
JP3571634B2 (en) | Substrate processing equipment | |
KR20060023220A (en) | Baker for manufacturing semiconductor device | |
KR20030024168A (en) | A bake apparatus and baking method using this stage | |
JPH11354399A (en) | Substrate heating apparatus | |
KR20030005499A (en) | Bake plate of semiconductor manufactoring system and temperature control apparatus use with the same | |
KR20020096609A (en) | Method for controlling temperature of bake equipment | |
KR20040003372A (en) | A Hot Plate Structure | |
JPS60135950A (en) | Production for mask | |
JP2000091215A (en) | Method and device for manufacturing semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: MOTOROLA, INC., ILLINOIS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:MALTABES, JOHN G.;CHARLES, ALAIN B.;MAUTZ, KARL E.;REEL/FRAME:011882/0949;SIGNING DATES FROM 20010422 TO 20010504 |
|
AS | Assignment |
Owner name: FREESCALE SEMICONDUCTOR, INC., TEXAS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MOTOROLA, INC.;REEL/FRAME:015698/0657 Effective date: 20040404 Owner name: FREESCALE SEMICONDUCTOR, INC.,TEXAS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:MOTOROLA, INC.;REEL/FRAME:015698/0657 Effective date: 20040404 |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
AS | Assignment |
Owner name: CITIBANK, N.A. AS COLLATERAL AGENT, NEW YORK Free format text: SECURITY AGREEMENT;ASSIGNORS:FREESCALE SEMICONDUCTOR, INC.;FREESCALE ACQUISITION CORPORATION;FREESCALE ACQUISITION HOLDINGS CORP.;AND OTHERS;REEL/FRAME:018855/0129 Effective date: 20061201 Owner name: CITIBANK, N.A. AS COLLATERAL AGENT,NEW YORK Free format text: SECURITY AGREEMENT;ASSIGNORS:FREESCALE SEMICONDUCTOR, INC.;FREESCALE ACQUISITION CORPORATION;FREESCALE ACQUISITION HOLDINGS CORP.;AND OTHERS;REEL/FRAME:018855/0129 Effective date: 20061201 |
|
AS | Assignment |
Owner name: CITIBANK, N.A., AS COLLATERAL AGENT,NEW YORK Free format text: SECURITY AGREEMENT;ASSIGNOR:FREESCALE SEMICONDUCTOR, INC.;REEL/FRAME:024397/0001 Effective date: 20100413 Owner name: CITIBANK, N.A., AS COLLATERAL AGENT, NEW YORK Free format text: SECURITY AGREEMENT;ASSIGNOR:FREESCALE SEMICONDUCTOR, INC.;REEL/FRAME:024397/0001 Effective date: 20100413 |
|
REMI | Maintenance fee reminder mailed | ||
LAPS | Lapse for failure to pay maintenance fees | ||
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20101217 |
|
AS | Assignment |
Owner name: FREESCALE SEMICONDUCTOR, INC., TEXAS Free format text: PATENT RELEASE;ASSIGNOR:CITIBANK, N.A., AS COLLATERAL AGENT;REEL/FRAME:037354/0225 Effective date: 20151207 Owner name: FREESCALE SEMICONDUCTOR, INC., TEXAS Free format text: PATENT RELEASE;ASSIGNOR:CITIBANK, N.A., AS COLLATERAL AGENT;REEL/FRAME:037356/0553 Effective date: 20151207 Owner name: FREESCALE SEMICONDUCTOR, INC., TEXAS Free format text: PATENT RELEASE;ASSIGNOR:CITIBANK, N.A., AS COLLATERAL AGENT;REEL/FRAME:037356/0143 Effective date: 20151207 |